WO2021039130A1 - Energization control device and power supply unit - Google Patents

Abstract

This energization control device (D) comprises: inter-system SWs (31a, 31b) and a SW control circuit (40) which is an inter-system switch control unit. The inter-system SW switches between energization and interruption of current in an inter-system bus (30). The SW control circuit controls the operating state of the inter-system SW. The SW control circuit acquires a discharge current value ISMR which is the magnitude of the current discharged from a sub power supply (B20). Further, when the acquired discharge current value ISMR rises beyond an over-discharge threshold value Ith, the SW control circuit considers that a ground fault abnormality has occurred and shuts off the inter-system SW.

Description

Energization control device and power supply unit Cross-reference of related applications

This application is based on Patent Application No. 2019-156093 filed in Japan on August 28, 2019 and Patent Application No. 2020-091648 filed in Japan on May 26, 2020. The contents of the description are used here.

The disclosure in this specification relates to an energization control device and a power supply unit.

In the redundancy system described in Patent Document 1, power supply can be made redundant by making it possible to supply electric power from either of the two batteries to the load group mounted on the vehicle. This redundant system includes a first system bus, a second system bus, and an intersystem bus. The first system bus transmits the electric power supplied from the first battery to the first load. The second system bus transmits the electric power supplied from the second power source to the second load. The inter-system bus electrically connects the first system bus and the second system bus.

In such a redundant system, even if a ground fault occurs in either of the two system buses, the voltage of both the first system bus and the second system bus drops significantly. In this case, there is a concern that both the first and second loads may malfunction. In response to this concern, the inter-system bus is provided with an inter-system switch for switching between energization and interruption of current. Then, in the normal state where no ground fault has occurred, the inter-system switch is turned on to exert the redundancy function. On the other hand, when the current flowing through the inter-system bus rises beyond the threshold value, it is considered that a ground fault has occurred and the inter-system switch is shut off. As a result, both the first and second system buses are prevented from falling into a state of a large voltage drop (abnormally low voltage state) that causes a malfunction.

Japanese Patent No. 6432355

By the way, there is a case where it is desired to supply power from the first system to the second battery to charge the second battery, and in this case, a large current flows through the inter-system bus. Therefore, it is difficult to distinguish between a case where a large current flows through the inter-system bus due to a ground fault abnormality and a case where a large current flows through the inter-system bus due to the above charging. Therefore, in the above control of shutting off the inter-system switch when the current flowing through the inter-system bus rises beyond the threshold value, there is a concern that the inter-system switch may be shut off by erroneously detecting charging as a ground fault. In addition, there is a concern that the inrush current may be erroneously detected as a current caused by a ground fault and the inter-system switch may be cut off. Further improvements are required in the energization control device in the above viewpoint or in other viewpoints not mentioned.

One purpose to be disclosed is to provide an energization control device that suppresses false detection of ground faults when shutting off the inter-system switch when a ground fault occurrence is detected.

In order to achieve the above object, one aspect disclosed is
The first system bus that transmits the power supplied from the first power supply to the first load, and
The second system bus that transmits the power supplied from the second power supply to the second load, and
An inter-system bus that electrically connects the first system bus and the second system bus,
In the energization control device applied to the redundant power supply system for vehicles equipped with
An inter-system switch that switches between energizing and shutting off current in the inter-system bus,
An inter-system switch control unit that controls the operating state of the inter-system switch,
With
The inter-system switch control unit
Obtain the discharge current value, which is the magnitude of the current discharged from the second power supply,
When the acquired discharge current value rises beyond the over-discharge threshold value, it is considered that a ground fault has occurred and the inter-system switch is controlled to the cutoff state.

According to the energization control device disclosed here, the magnitude of the current discharged from the second power supply (discharge current value) is used as the current used for detecting the ground fault abnormality. This discharge current value becomes a negative value when it is desired to supply power from the first system to the second power source to charge the second power source. Therefore, when charging the second power source, the discharge current value does not exceed the over-discharge threshold value.

On the other hand, when power is supplied from the second power supply to the second load, etc., it becomes a positive value. Therefore, when a ground fault occurs in the second system bus, the first system bus, or the like, it is expected that the discharge current value will increase and exceed the over-discharge threshold value. As described above, according to the energization control device, the direction of the current used for detecting the ground fault abnormality is different between when the second power source is charged and when the ground fault occurs. Therefore, even if the current flowing through the inter-system bus increases as the second power source is charged, the possibility of erroneously detecting a ground fault and shutting off the inter-system switch can be reduced.

Another aspect disclosed is
The first system bus that transmits the power supplied from the first power supply to the first load, and
The second system bus that transmits the power supplied from the second power supply to the second load, and
An inter-system bus that electrically connects the first system bus and the second system bus,
In the energization control device applied to the redundant power supply system equipped with
An inter-system switch that switches between energizing and shutting off current in the inter-system bus,
An inter-system switch control unit that controls the operating state of the inter-system switch,
With
The inter-system switch control unit
Obtain the current value, which is the magnitude of the current flowing through one of the first system bus, the second system bus, and the inter-system bus.
It is determined whether or not the current slope, which is the amount of change in the acquired current value per unit time, exceeds the predetermined current slope threshold value, and based on the judgment result that the current slope exceeds the current slope threshold value, between the systems. Control the switch to the cutoff state.

According to the energization control device disclosed here, the current gradient is used to control the inter-system switch. The current that flows when a ground fault occurs has a larger current gradient than the inrush current. At the time of a ground fault, the current slope is expected to exceed the current slope threshold. Therefore, when an inrush current flows, it is possible to reduce the risk of erroneously detecting a ground fault and shutting off the inter-system switch.

The plurality of aspects disclosed herein employ different technical means to achieve their respective objectives. The reference numerals in parentheses described in the claims exemplify the correspondence with the parts of the embodiments described later, and are not intended to limit the technical scope. The objectives, features, and effects disclosed herein will be made clearer by reference to the subsequent detailed description and accompanying drawings.

It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 1st Embodiment. It is a block diagram which shows the operation when the ground fault occurs in the sub system bus in 1st Embodiment. In the first embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the second embodiment, it is a block diagram which shows the operation when the ground fault occurs in the main system bus. In the second embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the third embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. It is a block diagram which shows the operation when the ground fault occurs in the sub system bus in 4th Embodiment. In the fourth embodiment, it is a flowchart which shows the processing procedure of control by an energization control device. It is a block diagram which shows the operation when the ground fault occurs in the main system bus in 5th Embodiment. FIG. 5 is a flowchart showing a processing procedure of control by an energization control device in the fifth embodiment. In the sixth embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. It is a block diagram which shows the operation when the ground fault occurs in the main system bus in 7th Embodiment. In the seventh embodiment, it is a flowchart which shows the processing procedure of control by an energization control device. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 8th Embodiment. In the eighth embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. It is a flowchart which shows the modification of control. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 9th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 9th Embodiment. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 10th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 10th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 11th Embodiment. In the eleventh embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. It is a circuit diagram which shows typically the redundant power supply system which concerns on 12th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 13th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 14th Embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 15th Embodiment. FIG. 15 is a flowchart showing an example of a processing procedure of control by an energization control device in the fifteenth embodiment. FIG. 15 is a flowchart showing an example of a processing procedure of control by an energization control device in the fifteenth embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 16th Embodiment. 16 is a flowchart showing an example of a processing procedure of control by an energization control device in the 16th embodiment. 16 is a flowchart showing an example of a processing procedure of control by an energization control device in the 16th embodiment. It is a circuit diagram which shows typically the redundant power supply system which concerns on 17th Embodiment. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 18th Embodiment. In the eighteenth embodiment, it is a figure which shows an example of the correspondence relationship between the overcurrent determination and the current inclination determination, and the abnormality determination. In the eighteenth embodiment, it is a figure which shows an example of the correspondence relationship between the overcurrent determination and the current inclination determination, and the abnormality determination. In the eighteenth embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 19th Embodiment. In the 19th embodiment, it is a figure which shows an example of the correspondence relationship between the overcurrent determination and the current inclination determination, and the abnormality determination. It is a figure which shows the reference example of a redundant power supply system. In the reference example, it is a figure which shows the relationship with the ground fault current, the inrush current, and the overcurrent threshold. It is a block diagram which shows the outline of the whole redundant power supply system which concerns on 20th Embodiment. In the twentieth embodiment, it is a flowchart which shows the processing procedure of control by an energization control device. In the 21st embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the 22nd embodiment, it is a flowchart which shows the processing procedure of the control by an energization control device. In the 23rd embodiment, it is a flowchart which shows the processing procedure of control by an energization control device.

Hereinafter, a plurality of embodiments of the present disclosure will be described with reference to the drawings. In addition, duplicate description may be omitted by assigning the same reference numerals to the corresponding components in each embodiment. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration.

(First Embodiment)
In the present embodiment shown in FIG. 1, an example in which the energization control device D is applied to a redundant power supply system of a vehicle which is a moving body will be described. However, the energization control device D can also be applied to a redundant power supply system other than that for vehicles. It can also be applied to moving objects other than vehicles, such as flying objects such as drones, and redundant power supply systems such as ships, construction machinery, and agricultural machinery.

The redundant power supply system shown in FIG. 1 includes a main power supply B10 and a sub power supply B20 as a first power supply and a second power supply mounted on the vehicle. Although only one main power supply B10 and one sub power supply B20 are shown in FIG. 1, a plurality of main power supplies B10 and / or a plurality of sub power supplies B20 may be provided as vehicle-mounted power supplies.

These main power supply B10 and sub power supply B20 are secondary batteries that generate a voltage of, for example, about 12V. The charging capacity of the main power supply B10 is larger than the charging capacity of the sub power supply B20. The energy density of the sub power supply B20 is higher than the energy density of the main power supply B10. For example, a lead storage battery is used for the main power supply B10, and a lithium ion battery is used for the sub power supply B20.

Further, the redundant power supply system includes a main system bus 10 (first system bus), a sub system bus 20 (second system bus), and an inter-system bus 30. The main system bus 10 transmits the electric power supplied from the main power source B10 to the first loads L10 and L11. The sub system bus 20 transmits the electric power supplied from the sub power source B20 to the second loads L20 and L21. The inter-system bus 30 electrically connects the main system bus 10 and the sub-system bus 20.

Specifically, one end of the inter-system bus 30 is connected to the junction box (JB11) of the main system, and the other end of the inter-system bus 30 is connected to the junction box (JB21) of the sub system.

In the following description, among the main system buses 10, the bus that connects JB11 and the main power supply B10 is called the main power supply side bus 10a, and the bus that connects JB11 and the first loads L10 and L11 is the main load side bus 10b. Called. Among the sub system buses 20, the bus connecting the JB 21 and the sub power supply B20 is called the sub power supply side bus 20a, and the bus connecting the JB 21 with the second loads L20 and L21 is called the sub load side bus 20b. Of the inter-system buses 30, the bus that connects the inter-system switch 31a and JB11, which will be described later, is called the main inter-system bus 30a. Of the inter-system buses 30, the bus that connects the inter-system switch 31b and JB21, which will be described later, is called the sub-side inter-system bus 30b. The JB 11 corresponds to the first node located between the main power supply B10 and the first load in the main system bus 10. The JB 21 corresponds to a second node located between the sub power supply B20 and the second load in the sub system bus 20.

A generator G10 (alternator) is connected to the main system bus 10 via JB11. The electric power output from the generator G10 is used for charging the main power source B10, charging the sub power source B20, supplying the first loads L10 and L11 and the second loads L20 and L21. It is also possible to charge the sub power source B20 from the main power source B10 via the inter-system bus 30. It is also possible to charge the main power supply B10 from the sub power supply B20 via the inter-system bus 30.

In the case of a hybrid vehicle having an engine and a drive motor as a power source, or an electric vehicle having a drive motor as a power source, a high-voltage power source may be provided as a power source for the drive motor. The voltage of the high-voltage power supply may be stepped down by a DC-DC converter so that the main power supply B10 or the like can be charged.

Further, the redundant power supply system includes a set of inter-system switches 31a and 31b provided on the inter-system bus 30. Each of the set of inter-system switches 31a and 31b is composed of a semiconductor switching element made of MOSFET. Due to the structure of MOSFET, a body diode (parasitic diode) is formed between drain and source. Therefore, even if the MOSFET is cut off, the current flows through the body diode, so that the bidirectional current cannot be cut off with only one MOSFET. In a redundant power supply system, current may flow in both directions between the main system bus 10 and the sub system bus 20. Therefore, in the present embodiment, a pair of MOSFETs in which the forward directions of the body diodes are opposite to each other are adopted as one set of inter-system switches 31a and 31b. As a result, when a power failure occurs, one set of inter-system switches 31a and 31b are both cut off, so that the current can be completely cut off regardless of the direction in which the current flows.

Further, the redundant power supply system includes a set of cutoff switches 22a and 22b provided on the sub power supply side bus 20a. Each of the set of cutoff switches 22a and 22b is composed of a semiconductor switching element made of MOSFET. A pair of MOSFETs in which the forward directions of the body diodes are opposite to each other are adopted as one set of cutoff switches 22a and 22b.

In the following description, one set of inter-system switches 31a and 31b and one set of cut- off switches 22a and 22b may be simply referred to as inter-system SW and system main relay (SMR). The inter-system SW and SMR are not limited to MOSFETs, and other semiconductor switching elements may be used. At this time, when a semiconductor switching element such as a so-called IGBT in which a body diode does not exist is adopted, the semiconductor switching element alone can be used as an inter-system SW or SMR. Although only one set of intersystem switches 31a and 31b and one set of cutoff switches 22a and 22b are shown in FIG. 1, a plurality of sets of these switches may be provided.

As described above, the redundant power supply system is provided with a plurality of power supplies such as the main power supply B10 and the sub power supply B20. The reason is that even if power cannot be supplied from one power source, power can be supplied from the remaining power sources to prevent the in-vehicle load from becoming inoperable. Specific examples of the inability to supply power include the case where the power supply itself fails, the case where a ground fault occurs at any part of the electrical wiring path such as each bus or junction box, and the like.

The in-vehicle load corresponds to the first loads L10 and L11 and the second loads L20 and L21 described above. In-vehicle loads are classified into general loads and important loads. These two types of loads are connected to each of the main load side bus 10b and the sub load side bus 20b.

The general loads L10 and L20 are loads that have little influence on the running of the vehicle even if the worst operation is stopped when the power supply fails. Specific examples of the general loads L10 and L20 include a power window, an electric fan for cooling the radiator, an audio device, a device for air-conditioning the vehicle interior, and the like.

The important loads L11 and L21 are loads that need to be continued even when one of the main power supply B10 and the sub power supply B20 fails and the inter-system SW is turned off (cut off). Specific examples of the important loads L11 and L21 include a drive motor for traveling, a braking device, a power steering device, and the like. A pair of important loads L11 and L21 have different types of functions such as a camera and a distance measuring device for monitoring the front of a vehicle, even if they are made redundant by one component such as completely redundant power steering. It is also possible to use a combination realized by the device. Then, one important load L11 is connected to the main load side bus 10b, and the other important load L21 is connected to the sub load side bus 20b, so that the redundancy of the power supply is ensured.

For example, in the configuration shown in FIG. 1, when the sub system bus 20 has a ground fault, the power supply from the main power supply B10 to the first loads L10 and L11 is normally performed by switching the inter-system SW from the conductive state to the cutoff state. You can continue. As a result, for example, when the first loads L10 and L11 are components necessary for vehicle traveling, the vehicle can continue traveling even if the sub system bus 20 has a ground fault.

Further, the redundant power supply system includes a switch control circuit (SW control circuit 40) that controls the operation of the inter-system SW and SMR. The SW control circuit 40 when controlling the inter-system SW corresponds to the "power switch control unit", and the SW control circuit 40 when controlling the SMR corresponds to the "inter-system switch control unit".

The SW control circuit 40 acquires the inter-system current value IISO, which is the magnitude of the current flowing through the inter-system SW, and the discharge current value ISMR, which is the magnitude of the current discharged from the sub power supply B20. Explaining a specific method for acquiring the current value, a shunt resistor 31c is connected to a portion of the inter-system bus 30 between one set of inter-system switches 31a and 31b. Further, a shunt resistor 22c is connected to a portion of the sub power supply side bus 20a between one set of cutoff switches 22a and 22b. Then, the SW control circuit 40 detects the potentials across the shunt resistors 22c and 31c, and calculates the inter-system current value IISO and the discharge current value ISMR based on the potential difference between the two ends.

The inter-system current value IISO is defined as a positive value in the direction in which the current flows from the side of the main system bus 10 to the side of the sub-system bus 20 through the inter-system bus 30. The discharge current value ISMR is defined with the direction of discharge from the sub power supply B20 as a positive value. Further, the cutoff switches 22a and 22b and the shunt resistor 22c are unitized as one SMR device 22. Further, the inter-system switches 31a and 31b and the shunt resistor 31c are unitized as one inter-system device 31.

Further, the redundant power supply system includes a higher-level control circuit 50 (upper-level control unit) that commands the control content to the SW control circuit 40. The upper control circuit 50 commands the operation of the inter-system SW and SMR based on the charging state of the main power source B10 and the sub power source B20, the power generation state of the generator G10, the vehicle running state, the amount of power required by the load, and the like. When an abnormality such as a ground fault is not detected, the SW control circuit 40 controls the operation of the inter-system SW and SMR according to the command of the host control circuit 50 (normal control). When a ground fault or the like is detected, the SW control circuit 40 gives priority to the command of the upper control circuit 50, and the SW control circuit 40 has the inter-system SW and SMR based on the acquired inter-system current value IISO and discharge current value ISMR. Controls the operation of (control in case of abnormality).

In normal control, when the vehicle start switch is turned on, the SMR is turned on (energized) and the on operation is continued. However, when it is predicted that the sub-power supply B20 will fall into an over-discharged state, the SMR is turned off (cut-off operation) to prevent the sub-power supply B20 from being over-discharged. Further, when the sub power supply B20 is in an overheated state, the SMR is turned off to avoid thermal damage to the sub power supply B20. In this case, the power supply to the second loads L20 and L21 is supplied from the main system bus 10 through the intersystem bus 30. In the normal control of the inter-system SW, on operation and off operation are switched according to the charging state of the main power source B10 and the sub power source B20, the power generation state of the generator G10, the load required electric energy, and the like.

For example, when charging the sub power supply B20, the inter-system SW is turned on to supply power from the main power supply B10 or the generator G10 to the sub power supply B20. Further, when the sub power source B20 is charged with the regenerative energy generated by the generator G10, the inter-system SW is turned on. Further, when power is supplied from the sub power source B20 to the main power source B10 to charge the main power source B10, the inter-system SW is turned on. Further, the operation of the inter-system SW is controlled so that the terminal voltage (main voltage) of the main power supply B10 becomes higher than the terminal voltage (sub-voltage) of the sub power supply B20. For example, when the sub voltage becomes higher than the main voltage, the inter-system SW is turned off so that the sub power supply B20 is not charged. In normal control, the inter-system SW may be always on.

The SW control circuit 40 and the upper control circuit 50 include, for example, a memory as a non-transitional and substantive storage medium in which software is temporarily recorded, a processor that executes the software, an input / output interface, and the like. It can be configured by a equipped microcomputer. Alternatively, these control circuits may be realized by a dedicated hardware logic circuit, or may be realized by a combination of a processor and one or more hardware logic circuits. The upper control circuit 50 may be provided in an ECU different from the control unit (ECU) having the SW control circuit 40, or may be provided in a common ECU.

Next, the abnormal time control executed by the SW control circuit 40 will be described with reference to FIGS. 2 and 3.

If a ground fault occurs in the sub-load side bus 20b as illustrated in FIG. 2 when the inter-system SW is on-operated together with the SMR in normal control, the ground fault location at the moment of the ground fault occurrence A large amount of current flows into. That is, a large current flows from the main power supply B10 to the ground fault portion through the main power supply side bus 10a, the inter-system bus 30 and the subload side bus 20b. As a result, the voltage of the main system bus 10 drops significantly, and there is a concern that the first load may malfunction. Further, a large current flows from the sub power supply B20 to the ground fault portion through the sub system bus 20. As a result, the voltage of the sub system bus 20 drops significantly, and there is a concern that the second load may malfunction.

Further, if the situation in which a large current flows in such a state is left unattended, the voltage drops significantly as described above, and the main power supply B10 falls into an over-discharged state, so that the main power supply B10 is transferred to the first loads L10 and L11. Power cannot be supplied. Therefore, in the abnormal time control, when such a ground fault occurrence in the sub system bus 20 is detected, the inter-system SW is turned off. As a result, both the main system bus 10 and the sub system bus 20 are prevented from falling into an abnormally low voltage state. Regarding SMR, in the present embodiment, the ON operation is continued even when the occurrence of a ground fault is detected. This is to continue the power supply from the sub power supply B20 to the second loads L20 and L21 during the period until the sub power supply B20 falls into the over-discharged state. However, in order to prevent the sub power supply B20 from falling into an over-discharged state, the SMR may be turned off as soon as the occurrence of a ground fault is detected.

Next, the processing procedure of the abnormal state control executed by the SW control circuit 40 will be described with reference to FIG. This process starts execution when the SW control circuit 40 is activated, and is repeatedly executed at a predetermined cycle.

First, in step S10, the operation of the inter-system SW and SMR is controlled according to the command of the host control circuit 50. In the example shown in FIG. 3, the SMR and the system-to-system SW are turned on (energized). In the following step S20, the discharge current value ISMR is detected (acquired) based on the potential difference between both ends of the shunt resistor 22c. In the following step S30, it is determined whether or not the discharge current value ISMR detected in step S20 is larger than the preset over-discharge threshold value Is.

When it is determined that the discharge current value ISMR is larger than the over-discharge threshold value Is, it is considered that a ground fault has occurred, and the inter-system SW is turned off (cut off) in the following step S40. In step S40, the inter-system SW is turned off regardless of the content of the command from the host control circuit 50. The above-mentioned "ground fault abnormality" is not limited to the ground fault in the sub system bus 20 as shown in FIG. For example, when a ground fault occurs in the main system bus 10, a ground fault in the JBs 11 and 21, and a ground fault in the main power supply B10, the discharge current value ISMR becomes larger than the over-discharge threshold value Is. These ground faults can also cause "ground fault abnormalities".

When step S40 is executed, unless there is a trigger such as a reset signal, the interruption of the inter-system SW is latched regardless of the command content from the host control circuit 50. That is, the SW control circuit 40 continues to cut off the SW between the systems so that the power is not supplied by the command from the host control circuit 50.

The over-discharge threshold value Is used for the determination in step S30 is set to a positive value. Therefore, when the sub power source B20 is charged, the discharge current value ISMR becomes a negative value, so that it is not determined as a ground fault abnormality in step S30.

As described above, the energization control device D according to the present embodiment includes an inter-system SW and a SW control circuit 40 (inter-system switch control unit). Then, the SW control circuit 40 acquires the discharge current value ISMR, which is the magnitude of the current discharged from the sub power supply B20. Then, when the acquired discharge current value ISMR rises beyond the over-discharge threshold value Is, it is considered that a ground fault has occurred and the inter-system SW is controlled to the cutoff state.

According to this, the magnitude of the current discharged from the sub power supply B20 (discharge current value ISMR) is used as the current used for detecting the ground fault abnormality. This discharge current value ISMR becomes a negative value when it is desired to supply power from the main power source B10 or the generator G10 to the sub power source B20 to charge the sub power source B20. Therefore, when the sub power source B20 is charged, the discharge current value ISMR does not exceed the over-discharge threshold value Is.

On the other hand, when power is supplied from the sub power supply B20 to the second loads L20 and L21, the value becomes a positive value. Therefore, when a ground fault occurs in the sub-load side bus 20b, it is expected that the discharge current value ISMR rises and exceeds the over-discharge threshold value Is. Therefore, according to the energization control device according to the present embodiment, the direction of the current used for detecting the ground fault abnormality is different between the time of charging the second power source and the time of the ground fault. Therefore, even if the inter-system current value IISO increases to the extent that it exceeds the over-discharge threshold value Is as the sub-power supply B20 is charged, the concern that it may be erroneously detected as a ground fault can be reduced.

According to the present embodiment, even if the following failure occurs when the inter-system SW is energized, it is regarded as a ground fault abnormality in step S30 of FIG. 3, and the inter-system SW is cut off. That is, a ground fault in the main system bus 10 and the inter-system bus 30, a failure in the main power supply B10 and the generator G10, a ground fault in the first loads L10 and L11 and the second loads L20 and L21, and the like.

Here, in a state where the redundant power supply system is mounted on an actual vehicle, the main system bus 10, the sub system bus 20, and the inter-system bus 30 have a predetermined physical length. Therefore, it can be said that these buses have equivalent series inductance (ESL) which is a parasitic inductance component. In FIGS. 1 and 2, the inductance L1 related to the main side intersystem bus 30a and the inductance L2 related to the sub side intersystem bus 30b are shown.

When a ground fault occurs in the sub system bus 20 as shown in FIG. 2 due to the presence of the above inductances L1 and L2, the inter-system current value IISO does not rise rapidly. Therefore, contrary to the present embodiment, if it is attempted to determine that a ground fault has occurred (ground fault abnormality) when the inter-system current value IISO exceeds the over-discharge threshold value Is, ground fault detection is delayed. That is, the detection time from the time when the ground fault occurs to the time when the inter-system current value IISO rises and reaches the over-discharge threshold value Is becomes long, and the detection responsiveness is poor. On the other hand, the discharge current value ISMR when a ground fault occurs in the sub power supply B20 rises rapidly without being significantly affected by the inductances L1 and L2. Therefore, according to the present embodiment in which the discharge current value ISMR is used for ground fault detection, the ground fault generated in the sub power supply B20 can be detected more quickly than in the case where the inter-system current value IISO is used. If the ground fault can be detected quickly, the inter-system SW can be quickly shut off. Therefore, it is possible to quickly avoid a situation in which the voltage of both the main system bus 10 and the sub system bus 20 drops significantly. That is, it is possible to suppress the concern that both the first load and the second load will malfunction.

(Second Embodiment)
In the first embodiment, the over-discharge threshold value Is used for determining the ground fault abnormality is set to a fixed value. On the other hand, in the present embodiment, the over-discharge threshold value Is is variably set according to the inter-system current value IISO. Specifically, when the inter-system current value IISO is smaller than the predetermined threshold value IsISO, the over-discharge threshold value Is is changed to a smaller value. The technical significance of such variable settings will be described in detail below.

When a ground fault occurs in the main system bus 10 as shown in FIG. 4, the ground fault detection is delayed due to the existence of the above-mentioned inductances L1 and L2. That is, there is a concern that the detection time from the time when the ground fault occurs to the time when the discharge current value ISMR rises and reaches the over-discharge threshold value Is becomes long, and the detection responsiveness deteriorates.

As described above, the inter-system current value IISO is defined as a value in which the direction in which the current flows from the side of the main system bus 10 to the side of the sub-system bus 20 through the inter-system bus 30 is positive. Then, when a ground fault occurs in the main system bus 10, the inter-system current value IISO becomes small due to the large current flowing into the ground fault location. Specifically, if a ground fault occurs when a current is flowing from the main system bus 10 to the sub system bus 20, the current flow direction remains the same, the current decreases, or the current flow direction changes. .. Further, if a ground fault occurs while a current is flowing from the sub system bus 20 to the main system bus 10, the amount of the current increases.

Focusing on this point, in this embodiment, the process of FIG. 3 is changed to the process of FIG. First, in step S10 of FIG. 5, the operation of the inter-system SW is controlled according to the command of the host control circuit 50. In the example shown in FIG. 5, the inter-system SW is turned on (energized). In the following step S21, the inter-system current value IISO is detected (acquired) based on the potential difference between both ends of the shunt resistor 31c. In the following step S22, the discharge current value ISMR is detected (acquired) based on the potential difference between both ends of the shunt resistor 22c.

In the following step S31, it is determined whether or not the inter-system current value IISO detected in step S21 is smaller than the preset predetermined threshold value IsISO. In the present embodiment, the predetermined threshold value IsISO is set to a positive value, but may be set to a negative value.

When it is determined that the inter-system current value IISO is equal to or higher than the predetermined threshold value IsISO, the over-discharge threshold value IsH is set to the same value as the over-discharge threshold value Is according to step S30 in FIG. Then, in the following step S32, it is determined whether or not the discharge current value ISMR detected in step S22 is larger than the over-discharge threshold value IsH.

On the other hand, when it is determined that the inter-system current value IISO is less than the predetermined threshold value IsISO, the over-discharge threshold value IsL is set to a value smaller than the over-discharge threshold value IsH. That is, the sensitivity of over-discharge detection is increased. Then, in the following step S33, it is determined whether or not the discharge current value ISMR detected in step S22 is larger than the over-discharge threshold value IsL.

If it is determined in any of steps S32 and S33 that the discharge current value ISMR is larger than the over-discharge threshold value, the inter-system SW is turned off in the following step S40. This process is the same as step S40 in FIG.

As described above, the energization control device D according to the present embodiment includes a threshold value changing unit that changes the over-discharge threshold value to a smaller value when the inter-system current value IISO is smaller than the predetermined threshold value Iso. The threshold value changing unit corresponds to the SW control circuit 40 when the process of step S31 is being executed. Therefore, when a ground fault occurs in the main system bus 10, the inter-system current value IISO becomes smaller than the predetermined threshold value IsISO, and the over-discharge threshold value Is is changed to a smaller value. That is, the over-discharge threshold value Is is changed so as to increase the sensitivity of over-discharge detection. Therefore, even when the discharge current value ISMR does not rise rapidly due to the influence of the inductances L1 and L2, the sensitivity is increased, so that it is possible to suppress the delay in ground fault detection.

(Third Embodiment)
In the present embodiment shown in FIG. 6, the determination order shown in FIG. 5 is modified as follows when the over-discharge threshold value Is is variably set according to the inter-system current value IISO. That is, after detecting the inter-system current value IISO and the discharge current value ISMR in steps S21 and S22, first, the discharge current value ISMR is determined in step S30. Then, when it is determined that the discharge current value ISMR is larger than the over-discharge threshold value Is, the inter-system SW is shut off in step S40 in the same manner as in FIG. On the other hand, when the discharge current value ISMR is determined to be less than the over-discharge threshold value Is, the inter-system current value IISO is determined in step S31. Then, even when it is determined that the inter-system current value IISO is smaller than the predetermined threshold value Iso, the inter-system SW is shut off in step S40.

Based on the above, according to the present embodiment, the SW control circuit 40 can be used even when the discharge current value ISMR does not exceed the over-discharge threshold value Is when the inter-system current value IISO is smaller than the predetermined threshold value Is ISO. It is considered that a ground fault has occurred, and the inter-system switch is shut off. Therefore, if the discharge current value ISMR does not rise rapidly due to the influence of the inductances L1 and L2, the ground fault is detected using the inter-system current value IISO. When a ground fault occurs in the main system bus 10, the inter-system current value IISO changes with higher sensitivity than the discharge current value ISMR by the amount of the inductance L2. Therefore, even with this embodiment, it is possible to suppress the delay in ground fault detection.

(Fourth Embodiment)
In the present embodiment, when a ground fault occurs in the sub system bus 20, in addition to the inter-system SW shut-off latch, the SMR is also cut-off latched (see FIGS. 7 and 8). The processing of steps S10 to S33 described in FIG. 8 is the same as that in FIG.

When it is determined in step S32 of FIG. 8 that the discharge current value ISMR is larger than the over-discharge threshold value IsH, the ground fault location is considered to be the sub system bus 20. Then, in the following step S41, both the inter-system SW and the SMR are cut off and latched in preference to the command of the upper control circuit 50. Further, in step S41, the SW control circuit 40 performs cutoff control so that the cutoff timings of the inter-system SW and SMR are simultaneous.

If it is determined in step S33 of FIG. 8 that the discharge current value ISMR is larger than the over-discharge threshold value IsL, the ground fault location is considered to be the main system bus 10. Then, in the following step S42, the inter-system SW is cut off and latched prior to the command of the upper control circuit 50, and the SMR is controlled according to the command of the upper control circuit 50.

According to this embodiment, when a ground fault occurs in the sub system bus 20, in addition to blocking the inter-system SW, the SMR is also blocked. Therefore, it is possible to prevent the sub power supply B20 from falling into over-discharging.

Further, in the present embodiment, the SW control circuit 40 is cut-off controlled so that the cut-off timings of the inter-system SW and the SMR are simultaneous. Here, if the SMR is interrupted after the inter-system SW, a large current larger than that of the inter-system SW flows through the SMR. Then, an SMR having a large breaking resistance must be selected. In view of this point, according to the present embodiment in which the inter-system SW and the SMR are cut off at the same time, the cut-off withstand capacity required for the SMR can be reduced.

Further, in the present embodiment, when the discharge current value ISMR is determined to be larger than the over-discharge threshold value IsH in step S32, the ground fault portion is regarded as the sub system bus 20. Further, when it is determined in step S33 that the discharge current value ISMR is larger than the over-discharge threshold value IsL, the ground fault location is considered to be the main system bus 10. The SW control circuit 40 when the processes of steps S32 and S33 are being executed corresponds to the "ground fault determination unit". The ground fault discriminating unit determines on which side of the main system bus 10 or the sub system bus 20 the ground fault has occurred with respect to the intersystem bus 30.

Specifically, when the discharge current value ISMR is larger than the over-discharge threshold value Is and the inter-system current value IISO is smaller than the discrimination threshold value, it is determined to be a ground fault on the main system bus 10 side. Further, when the discharge current value ISMR is larger than the over-discharge threshold value Is and the inter-system current value IISO is equal to or higher than the discrimination threshold value, it is determined that a ground fault has occurred on the sub-system bus 20 side. The discrimination threshold is set to the same value as the predetermined threshold ISO ISO described above.

The energization control device D according to the present embodiment includes a ground fault discriminating unit, and operates the inter-system SW and SMR differently according to the discriminating result. Therefore, the operating state of the inter-system SW and SMR can be set to the optimum state according to the ground fault location. Instead of determining the ground fault in steps S32 and S33, the ground fault may be determined in steps S30 and S31 of FIG. In this case, if it is determined that the ground fault is abnormal in step S30, it is determined that the ground fault is on the sub system bus 20. If it is determined in step S31 that the ground fault is abnormal, it is determined to be a ground fault on the main system bus 10.

Further, in the present embodiment, when a ground fault has occurred, the SW control circuit 40 controls the inter-system SW in a cutoff state regardless of the command content of the upper control circuit 50. Therefore, it is possible to avoid energizing the inter-system SW by the command of the upper control circuit 50 in the state of the ground fault abnormality. Therefore, it is possible to improve the certainty of avoiding that a large current continues to flow from the main power supply B10 or the sub power supply B20 to the ground fault location.

Further, in the present embodiment, when a ground fault has occurred, the SW control circuit 40 controls the operation of the SMR according to the location where the ground fault occurs, regardless of the command content of the upper control circuit 50. Therefore, there are many opportunities to supply power from the sub power source B20 to the second load L20.

(Fifth Embodiment)
In the present embodiment, when a ground fault occurs in the main system bus 10, in addition to shutting off the inter-system SW, the SMR is energized and latched (see FIGS. 9 and 10). The process of FIG. 10 is obtained by adding the process of step S42A to the process of FIG.

When it is determined in step S33 of FIG. 10 that the discharge current value ISMR is larger than the over-discharge threshold value IsL, the ground fault location is considered to be the main system bus 10. Then, in the subsequent step S42A, the SMR is energized and latched in preference to the command of the upper control circuit 50. In the following step S42, the inter-system SW is cut off and latched in preference to the command of the upper control circuit 50.

According to this embodiment, when a ground fault occurs in the main system bus 10, in addition to shutting off the inter-system SW, the SMR is energized. Therefore, even if a ground fault occurs and the inter-system SW is cut off, the power supply to the second loads L20 and L21 can be continued.

(Sixth Embodiment)
In the present embodiment, when the inter-system SW is shut off due to the detection of a ground fault, the SW control circuit 40 notifies the host control circuit 50 that such an abnormality has occurred. The process of FIG. 11 according to the present embodiment is obtained by adding the process of step S50 to the process of FIG. The step S60 shown by the dotted line in FIG. 10 shows the processing contents by the upper control circuit 50.

In step S50 shown in FIG. 11, the host control circuit 50 is notified that an abnormality due to a ground fault or the like has occurred. Further, the SW control circuit 40 also notifies the upper control circuit 50 of the determination result as to which of the main system bus 10 and the sub system bus 20 has a ground fault. The SW control circuit 40 when the process of step S50 is being executed corresponds to the "abnormality notification unit".

In step S60, the host control circuit 50 prohibits the output of a command that shuts off the SMR, or takes measures to prevent the output. For example, the above-mentioned normal control may include a control that shuts off the SMR when the sub power supply B20 becomes hot to prevent the sub power supply B20 from being damaged. Even in this case, when the abnormality notification in step S50 is received, the host control circuit 50 does not give a command to shut off the SMR. That is, the power supply to the second load L20 is prioritized over the damage of the sub power supply B20.

From the above, according to the present embodiment, the energization control device D includes an abnormality notification unit. When the command content is invalidated due to the occurrence of a ground fault abnormality, the abnormality notification unit notifies the host control circuit 50 to that effect. Therefore, it is possible to improve the certainty of shutting off the SW between systems in a situation where a ground fault has occurred. Further, it is possible to improve the certainty of supplying electric power to the second load L20 when a ground fault occurs in the main system bus 10.

(7th Embodiment)
The energization control device D according to the present embodiment includes a cutoff switch different from the SMR that cuts off the power supply between the sub power supply B20 and the sub system bus 20. The cutoff switch is configured so that the cutoff operation can be performed regardless of the command content of the SW control circuit 40.

In the example shown in FIG. 12, the fuse 23 is used as the cutoff switch, but a relay may be used instead of the fuse 23. When a relay is used, a control circuit other than the SW control circuit 40, for example, a host control circuit 50 or the like controls the opening / closing operation of the relay. The cutoff switch is provided between the sub power supply B20 and the ground of the sub system bus 20.

The process of FIG. 13 according to the present embodiment is obtained by changing the process of step S60 shown in FIG. 11 to steps S61 and S62. Further, in the process of FIG. 13, the SMR is energized and latched regardless of the ground fault location. Steps S61 and S62 shown by the dotted line in FIG. 13 indicate the processing contents by the upper control circuit 50 or the operation of the fuse 23.

In step S61, it is determined whether the SMR energization latch according to step S42A is a sub ground fault according to step S32 or a main ground fault according to step S33. If it is determined to be a sub-ground fault, a large current is discharged from the sub power supply B20 by SMR energization in the state of the sub-ground fault. Therefore, in the following step S62, the fuse 23 is blown and cut off due to heat generated by the discharge of a large current. Alternatively, when a relay is used instead of the fuse 23, the host control circuit 50 cuts off the relay.

From the above, in the present embodiment, a cutoff switch for protecting the sub power supply B20 is provided. Therefore, if the state in which the SMR is energized and latched is continued when a ground fault occurs, the discharge of the sub power supply B20 is cut off by the cutoff switch, and the sub power supply B20 is protected. Therefore, it is possible to reduce the possibility that the B20 will break down due to the SMR energization latch.

(8th Embodiment)
The energization control device D according to the present embodiment includes a set of cutoff switches 12a and 12b provided on the main power supply side bus 10a (see FIG. 14). In the following description, one set of cutoff switches 12a and 12b may be referred to as SMR1, and one set of cutoff switches 22a and 22b may be referred to as SMR2.

A shunt resistor 12c is connected to a portion of the main power supply side bus 10a between one set of cutoff switches 12a and 12b. The cutoff switches 12a and 12b and the shunt resistor 12c are unitized as one SMR device 12.

The SW control circuit 40 detects the potentials at both ends of the shunt resistor 12c and calculates the first discharge current value ISMR1 based on the potential difference between both ends. The first discharge current value ISMR1 is defined as a positive value in the direction of discharge from the main power supply B10. In this embodiment, the discharge current value ISMR discharged from the sub power supply B20 is referred to as the second discharge current value ISMR2.

The SW control circuit 40 controls the operation of the inter-system SW based on both the first discharge current value ISMR1 and the second discharge current value ISMR2. Specifically, as shown in FIG. 15, first, in step S11, the operation of the inter-system SW is controlled according to the command of the host control circuit 50. In the example shown in FIG. 15, SMR1, SMR2 and the inter-system SW are turned on (energized). In the following step S23, the second discharge current value ISMR2 is detected (acquired) based on the potential difference between both ends of the shunt resistor 22c. In the following step S24, the first discharge current value ISMR1 is detected (acquired) based on the potential difference between both ends of the shunt resistor 12c.

In the following step S34, it is determined whether or not the second discharge current value ISMR2 detected in step S23 is larger than the preset over-discharge threshold value IsSMR2. The over-discharge threshold IsSMR2 corresponds to the second threshold. When it is determined that ISMR2> IsSMR2, it is considered that a ground fault has occurred, and the inter-system SW is turned off (blocked) in the following step S40.

If it is not determined in step S34 that ISMR2> IsSMR2, the process proceeds to step S35, and it is determined whether or not the first discharge current value ISMR1 detected in step S24 is larger than the preset over-discharge threshold value IsSMR1. The over-discharge threshold IsSMR1 corresponds to the first threshold. When it is determined that ISMR1> IsSMR1, it is considered that a ground fault has occurred, and the inter-system SW is turned off (blocked) in the following step S40.

Here, when a ground fault occurs in the sub system bus 20 due to the existence of the above-mentioned inductances L1 and L2, the first discharge current value ISMR1 does not rise rapidly. Further, when a ground fault occurs in the main system bus 10 due to the presence of the inductances L1 and L2, the second discharge current value ISMR2 does not rise rapidly.

In view of these points, in the present embodiment, the SW control circuit 40 controls the operation of the inter-system SW based on both the first discharge current value ISMR1 and the second discharge current value ISMR2. Therefore, the sub-ground fault can be quickly detected by the second discharge current value ISMR2, and the main ground fault can be quickly detected by the first discharge current value ISMR1.

Here, as described above, when the main ground fault occurs, the second discharge current value ISMR2 does not rise rapidly. Therefore, if the determination in step S35 is abolished and both the sub-ground fault and the main ground fault are detected only by the determination in step S34, the detection of the main ground fault is delayed. Therefore, in the present embodiment, even if the second discharge current value ISMR2 does not exceed the second threshold value, the inter-system SW is cut off if the first discharge current value ISMR1 rises beyond the first threshold value. Therefore, the main ground fault can be detected quickly, and the SW between systems can be quickly shut off.

<Modified example of the eighth embodiment>
As shown in FIG. 16, when ISMR2> IsSMR2 is established in step S34 and ISMR1> IsSMR1 is established in step S35, the blocking process of step S40 may be executed. In this way, it is considered that the ground fault has occurred only when a positive determination is made in both steps S34 and S35. Therefore, erroneous detection of a ground fault can be suppressed as compared with a configuration in which a positive determination is made in any of steps S34 and S35 and the ground fault is regarded as a ground fault.

(9th Embodiment)
The energization control device D according to the present embodiment is the energization control device D shown in FIG. 1 provided with a case 60 (see FIG. 17). The case 60 houses the SW control circuit 40, the inter-system SW, the SMR, and the shunt resistors 31c and 22c inside. As a result, the energization control device D is formed as one current cutoff module. A plurality of terminals 61, 62, 63 are attached to the case 60 (see FIG. 18). One end of the wiring connected to the sub power supply B20 is connected to the terminal 61. One end of the wiring connected to the second loads L20 and L21 is connected to the terminal 62. One end of the wiring connected to the first loads L10 and L11, the main power supply B10, and the generator G10 is connected to the terminal 63.

In FIGS. 17 and 18, the junction box is not shown. The SW drive circuit 41 and the overcurrent determination circuit 42 shown in FIG. 18 represent a part of the functions of the SW control circuit 40 with functional blocks. The SW drive circuit 41 corresponds to an inter-system switch control unit that controls the operating state of the inter-system SW. This is achieved by step S40 in FIG. The overcurrent determination circuit 42 is a circuit for determining whether or not the discharge current value ISMR is an overcurrent, and is realized by step S30 of FIG.

Note that, as shown in FIG. 18, the shunt resistor 31c may be abolished. Further, as a modification of the present embodiment, at least one of the sub power supply B20 and the upper control circuit 50 may be housed inside the case 60. When at least one of the main power supply B10 and the sub power supply B20 is housed inside the case 60, the housed power supply and the energization control device D provide a power supply unit.

(10th Embodiment)
The energization control device D according to the present embodiment is the energization control device D shown in FIG. 14 provided with a case 60 (see FIG. 19). The case 60 houses the SW control circuit 40, the inter-system SW, SMR1, SMR2, and shunt resistors 31c, 22c, and 12c inside. As a result, the energization control device D is formed as one current cutoff module. A plurality of terminals 61, 62, 64, and 65 are attached to the case 60 (see FIG. 20). The terminals 61 and 62 are connected in the same manner as in FIG. One end of the wiring connected to the first loads L10 and L11 and the generator G10 is connected to the terminal 64. One end of the wiring connected to the main power supply B10 is connected to the terminal 65.

The junction box is not shown in FIGS. 19 and 20. The overcurrent determination circuit 42 shown in FIG. 20 is a circuit for determining an overcurrent based on the first discharge current value ISMR1 and the second discharge current value ISMR2, and is realized by steps S34 and S35 of FIG.

As shown in FIG. 20, the shunt resistor 31c may be abolished. Further, as a modification of the present embodiment, at least one of the sub power supply B20 and the upper control circuit 50 may be housed inside the case 60.

(11th Embodiment)
The energization control device D according to the present embodiment has a function of terminating the shutoff and energization latch control when it is determined that the cause of the ground fault abnormality has been resolved and restored. Specifically, as shown in FIG. 21, the SW control circuit 40 has a return determination circuit 43. The return determination circuit 43 determines whether or not an abnormal state such as a ground fault has been restored, and if it is determined that the recovery has been restored, transmits a return signal to the SW drive circuit 41.

FIG. 22 shows that the process of step S70 is added to the process of FIG. 11, and in step S70, it is determined whether or not the return signal from the return determination circuit 43 has been received. The SW control circuit 40 at the time of executing the process in step S70 corresponds to a "recovery determination unit" that determines whether or not the ground fault has been restored during the period in which the inter-system SW is controlled by the cutoff latch. If the return signal is not received, the control given priority to the upper control circuit 50 in steps S41 and S42 is continued. When it is determined that the return signal has been received, the priority control (latch control) is released and the process is restarted from the START of FIG. 22.

From the above, when it is determined that the cause of the ground fault abnormality has been resolved and recovered, the cutoff latch control that puts the inter-system SW in the cutoff state is terminated. Therefore, the cutoff latch control is automatically released, and the workability of restoration can be improved.

(12th Embodiment)
In the eleventh embodiment, the SW control circuit 40 has a return determination circuit 43. On the other hand, in the present embodiment, the return determination circuit is provided outside the SW control circuit 40. For example, in the example shown in FIG. 23, the host control circuit 50 has a return determination circuit 51.

(13th Embodiment)
The energization control device D according to the present embodiment includes a timer 44 (see FIG. 24). The timer 44 measures the elapsed time from the start of the cutoff latch control. When the elapsed time measured by the timer 44 reaches a predetermined time, the return determination circuit 43 determines that an abnormal state such as a ground fault has been restored, and outputs a return signal.

As described above, the recovery determination unit (step S70) according to the present embodiment receives the return signal and determines that the restoration has been performed when a predetermined time has elapsed from the start of the cutoff latch control. According to this, it is possible to easily determine whether or not the restoration has been performed by a simple process.

(14th Embodiment)
The energization control device D according to the present embodiment includes a voltage detection circuit 45 that detects the ground potentials of both terminals of the inter-system SW (see FIG. 25). For example, the voltage detection circuit 45 detects the potential on the main system bus 10 side of the inter-system switch 31a and the potential on the sub-system bus 20 side of the inter-system switch 31b. The voltage detection circuit 45 outputs the detected ground potential information (voltage information) to the return determination circuit 43.

The return determination circuit 43 determines that the restoration is performed when each of the acquired ground potentials of both terminals is equal to or higher than a predetermined potential. Alternatively, the return determination circuit 43 determines that the restoration is performed when the potential difference between the acquired terminals and the ground potential is less than a predetermined value. When the recovery determination circuit 43 determines that the recovery is performed in this way, the recovery determination circuit 43 considers that an abnormal state such as a ground fault has been recovered and outputs a recovery signal.

Here, if the ground fault is not restored in the state where the sub-ground fault occurs and the inter-system SW is cut off, the ground potential on the sub-system bus 20 side becomes a lower value than in the case of normal control. There is a high probability that it has become. On the other hand, it is highly probable that the ground potential of the main system bus 10 is the same value as in the case of normal control. The same applies when the ground fault has not been restored while the main ground fault has occurred and the inter-system SW is shut off, and the ground potential on the main system bus 10 side is lower than that in the case of normal control. There is a high probability that it has become. On the other hand, it is highly probable that the ground potential of the sub system bus 20 is the same value as in the case of normal control.

In view of these points, the recovery determination unit (step S70) according to the present embodiment receives a return signal when each of the ground potentials is equal to or higher than a predetermined potential or when the potential difference is less than a predetermined potential. It will be judged that it has been restored. According to this, it can be accurately determined whether or not the restoration has been performed.

(15th Embodiment)
The energization control device D according to the present embodiment includes a shunt resistor 24c provided on the sub-load side bus 20b instead of the shunt resistor 22c (see FIG. 1) provided on the sub power supply side bus 20a (see FIG. 26).

The magnitude of the current detected by the shunt resistor 24c is called the sub system current value ISUB. The sub system current value ISUB is defined as a positive value in the direction in which the current flows from the sub load side bus 20b to the second load L20. In the present embodiment, the sub system current value ISUB is considered to be equivalent to the discharge current value ISMR.

The SW control circuit 40 determines that a ground fault has occurred when the sub-system current value ISUB rises above the over-discharge threshold value Is, and shuts off the inter-system SW. However, in consideration of the inter-system current value IISO detected by the shunt resistor 31c in addition to the sub-system current value ISUB, the SW control circuit 40 determines the presence or absence of a ground fault abnormality. For example, according to the control flow shown in FIG. 27 or 28, the SW control circuit 40 determines the presence or absence of a ground fault abnormality in consideration of the sub-system current value ISUB and the inter-system current value IISO.

In the control shown in FIG. 27, the discharge current value ISMR of the control shown in FIG. 5 is replaced with the sub system current value ISUB. That is, in step S22A of FIG. 27, instead of detecting the discharge current value ISMR, the sub system current value ISUB is detected (acquired) based on the potential difference between both ends of the shunt resistor 24c. In steps S32A and S33A of FIG. 27, instead of the determination related to the discharge current value ISMR, it is determined whether or not the sub-system current value ISUB is larger than the over-discharge thresholds IsH and IsL. In short, the over-discharge threshold value Is is changed according to the sub system current value ISUB. As a result, the same effect as the control shown in FIG. 5 is exhibited.

In the control shown in FIG. 28, the discharge current value ISMR of the control shown in FIG. 6 is replaced with the sub system current value ISUB. That is, in step S30A of FIG. 28, instead of the determination related to the discharge current value ISMR, it is determined whether or not the sub-system current value ISUB is larger than the over-discharge threshold value Is. In short, even if the sub-system current value ISUB does not exceed the over-discharge threshold value Is, if the inter-system current value IISO is smaller than the predetermined threshold value Iso, it is considered that a ground fault has occurred and the inter-system switch. To shut off. As a result, the same effect as the control shown in FIG. 6 is exhibited.

(16th Embodiment)
The energization control device D according to the present embodiment includes a shunt resistor 24c provided on the subload side bus 20b instead of the shunt resistor 12c (see FIG. 14) provided on the main power supply side bus 10a (see FIG. 29).

Similar to the fifteenth embodiment, the sub system current value ISUB is defined with the direction in which the current flows from the sub load side bus 20b to the second load L20 as a positive value. The SW control circuit 40 calculates the value obtained by subtracting the discharge current value ISMR from the sub system current value ISUB as the differential current value IDIF. In the present embodiment, the differential current value IDIF is considered to be equivalent to the first discharge current value ISMR1.

When the discharge current value ISMR rises above the over-discharge threshold value Is, the SW control circuit 40 determines that a ground fault has occurred and shuts off the inter-system SW. However, in consideration of the sub system current value ISUB in addition to the discharge current value ISMR, the SW control circuit 40 determines the presence or absence of a ground fault abnormality. For example, according to the control flow shown in FIG. 30 or 31, the SW control circuit 40 determines the presence or absence of a ground fault abnormality in consideration of the discharge current value ISMR and the sub system current value ISUB.

The control shown in FIG. 30 replaces step S31A in FIG. 27 with step S31B. In this step S31B, it is determined whether or not the differential current value IDIF is smaller than the preset over-discharge threshold value IsDIF. The over-discharge threshold value IsDIF is set to the same value as the predetermined threshold value IsISO. This also exerts the same effect as the control shown in FIG. 27.

In the control shown in FIG. 31, step S30A in FIG. 28 is replaced with step S30, and step S31 in FIG. 28 is replaced with step S31A. In step S31A, it is determined whether or not the differential current value IDIF is smaller than the over-discharge threshold value IsDIF. This also exerts the same effect as the control shown in FIG. 28.

(17th Embodiment)
The energization control device D according to the present embodiment includes a discharge current acquisition unit and an ascending speed acquisition unit. The discharge current acquisition unit acquires the discharge current value ISMR from the sub power supply B20. The ascending speed acquisition unit acquires the ascending speed (current slope) of the discharge current value ISMR. In the same manner as in each of the above embodiments, when the acquired discharge current value ISMR rises above the over-discharge threshold value Is, it is considered that a ground fault has occurred and the inter-system SW is shut off. However, when the acquired current slope is small, that is, when the discharge current value ISMR rises slowly (low speed rise), it is difficult to determine that a ground fault has occurred. That is, in the case of a low speed rising state, it is difficult to shut off the SW between systems.

The technical significance of controlling in this way will be described in detail below.

As mentioned above, the discharge current value ISMR increases when a ground fault occurs, but even in the normal state when no ground fault occurs, the discharge current value ISMR increases significantly in the following cases. .. For example, when an electric load using a redundant power supply system as a power source requires a large amount of electric power, the inrush current to the electric load is large. For example, in the case of a power steering device or a braking device, the inrush current is extremely large. Therefore, when this kind of inrush current flows, the discharge current value ISMR may increase instantaneously and exceed the over-discharge threshold value Is. In that case, there is a concern that the SW between systems will be cut off due to erroneous detection as a ground fault even though it is a normal time when no ground fault has occurred.

However, the rate of increase of the discharge current value ISMR due to the inrush current is slower than the rate of increase of the discharge current value ISMR (current slope) when a ground fault occurs. In particular, when the wire harness connecting the electric load to the main system bus 10 or the sub system bus 20 is long, it becomes even slower due to the parasitic inductance component of the wire harness. Therefore, if the presence or absence of a ground fault abnormality is determined from the discharge current value ISMR while considering the current inclination, it should be possible to suppress the false detection related to the above concern. In other words, the slower the current gradient, the more difficult it is to determine that a ground fault has occurred, so that the above false detection can be suppressed.

Hereinafter, a specific configuration of the present embodiment will be described with reference to FIG. 32. The energization control device D shown in FIG. 32 is obtained by adding the voltage detection circuit 45 shown in FIG. 25 to the energization control device D shown in FIG. 24, and further adding the current inclination determination circuit 48.

The return determination circuit 43 determines that an abnormal state such as a ground fault has been restored when either of the following conditions 1 and 2 is satisfied, or when both are satisfied, and outputs a return signal. Condition 1 is that the elapsed time measured by the timer 44 has reached a predetermined time in the same manner as in the thirteenth embodiment. Condition 2 is the same as in the 14th embodiment, that each of the potentials of both terminals detected by the voltage detection circuit 45 to the ground is equal to or higher than a predetermined potential, or the potential difference between both terminals is less than a predetermined value.

The overcurrent determination circuit 42 of this embodiment is realized by step S30 of FIG. That is, when the discharge current value ISMR exceeds the overdischarge threshold value Is, it is determined as an overcurrent, and the overcurrent determination result is output to the SW drive circuit 41. The overcurrent determination circuit 42 may be realized by steps S34 and S35 of FIG. 15 instead of step S30 of FIG.

The current slope determination circuit 48 detects the rising speed (current slope) of the discharge current value ISMR based on the time change of the potential difference between both ends of the shunt resistor 22c. Then, when the detected current slope is less than the predetermined slope threshold value, it is determined to be the above-mentioned low-speed rising state, and when it is equal to or more than the predetermined slope threshold value, it is determined to be the non-slow speed rising state. When the current inclination determination circuit 48 determines that the non-slow speed rise state is determined, the current inclination determination circuit 48 outputs the inclination determination result to the SW drive circuit 41.

The SW drive circuit 41 determines whether or not a ground fault has occurred based on these overcurrent determination results and inclination determination results, and if it is determined to be abnormal, the SW between systems is cut off. The SW drive circuit 41 determines that the ground fault is abnormal when the current is overcurrent and the non-slow speed rises. On the other hand, the SW drive circuit 41 considers the current increase due to the inrush current rather than the overdischarge when the current is increasing at a low speed even if the current is overcurrent. That is, the interruption of the inter-system SW regarded as a ground fault abnormality is prohibited.

Based on the above, according to the present embodiment, the presence or absence of a ground fault abnormality is determined from the discharge current value ISMR while considering the current slope. That is, in the case of the low-speed rising state in which the rising speed of the discharge current value ISMR is less than a predetermined value, it is difficult to determine that the ground fault has occurred as compared with the case of the non-low-speed rising state. Therefore, it is possible to suppress erroneous detection of the inrush current as a ground fault abnormality.

Further, the energization control device D includes an overcurrent determination circuit 42 and a current inclination determination circuit 48. Even if the overcurrent determination circuit 42 determines that the discharge current value ISMR exceeds the overdischarge threshold Is, if the current gradient determination circuit 48 determines that the current is in a low-speed rising state, it is not an overdischarge. It is regarded as a current increase due to inrush current. That is, the interruption of the inter-system SW regarded as a ground fault abnormality is prohibited. Therefore, it is possible to easily realize with simple control that it is difficult to determine that a ground fault has occurred in the case of a low-speed climbing state.

<Modified example of the 17th embodiment>
The control by the overcurrent determination circuit 42, the current inclination determination circuit 48, and the SW drive circuit 41 may be changed to the discharge current value detection circuit, the current inclination detection circuit, and the abnormality determination circuit described below.

The discharge current value detection circuit calculates the discharge current value ISMR based on the potential difference between both ends of the shunt resistor 22c. The current slope detection circuit calculates the rising speed (current slope) of the discharge current value ISMR based on the time change of the potential difference between both ends of the shunt resistor 22c. The abnormality determination circuit determines that a ground fault has occurred when the calculated discharge current value ISMR rises above the overdischarge threshold value Is. However, the smaller the calculated current slope, the larger the value of the over-discharge threshold value Is is changed.

Based on the above, according to the present modification, the SW control circuit 40 changes the over-discharge threshold value Is to a larger value in the low-speed rising state than in the non-low-speed rising state. Therefore, in the case of the low-speed rising state, it is difficult to determine that the ground fault has occurred as compared with the case of the non-low-speed rising state.

(18th Embodiment)
The SW control circuit 40 according to the present embodiment includes a current detection circuit 46, an overcurrent determination circuit 42, a filter circuit 47, a current inclination determination circuit 48, and an abnormality determination circuit 42J (see FIG. 33). The current detection circuit 46 includes a differential amplifier 46a that outputs a signal corresponding to the potential difference between both ends of the shunt resistor 22c as a signal indicating the discharge current value ISMR.

The overcurrent determination circuit 42 has a comparator 42a that compares the discharge current value ISMR signal output from the current detection circuit 46 with the preset threshold value Vref1. The comparator 42a outputs an on signal when the discharge current value ISMR is equal to or higher than the threshold value Vref1. In the truth table of FIGS. 34 and 35, which will be described later, the on signal is described as 1 and the off signal is described as 0.

The filter circuit 47 extracts and outputs a signal whose rising speed is equal to or higher than a predetermined value from the signals output from the current detection circuit 46. The current gradient determination circuit 48 includes a comparator 48a that compares the signal output from the filter circuit 47, that is, the discharge current value ISMR whose current gradient is equal to or higher than a predetermined value, with the preset inclination threshold value Vref2. The comparator 48a outputs an on signal when the extracted discharge current value ISMR is equal to or higher than the inclination threshold value Vref2.

The abnormality determination circuit 42J determines whether or not a ground fault has occurred based on the signals output from the overcurrent determination circuit 42 and the current inclination determination circuit 48. For example, as illustrated in FIGS. 34 and 35 below, the abnormality determination circuit 42J determines an abnormality.

FIG. 34 shows an example of the correspondence between the combination of the determination results of the overcurrent determination circuit 42 and the current inclination determination circuit 48 and the abnormality determination result. In the example of FIG. 34, when it is determined that "overcurrent" and "inclination is large", it is determined as "abnormal".

The above "overcurrent" is a determination result of the overcurrent determination circuit 42 such that the discharge current value ISMR is equal to or greater than the threshold value Vref1. The above-mentioned "large slope" is a judgment result of the current slope determination circuit 48 such that the current value having a large current slope among the discharge current value ISMR is the slope threshold Vref2 or more. Further, in the case of a low-speed rising state in which it is negatively determined that the inclination is not large, it is determined to be "normal" even if it is determined to be "overcurrent". That is, in the case of a low-speed rising state, the interruption of the inter-system SW regarded as a ground fault abnormality is prohibited.

In the example shown in FIG. 35, when at least one of "overcurrent" and "large inclination" is determined, it is determined to be "abnormal". That is, even if it is negatively determined that it is not an "overcurrent", it is determined to be "abnormal" if it is "largely tilted".

Further, the SW control circuit 40 also includes a current detection circuit 460, an overcurrent determination circuit 420, and a current inclination determination circuit 480 for the shunt resistor 31c. The current detection circuit 460 outputs a signal corresponding to the potential difference between both ends of the shunt resistor 31c as a signal indicating the inter-system current value IISO. The overcurrent determination circuit 420 determines that the overcurrent is overcurrent when the inter-system current value IISO exceeds a predetermined threshold value Iso, and outputs the overcurrent determination result to the SW drive circuit 41.

The current slope determination circuit 480 detects the rate of increase (current slope) of the inter-system current value IISO based on the time change of the potential difference between both ends of the shunt resistor 31c. Then, when the detected current gradient is less than a predetermined inclination threshold value, it is determined to be a low-speed rising state, and when it is equal to or more than a predetermined inclination threshold value, it is determined to be a non-slow-speed rising state. When the current inclination determination circuit 480 determines that the non-slow speed rise state is determined, the current inclination determination circuit 480 outputs the inclination determination result to the SW drive circuit 41.

The control procedure (see FIG. 36) according to the present embodiment is a combination of the above-mentioned third and eleventh embodiments with steps S36 and S37 added.

In step S36, it is determined whether or not the rising speed (current slope) of the discharge current value ISMR is larger than the predetermined value α. If it is negatively determined that the value is not greater than the predetermined value α, it is regarded as a low-speed rising state, and the interruption of the inter-system SW in step S40 is prohibited. If it is determined affirmative that the current slope is larger than the predetermined value α, it is regarded as a non-slow speed rising state, and the inter-system SW is shut off in step S40.

In step S37, it is determined whether or not the rate of increase (current slope) of the inter-system current value IISO is greater than the predetermined value β. By the affirmative determination in step S31, the current is about to flow from the sub system bus 20 to the main system bus 10. Therefore, the current slope dIISO / dt has a negative value. A negative value is also set for the predetermined value β. Satisfying the relationship of current slope <predetermined value β means that the current slope is larger than the predetermined value β as a negative value, that is, the current slope is larger than the predetermined value β in absolute value. If it is negatively determined that the current slope is not larger than the predetermined value β (negative value), it is regarded as a low-speed rising state, and the interruption of the inter-system SW in step S40 is prohibited. If it is determined affirmative that the current slope is larger than the predetermined value β, it is regarded as a non-slow speed rising state, and the inter-system SW is shut off in step S40.

In short, in steps S30 and S36, the abnormality determination according to the table of FIG. 34 is realized. Similar to this abnormality determination, in steps S31 and S37, an abnormality determination is made based on the inter-system current value IISO and its current slope.

As described above, the SW control circuit 40 according to the present embodiment includes the filter circuit 47 and the current inclination determination circuit 48 in addition to the overcurrent determination circuit 42. Therefore, it is possible to easily realize with simple control that it is difficult to determine that a ground fault has occurred in the case of a low-speed climbing state.

Further, according to the abnormality judgment according to FIG. 34, it is prohibited to judge as "abnormal" when the vehicle is in a low speed rising state. Therefore, it is possible to reduce the possibility that the inrush current is erroneously detected as a ground fault. Further, according to the abnormality determination according to FIG. 35, even if it is negatively determined that it is not an "overcurrent", it is determined to be "abnormal" in the non-slow rising state. According to this, the ground fault can be detected quickly.

Further, when the discharge current value of the discharge current value ISMR whose rising speed is equal to or higher than a predetermined value is equal to or higher than the predetermined tilting threshold value Vref2, it is determined to be in a non-slow rising state. Therefore, a noise having a large rising slope but a small current value itself, such as electrical noise, is negatively determined not to have a “large slope”. Therefore, it is possible to reduce the possibility that electrical noise is erroneously detected as a ground fault.

(19th Embodiment)
In the present embodiment shown in FIG. 37, the overcurrent determination circuit 42 and the current inclination determination circuit 48 shown in FIG. 33 are replaced with the first comparison circuit 421 and the second comparison circuit 422.

The first comparison circuit 421 has a comparator 421a that compares the discharge current value ISMR signal output from the current detection circuit 46 with the preset first threshold value VrefLo. The comparator 421a outputs an on signal when the discharge current value ISMR is equal to or higher than the first threshold value VrefLo.

The second comparison circuit 422 has a comparator 422a that compares the discharge current value ISMR signal output from the current detection circuit 46 with the preset second threshold value VrefHi. The comparator 422a outputs an on signal when the discharge current value ISMR is equal to or higher than the second threshold value VrefHi. The second threshold value VrefHi is set to a value higher than the first threshold value VrefLo.

The abnormality determination circuit 42J calculates the time difference between the time when the first comparison circuit 421 starts to output the on signal and the time when the second comparison circuit 422 starts to output the on signal. The faster the rate of increase of the discharge current value ISMR, the shorter the time difference should be. In short, in the 18th embodiment, the filter circuit 47 is used to detect the low speed rising state. On the other hand, in the present embodiment, the low-speed rising state is detected by using the output time difference between two comparators having different threshold values.

The abnormality determination circuit 42J (tilt determination unit) determines that the non-slow speed rise state is obtained when the calculated time difference is less than a predetermined time threshold value. The abnormality determination circuit 42J determines whether or not a ground fault has occurred based on the signals output from the first comparison circuit 421 and the second comparison circuit 422 and the determination result by the inclination determination unit. For example, as illustrated in FIG. 38 below, the abnormality determination circuit 42J determines an abnormality.

FIG. 38 shows an example of the correspondence between the combination of the first comparison circuit 421, the second comparison circuit 422, and the time difference determination result and the abnormality determination result. In the example of FIG. 38, when it is determined that "overcurrent (low threshold value)", "overcurrent (high threshold value)", and "short time difference", it is determined as "abnormal".

The above "overcurrent (low threshold value)" is a determination result of the first comparison circuit 421 that the discharge current value ISMR is equal to or higher than the first threshold value VrefLo. The above "overcurrent (high threshold value)" is a determination result of the second comparison circuit 422 that the discharge current value ISMR is equal to or higher than the second threshold value VrefHi. The above-mentioned "short time difference" is a judgment result of the inclination determination unit that the output time difference between the two comparators is less than the time threshold value. In addition, in the case of a low-speed rising state that is negatively determined not to be "short time difference", "normal" even if it is determined to be "overcurrent (low threshold)" and "overcurrent (high threshold)". It is judged that. That is, in the case of a low-speed rising state, the interruption of the inter-system SW regarded as a ground fault abnormality is prohibited.

As described above, the SW control circuit 40 according to the present embodiment includes the first comparison circuit 421, the second comparison circuit 422, and the abnormality determination circuit 42J. Therefore, it is possible to easily realize with simple control that it is difficult to determine that a ground fault has occurred in the case of a low-speed climbing state.

Further, according to the abnormality judgment according to FIG. 38, it is prohibited to judge as "abnormal" when the vehicle is in a low speed rising state. Therefore, it is possible to reduce the possibility that the inrush current is erroneously detected as a ground fault. In the configuration shown in FIG. 37, the same configuration as that of the first comparison circuit 421 and the second comparison circuit 422 on the shunt resistor 22c side is adopted instead of the overcurrent determination circuit 420 and the inclination determination circuit 480 on the shunt resistor 31c side. You may.

(20th Embodiment)
39 and 40 show reference examples of redundant power supply systems. This redundant power supply system detects ground faults based on the current flowing through the inter-system bus. As shown in FIG. 39, an inter-system SW is provided in the inter-system bus connecting the junction box of the main system and the junction box of the sub system. When the current value exceeds a predetermined overcurrent threshold value, the control circuit (not shown) considers that a ground fault has occurred and shuts off the inter-system SW.

The solid line arrow shown in FIG. 39 indicates the current path from the main power supply when a ground fault occurs in the sub system bus on the load side. On the other hand, the broken line arrow indicates the current path from the main power supply when the inrush current flows through the general load connected to the sub system bus. Both the ground fault current and the inrush current flow from the main power supply via the junction box of the main system, the SW between the systems, and the junction box of the sub system. Here, assuming that the voltage of the main power supply is V1, the current value of the inter-system bus is I, the resistance value of the main system bus on the power supply side is R10, and the inductance is L10, the voltage VJB1 of the junction box of the main system is as follows. Is shown.
VJB1 = V1-R10 × I-L10 × dI / dt

The larger the current slope, the larger the decrease in voltage VJB1, so the power failure region shifts to the low current side. That is, a low current value leads to power failure. Therefore, in order to prevent power loss, the overcurrent threshold value must be set low as shown in FIG. 40. Therefore, the inrush current may be erroneously detected as a ground fault current. In the above example, the inrush current and the ground fault on the sub system side have been described, but the same applies to the main system side.

In the present embodiment, the energization control device D and the redundant power supply system are configured so as to reduce the risk of erroneously detecting a ground fault and interrupting the inter-system SW when an inrush current flows.

As shown in FIG. 41, in the energization control device D of the present embodiment, the inter-system bus 30 is provided with inter-system SW (31a, 31b), and the main system bus 10 and the sub-system bus 20 are not provided with SMR. .. The inter-system bus 30 is provided with a shunt resistor 31c for detecting a current, and the main system bus 10 and the sub-system bus 20 are not provided with a shunt resistor. The SW control circuit 40 detects the potential across the shunt resistor 31c and calculates the inter-system current value IISO based on the potential difference between the two ends. The SW control circuit 40 determines whether or not a ground fault has occurred based on the slope (current slope) of the inter-system current value IISO, and controls the inter-system SW based on the determination result. The SW control circuit 40 includes, for example, a current detection circuit 46 having a differential amplifier 46a, a filter circuit 47, and a comparator 48a in the circuit configuration of the SW control circuit 40 shown in the 18th embodiment (see FIG. 33). It includes a current inclination determination circuit 48 and a SW drive circuit 41.

FIG. 42 shows a processing procedure for abnormal state control executed by the SW control circuit 40 of the present embodiment. In this control procedure, the processes of S20 and S30 of the first embodiment (see FIG. 3) are replaced with the processes of S21 and S38. This process starts execution when the SW control circuit 40 is activated, and is repeatedly executed at a predetermined cycle. FIG. 42 shows an example in which the inter-system current value IISO takes a positive value.

First, in step S10, the SW control circuit 40 controls the operation of the inter-system SW according to the command of the host control circuit 50. In the following step S21, the SW control circuit 40 detects (acquires) the inter-system current value IISO based on the potential difference between both ends of the shunt resistor 31c.

In the following step S38, the SW control circuit 40 determines whether or not the current slope (dIISO / dt), which is the amount of change in the inter-system current value IISO per unit time, exceeds the predetermined value γ. The predetermined value γ is the current slope threshold value and corresponds to Vref2 in FIG. 33. If it is negatively determined that the value does not exceed the predetermined value γ, the interruption of the inter-system SW in step S40 is prohibited. The SW control circuit 40 re-executes the processes after step S10. If it is determined affirmative that the current slope exceeds the predetermined value γ, the inter-system SW is shut off in step S40. In step S40, the inter-system SW is turned off regardless of the content of the command from the host control circuit 50.

As described above, according to the SW control circuit 40 (energization control device D) according to the present embodiment, the current gradient is used to control the SW between systems. Specifically, it is determined whether or not the current inclination exceeds a predetermined current inclination threshold value, and the inter-system SW is controlled to the cutoff state based on the determination result that the current inclination exceeds the current inclination threshold value. The slope of the current that flows when a ground fault occurs is larger than the slope of the inrush current. At the time of a ground fault, the current slope is expected to exceed the current slope threshold, and when an inrush current flows, the current slope does not easily exceed the current slope threshold. Therefore, when an inrush current flows, it is possible to reduce the possibility of erroneously detecting a ground fault and interrupting the inter-system SW.

In particular, in the present embodiment, when the current slope of the inter-system current value IISO exceeds a predetermined value γ (current slope threshold value), the inter-system SW is cut off. Therefore, when an inrush current flows, the risk of erroneously detecting a ground fault and interrupting the inter-system SW can be reduced with a simple configuration.

Of the current flowing through the inter-system bus 30, only one direction may be the detection target, or both directions may be the detection target. In the inter-system bus 30, the inter-system current value IISO takes a positive value when a current flows in a predetermined direction, and the inter-system current value IISO takes a negative value when the current flows in the opposite direction to the one direction. In addition, the SW control circuit 40 may be configured. That is, the reference voltage of the differential amplifier 46a may be set to 0V. The current slope threshold with respect to the opposite direction is set as a predetermined negative value, and when the current slope exceeds the negative current slope threshold, that is, when the current slope becomes larger than the current slope threshold as a negative value, the SW control circuit 40 intersystems. Shut off the SW. When the inter-system current value IISO is a positive value, the fact that the current slope exceeds the predetermined value γ means that the relationship of dIISO / dt> predetermined value γ (positive value) is satisfied. When the inter-system current value IISO is a negative value, the fact that the current slope exceeds the predetermined value γ means that the relationship of dIISO / dt <predetermined value γ (negative value) is satisfied. For convenience, the process of step S38 may be performed as to whether or not the current slope of the absolute value of the inter-system current value IISO exceeds a predetermined value γ (positive value).

Further, the reference voltage of the differential amplifier 46a is set to half the value of the power supply voltage supplied to the differential amplifier 46a (for example, 2.5V), and the inter-system current value IISO takes a positive value even when the current flows in the opposite direction. As described above, the SW control circuit 40 may be configured.

The detection target is not limited to the current flowing through the inter-system bus 30. The current flowing through one of the main system bus 10, the sub system bus 20, and the inter-system bus 30 may be used. Although not shown, the current flowing through the main system bus 10 may be used, or the current flowing through the sub system bus 20 may be used. Further, in the main system bus 10 and the sub system bus 20, the current flowing through the power supply side buses 10a and 20a may be used, or the current flowing through the load side buses 10b and 20b may be used. For example, instead of the shunt resistor 31c shown in FIG. 41, a shunt resistor 22c is provided on the sub power supply side bus 20a, and the slope of the current value (current slope) detected by the shunt resistor 22c is determined by whether or not a ground fault has occurred. It may be used for judgment.

In this embodiment, the magnitude of the current flowing through the inter-system bus 30, that is, the inter-system current value IISO is used. When the current flowing through the main system bus 10 is used, the sensitivity of the sub system bus 20 to a ground fault abnormality and the inrush currents of the second loads 20L and 21L is low. When detecting the current flowing through the sub system bus 20, the sensitivity of the main system bus 10 to the ground fault abnormality and the inrush currents of the second loads 20L and 21L is low. By using the current flowing through the inter-system bus 30, when a ground fault occurs in either the main system bus 10 or the sub system bus 20, the ground fault can be detected accurately by separating it from the inrush current.

Of the main system bus 10, the sub system bus 20, and the inter-system bus 30, the current values of a plurality of buses are acquired, and the current inclination of each is compared with the corresponding current inclination threshold, resulting in a ground fault. It may be determined whether or not there is. For example, if the slope of the inter-system current value IISO exceeds the predetermined value γ and the slope of the current value (ISMR) of the sub-system bus 20 exceeds the predetermined value δ, it is considered that a ground fault has occurred and the system The SW may be cut off for a while. When the slope of the inter-system current value IISO exceeds the predetermined value γ, or when the slope of the current value (ISMR) of the sub-system bus 20 exceeds the predetermined value δ, the inter-system SW may be cut off.

The configuration shown in the present embodiment and the configuration shown in the preceding embodiment may be combined. According to this, it is possible to suppress false detection of charging as a ground fault while suppressing false detection of a ground fault when an inrush current flows. That is, it is possible to reduce the risk of interrupting the inter-system SW by regarding it as a ground fault during charging or when an inrush current flows.

(21st Embodiment)
FIG. 43 shows a processing procedure for abnormal time control executed by the SW control circuit 40 of the present embodiment. This control procedure is obtained by adding the process of S39 described later to the process of the 20th embodiment. FIG. 43 also shows an example in which the inter-system current value IISO takes a positive value as in FIG. 42.

When the process of step S21 is executed, the SW control circuit 40 executes the process of step S38. That is, it is determined whether or not the current slope (dIISO / dt) exceeds the predetermined value γ. When it is negatively determined that the current slope does not exceed the predetermined value γ, the SW control circuit 40 prohibits the interruption of the inter-system SW by step S40, and executes the processes after step S10 again.

If it is determined affirmatively that the current slope exceeds the predetermined value γ in step S38, the SW control circuit 40 executes the process of step S39. The SW control circuit 40 determines whether or not the inter-system current value IISO detected in step S21 exceeds a preset predetermined threshold value IsISO. That is, the overcurrent determination is executed. The threshold IsISO corresponds to the overcurrent threshold.

If it is negatively determined in step S39 that the inter-system current value IISO does not exceed the threshold value IsISO, the SW control circuit 40 prohibits the inter-system SW from being interrupted by step S40. The SW control circuit 40 executes the process of step S10 or less again.

When it is determined in step S39 that the inter-system current value IISO exceeds the threshold value Iso, the SW control circuit 40 executes the process of step S40 and shuts off the inter-system SW. When the inter-system current value IISO is a negative value, the inter-system current value IISO exceeding the threshold value Iso means that the relationship of IISO / dt <threshold value IsISO (negative value) is satisfied. For convenience, the process of step S39 may be performed as to whether or not the absolute value of the inter-system current value IISO exceeds a predetermined threshold value IsISO (positive value).

As described above, in the present embodiment, even if the inter-system current value IISO is positively determined to exceed the threshold value Iso, if the inter-system current value is negatively determined not to exceed the predetermined value γ, the inter-system current value is determined to be negative. The shutoff of SW is prohibited. In other words, the overcurrent determination is enabled only when the current slope exceeds the predetermined value γ. Therefore, when an inrush current flows, the possibility of erroneously detecting a ground fault can be reduced more effectively.

Further, when the current slope exceeds the predetermined value γ and the inter-system current value IISO exceeds the threshold value Iso, the SW control circuit 40 shuts off the inter-system SW. Therefore, when the current slope exceeds the predetermined value γ due to noise or the like instead of a ground fault, and if the inter-system current value IISO does not exceed the threshold value Iso, it is possible to prohibit the interruption of the inter-system SW. As a result, it is possible to reduce the risk of erroneously detecting temporary noise as a ground fault and interrupting the inter-system SW.

The processing timings of steps S38 and S39 are not limited to the example shown in FIG. 43. If it is determined in step S39 that the inter-system current value IISO exceeds the threshold value ISO, the process of step S38 may be executed. Further, the processes of steps S38 and S39 may be performed at the same time.

(22nd Embodiment)
FIG. 44 shows a processing procedure for abnormal state control executed by the SW control circuit 40 of the present embodiment. In this control procedure, in the process of the 21st embodiment, the condition for shutting off the inter-system SW is changed to a condition in which a positive determination is established in one of steps S38 and S39, that is, an OR condition. FIG. 44 also shows an example in which the inter-system current value IISO takes a positive value as in FIG. 42.

When the process of step S21 is executed, the SW control circuit 40 executes the process of step S38. In step S38, the SW control circuit 40 determines whether or not the current slope exceeds the predetermined value γ. When it is determined that the current slope exceeds the predetermined value γ, the SW control circuit 40 executes the process of step S40 and shuts off the inter-system SW.

When it is determined in step S38 that the current slope does not exceed the predetermined value γ, the SW control circuit 40 executes the overcurrent determination process in step S39. That is, it is determined whether or not the inter-system current value IISO detected in step S21 exceeds a preset predetermined threshold value IsISO.

When it is determined in step S39 that the inter-system current value IISO exceeds the threshold value Iso, the SW control circuit 40 executes the process of step S40 and shuts off the inter-system SW. On the other hand, when it is negatively determined that the inter-system current value IISO does not exceed the threshold value Iso, the SW control circuit 40 prohibits the inter-system SW from being interrupted by step S40. The SW control circuit 40 re-executes the processes after step S10.

As described above, in the present embodiment, the inter-system SW is shut off when the current slope exceeds the predetermined value γ or when the inter-system current value IISO exceeds the threshold value Iso. That is, even if the current slope does not exceed the predetermined value γ, if the inter-system current value IISO exceeds the threshold value Iso, the inter-system SW is shut off. As a result, the inter-system SW can be cut off even when the current gradient is small due to, for example, the influence of the motor lock or the wiring inductance to the load.

The processing timings of steps S38 and S39 are not limited to the example shown in FIG. 44. If it is determined in step S38 that the inter-system current value IISO does not exceed the threshold value ISO, the process of step S37 may be executed. Further, the processes of steps S37 and S38 may be performed at the same time.

(23rd Embodiment)
FIG. 45 shows a processing procedure for abnormal state control executed by the SW control circuit 40 of the present embodiment. In this control procedure, in the process of the 23rd embodiment, the process of step S39 is replaced with the process of steps S39A and S39B. The SW control circuit 40 has IsISOH and IsISOL, which is a threshold value having an absolute value smaller than that of IsISOH, as a threshold value for determining overcurrent. IsISOH corresponds to the first overcurrent threshold and IsISOL corresponds to the second overcurrent threshold. FIG. 45 also shows an example in which the inter-system current value IISO takes a positive value as in FIG. 42.

When the process of step S21 is executed, the SW control circuit 40 executes the process of step S39A before executing the process of step S38. The SW control circuit 40 determines whether or not the inter-system current value IISO detected in step S21 exceeds a predetermined threshold value IsISOH set in advance.

When it is determined in step S39A that the inter-system current value IISO exceeds the threshold value IsISOH, the SW control circuit 40 executes the process of step S40 and shuts off the inter-system SW. On the other hand, when it is negatively determined that the inter-system current value IISO does not exceed the threshold value IsISOH, the SW control circuit 40 executes the process of step S38.

If it is negatively determined in step S38 that the current slope does not exceed the predetermined value γ, the SW control circuit 40 prohibits the interruption of the inter-system SW by step S40, and executes the processes after step S10 again. On the other hand, when it is determined affirmative that the current slope exceeds the predetermined value γ, the SW control circuit 40 executes the process of step S39B. The SW control circuit 40 determines whether or not the inter-system current value IISO detected in step S21 exceeds a predetermined threshold value IsISOL set in advance.

If it is negatively determined in step S39B that the inter-system current value IISO does not exceed the threshold value IsISOL, the SW control circuit 40 prohibits the inter-system SW from being interrupted by step S40. The SW control circuit 40 executes the process of step S10 or less again.

When it is determined in step S39B that the inter-system current value IISO exceeds the threshold value IsISOL, the SW control circuit 40 executes the process of step S40 and shuts off the inter-system SW.

As described above, in the present embodiment, when the inter-system current value IISO exceeds the threshold value IsISO, or when the current slope exceeds the predetermined value γ and the inter-system current value IISO exceeds the threshold value IsISOL. , Shut off the SW between systems. Even if the current slope does not exceed the predetermined value γ, if the inter-system current value IISO exceeds the threshold value IsISOH, the inter-system SW is shut off. Similar to the 22nd embodiment, the inter-system SW can be cut off even when the current slope is small.

Further, when the current slope exceeds the predetermined value γ and the inter-system current value IISO exceeds the threshold value IsISOL, the SW control circuit 40 shuts off the inter-system SW. Therefore, when the current slope exceeds the predetermined value γ due to noise or the like instead of a ground fault, and if the inter-system current value IISO does not exceed the threshold value IsISOL, the interruption of the inter-system SW can be prohibited. As a result, it is possible to reduce the risk of erroneously detecting temporary noise as a ground fault and interrupting the inter-system SW.

The processing timings of steps S38, S39A, and S39B are not limited to the example shown in FIG. 45. The order of steps S38 and S39B may be reversed or may be carried out at the same time. The order of steps S38 and S39B and step S39A may be reversed or may be performed at the same time.

(Other embodiments)
Although the plurality of embodiments of the present disclosure have been described above, not only the combination of the configurations specified in the description of each embodiment but also the plurality of embodiments even if the combination is not specified if there is no problem in the combination. It is possible to partially combine the configurations of. Further, it is assumed that the unspecified combination of the configurations described in the plurality of embodiments and modifications is also disclosed by the following description.

In the eighth embodiment, even if the second discharge current value ISMR2 does not exceed the second threshold value, the inter-system SW is shut off if the first discharge current value ISMR1 rises beyond the first threshold value. On the other hand, when the second discharge current value ISMR2 exceeds the second threshold value and the first discharge current value ISMR1 exceeds the first threshold value, it may be regarded as a ground fault abnormality and the inter-system SW may be shut off. ..

In the redundant power supply system shown in FIG. 1 and the like, the generator G10 is connected to the main system bus 10. Therefore, the sub power supply B20 is configured to be rechargeable by the electric power supplied through the inter-system bus 30. On the other hand, the generator G10 may be connected to the sub system bus 20. Further, the generator G10 may be connected to the high potential side of the main power source B10 or the sub power source B20, or may be connected to the ground side.

The energization control device according to the 17th to 19th embodiments has the following configurations A and B. On the other hand, the energization control device may be provided with the configuration B by abolishing the configuration A. The configuration A is "when the inter-system switch control unit acquires a discharge current value ISMR, which is the magnitude of the current discharged from the second power source, and the acquired discharge current value rises beyond the over-discharge threshold value Is. , It is considered that a ground fault has occurred and the inter-system switch is controlled to the cutoff state. " Configuration B states that "when the inter-system switch control unit is in a low-speed rising state in which the rising speed of the discharge current value ISMR is equal to or less than a predetermined value, a ground fault abnormality occurs as compared with the case where it is in a non-low-speed rising state. It makes it difficult to judge that it is. "

An example of detecting the current flowing through the bus using a shunt resistor was shown, but the present invention is not limited to this. A sense element for detecting the current may be used. The sense element is configured together with, for example, a semiconductor switching element that constitutes an intersystem SW (31a, 31b).

Claims (30)

1. The first system bus (10) that transmits the electric power supplied from the first power source (B10) to the first load (L10, L11), and
   The second system bus (20) that transmits the electric power supplied from the second power source (B20) to the second load (L20, L21), and
   An inter-system bus (30) that electrically connects the first system bus and the second system bus, and
   In the energization control device applied to the redundant power supply system equipped with
   Inter-system switches (31a, 31b) that switch between energization and interruption of current in the inter-system bus, and
   Inter-system switch control units (40, 41) that control the operating state of the inter-system switch, and
   With
   The inter-system switch control unit
   The discharge current value (ISMR), which is the magnitude of the current discharged from the second power source, is acquired.
   An energization control device that controls the inter-system switch to a cutoff state by regarding that a ground fault has occurred when the acquired discharge current value rises beyond the over-discharge threshold value (Ith).
2. When the direction in which the current flows from the side of the first system bus to the side of the second system bus through the inter-system bus is positive, the value of the current flowing through the inter-system bus is defined as the inter-system current value (IISO). ,
   The energization control device according to claim 1, further comprising a threshold value changing unit (S31) for changing the over-discharge threshold value to a smaller value when the inter-system current value is smaller than a predetermined threshold value (IthISO).
3. When the direction in which the current flows from the side of the first system bus to the side of the second system bus through the inter-system bus is positive, the value of the current flowing through the inter-system bus is defined as the inter-system current value.
   Even when the discharge current value does not exceed the over-discharge threshold value, the inter-system switch control unit causes the ground fault abnormality when the inter-system current value is smaller than a predetermined threshold value (IthISO). The energization control device according to claim 1, wherein the inter-system switch is controlled to be in a cut-off state.
4. When the discharge current value rises beyond the over-discharge threshold value, it is determined whether a ground fault has occurred on the side of the first system bus or the side of the second system bus with respect to the inter-system bus. Equipped with ground fault discrimination units (S32, S33)
   When the direction in which the current flows from the side of the first system bus to the side of the second system bus through the inter-system bus is positive, and the magnitude of the current flowing through the inter-system bus is the inter-system current value.
   When the inter-system current value is smaller than the discrimination threshold value, the ground fault discriminating unit determines that a ground fault has occurred on the side of the first system bus, and the inter-system current value is equal to or higher than the discrimination threshold value. The energization control device according to any one of claims 1 to 3, wherein in this case, it is determined that a ground fault has occurred on the side of the second system bus.
5. A power switch (22) for switching between energization and disconnection between the second power supply and the second system bus, and
   A power switch control unit (40) that controls the operating state of the power switch, and
   The energization control device according to any one of claims 1 to 4, further comprising.
6. According to claim 5, when the ground fault abnormality occurs due to the ground fault occurring on the side of the second system bus, the power switch control unit controls the power switch to a cutoff state. The energization control device described.
7. The energization control device according to claim 6, wherein the power switch control unit shuts off the power switch at the same time as the inter-system switch control unit shuts off the inter-system switch when controlling the power switch in a cut-off state.
8. When the ground fault abnormality occurs due to the ground fault occurring on the side of the first system bus, the power switch control unit controls the power switch to the energized state, claim 5 to 5. The energization control device according to any one of 7.
9. The upper control unit (50) for instructing the control contents to the inter-system switch control unit and the power switch control unit is provided.
   When the ground fault abnormality occurs, the inter-system switch control unit controls the inter-system switch in a cutoff state regardless of the command content of the higher-level control unit.
   5. The power switch control unit controls the power switch according to the position where the ground fault occurs, regardless of the command content of the upper control unit, when the ground fault abnormality occurs. 8. The energization control device according to any one of 8.
10. The energization according to claim 9, further comprising an abnormality notification unit (S50) for notifying the upper control unit of the command content when the command content is invalidated due to the occurrence of the ground fault abnormality. Control device.
11. A cutoff switch (23) for cutting off the energization between the second power supply and the second system bus is provided.
    The energization control device according to claim 9 or 10, wherein the cutoff switch is configured so that the cutoff operation can be performed regardless of the command content of the power switch control unit.
12. The magnitude of the current discharged from the first power source is defined as the first discharge current value (ISMR1), and the discharge current value is defined as the second discharge current value (ISMR2).
    The energization according to any one of claims 1 to 11, wherein the inter-system switch control unit controls the operation of the inter-system switch based on both the first discharge current value and the second discharge current value. Control device.
13. The over-discharge threshold value with respect to the first discharge current value is set as the first threshold value, and the over-discharge threshold value with respect to the second discharge current value is set as the second threshold value.
    Even if the second discharge current value does not exceed the second threshold value, the inter-system switch control unit may use the inter-system switch control unit if the first discharge current value exceeds the first threshold value. The energization control device according to claim 12, which controls an inter-system switch in a cut-off state.
14. The over-discharge threshold value with respect to the first discharge current value is set as the first threshold value, and the over-discharge threshold value with respect to the second discharge current value is set as the second threshold value.
    The inter-system switch control unit shuts off the inter-system switch when the second discharge current value exceeds the second threshold value and the first discharge current value rises beyond the first threshold value. 12. The energization control device according to claim 12.
15. Did the cause of the ground fault disappear and recover during the period in which the inter-system switch control unit executes the cut-off latch control for shutting off the inter-system switch due to the occurrence of the ground fault abnormality? Equipped with a recovery determination unit (S70) that determines whether or not
    The energization control device according to any one of claims 1 to 14, wherein when the restoration determination unit determines that the restoration has been performed, the inter-system switch control unit terminates the cutoff latch control.
16. The energization control device according to claim 15, wherein the recovery determination unit determines that the restoration has been performed when a predetermined time has elapsed from the start of the cutoff latch control.
17. The energization control device according to claim 15, wherein the restoration determination unit determines that the restoration is performed when each of the ground potentials of both terminals of the inter-system switch is equal to or higher than a predetermined potential.
18. The energization control device according to claim 15, wherein the restoration determination unit determines that the restoration is performed when the potential difference between both terminals of the inter-system switch is less than a predetermined value.
19. The inter-system switch control unit states that when the discharge current value rises at a low speed of a predetermined value or less, the ground fault abnormality occurs as compared with the case where the discharge current value rises at a low speed. The energization control device according to any one of claims 1 to 18, which makes it difficult to determine.
20. The energization control device according to claim 19, wherein the inter-system switch control unit changes the over-discharge threshold value to a larger value in the case of the low-speed rising state than in the case of the non-low-speed rising state.
21. The energization control device according to claim 19, wherein the inter-system switch control unit prohibits interruption of the inter-system switch regarded as a ground fault abnormality when the low-speed rising state is present.
22. The inter-system switch control unit
    A filter circuit (47) that extracts and outputs a discharge current value whose rising rate is equal to or higher than a predetermined value among the acquired discharge current values.
    When the output value of the filter circuit is equal to or higher than a predetermined tilt threshold value (Vref2), the tilt determination unit (48) for determining that the non-slow speed rise state is present.
    The energization control device according to any one of claims 19 to 21, wherein the energization control device has.
23. The inter-system switch control unit
    A first comparison circuit (421) for comparing the magnitude relationship between the acquired discharge current value and the first threshold value (VrefLo), and
    A second comparison circuit (422) that compares the magnitude relationship between the acquired discharge current value and the second threshold value (VrefHi) set to a value higher than the first threshold value.
    When the time difference from the timing when the acquired discharge current value exceeds the first threshold value to the timing when the second threshold value is exceeded is less than a predetermined time threshold value, the slope for determining the non-slow speed rising state. Judgment unit (42J) and
    The energization control device according to any one of claims 19 to 22, which comprises.
24. The first system bus (10) that transmits the electric power supplied from the first power source (B10) to the first load (L10, L11), and
    The second system bus (20) that transmits the electric power supplied from the second power source (B20) to the second load (L20, L21), and
    An inter-system bus (30) that electrically connects the first system bus and the second system bus, and
    In the energization control device applied to the redundant power supply system equipped with
    Inter-system switches (31a, 31b) that switch between energization and interruption of current in the inter-system bus, and
    An inter-system switch control unit (40) that controls the operating state of the inter-system switch,
    With
    The inter-system switch control unit
    The current value, which is the magnitude of the current flowing through one of the first system bus, the second system bus, and the inter-system bus, is acquired.
    It is determined whether or not the current slope, which is the amount of change in the acquired current value per unit time, exceeds a predetermined current slope threshold value, and based on the determination result that the current slope exceeds the current slope threshold value. An energization control device that controls the inter-system switch to a cutoff state.
25. The energization control device according to claim 24, wherein the inter-system switch control unit controls the inter-system switch in a cut-off state when the current inclination exceeds the current inclination threshold value.
26. The inter-system switch control unit
    It is determined whether or not the current value exceeds a predetermined overcurrent threshold value, and it is determined.
    The energization control device according to claim 24, which controls the inter-system switch in a cutoff state when the current slope exceeds the current slope threshold value and the current value exceeds the overcurrent threshold value.
27. The inter-system switch control unit
    It is determined whether or not the current value exceeds a predetermined overcurrent threshold value, and it is determined.
    The energization control according to claim 24, which controls the inter-system switch in a cutoff state when the current value exceeds the overcurrent threshold value or when the current slope exceeds the current slope threshold value. apparatus.
28. The inter-system switch control unit
    It is determined whether or not the current value exceeds a predetermined overcurrent threshold value, and it is determined.
    When the current value exceeds the first overcurrent threshold, which is the overcurrent threshold, or when the current gradient exceeds the current gradient threshold, the current value is an absolute value higher than the first overcurrent threshold. The energization control device according to claim 24, which controls the intersystem switch in a cutoff state when the second overcurrent threshold, which is a small overcurrent threshold, is exceeded.
29. The energization control device according to any one of claims 24 to 28, wherein the inter-system switch control unit acquires the magnitude of the current flowing through the inter-system bus as the current value.
30. The energization control device according to any one of claims 1 to 29,
    With at least one of the first power supply and the second power supply
    Power supply unit with.

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