WO2020057190A1

WO2020057190A1 - Digital television receiver and radio frequency signal processing device thereof

Info

Publication number: WO2020057190A1
Application number: PCT/CN2019/091291
Authority: WO
Inventors: 李本友; 那海伦; 吴曰超
Original assignee: 青岛海信电器股份有限公司
Priority date: 2018-09-21
Filing date: 2019-06-14
Publication date: 2020-03-26
Also published as: CN109379543B; CN109379543A

Abstract

The present disclosure provides a radio frequency signal processing device and a digital signal receiver having the same. The radio frequency signal processing device comprises a printed circuit board and a radio frequency connector, a signal conversion circuit, and a tuner mounted on the printed circuit board. A first common ground and a second common ground electrically isolated from each other are formed on the printed circuit board. The radio frequency connector and the signal conversion circuit are electrically connected to the first common ground, and the tuner is electrically connected to the second common ground. The signal conversion circuit comprises a single-ended to differential circuit. An input end of the single-ended to differential circuit is electrically connected to an output end of the radio frequency connector. The single-ended to differential circuit outputs a differential signal. The tuner receives and processes the differential signal.

Description

Digital television receiving equipment and radio frequency signal processing device thereof

Cross-reference to related applications

This patent application claims priority from a Chinese patent application filed on September 21, 2018 with an application number of 201811109515.X, the entirety of which is incorporated herein by reference.

Technical field

The present disclosure relates to the technical field of digital television, and in particular, to a radio frequency signal processing device and a digital television receiving device having the same.

Background technique

Digital signal receiving equipment such as televisions and set-top boxes receive cable TV signals through antennas. Since the antennas are directly exposed to the external environment, they will be affected by lightning and other factors. In addition, in order to eliminate the potential difference between the power network ground cable and the cable network ground cable, LCD TVs may Dangers such as spontaneous combustion and fire, are required by national safety standards, and antennas in televisions must be designed with an isolator to isolate external terminals from the internal circuit of the TV motherboard.

Summary of the Invention

Embodiments of the present disclosure provide a radio frequency signal processing device and a digital signal receiving device having the same, in order to solve the problem that radio frequency signals are easily interfered in the prior art.

According to an aspect of the present disclosure, there is provided a radio frequency signal processing device including a printed circuit board, a radio frequency connector, a signal conversion circuit, and a tuner respectively mounted on the printed circuit board; the printed circuit A first common ground and a second common ground electrically isolated from each other are formed on the board; the radio frequency connector and the signal conversion circuit are electrically connected to the first common ground, and the tuner is electrically connected to the second common ground The signal conversion circuit includes a single-ended-to-differential circuit, an input of the single-ended-to-differential circuit is electrically connected to an output end of the radio frequency connector, and the single-ended-to-differential circuit outputs a differential signal to the tuner; The tuner receives and processes the differential signal.

According to another aspect of the present disclosure, there is also provided a digital signal receiving device including the above-mentioned radio frequency signal processing device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic structural diagram of a radio frequency signal processing apparatus according to an embodiment of the present disclosure.

FIG. 2 is a schematic circuit diagram of a radio frequency signal processing device according to an embodiment of the present disclosure.

The explanation of reference numerals is as follows: 1. Printed circuit board; 11. First area; 111. First common ground; 12. Second area; 121; Second common ground; 13. Isolation channel; Line segment; 132, second straight line segment; 133, arc line segment; 2, isolation circuit; 3, RF connector; 4, signal conversion circuit; 41, single-ended to differential circuit; 42, impedance matching circuit; 43, DC blocking Circuit; 5. Tuner.

detailed description

Exemplary embodiments embodying the features and advantages of the present disclosure will be described in detail in the following description. It should be understood that the present disclosure can have various changes in different implementations, all of which do not depart from the scope of the present disclosure, and that the descriptions and diagrams therein are essentially for the purpose of illustration, not for limitation. This disclosure.

In order to isolate the external terminal from the internal circuit of the TV motherboard, in one embodiment, an external isolator is used, and the isolator is plugged into the TV motherboard to isolate the signal and ground. However, the cost of such an external isolator solution is high, and the breakpoint of the RF signal transmission is increased, which affects the quality of the RF signal transmission.

In another embodiment, an antenna isolator function is integrated on the television motherboard, and an isolator is formed on the television motherboard by forming an isolator to isolate the antenna ground from the motherboard ground. The external RF signal is received by the RF connector. After passing through the isolator, filter and other circuits, the single-ended signal is converted into a differential signal by the signal conversion circuit and enters the tuner chip. In this process, the RF signal is transmitted using single-end, which may be easily interfered by other high-frequency signals on the motherboard, such as DDR (Double Data Rate) memory, digital interface for image transmission (such as Vbyone interface), I2S (Inter-IC Sound, integrated The built-in audio bus signal of the circuit affects the electrical performance index of the tuner. In order to improve the anti-interference performance of the single-ended transmission part of the radio frequency signal, in some embodiments, circuits such as electrostatic discharge and anti-electromagnetic interference are added to the single-ended transmission part.

With the progress of the times, the motherboard SOC (System On Chip) has more and more integrated functions, and the frequency of the main frequency and DDR is getting higher and higher. The interference of high-frequency signals on the motherboard and the indicators have become increasingly obvious. At the same time, more and more components are integrated on the motherboard, and these components will also affect the single-ended transmission part of the RF signal. In addition, for multi-layer motherboards with ground wires connected, if a certain layer of ground is disturbed, Will make Tuner signal receiving sensitivity lower. Based on these factors, measures to increase electrostatic discharge and anti-electromagnetic interference circuits cannot fully meet the needs of anti-interference. In order to solve this problem, a shield can be added to the motherboard and a ground foam is added to the back of the motherboard. This method is more complicated to design and cannot completely resist interference.

In view of this, embodiments of the present disclosure provide a radio frequency signal processing device and a digital signal receiving device having the same. The digital signal receiving device may be a television, a set-top box, or the like. The radio frequency signal processing device may be integrated on a main board of the digital signal receiving device.

Referring to FIGS. 1 and 2, in an embodiment of the present disclosure, the radio frequency signal processing device includes a printed circuit board 1, an isolation circuit 2, a radio frequency connector 3, a signal conversion circuit 4, and a tuner 5. The isolation circuit 2, the radio frequency connector 3, the signal conversion circuit 4, and the tuner 5 are respectively mounted on the printed circuit board 1.

The printed circuit board 1 also serves as a main board of a digital signal receiving device, and is used to install various functional devices such as a system chip (not shown) and a memory (not shown), so as to realize related functions of the digital signal receiving device.

As shown in FIG. 1, the surface of the printed circuit board 1 is provided with an isolation channel 13, and the surface of the printed circuit board 1 is separated by the isolation channel 13 into a first region 11 and a second region 12, which are separated from each other. Surrounded by the isolation channel 13, the second region 12 is located outside the isolation channel 13. The first region 11 is located on the printed circuit board 1, and the area of the first region 11 is much smaller than that of the second region 12.

The second area 12 is provided with an interface (not shown) for the tuner 5 installation. At the same time, various functional devices such as a system chip (not shown) and a memory (not shown) are installed in the second area 12, Corresponding lines (not shown) are provided in the second area 12 to fulfill the electrical connection requirements between the devices. A second common ground 121 is formed in the second area 12, and the second common ground 121 is a low-voltage ground of the main board and is connected to the power grid ground.

The first area 11 is provided with an interface (not shown in the figure) for the installation of the RF connector 3, the isolation circuit 2, and the signal conversion circuit 4, and a corresponding line (not shown in the figure) is formed to realize the electrical connection between the devices. . A first public ground 111 is also formed in the first area 11, and the first public ground 111 is a high-voltage ground and is connected to a ground cable of a cable television network.

The isolation channel 13 is formed by removing the copper layer on the surface of the printed circuit board 1. The outline of the isolation channel 13 is a closed shape, so that the first common ground 111 and the second common ground 121 are isolated. The width of the isolation channel 13 is designed in accordance with the dielectric isolation level requirements of the printed circuit board 1. For example, when an isolation voltage of 800V is required, the width of the isolation channel 13 can be designed to be 1.5 mm. Different printed circuit boards 1 have different dielectric isolation, and the width of the isolation channel 13 is reasonably set according to actual needs.

In this embodiment, the outline of the isolation channel 13 is D-shaped, and includes a first straight line segment 131, two second straight line segments 132 perpendicularly connecting two ends of the first straight line segment 131, and the other ends of the two second straight line segments 132. Of arc segments 133. The first straight segment 131 faces the interface for the tuner 5 in the second area 12, and the arc segment 133 faces the outer edge of the printed circuit board 1. The contour of the isolation channel 13 may also be semicircular, which is not limited in the present disclosure.

The radio frequency connector 3 is used to receive a radio frequency signal of an antenna and transmit the radio frequency signal to the printed circuit board 1. The radio frequency signal is a single-ended signal. The pins of the radio-frequency connector 3 are installed in the first area 11, and their installation positions are close to the arc segment 133 of the isolation channel 13. The ground of the radio frequency connector 3 is electrically connected to the first common ground 111, and the output end of the radio frequency connector 3 is electrically connected to a corresponding interface (not shown in the figure) in the first area 11.

Referring to FIG. 2, the isolation circuit 2 includes ground isolation capacitors C1, C2, C3, C4, C5, and C6 and a core isolation capacitor C7 to achieve ground isolation and signal isolation.

The isolation capacitors C1-C6 in each place are connected in parallel. One end of each of the isolation capacitors C1-C6 is electrically connected to the first common ground 111 and the other end is electrically connected to the second common ground 121. The ground isolation capacitors C1-C6 are high-voltage capacitors with a withstand voltage of not less than 1000V. The first public ground 111 and the second public ground 121 are electrically isolated to eliminate the number caused by the potential difference between the cable network ground and the power network ground. Hazards such as spontaneous combustion and fire may occur in signal receiving equipment. The capacitance of the isolation capacitors C1-C6 in each place is selected according to demand. According to the actual situation, the number of ground isolation capacitors C1-C6 can be appropriately increased or deleted.

Referring to FIG. 1, in this embodiment, the ground isolation capacitors C1 to C6 are all disposed on the first linear segment 131 of the isolation channel 13 and are arranged along the extending direction of the first linear segment 131. The six ground isolation capacitors C1-C6 are divided into two groups of three. The two sets of ground isolation capacitors are arranged on both sides of the midpoint of the first straight line segment 131 and are spaced apart.

The core wire isolation capacitor C7 is also a high-voltage capacitor with a withstand voltage of 3000V. One end of the core isolation capacitor C7 is electrically connected to the output of the RF connector 3. The core isolation capacitor C7 isolates the RF signal of the RF connector 3. The core isolation capacitor C7 is in a high-impedance state for DC and low-frequency signals, ensuring 40MHz. -1000MHz radio frequency signal can be effectively transmitted, meeting the signal loss requirement of 40MHz ～ 1000MHz band less than 2dB.

The signal conversion circuit 4 converts the radio frequency signal transmitted by the radio frequency connector 3 from a single-ended signal into a differential signal and outputs it to the second area 12. Referring to FIG. 2, in this embodiment, the signal conversion circuit 4 includes a single-ended to differential circuit 41, and further includes an impedance matching circuit 42 and a DC blocking circuit 43.

The single-ended-to-differential circuit 41 implements a single-ended signal-to-differential signal function. In this embodiment, the single-ended-to-differential circuit 41 is composed of a balun L1, and the third pin of the balun L1 is used as an input terminal, and the other end of the core isolation capacitor C7 is connected to the RF connector through the core isolation capacitor C7. The output terminal of 3 is electrically connected; the fourth pin of the balun L1 is connected to the first common ground 111; the first pin and the second pin of the balun L1 are used as output terminals to output a differential signal to the outside. The output end of RF connector 3 to the input end of Balun L1 is a single-ended wiring section, and RF connector 3 and Balun L1 are electrically connected to the first common ground 111, and the single-ended wiring section is connected to the second common ground 121. The electrical isolation avoids interference of high-frequency signals on the single-ended routing portion in the second region 12, enhances anti-interference ability, and improves the quality of radio frequency signal transmission. At the same time, the input terminal of the balun L1 is directly connected to the output terminal of the radio frequency connector 3 via the core wire isolation capacitor C7, and the single-ended wiring section is short, reducing the possibility of interference.

In this embodiment, the balun L1 is used to implement the single-ended-to-differential function, the circuit structure is simple, and the balance characteristics of the balun L1 itself are used to facilitate impedance matching. In other embodiments, a single-ended signal may be converted by using a resistor, a capacitor, an inductor, or other components to build a circuit.

The impedance matching circuit 42 includes a first DC blocking capacitor C8, a resistor R1, and an inductor L3. One end of the first DC blocking capacitor C8 is connected to the third pin of the balun L1, and the other end of the first DC blocking capacitor C8 is connected to the first common ground 111. One end of the resistor R1 is connected to the first pin of the balun L1, and the other end of the resistor R1 is connected to the second pin of the balun L1. One end of the inductor L3 is connected to the second pin of the balun L1, and the other end of the inductor L3 is connected to the first common ground 111. The first DC blocking capacitor C8, the resistor R1, and the inductor L3 form impedance matching at the input terminal and the output terminal of the balun L1 to reduce transmission loss.

The DC blocking circuit 43 includes a second DC blocking capacitor C10 and a third DC blocking capacitor C11. One end of the second DC blocking capacitor C10 is connected to the first pin of the balun L1, and one end of the third DC blocking capacitor C11 is connected to the balun L1. Second pin. The other end of the second DC-blocking capacitor C10 and the other end of the third DC-blocking capacitor C11 serve as an output terminal of the signal conversion circuit 4, are electrically connected to the input terminal of the tuner 5, and transmit a radio frequency differential signal to the tuner 5. The second DC-blocking capacitor C10 and the third DC-blocking capacitor C11 have a withstand voltage of not less than 1000V, form a two-stage DC-blocking with the first DC-blocking capacitor C8, and have high voltage resistance and improve anti-static capabilities. This RF signal processing device does not require An additional anti-static circuit is provided to simplify the circuit structure.

Referring to FIG. 1, in this embodiment, the second DC-blocking capacitor C10 and the third DC-blocking capacitor C11 are located in an interval between two sets of ground isolation capacitors, and the other end of the second DC-blocking capacitor C10 and the third DC-blocking capacitor C11 The other end extends outside the first straight section 131 of the isolation channel 13 and is located in the second region 12 to facilitate connection with the tuner 5.

In the radio frequency signal processing device according to the embodiment of the present disclosure, a first common ground and a second common ground that are electrically isolated from each other are formed on a printed circuit board to implement a built-in isolation function. The RF signal is a single-ended trace from the RF connector to the single-ended-to-differential circuit, and the RF connector and the single-ended to-differential circuit are electrically connected to the first common ground through the first common ground and the second common ground The electrical isolation between the two ends makes the single-ended routing part electrically isolated from the second common ground. The ground isolation improves the anti-interference ability of the single-ended routing part. The tuner and subsequent processing are electrically connected to the second common ground. In the process, the RF signal uses differential traces, and uses the characteristics of the differential traces to achieve enhanced anti-interference capabilities. According to the technical solution of the embodiment of the present disclosure, the problem that the radio frequency signal is easily interfered by other high frequency signals is effectively solved, and the radio frequency signal transmission quality is improved.

When the radio frequency signal processing device is applied to a digital signal receiving device, a printed circuit board is used as a main board of the digital signal receiving device, a second common ground is used as a main board low voltage ground, and a tuner, a system chip, other functional devices, etc. are electrically connected to the second In the common ground, the high-frequency signal will not interfere with the single-ended wiring portion electrically connected to the first common ground.

Although the present disclosure has been described with reference to the aforementioned embodiments, it should be understood that the terms used are illustrative and exemplary, and not restrictive. Since the present disclosure can be embodied in various forms without departing from the spirit or essence of the disclosure, it should be understood that the above-mentioned embodiments are not limited to any of the foregoing details, but should be broadly interpreted within the spirit and scope defined by the appended claims. , Therefore, all changes and modifications falling within the scope of the claims or their equivalents shall be covered by the appended claims.

Claims

A radio frequency signal processing device includes:

Printed circuit boards; and

A radio frequency connector, a signal conversion circuit and a tuner respectively installed on the printed circuit board;

Wherein, a first common ground and a second common ground electrically isolated from each other are formed on the printed circuit board;

The radio frequency connector and the signal conversion circuit are electrically connected to the first common ground,

The tuner is electrically connected to the second common ground;

The signal conversion circuit includes a single-ended to differential circuit, an input of the single-ended to differential circuit is electrically connected to an output of the radio frequency connector, and the single-ended to differential circuit outputs a differential signal to the tuner;

The tuner receives and processes the differential signal.
The radio frequency signal processing device according to claim 1, wherein:

An isolation channel is formed on the surface of the printed circuit board to form a first region and a second region that are isolated from each other;

The first region is surrounded by the isolation channel;

The first common ground is formed in the first area;

The second common ground is formed in the second area;

Forming electrical isolation between the first common ground and the second common ground through at least one ground isolation capacitor;

Both the pin of the radio frequency connector and the single-ended to differential circuit are installed in the first area,

The tuner is installed in the second area.
The radio frequency signal processing device according to claim 2, wherein:

The ground isolation capacitor is provided across the isolation channel,

The two ends of the ground isolation capacitor are electrically connected to the first common ground and the second common ground, respectively.
The radio frequency signal processing device according to claim 2, wherein:

A core isolation capacitor is further provided between the input end of the single-ended to differential circuit and the output end of the radio frequency connector,

The core wire isolation capacitor is installed in the first area.
The radio frequency signal processing device according to claim 4, wherein:

The single-ended to differential circuit is a balun;

The first pin and the second pin of the balun are used as output ends of the single-ended to differential circuit,

The third pin of the balun is connected to the core wire isolation capacitor,

The fourth pin of the balun is connected to the first common ground.
The radio frequency signal processing device according to claim 2, wherein the signal conversion circuit further comprises:

DC blocking circuit; the DC blocking circuit is connected to the output terminal of the single-ended to differential circuit; the output terminal of the DC blocking circuit is electrically connected to the input terminal of the tuner as the output terminal of the signal conversion circuit, so An output terminal of the DC blocking circuit is located in the second region.
The radio frequency signal processing device according to claim 6, wherein the isolation channel includes a linear section portion, and the linear section portion is located between the radio frequency connector and the tuner;

The number of the ground isolation capacitors is multiple, and they are divided into two groups distributed in the straight section, and there is a space between the two groups of ground isolation capacitors; the DC blocking circuit is installed in the space.
The radio frequency signal processing device according to claim 6, wherein the signal conversion circuit further comprises:

An impedance matching circuit, which is electrically connected to an input terminal and an output terminal of the single-ended to differential circuit, respectively, and is electrically connected to the first common ground.
The radio frequency signal processing device according to claim 8, wherein the impedance matching circuit comprises:

DC blocking capacitor, resistance and inductance;

One end of the DC blocking capacitor is connected to the input end of the single-ended to differential circuit, and the other end is connected to the first common ground; the resistor is connected to the output end of the single-ended to differential circuit; and one end of the inductor is connected An output end of the single-ended-to-differential circuit is connected to the first common ground at the other end.
A digital television receiving device includes a radio frequency signal processing device. The radio frequency signal processing device includes:

Printed circuit boards; and

A radio frequency connector, a signal conversion circuit and a tuner respectively installed on the printed circuit board;

Wherein, a first common ground and a second common ground electrically isolated from each other are formed on the printed circuit board;

The radio frequency connector and the signal conversion circuit are electrically connected to the first common ground, and the tuner is electrically connected to the second common ground;

The signal conversion circuit includes a single-ended to differential circuit, an input of the single-ended to differential circuit is electrically connected to an output of the radio frequency connector, and the single-ended to differential circuit outputs a differential signal to the tuner;

The tuner receives and processes the differential signal.
The digital television receiving apparatus according to claim 10, wherein:

An isolation channel is formed on the surface of the printed circuit board to form a first region and a second region that are isolated from each other.

The first region is surrounded by the isolation channel;

The first common ground is formed in the first area;

The second common ground is formed in the second area;

Forming electrical isolation between the first common ground and the second common ground through at least one ground isolation capacitor;

Both the pin of the radio frequency connector and the single-ended to differential circuit are installed in the first area,

The tuner is installed in the second area.
The digital television receiving device according to claim 11, wherein:

The ground isolation capacitor is provided across the isolation channel,

The two ends of the ground isolation capacitor are electrically connected to the first common ground and the second common ground, respectively.
The digital television receiving device according to claim 11, wherein:

A core isolation capacitor is further provided between the input end of the single-ended to differential circuit and the output end of the radio frequency connector,

The core wire isolation capacitor is installed in the first area.
The digital television receiving device according to claim 13, wherein:

The single-ended to differential circuit is a balun;

The first pin and the second pin of the balun output the differential signal as output ends of the single-ended to differential circuit,

The third pin of the balun is connected to the core wire isolation capacitor,

The fourth pin of the balun is connected to the first common ground.
The digital television receiving device according to claim 11, wherein the signal conversion circuit further comprises a DC blocking circuit; the DC blocking circuit is connected to an output terminal of the single-ended to differential circuit; and an output terminal of the DC blocking circuit As an output terminal of the signal conversion circuit is electrically connected to an input terminal of the tuner, an output terminal of the DC blocking circuit is located in the second region.
The digital television receiving device according to claim 15, wherein the isolation channel includes a straight line segment portion, the straight line segment portion being located between the radio frequency connector and the tuner;

The number of the ground isolation capacitors is multiple, and they are divided into two groups distributed in the straight section, and there is a space between the two groups of ground isolation capacitors; the DC blocking circuit is installed in the space.
The digital television receiving device according to claim 15, wherein the signal conversion circuit further comprises:

An impedance matching circuit, which is electrically connected to an input terminal and an output terminal of the single-ended to differential circuit, respectively, and is electrically connected to the first common ground.
The digital television receiving device according to claim 17, wherein the impedance matching circuit comprises:

DC blocking capacitor, resistance and inductance;

One end of the DC blocking capacitor is connected to the input end of the single-ended to differential circuit, and the other end is connected to the first common ground; the resistor is connected to the output end of the single-ended to differential circuit; and one end of the inductor is connected An output end of the single-ended-to-differential circuit is connected to the first common ground at the other end.