WO2015019344A2

WO2015019344A2 - Virtual infinite capacitor

Info

Publication number: WO2015019344A2
Application number: PCT/IL2014/050681
Authority: WO
Inventors: Guy YONA; George Weiss; Moshe KALECHSTAIN
Original assignee: Yona Guy; George Weiss; Kalechstain Moshe
Priority date: 2013-08-07
Filing date: 2014-07-27
Publication date: 2015-02-12
Also published as: WO2015019344A3

Abstract

A circuit that behaves as a non-linear capacitor over a predetermined operating range, the circuit comprising: an input node arranged to receive an input current; an input capacitor coupled to the input node; an energy storage component arranged to store energy; a control circuitry, comprising a non-linear controller, arranged to receive information regarding the received input current; a power converter coupled between the input capacitor and the energy storage component, the power converter responsive to the control circuitry, the control circuitry arranged to operate the converter such that over the predetermined operating range the voltage on the input capacitor is substantially unchanged irrespective of the total charge received at the input node.

Description

VIRTUAL INFINITE CAPACITOR

TECHNICAL FIELD

[0001] The present application relates to the field of non-linear circuit elements, and more particularly to a circuit that behaves as a non-linear capacitor over a predetermined operating range and to a power factor correcting stage comprising the non-linear capacitor.

BACKGROUND OF THE INVENTION

[0002] A power converter receives an input direct current (DC) or alternating current (AC) power, and converts it to a DC or AC output power, typically exhibiting a different voltage than the input power. Control of the output power may be responsive to the output voltage or to the output current.

[0003] Most power converters require input and output filters with capacitors for the purpose of voltage smoothing, in particular for switching noise suppression. Unfortunately, in the event that the input or the output power has a low frequency ripple, such as that which accompanies an AC power line, such a filter capacitor requires a large capacitance, which both adds to cost and space requirements, and further reduces reliability. Ultracapacitors, which have large capacitance, suffer from low reliability and low operating voltages.

[0004] An article by Na, Gou and Kim, published 2010 by Hypersciences

Publisher in the Journal of Electrical Engineering, Theory and Applications (JEETA), entitled "Analysis and Control of a Bidirectional DC/DC Converter for an Ultra- Capacitor in a Fuel Cell Generation System" describes a bi-directional converter in communication with an ultra-capacitor bank. The controller for the bi-directional converter is a linear controller arranged such that any substantial voltage drop of the fuel cell can be prevented during short transient energy delivery and peak power demand periods. The use of a linear controller results in a very limited operating range (in terms of stored charge) for the device, where the DC bus voltage is maintained constant. Thus, longer or more powerful transients in the current will cause fluctuations of the fuel cell voltage. [0005] US Patent S/N 8,279,642 issued October 2, 2012 to Chapman et al. entitled "Apparatus for Converting Direct Current to Alternating Current Using an Active Filter to Reduce Double-Frequency Ripple Power of Bus Waveform", the entire contents of which is incorporated herein by reference, provides an active filter arranged to reduce such a ripple without requiring a large capacitor. The circuit of Chapman et al. is optimized to produce an AC output, however very little information is provided as to the arrangement of the control circuitry.

[0006] The need for high reliability and lightweight power converters is growing, as renewable energy sources, electric transportation and efficient DC lighting become more widespread. Thus, there exists a need for a reliable circuit that can replace a large converter capacitor.

SUMMARY

[0007] Accordingly, it is a principal object of the present embodiments to overcome at least some of the disadvantages of the prior art. This is provided in certain embodiments by an arrangement circuit that behaves as a non-linear capacitor over a predetermined operating range, the circuit comprising: an input node arranged to receive an input current; an input capacitor coupled to the input node; an energy storage component arranged to store energy; a control circuitry, comprising a nonlinear controller, arranged to receive information regarding the received input current; a power converter coupled between the input capacitor and the energy storage component, the power converter responsive to the control circuitry, the control circuitry arranged to operate the converter such that over the predetermined operating range the voltage on the input capacitor is substantially unchanged irrespective of the total charge received at the input node.

[0008] Additional features and advantages of the invention will become apparent from the following drawings and description.

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] For a better understanding of the invention and to show how the same may be carried into effect, reference will now be made, purely by way of example, to the accompanying drawings in which like numerals designate corresponding elements or sections throughout.

[00010] With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of the preferred embodiments of the present invention only, and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects of the invention. In this regard, no attempt is made to show structural details of the invention in more detail than is necessary for a fundamental understanding of the invention, the description taken with the drawings making apparent to those skilled in the art how the several forms of the invention may be embodied in practice. In the accompanying drawings:

[00011] FIG. 1 illustrates a high level block diagram of an exemplary circuit that behaves as a non-linear capacitor over a predetermined operating range;

[00012] FIG. 2 is an idealized plot of the operation of the non-linear capacitor of FIG. 1;

[00013] FIG. 3 illustrates a high level circuit diagram of an exemplary embodiment of a non-linear capacitor, further illustrating a load in cooperation therewith;

[00014] FIG. 4 illustrates an average model of a portion of the circuit of FIG. 3;

[00015] FIG. 5 illustrates a high level block diagram of an arrangement comprising a non-linear capacitor in cooperation with a charge control circuitry to control the input current I_IN to the non-linear capacitor;

[00016] FIG. 6 illustrates a high level schematic diagram of a non-linear capacitor in cooperation with a PFC front end circuit;

[00017] FIG. 7 illustrates the current flow through the inductor of the PFC front end circuit of FIG. 6; and

[00018] FIGs. 8A - 8D illustrate certain electrical waveforms of the circuit of

FIG. 6.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[00019] Before explaining at least one embodiment of the invention in detail, it is to be understood that the invention is not limited in its application to the details of construction and the arrangement of the components set forth in the following description or illustrated in the drawings. The invention is applicable to other embodiments or of being practiced or carried out in various ways. Also, it is to be understood that the phraseology and terminology employed herein is for the purpose of description and should not be regarded as limiting.

[00020] FIG. 1 illustrates a high level block diagram of an exemplary circuit that behaves as a non-linear capacitor over a predetermined operating range, denoted NLC 10. NLC 10 comprises: input node 20 receiving an input current I_IN; an input capacitor 30; a power converter 40; an energy storage component 50; and a control circuitry 60 comprising sensors and a non-linear controller. Power converter 40 is a bi-directional converter as will be explained further below.

[00021] Input node 20 is coupled to a first end of capacitor 30, to a first end of power converter 40 and to a first sensing input of control circuitry 60. A second end of power converter 40 is coupled to energy storage component 50. Optionally, energy storage component 50 is coupled to a second sensing input of control circuitry 60, the optional coupling indicated by a dashed line. Power converter 40 is responsive to a control output of control circuitry 60.

[00022] In operation, and as will be explained further below, control circuitry 60, responsive to the operation of non-linear controller 70, is arranged to alternately: transfer current from input node 20 to energy storage component 50; and transfer current from energy storage component 50 to input node 20.

[00023] FIG. 2 is an idealized plot of the operation of NLC 10 of FIG. 1, where the x-axis represents charge of NLC 10 in arbitrary units, and the y-axis represents the voltage across NLC 10 in arbitrary units. The voltage across NLC 10 is represented by the voltage V across capacitor 30, and the charge of NLC 10 is represented by the integral over time of I_IN appearing at node 20. For a typical capacitor of the prior art, the dependence of voltage V on charge Q is linear, in accordance with the equation: (t) = Ι_ΙΝ(τ)άτ . NLC 10 differs from such prior art behavior in that between QMIN and QMAX voltage V is substantially unchanged and is equal to a predetermined value denoted VREF. Mathematically the fact that Q is between QMIN and QMAX is denoted herein: Q G [QMIN, QMAX] . [00024] Thus, for charges in the interval [QMIN, QMAX] the voltage would remain at the predefined level VREF. NLC 10 thus is substantially equivalent to an infinite capacitor charged to the voltage VREF.

[00025] NLC 10 is considered to be non-linear in that voltage V is a non-linear function of the charge Q . The dynamic capacitance C at a given point Q can be defined by - =— . The energy absorbed by NLC 10 during an infinitesimal change

C dQ

of charge dQ = i dt is dE = V dQ . NLC 10, as a nonlinear capacitor, is thus energy-conserving, in the sense that when moving from a charge Q₁ to a charge Q₂ where Q₂ > Qi (charging) and then back to Q₁ (discharging), we get back the same energy that we have stored. Assuming that NLC 10 cannot produce any energy, the stored energy at any point must be positive for all Q > 0, i.e.,

f W > 0 EQ. 1

[00026] NLC 10 exhibits an additional output, as shown by the dotted path, through which Q can be measured, allowing to keep it in the desired range Q G [QMIN, QMAX] , since in this range Q cannot be estimated from V. In the region of interest Q G [QMIN, QMAX] , the dynamic capacitance is infinite, but the amount of stored energy is of course finite and in an exemplary embodiment not very large. Thus, NLC 10 is advantageous for filtering or voltage regulation. While the plot of FIG. 2 is substantially flat in the region between QMIN and QMAX, and has been drawn with a linear relationship outside of that range, this is not meant to be limiting in any way. Outside the flat region between QMIN and QMAX the plot may have any shape as long as the restriction of EQ. 1 is satisfied. An NLC 10 with a hysteretic Q-V plot may be designed without exceeding the scope, and may be particularly useful in case that a very fast power-up is needed.

[00027] A typical application of NLC 10 would be to create a constant voltage

VREF across a load, as will be described further below, when the energy from I_IN is variable. VREF may be fixed or variable without exceeding the scope.

[00028] FIG. 3 illustrates a high level circuit diagram of an exemplary embodiment of NLC 10, further illustrating a load 1 10 in cooperation therewith, and a first sense resistor R_IN. NLC 10 comprises: capacitor 30; control circuitry 60 comprising a non-linear controller illustrated without limitation as a sliding mode controller; a first and a second driver 120; a first and a second electronically controlled switch 130, each illustrated as an NMOSFET, without limitation; a first and a second diode 140; an inductor 150; a second sense resistor R_S and a storage capacitor 160.

[00029] For clarity, sense resistors are illustrated at points wherein current is to be sensed, it being understood that the use of sense resistors to sense current is simply one of a plurality of implementations to perform current sensing, and is not meant to be limiting in any way. Energy storage component 160 is illustrated as a capacitor without limitation, those skilled in the art recognizing that an inductor may be utilized without exceeding the scope.

[00030] Input node 20 is coupled to a respective sense input of control circuitry

60 and to a first end of first sense resistor R_IN. A second end of first sense resistor R_IN is coupled to a respective sense input of control circuitry 60, to a first end of load 110; to a first end of capacitor 30; to a drain of NMOSFET 130 and to the cathode of first diode 140. A second end of load 110 and capacitor 130 are coupled to a common potential. A first output of control circuitry 60 is coupled to the input of first driver 120 and the output of first driver 120 is coupled to the gate of first NMOSFET 130.

[00031] The source of first NMOSFET 130 is coupled to the drain of second

NMOSFET 130, to the anode of first diode 140, to the cathode of second diode 140 and to a first end of inductor 150. A second output of control circuitry 60 is coupled to the input of second driver 120 and the output of second driver 120 is coupled to the gate of second NMOSFET 130. A second end of inductor 150 is coupled to a respective sense input of control circuitry 60 and to a first end of second sense resistor R_S. A second end of second sense resistor R_S is coupled to a respective sense input of control circuitry 60 and to a first end of storage capacitor 160. A second end of storage capacitor 160 is commonly coupled to the anode of second diode 140 and the source of second NMOSFET 130. Control circuitry 60 further receives a predetermined reference value, VREF.

[00032] Drivers 120, NMOSFETs 130, diodes 140, capacitor 30 and inductor 150 form bidirectional DC/DC converter 40 as described above. Control circuitry 60 works with a sampling period T_s, and signals A, A G {0,1} that control the switches are preferably constant during each sampling period. In a typical application, when NLC 10 is used to filter the output voltage of a power factor compensator (PFC), current I_IN (and hence charge Q ) will oscillate at twice the grid frequency. Charge fluctuations in the range [QMIN, QMAX] are transferred to storage capacitor 160 via converter 40, as long as the frequency of the charge fluctuations is much lower than the controller sampling frequency 1/T_S. Thus, voltage V_S across storage capacitor 160 varies while keeping voltage V , i.e. the voltage across capacitor 130 almost constant (close to VREF) which is the desired filtering effect. Let us denote by [ s,min_> s,max] the interval in which voltage V_S will vary when Q G [QMIN, QMAX] . We preferably impose that

0 < V_{s n} < V_Simax < VREF.

V_{S m}[_n is preferably not chosen to be too small, because it would lead to the DC/DC converter working at a high voltage ratio and hence low efficiency. There is also another reason why V_{s m};_n is preferably not chosen to be too small, and similarly VREF— V_{S max} is not preferably chosen to be too small, which will be explained further below.

[00033] Referring back to FIG. 2, in the region to the left of QMIN, which we denote the first region, when the total charge of the system is small (e.g., during power-up), converter 40 preferably creates an almost constant ratio between its input and output voltages,

[00034] When V reaches the value VREF, V_S reaches the value V_{S min}. The charge needed for V to reach voltage VREF is QMIN. The control of converter 40 in the first region can be, for example, sliding mode control or pulse width modulation (PWM) with proportional control. The dynamic capacitance in this region is defined by +D² C_S , where C represents the capacitance of capacitor 30, D represents the duty cycle of the operation of converter 40 and Cs represents the capacitance of storage capacitor 160. The dynamic capacitance determined above is valid for frequencies significantly lower than the resonant frequency of inductor 150 and storage capacitor 160.

[00035] In the region between QMIN and QMAX, which we denote the second region, or alternately denote as the normal operating range, the dynamic capacitance is infinite. The circuit remains in this region until voltage V_S reaches the maximum allowable value V_{S max} . The control of NLC 10 in the horizontal region will be discussed further below. In the first two regions, the switches change their state frequently, such that A = 1— A , with the exception of small delays preferably introduced to reduce switching losses and prevent shoot through.

[00036] In the region to the right of QMAX, denoted herein as the third region, converter 40 is held in the off state. Thus, capacitor 30 stands independently and voltage V_S remains at the constant level V_{S max} . In the third region we have A = A = 0 and the dynamic capacitance is thus C . This situation occurs if we overcharge NLC 10.

[00037] In another embodiment, V_S may be allowed to exceed VREF, by reversing the operation of DC/DC converter 40. This alternative realization allows much better regulation of voltage V , but the higher voltage required on storage capacitor 160 may be a drawback for many applications.

[00038] As power regulation is a typical application of the VIC, it is useful to consider a sinusoidal input current I_IN = I₀ s (2a>gt), as would be the case in a PFC working in steady state on a grid with frequency ω , ignoring the ripple current.

Most of the energy stored in NLC 10 is stored in storage capacitor 160. Thus, the operating range Q G [QMIN, QMAX] corresponds to storage capacitor 160 holding energy in the range

We assume that voltage V = VREF is constant. During the first half of the period (when (j gt < n) NLC 10 is storing the excess energy of the sinusoidal ripple, and during the second half the same energy is returned. The amount of energy stored during the half period (the increase in the total stored energy) is

π

Γ 2ω_ρ , VI₀

AE = V \ ^g I₀ sm(2o)_gt)dt =— .

i

[00039] According to EQ. 2, we have the upper bound AE≤ - C₅l¾_max -

₂ ^^¾min · It follows that in order to maintain the energy of NLC 10 within the required range, i.e. in the region where Q G [QMIN, QMAX], the steady state current amplitude must satisfy:

[00040] We will now describe in more detail the operation of NLC 10 in the second region of FIG. 2, i.e. when Q G [QMIN, QMAX] . We may now regard storage capacitor 160 as a variable voltage source providing voltage Cs and NLC 10 as a boost converter that should produce a constant output voltage VREF. We start by showing that the aim of keeping exactly V = VREF cannot be strictly achieved, no matter what control strategy (and switching frequency) we use.

[00041] FIG. 4 illustrates a high level DC diagram of NLC 10, i.e. an average model of NLC 10. A controlled current source 210 forces a current equals DC_SV_S, and a controlled voltage source 220 forces a voltage equals DV. Assuming that voltage V is constant, we have:

fDC_sV_s = IJN,

V_S + Li_s = DV,

C_SV_S = LS,

where D is the short-time average of A (this is the duty-cycle if A is a PWM signal) so that 0 < D≤ 1. Hence,

. _ IJN . _ I_S . _ DV - V_S

^{Vs ~ ~}DC_s ^~ - ^{Vs ~ ~}C^ - ^{ls ~} I ^■

[00042] V_s is the time derivative of V_S, I_S is the current through the inductor

150, shown in FIG. 3. This current can be calculated for example by measuring the voltage across R_S. i_s is the time derivative of I_S, and L is the inductance of inductor 150. This is a second order nonlinear system with state variables V_S , I_S , which depends on the control signal D . From the equality of the two expressions for

V_s we get:

D = , which cannot be limited to [0,1] since l_S must alternate between positive and negative values, and hence it must cross zero. Thus, the precise regulation of V is not possible.

[00043] More generally, it is known that controlling the output voltage of a boost converter (making the voltage error infinitesimally small) is difficult due to the unstable zero dynamics. This difficulty is present even if we linearize the equations (we obtain a zero in the right half-plane). In the linear case, this problem has been addressed by various techniques, including H ⁰⁰ control. The approaches based on linearization are completely inadequate when the input voltage of the boost converter (V_S in our case) varies significantly, since the small signal assumption of the linearization is violated.

[00044] Sliding mode control of boost converters, which seems to be a very attractive approach, has been explored by several researchers. In an exemplary embodiment non-linear controller 70 implements a particular a sliding mode controller working in the region Q G [QMIN, QMAX] . The state equations of this system are:

[00045] These equations are considered only in the operating range Ω defined by

\LS\≤ i_s ,max > V_S £ [V_s ,min> S.max ], V > V_min , EQ. 4 where 0 < V_{s m};_n < V_{S max} < V_m[_n < VREF, and V is the time derivative of V. NLC 10 preferably employs a novel sliding function, i.e. a function of three state variables and the disturbance i. For an oscillating (but positive) voltage V_S and an oscillating input current i , in one embodiment the following sliding function is implemented:

S = VREF - V - k(VREF - i - V_S - I_S), EQ. 5 where only VREF is constant. The sliding surface Γ is the set of all possible states x G Ω for which 5(x) = 0. The sliding mode control is thus:

1 ,

A = if S < 0

0 if s≥ A = l - A.

0,

[00046] The above is described as a particular implementation of a general non-linear controller, and is not meant to be limiting in any way. Preferably, nonlinear controller 70 determines the state of the switches of power converter 40 responsive to: VREF, the voltage V across capacitor 30, current i flowing into node 20, illustrated as current I_IN, voltage V_S across energy storage component 40 and current I_S , the current into energy storage component 50. In an exemplary embodiment non-linear controller 70 is a sliding mode controller.

[00047] This control law is written in an ideal form that would lead to infinitely fast switching of A and A . In reality the switching frequency is limited, since the controller has a finite sampling frequency 1/T_S , but we ignore this fact in our analysis, because 1/T_S is assumed to be sufficiently high.

[00048] In order to ensure that the state trajectories will converge to the sliding surface Γ for any initial conditions in Ω, we must derive a sufficient condition for the sliding mode coefficient k . We require that S^■ S < 0 for every x G Ω/Γ . This condition is commonly referred to as the hitting condition.

[00049] We impose limitations on the input i:

I ' I — 'max ' I' I— 'max > EQ. 6 where i_max > 0, i_max > 0. Imposing a bounded i might pose a problem for many applications, but in fact the circuit will tolerate short times when | ( | exceeds i_max, for example due to sudden changes in the load connected in parallel to NLC 10. During these short times, the hitting condition may be violated, so that |5| may temporarily grow, but this will be corrected later by the controller. For reasons that will be explained further below we assume that

[00050] Suppose that S > 0 (hence A = 0). Then from EQ. 3 and EQ. 5

i (I S² V S² \

S^{= ~} C ^{+ k} V _s - ) - ^kvref i - EQ. 8

[00051] Using EQ. 8, the condition S < 0 becomes a condition on k, which in the worst case is

n

[00052] Now suppose that S < 0 (hence q = 1). Then from EQ. 3 and EQ. 5,

I S - i (I S² V S^■ V V S²

[00053] Similarly as in the previous case, the condition S > 0 becomes

[00054] From EQ. 7 we know that the coefficient of k in EQ. 11 is positive. To satisfy both EQ. 9 and EQ. 11, k must be larger than a certain minimal value k_m[_n > 0 (which can be expressed easily in terms of V_{S min}, V_min, i_s,max, i_max, i_max)- [00055] Positive values of k < k_m[_n can also be chosen for the sliding function if we assume that x stays close to Γ. This is useful because a smaller k enables better output voltage regulation, as long as the system remains stable. The condition can be expressed by requiring that lim _{→ o} sgn[S(x)^■ 5(x)] =— 1 for all x₀ G Γ . This is commonly called the existence condition. From EQ. 5 we have

V_re{— V + kV_S^■ I_S

5(x) = 0 ί = EQ. 12

kV, ref

[00056] For S > 0, combining EQ. 8 and EQ. 12 gives the condition

V S² I S² Λ V S - I S 1

k²V_ref -=_r - -_{d +} v_re,i k ₁÷ > -(v - v_rti) EQ. 13

[00057] In a similar way, for 5 < 0, combining EQ. 10 and EQ. 12 gives the condition

fi_s² v_s(y - v_s) Λ (y_ref - v_s )i_s

k²V, ref [ -;- + ; V_ref i ] + k -

EQ. 14 > ^ (V_rei - V) .

[00058] Choosing k that satisfy both the conditions EQ. 13 and EQ. 14 will fulfill the existence condition and will ensure that the state trajectory near the sliding surface will always be directed towards the sliding surface. Finding the range of k that will satisfy EQ. 13 and EQ. 14 for all possible x G Γ and for all i satisfying | ( | < imax i^{s a} numerical problem that is simply resolved by computation for any particular example. One usually obtains a condition of the type > k_m[_n , where 0 < k_m[_n < k_m[_n . In order to get reasonable results, we must impose an upper bound V_max on V, otherwise EQ. 13 would require an infinite k . When choosing k based on the existence condition, we choose _mj_n and V_max close to VREF, to get a better (i.e., lower) value for k_m[_n.

[00059] EQ. 12 imposes an upper bound for the ripple of V when x stays close to Γ and the existence condition is satisfied. Indeed, expressing V from EQ. 12 and then applying the first two constraints from EQ. 4 and the first constraint from EQ. 6 we obtain

W— ^ref I < k( s,max ^" ½,max + ^ref ^" ½ax)^■

[00060] Computing S as a function of q, the state variables, ί and i and setting

S = 0, we can derive the short- time average of q:

By setting 5 = 0 and substituting EQ. 12 into EQ. 15, we

[00061] We note that the preferred sliding mode control can also be achieved by an equivalent PWM control with the duty cycle D = A . However, in various cases this equivalent PWM control is not practical, because it requires the measurement of i and a complicated computation.

[00062] The above has described a particular implementation of non-linear controller 70 in according with EQ. 5, however this is not meant to be limiting in any way. Other implementations of non-linear controller 70 to determine the state of the switches of power converter 40 responsive to: VREF, current i flowing into node 20, voltage V_S across energy storage component 40 and current I_S may be implemented without exceeding the scope. In a non-limiting example of other implementations, S = VREF— V + k (V^■ i— V_S^■ I_S) or S = VREF— V—

(VREF'i \

— ^ I_Sj . Sliding functions with additional terms are also possible, those terms can use additional or different state variables, such as the time, the voltage between the switches 130, the current in either of the diodes 140, the (n-th order) time derivative or time integral of any of those variables, or of any rational function of said variables, without exceeding the scope.

[00063] FIG. 5 illustrates a high level block diagram of an arrangement 250 comprising NLC 10 in cooperation with a charge control circuitry 270. In particular arrangement 250 comprises: an input stage 260; NLC 10 comprising therein input capacitor 30, power converter 40, energy storage component 50 and control circuitry 60 with non-linear controller 70; a load 110; and charge control circuitry 270. Input stage 260 receives an electrical power P_IN, and converts same to an output current I_IN and voltage for presentation to load 110. NLC 10 is present in parallel with load 110 to maintain a fixed voltage there across over a range of operating conditions. Charge control circuitry 270 is arranged to receive a representation of I_IN and the voltage across energy storage component 50, V_S. [00064] In operation, charge control circuitry 270 is arranged to adjust the operation of input stage 260 responsive to the received representation of I_IN and V_S so as to ensure that NLC 10 is maintained within the operating region Q G [QMIN, QMAX] .

[00065] In one non-limiting embodiment, charge control circuitry 270 operates as a PI controller responsive to inputs V_S, the input voltage from P_IN, denoted u_r, and the current to the load, denoted i_R. In such an embodiment, a representation of the load current and input voltage is further provided to charge control circuit 270, and I_IN is not required. In particular, input V_S is squared, filtered by a low pass filter, and then summed with the average V_S, i.e. ½ (Vs_,max^A2 + Vs_,min^A2). The output of the summation is fed to a PI controller. The output of the PI controller is summed with a function of the current to the load, to set Ton so as to achieve both load regulation and PFC.

[00066] FIG. 6 illustrates a high level schematic diagram of NLC 10 in cooperation with a PFC front end, forming circuit 300, wherein a characteristic of NLC 10 is used to control the on time of the PFC front end. Such a feedback advantageously controls the input of NLC 10 so as to maintain Q within QMIN and QMAX over the range of input voltages.

[00067] Circuit 300 comprises: full wave bridge 310; input capacitor 320; PFC inductor 330; critical mode controller 340; PFC inductor sense resistor R_LB ; electronically controlled switch 350, illustrated without limitation as an NMOSFET; first diode 360 and second diode; node 20; load sense resistor R_R; input sense resistor R_IN; charge control circuit 380; load 110; and NLC 10. Three sense resistors are shown, it being understood that various embodiments described below do not require all three. As described above, sense resistors are illustrated as a particular method of sensing current flow values, however this is not meant to be limiting in any way, and current mirrors or Hall effect sensors may be utilized without exceeding the scope. Second diode 365 may be implemented within MOSFET 350 without exceeding the scope. The node input current I_D can, in one embodiment, be determined by the voltage drop across R_IN less the voltage drop across R_R. Alternatively, as described below, the total charge Q stored in NLC 10, which is a function of the input current I_D, is utilized, thus providing information regarding the input current. In certain embodiments, I_D is determined responsive to t_on, as described further below.

[00068] An input AC voltage is received and full wave rectified by full wave bridge 310. The full wave rectified voltage is filtered by input capacitor 320 to remove high frequency components. Critical mode controller 340 is arranged to open and close NMOSFET 350 so as to ensure the current I_LB flowing through inductor 330 is substantially aligned with the voltage appearing across input capacitor 320. When NMOSFET 350 is open, current flows towards load 110 and NLC 10 via first diode 360, with second diode 365 acting as a freewheeling diode.

[00069] NLC 10 operates as described above in relation to FIG. 3 to ensure that the voltage there across, and appearing across load 110 is substantially unchanged over the operating range. NLC 10 further supplies voltage V_S to a sense input of charge control circuit 380. Charge control circuit 380 is further arranged to receive at respective sensing inputs a representation of the current flowing towards load 110, depicted as I_R, and a representation of the charge Q stored in NLC 10. The output charge control circuit 380 is coupled as a control input to critical mode controller 340 and is arranged to control the fixed "on" time of critical mode controller 340 so as to ensure that NLC 10 is within its predetermined operating range over the entire AC cycle range of the received AC voltage.

[00070] It is to be noted that charge control circuitry 380 and critical mode controller 340 may cooperate to maintain NLC 10 within its operating range over a range of average AC input voltages received, and is not strictly limited to the operation over the AC cycle.

[00071] The below operation is described in detail in relation to a critical mode controller for the PFC converter, however this is not meant to be limiting in any way, and other controller modes may be utilized without exceeding the scope.

[00072] For a boost converter in a PFC there are two control objectives, namely: (1) attaining a nearly constant output voltage V = VREF; (2) keeping the average value of the input current nearly proportional to the input voltage, thus obtaining a close to unity power factor.

[00073] There are several methods to build a PFC boost converter in continuous or discontinuous conduction modes. The boost converter depicted here operates in the critical conduction mode (CRM), also called border-line mode. In CRM operation, each current pulse through inductor 330, depicted as I_LB, has the form shown in FIG. 7, wherein the x-axis represents time and the y-axis represents current value. During the period 0 < t < T_ON in each pulse, NMOSFET 350 is closed and inductor current I_LB rises. During T_ON < t < T NMOSFER 350 is opened by critical mode controller 340 and the energy in inductor 330 is released to load 110 and NLC 10, causing I_LB to fall to zero, since V, the voltage across load 110 is greater than the voltage across input capacitor 320, which is denoted as u_r. Mathematically, V > u_r = \u_g \ , where represents the average AC input voltage received at full wave bridge 310. When I_LB is detected as at 0, i.e. a value less than a predetermined minimum value, by critical mode controller 340, critical mode controller 340 again closes NMOSFET 350, starting the next triangular pulse. The switching frequency is 1/T, which is variable, and is preferably much greater than the grid frequency, i.e. much greater than the frequency of the received AC power signal. The average current in a triangle is

h B^~ = ^r ton - EQ. 20

[00074] Thus, to create an average current that is proportional to u_r, t_on is held constant during each semi-cycle of the received AC waveform, i.e. from one zero crossing of the grid to the next. Then, in accordance with EQ. 20 the boost converter is seen from the grid like a resistor with resistance — , which is a desirable behavior.

ton

[00075] First diode 360 conducts only when NMOSFET 350 is open, hence its current I_D corresponds to the descending part of I_LB in Figure 6 (for t_on≤ t < T), and I_D = 0 otherwise. The average current of the diode is

T^~D = i (T - T_0N) T_0N . EQ. 21

[00076] From elementary considerations we have -T_ON = ^- T_ON, from v

where T = T_ON . Substituting this into EQ. 20 we obtain the (short-time) average current of the diode:

ulT ON

EQ.

2L_hV [00077] The expressions of EQ. 20 and EQ. 22 enable us to obtain an average model of the boost converter using a resistor and a current source that both depend on T_ON

[00078] The current flowing into NLC 10 is i = I_D - i_out , i.e. I_IN is I_D minus current draw by the load, denoted as i_out, or alternately as I_R This current is fluctuating at twice the grid frequency, and is linearly dependent on t_on. NLC 10 is arranged to attempt to maintain the voltage V across load 110 substantially constant. Thus, keeping Q in the region Q G [Q_mj_n, Q_max] (which is equivalent to keeping V_S G [¾_;mj_n, s_,max] ) involves regulating T_ON using a particular embodiment of charge controller 270 of arrangement 250, herein described in relation to charge control circuitry 380. The value T_ON that the boost converter receives is updated when the grid voltage crosses zero, hence at twice the grid frequency, because T_ON should be constant in each semi-cycle to guarantee a nice sinusoidal shape for the current drawn from the AC grid, i_g. In addition, a feed-forward term from i_out is used to improve the transient response to changes in the load:

tonO) = W(s)^■ fl(s) + Ci_01it (s) .

where u is the output of the controller 60, a hat denotes the Laplace transformation of the respective signal, W(s) is a low-pass filter and K is the feed-forward gain:

where u_{g max} is the amplitude of the grid voltage. The feed forward gain is derived from the steady-state criterion for zero energy change during one grid semi-cycle.

Integrating EQ. 22 at a constant i_out over one grid semi-cycle 0, - we obtain

Expressing from herer_ON, we obtain the factor K.

[00079] Preferably, load changes do not occur frequently in relation to the frequency of the input AC power signal, since when a sudden change in the load occurs, the first priority is to maintain a constant V, even at the price of temporarily causing a distortion in i_g. In certain cases the feed-forward term may instantaneously affect T_ON, thus violating the PFC objective of sinusoidal L, this is particularly true in the event that NLC 10 does not have enough energy reserve in energy storage component 50.

[00080] The performance of NLC 10 has been examined by MATLAB simulations using the SimPowerSystems toolbox. The parameters of NLC 10, utilizing the sliding function of EQ 5 are k = 0.002, C = 4μ , C_s = 40μΡ and L = 60μΗ. From EQ. 9 and EQ. 11 we get k_m[_n « 0.008 (this value strongly depends on V_m[_n, which is chosen as V_m[_n = 395V ) and from EQ. 13 and EQ. 14 we get k_{m n} « 0.002 (using 398 < V < 402). The sampling frequency of control circuitry 60 is in one embodiment 2MHz. The boost converter circuit parameters are V_ref = 400V, L_b = 60μΗ and C_in = lOOnF , and the load is a resistor of 320Ω The grid voltage u_g has the amplitude u_{g max} = 340V and the frequency 50Hz . The results are shown in FIGs 8A - 8D, wherein the x-axis of the respective graphs represents time and the y-axis represents amplitude. I_LB of FIG. 8A represents the output current of the bridge rectifier. I_IN of FIG. 8B represents the input current of NLC_10, .V_ERROR of FIG. 8C represents the voltage error VREF-V filtered via a low-pass filter with a cut off frequency of lKHz, and V_S of FIG. 8D is as described above

[00081] The calculated total harmonic distortion (THD) of the input current i_g

(in the range up to lKHz) is less than 0.7%. The low frequency voltage ripple seen in FIG. 8C is 1.63V. The capacitance of a conventional capacitor, if used to achieve the same output voltage ripple instead of NLC 10, would have been C =—^— = ν_ννω

2 72

1.63-2 ^'■7T-100 « 2.65mF,' more than 65 times larg &er than C i ( vwe have denoted by ^j i„ p„p the peak-to-peak variation of i, as observed in FIG. 8B, and similarly V_pp is the peak-to- peak variation of V). This ratio of 65 could be increased significantly if the DC/DC converter were reversed, as mentioned above.

[00082] Embodiments herein enable an NLC, which is an electronic circuit that replaces a large filter capacitor. A realization of the NLC using a bidirectional DC/DC converter with sliding mode control was further enabled. An application of the NLC as a component in the boost converter of a PFC was enabled providing for a capacitor 65 times smaller than an equivalent filter capacitor required to achieve the same output voltage ripple. [00083] The use of much smaller capacitors instead of electrolytic capacitors contributes to higher reliability and smaller devices. Therefore, the NLC enabled herein may be utilized to replace the input or output capacitors in various power converters, where there is a significant low frequency current flowing through the capacitor. Typical applications are in PFCs and in single phase inverters.

[00084] It is appreciated that certain features of the invention, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub -combination.

[00085] Unless otherwise defined, all technical and scientific terms used herein have the same meanings as are commonly understood by one of ordinary skill in the art to which this invention belongs. Although methods similar or equivalent to those described herein can be used in the practice or testing of the present invention, suitable methods are described herein.

[00086] All publications, patent applications, patents, and other references mentioned herein are incorporated by reference in their entirety. In case of conflict, the patent specification, including definitions, will prevail. In addition, the materials, methods, and examples are illustrative only and not intended to be limiting.

[00087] It will be appreciated by persons skilled in the art that the present invention is not limited to what has been particularly shown and described hereinabove. Rather the scope of the present invention is defined by the appended claims and includes both combinations and sub-combinations of the various features described hereinabove as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not in the prior art.

Claims

C L A I M S

1. A circuit that behaves as a non-linear capacitor over a predetermined operating range, said circuit comprising: an input node arranged to receive an input current; an input capacitor coupled to said input node; an energy storage component arranged to store energy; a control circuitry, comprising a non-linear controller, arranged to receive information regarding the received input current; and a power converter coupled between said input capacitor and said energy storage component, said power converter responsive to said control circuitry, said control circuitry arranged to operate said converter such that over the predetermined operating range the voltage on said input capacitor is substantially unchanged irrespective of the total charge received at said input node.

2. The circuit of claim 1, wherein said non-linear controller is arranged to control the operation of switches of said power converter responsive to: a reference voltage; the voltage across said energy storage component; a representation of the received input current; and a representation of current flowing into said energy storage component.

3. The circuit of claim 2, wherein said non-linear controller is a sliding mode controller.

4. The circuit of any of claims 1 - 3, wherein said operation of said control circuitry is arranged to alternately: divert at least a portion of the input current from the input node to said energy storage component such that said diverted input current portion does not increase the voltage across said input capacitor; and transfer current from said energy storage component to said input capacitor.

5. The circuit of any of claims 1 - 3, wherein the predetermined operating range is a predetermined range of charge received at said input node.

6. The circuit of any of claims 1 - 3, further comprising a charge control circuitry coupled to said input node and arranged to control the received input current such that the total charge received at said input node is maintained within said predetermined operating range.

7. A power factor correcting (PFC) stage comprising: an input node arranged to receive power having a waveform with a periodic cycle; an output node arranged to be coupled to a load; a power factor correcting circuit comprising an inductor, a switch, a unidirectional electronic valve and a power factor correcting controller, said power factor correcting controller arranged to control the switch so as to draw current from said input node so as to substantially follow the voltage of the cyclical power source, said power factor correcting circuit coupled to said input node; a capacitor, a first end of said capacitor coupled to one end of said unidirectional electronic valve, the output node further coupled to the first end of said capacitor; an energy storage component arranged to store energy; a control circuitry, comprising a non-linear controller, arranged to receive information regarding the received current through said unidirectional electronic valve, said power factor correcting controller responsive to said control circuitry; a power converter coupled between said unidirectional electronic valve and said energy storage component, said power converter responsive to said control circuitry, said control circuitry arranged to operate said power converter and said power factor correcting circuitry such that over a cycle of said periodic waveform the voltage on said capacitor is substantially unchanged.

8. The PFC stage of claim 7, wherein said operation of said control circuitry is arranged to alternately: divert at least a portion of the input current from the capacitor to said energy storage component such that said diverted input current portion does not increase the voltage across said input capacitor; and transfer current from said energy storage component to said input capacitor.

9. The PFC stage of either claim 7 or claim 8, wherein said non-linear controller is further responsive to at least one of: the voltage across said energy storage component; the charge accumulated in said energy storage component; and the current flowing into said energy storage component.

10. The PFC stage of either claim 7 or claim 8, wherein said non-linear controller is a sliding mode controller.

11. The PFC stage of either claim 7 or claim 8, wherein said factor correcting controller is arranged to adjust the on time of said switch of said power factor correcting circuit responsive to said control circuitry.

12. The PFC stage of either claim 7 or claim 8, wherein said factor correcting controller is arranged to adjust the on time of said switch of said power factor correcting circuit responsive to said control circuitry so as to ensure that over the cycle of said periodic waveform the voltage on said capacitor is substantially unchanged.