WO2014025734A2

WO2014025734A2 - Modular inverter drive

Info

Publication number: WO2014025734A2
Application number: PCT/US2013/053723
Authority: WO
Inventors: Orges Gjini; Robert Klein
Original assignee: Danfoss Power Electronics A/S
Priority date: 2012-08-09
Filing date: 2013-08-06
Publication date: 2014-02-13
Also published as: WO2014025734A3

Abstract

A modular inverter drive is described having a control interface card for driving a plurality of inverters. The control interface card provides an interface between a control card and each of a plurality of inverters. A dedicated digital connection (e.g. using an optical fibre) is provided between the interface card and each inverter. Digital data sent between the interface card and the inverters may be encoded to enable error detection and/or correction. Inverter data (such as current data) may be summed at the control interface card before being sent to the control card.

Description

MODULAR INVERTER DRIVE

FIELD OF THE INVENTION

[0001] The present invention relates to inverters, for example inverter drives for controlling a motor.

BACKGROUND OF THE INVENTION

[0002] Figure 1 shows a simple motor system, indicated generally by the reference numeral 1. The motor system 1 comprises a three-phase motor 2, an AC power source 4, a rectifier 6, an inverter 8 and a control module 10.

[0003] The output of the AC power source 4 is connected to the input of the rectifier 6. The output of the rectifier 6 provides DC power to the inverter 8. In a manner well known in the art, the inverter module includes a switching module, typically comprising insulated gate bipolar transistors (IGBTs) that are driven by gate control signals in order to convert the DC voltage into an AC voltage having a frequency and phase dependent on the gate control signals. The gate control signals are provided by the control module 10. In this way, the frequency and phase of each input to the motor 2 can be readily controlled.

[0004] The inverter 8 is in two-way communication with the control module 10. The inverter typically monitors currents and voltages in each of the three connections to the motor 2 and provides that current and voltage data to the control module 10. The control module 10 makes use of the current and voltage data when generating the gate control signals required to operate the motor as desired.

[0005] The motor system 1 includes a single inverter that is used to drive a single motor. It is also known to provide inverter modules in parallel in order to provide higher power to a motor, or to provide additional flexibility.

[0006] Figure 2 shows a known modular drive system, indicated generally by the reference numeral 20. [0007] The modular drive system 20 comprises the motor 2, the AC power source 4 and the rectifier 6 of the system 1 and additionally comprises a first inverter module 22, a second inverter module 24, an interface module 26 and a controller 28. The output of the rectifier provides a DC voltage to the first and second inverter modules 22, 24. As in the inverter module 8 described above, the inverter modules 22, 24 include switching modules, typically comprising insulated gate bipolar transistors (IGBTs) that are driven by gate control signals in order to convert the DC voltage obtained from the rectifier 6 into an AC voltage having a frequency and phase dependent on the gate control signals.

[0008] The motor 2 is a three-phase motor. The inverter modules 22 and 24 provide three phase outputs and, as shown in Figure 2, the respective phases of the inverter modules 22 and 24 are connected together so that the inverter module outputs are connected in parallel. By changing the number of inverter modules used to drive the motor 2, the power that can be delivered can be changed. Thus, the system 20 provides a flexible modular system.

[0009] The controller 28 provides the gate control signals for the inverter modules 22 and 24. Note that since the inverter modules are operated in parallel, the same gate control signals can be provided to each inverter module. The controller 28 is connected with the interface module 26 by a controller cable 34, such as a multi-conductor ribbon cable that transmits the gate control signals in analogue form. The interface module 26 is connected to the first inverter module 22 by a first inverter cable 30. Similarly, the interface module 26 is connected to the second inverter module 24 by a second inverter cable 32. The first and second inverter cables may be multi-conductor ribbon cables used for transmitting analogue signals.

[0010] In a similar manner to the simple motor system 1 described above, the controller 28 controls the gate signals sent to the inverter modules 22 and 24 on the basis of control signals received from the inverter modules. The control signals typically consist of current measurements in each phase of the motor drive signal. Knowledge of the motor drive currents can be used to adjust the motor performance as required. [0011] The current in each output phase (or possibly in two of the three outputs phases, since the third output is the sum of the other two) of the first inverter module 22 is transmitted from the first inverter module to the interface module 26 using the first inverter cable 30. Similarly, the current outputs of the second inverter modules 24 are transmitted to the interface module 26 using the second inverter cable 32.

[0012] The interface module 26 uses an analogue adder circuit to add the current values received from the inverter modules 22 and 24 to provide a single current measurement for each phase of the motor being controlled. Thus, the controller 28 can operate as if a single inverter module is being controlled. This makes sense since each of the inverter modules is being operated in the same manner.

[0013] Although the modular system 20 is more flexible that the motor drive system 1, it has significant limitations. The system 20 is scalable, but the interface module 26 needs to be redesigned if additional inverter modules are to be included. The use of an analogue adder is fast and effective, but limits the number of channels that can easily be summed (thereby limiting the number of inverter modules that can be included in the system). For example, in many implementations, each additional inverter module adds noise to the overall control signal passed back to the controller 28. This is because the signal level available for control signals is fixed, so each additional channel reduces the signal-to-noise ratio of the overall control signal. Also, the additional inverter(s) increase the physical length of the analogue cables allowing more noise coupling on the lines.

[0014] A further fundamental limitation with the system 20 is that all inverter modules are operated in the same manner (including receiving the same gate signals). Thus, it is not possible to operate inverter modules in different ways or even to stop using one or more of the inverter modules (in the event that only low power levels are required or in the event that an inverter module is failing).

[0015] The present invention seeks to address at least some of the problems described above. SUMMARY OF THE INVENTION

[0016] The invention provides an apparatus (such as an interface card) for driving a plurality of inverters (for example of a motor drive system), the apparatus comprising a first input, a first output, a plurality of second inputs, a plurality of second outputs and a control module, wherein: the first input is configured to receive inverter driving instructions from a controller (such as a control card); the plurality of second inputs (which, in use, are each coupled to a control output of one of the plurality of inverters) are configured to receive digital operation data from the respective inverters; the control module is configured to combine the digital operation data received from each inverter; the first output is configured to provide the combined digital operation data to the controller; the control module is further configured to generate digital driving instructions for each of the plurality of inverters based on the inverter driving instructions received from the controller; and the plurality of second outputs (which, in use, are each coupled to a control input of one of the plurality of inverters) are configured to provide the digital driving instructions to the respective inverters. In the use of the invention, each inverter module typically receives a series of messages from the control module and is required to convert the digital message into gate driving instructions for each switch of the inverter module.

[0017] The invention also provides a method for driving a plurality of inverters (for example of a motor drive system), the method comprising: receiving inverter driving instructions from a controller; generating digital driving instructions for each of the plurality of inverters, the driving instructions being based on the inverter driving instructions received from the controller and providing the digital driving instructions to the said inverters (for example over a dedicated digital channel for each inverter, such as optical fibre channels); receiving digital operation data (for example over a dedicated digital channel, such as optical fibre channels, for each inverter) from each of the plurality of inverters (the operation data may include current and/or voltage measurements from the respective inverters); and generating combined digital inverter data for provision to the controller by combining (typically by summing) the digital operation data received from said inverters and providing said combined digital inverter data to the controller. [0018] The term "inverter" should be understood in its broadest sense. An inverter that is operating backwards acts as a generator/rectifier. This is included within the scope of the invention.

[0019] The plurality of inverters may be connected in parallel, but this is not essential. Indeed, some, but not all, of the inverters may be connected in parallel. Thus, the invention is extremely flexible.

[0020] The control module typically generates the driving instructions for each of the plurality of inverters on the basis of the inverter driving instructions received from the controller. Each inverter can be driven separately. The control card provides global instructions with the control module converting these into individual instructions for the inverters. The inverter driving instructions sent from the controller to the control module may be encoded and the control module may be configured to decode said inverter driving instructions.

[0021] The control module typically generates the combined digital operation data for provision to the controller by summing the digital operation data received from the plurality of inverters. The combined digital operation data may be provided as a message, which may be encoded. The summing of multiple analogue data streams in prior art solutions limited the number of inverters that could be provided in prior art systems. In principle, digital operation data from any number of inverters can be summed or otherwise combined with no loss of signal quality.

[0022] As the control module receives digital operation data from each of the inverters, the control module has full visibility of all inverter measurements in the system. If each inverter is monitored separately, then the control module can determine a problem (such as excessive noise, or poor performance) with a particular inverter. This contrasts with the prior analogue approach in which only be the sum of the analogue operation data is available. The present invention therefore allows more precise location of system performance issues. [0023] In one form of the invention, the digital driving instructions that are sent to the respective inverters are encoded (typically by the control module). The digital driving instructions may be encoded to enable error detection and/or error correction. Thus, an inverter may be able to detect and possible correct errors in gate control data received from the control module. This is not possible when analogue gate control signals are sent directly from the control module to the inverters. The digital driving instructions may be encoded in other ways (such as for data compression) in addition to, or instead of, encoding for error detection and/or correction purposes.

[0024] In one form of the invention, the digital operation data received from the respective inverters is encoded, for example to enable error detection and/or error correction. Thus, the control module may be able to correct for errors in the operation data received from the inverters. This is not possible when the operation data is provided in analogue form.

[0025] The control module may receive encoded digital operation data from said inverters and may decode that encoded data. The digital operation data may be encoded to enable error correction and/or detection and, if so, the control module may be configured to determine whether any of said encoded operation data includes errors. Data including errors may be corrected.

[0026] The inverter driving instructions may also be received in encoded form. The invention may include decoding the inverter driving instructions before those instructions are prepared for sending to the various inverters.

[0027] In some forms of the invention, a dedicated digital connection to and from each of the plurality of inverters is provided. The dedicated digital channels may be serial channels, so that messages are sent serially over the digital channels. The high speed operation required by many inverters necessitates high data rates. The use of dedicated digital connections to and from the inverters enables demanding data rates to be achieved using relatively simple communication protocols. The physically simple structure of providing separate communication connections for each inverter makes it relatively easy to add, remove or change an inverter module, thereby improving the modularity of the system. Note that not all data need be sent to/from inverters using dedicated digital connections. For example, some less time-sensitive data may be sent around the inverter modules in a daisy-chain arrangement. In this way, the dedicated connections can be reserved for time-sensitive data.

[0028] Each dedicated digital connection may comprises a first channel for sending data to the respective inverter and a second (separate) channel for receiving data from the respective inverter. The first and second channels may be serial channels.

[0029] In one form of the invention, the dedicated digital connections are provided by optical fibres. A single optical fibre may be provided for each connection. In one form of the invention, two optical fibres are provided for each digital connection: a first optical fibre providing the first channel (for sending data to the respective inverter) and a second optical fibre providing the second channel (for receiving data from the respective inverter).

[0030] In some implementations of the invention, the digital driving instructions sent to each of the plurality of inverters are the same and synchronised. Thus, each of a number of inverters can be driven using the same gate control signals.

[0031] In some implementations of the invention, the digital driving instructions sent to at least some of the plurality of inverters are set independently of one another. This allows the control signal to differ between inverters. Some digital driving instructions may be the same and synchronized, with some others being different.

[0032] In an embodiment of the invention, the digital driving instructions for each of the plurality of inverters are generated from the inverter driving instructions received from the controller using a common messaging scheme for all inverters. The common message scheme may be designed to aid waveform timing preservation across the different inverters.

[0033] In some forms of the invention, in the event that no changes occur in the digital driving instructions received from the controller, then digital driving instructions are sent to the plurality of inverters with a predetermined period. For example, the predetermined period may be the transmission latency that is discussed in detail below.

[0034] In some forms of the invention, in the event that a change in the digital driving instructions received from the controller is detected, a new message transmission sequence for sending digital driving instructions to the plurality of inverters is started. However, when the new message transmission sequence is in progress, in many forms of the invention, no further message transmission sequence is started in the event that a further change in the digital driving instructions received from the controller is detected.

[0035] The digital driving instructions sent to a particular one of said inverters may be dependent on the performance of said inverter. In this way, it is possible to compensate for poor performance of a particular inverter.

[0036] In some forms of the invention, the inverters drive a single load. However, in some forms of the invention, at least one of said inverters is used to drive a different load to at least one other inverter. Where different loads are being driven, the signals being sent to and received from the inverters driving those loads will be handled accordingly. For example, the summing of digital operation data might occur only for inverters that are driving the same loads.

[0037] The digital operation data received from the respective inverters may include current and/or voltage measurements for the respective inverter. Other data might be received from the inverter(s) (in addition to, or instead of, current and/or voltage measurements). For example, temperature data might be obtained. Status information, such as fault/error reports might also be sent.

[0038] The digital operation data may be analysed to determine whether any of said inverters is operating in an unexpected manner. In some forms of the invention, an inverter operating in an unexpected manner is removed from operation. (If an inverter is removed from operation, the performance of other inverters may be adjusted to compensate.) Alternatively, the control module may seek to compensate for the operation of an inverter that is operating in an unexpected manner. This could be by changing the driving instructions from a particular inverter. As this compensation is carried out by the interface module, the controller that provides the driving instructions does not need to know that the compensation is being carried out, thereby ensuring that the algorithm of the controller is kept relatively simple.

[0039] In many forms of the invention, the digital driving instructions include timing information, the invention may further comprise selecting the quantity of timing information to be included in the digital driving instructions in order to control edge distortion effects. In many forms of the invention, the digital driving instructions are sent to each of the plurality of inverters using a serial connection, the invention may further comprise defining a bandwidth of the serial connection in order to control edge distortion effects. Thus, edge distortion effects can be reduced or even eliminated by increasing the timing information included in the digital driving instructions (at the expense of increased latency) and/or by increasing the serial connection bandwidth (at the expense of increased component cost). This balance is typically part of the design process of the system.

[0040] The present invention also provides a system (such as a motor drive system) comprising an apparatus as set out above and further comprising a plurality of inverters, wherein each inverter comprises a control input coupled to one of the plurality of second outputs of the apparatus, a control output coupled to one of the plurality of second inputs of the apparatus, a control module, a switching module and a plurality of power outputs.

[0041] Some or all of the plurality of inverters may be connected in parallel. This is achieved by connecting together corresponding power outputs of each of the inverters to be connected in parallel.

[0042] The present invention further provides a system comprising: a controller for providing inverter driving instructions in digital form; an inverter for receiving the inverter driving instructions from the controller, wherein the inverter provides digital operation data to the controller; and a load that is driven by the inverter in accordance with the inverter driving instructions. The inverter driving instructions and/or the digital operation data may be encoded (for example to enable error detection and/or correction). The system may include a control module configured to: receive the inverter driving instructions from the controller; provide the inverter driving instructions to the inverter; receive the digital operation data from the inverter; and provide the digital operation data to the controller.

[0043] In some forms of the invention, the system includes a plurality of inverters. The system may include a control module that is configured to: provide the inverter driving instructions to each of the inverters; receive digital operation data from each of the inverters; combine the digital operation data received from each of the inverters; and provide the combined digital operation data to the controller. Alternatively, the functionality of the control module may be provided by the controller such that the controller is configured to receive digital operation data from each of the inverters and combine the digital operation data received from each of the inverters.

[0044] It will be clear to the person skilled in the art that the present invention is extremely flexible. The number of inverter modules provided in any particular solution can readily be changed and need not necessarily be known to the controller as the information sent to and from the controller is not dependent on the number of inverters provided. The hardware provided in any particular embodiment of the invention can be configured in many different ways, for example by changing the software used to direct the control module. The inverter modules can readily be re-configured by changing connections.

[0045] A number of features that may be included in some embodiments of the invention are described above. Unless it is clearly not possible in the circumstances, any of the features described above can be combined with any other feature.

BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The invention will now be described in further detail with reference to the following schematic drawings, in which:

[0047] Figure 1 shows a known inverter drive system;

[0048] Figure 2 shows a known modular inverter drive system; [0049] Figure 3 shows a modular inverter drive system in accordance with an embodiment of the present invention;

[0050] Figure 4 is a flow chart showing an algorithm in accordance with an aspect of the present invention;

[0051] Figure 5 is a flow chart showing an algorithm in accordance with an aspect of the present invention;

[0052] Figure 6 shows a modular inverter drive system in accordance with an embodiment of the present invention;

[0053] Figure 7 shows a modular inverter drive system in accordance with an embodiment of the present invention;

[0054] Figure 8 shows a modular inverter drive system in accordance with an embodiment of the present invention;

[0055] Figure 9 shows a block diagram demonstrating an aspect of the present invention;

[0056] Figure 10 shows a number of sets of waveforms for sending inverter driving signals from a central control module to a number of inverters in accordance with an embodiment of the present invention; and

[0057] Figure 11 shows a messaging scheme in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0058] Figure 3 shows a modular inverter drive system, indicated generally by the reference numeral 100, in accordance with an aspect of the present invention.

[0059] The system 100 comprises a motor 112, an AC power source 4, a rectifier 6, a first inverter module 106, a second inverter module 108, a third inverter module 110, an interface module 104 and a controller 102. The interface module 104 includes a control module 126. The first inverter module 106 includes a control module 128. Similarly, the second inverter module includes a control module 130 and the third inverter module includes a control module 132.

[0060] A number of dedicated digital connections are provided between different elements of the system 100. In one form of the invention, each of dedicated digital connections comprises an optical fibre, although alternative digital connections could be provided.

[0061] A first dedicated digital connection 118 is provided from the controller 102 to the interface module 104. A second dedicated digital connection 119 is provided from the interface module 104 to the controller 102. A third dedicated digital connection 120 is provided from the interface module 104 to the first inverter 106. A fourth dedicated digital connection 121 is provided from the first inverter to the interface module. A fifth dedicated digital connection 122 is provided from the interface module to the second inverter 108. A sixth dedicated digital connection 123 is provided from the second inverter to the interface module. A seventh dedicated digital connection 124 is provided from the interface module to the third inverter 110. An eighth dedicated digital connection 125 is provided from the third inverter to the interface module. In many forms of the invention, the various digital connections 120 to 125 are serial connections. The digital connections 118 and 119 may also be serial connections.

[0062] As in the systems 1 and 20 described above, the output of the AC power source 4 is connected to input of the rectifier 6. The output of the rectifier provides DC power to the first, second and third inverter modules 106, 108 and 110. The inverter modules include switching modules, typically comprising insulated gate bipolar transistors (IGBTs) that are driven by gate control signals in order to convert the DC voltage obtained from the rectifier 6 into an AC voltage having a frequency and phase dependent on the gate control signals.

[0063] The motor 112 is a three-phase motor. The inverter modules 106, 108 and 110 each have three phase outputs and, as shown in Figure 3, the respective phases of the inverter modules are connected together so that the inverter modules are connected in parallel.

[0064] Figure 4 is a flow chart showing an algorithm, indicated generally by the reference numeral 150, implemented by the control module 126 in accordance with an exemplary embodiment of the present invention. [0065] The algorithm 150 starts at step 152 where the controller 102 provides the gate control signals for the inverter modules 106, 108 and 110. The gate signals are sent as a digital message over the first dedicated digital connection 118. The message may be encoded in order to provide a mechanism for error detection and/or correction.

[0066] The gate instructions are received at a control module 126 of the interface module 104. The control module 126 decodes the encoded message at step 154 of the algorithm 150 (if those messages are encoded). The decoding step may include error detection and may also include error correction.

[0067] At step 156 of the algorithm 150, the control module 126 checks performance data regarding the inverter modules, which performance data may be stored within the control module 126. The performance data may indicate that instructions from the controller 102 need to be modified in some way before being transmitted to a particular inverter module. By way of example, the instructions sent from the controller 102 could be modified if there is an abnormal condition seen only on a single inverter and not the others (e.g. in the event of a poorly operating inverter).

[0068] The algorithm 150 then moves to step 158 where the control module 126 generates instructions for sending to each inverter. These are gate control instructions in accordance with the instructions received from the controller 102, possibly as modified at step 156.

[0069] Next, at step 160, the individual instructions for each inverter are converted into digital messages for sending to the respective inverters. The messaged may be encoded, for example to provide for error detection or correction algorithms. Other forms of message encoding may be used; for example, data compression techniques could be used. The skilled person will be aware of many possible data encoding methodologies that could usefully be used here.

[0070] Finally, at step 162, the messages for each inverter are transmitted over the respective dedicated digital connection. Thus, messages to be sent to the first, second and third inverters are sent using dedicated digital connections 120, 122 and 124 respectively. [0071] The messages sent in the step 162 are typically encoded PWM signals for instructing the switches of the inverter modules 106, 108 and 110. The messages are generated centrally (by the controller 102, or possibly by the control module 126) and are transmitted to the inverters using the dedicated digital connections 120, 122 and 124. As indicated above, those digital connections are often serial connections. This results in a latency between the sending of the messages by the central controller in step 162 and the receipt of those messages at the inverters 106, 108 and 110. Although latency is not typically a significant problem in itself, waveform timing preservation is important. For example, if each of multiple inverters is driving the same motor, small differences in the timing of motor driving signals are undesirable.

[0072] Figure 10 shows a number of sets of waveforms that demonstrate potential effects that can be introduced by sending inverter driving signals from the control module 126 to a number of inverters.

[0073] The first set of waveforms, indicated generally by the reference numeral 302 shows the latency between an encoded PWM message sent by a control module (such as the controller 102 or the control module 126) and that message being received at an inverter driver. In an exemplary implementation of the present invention, that latency is of the order of tens to thousands of nanoseconds. This latency is sufficiently small compared to the typical control loop performance needs and the latency seen across paralleled inverters is almost identical and therefore this effect is not a significant concern.

[0074] The second set of waveforms, indicated generally by the reference numeral 304 shows the latencies between an encoded PWM message sent by a control module and the messages received at two different inverter drivers. A small skew exists between the messages received at the inverters. This skew is caused by the different reference clocks being used in the receipt of the encoded messages at the different inverters. Since the reference clock signals are not aligned, the precise time at which the encoded PWM signals are received can be different as a function of the shortest reference clock period available at the inverters (along with minor component latency differences between the signals chains to each inverter). In an exemplary implementation of the present invention, the maximum skew can be of the order of 1 to 10 nanoseconds. This level of skew is sufficiently small that it does not lead to significant waveform timing disturbances in typical applications of the present invention.

[0075] The third set of waveforms, indicated generally by the reference numeral 306 shows the effect of PWM edge distortions. These distortions have the net result of altering the time durations between the PWM signal transitions (i.e. IGBT Gate ON/OFF or HI/LOW IGBT ON) seen at the outputs on an inverter driver when compared with the original PWM waveform signalling commanded by the control module.

[0076] The control messages are sent from the control module (originating in 102 or 104) to the inverters 106, 108 and 110 through a digital communications subsystem contained within 126. As with the waveforms 304, the waveforms 306 show an encoded PWM control message generated by a control module (see numeral 104) and that message being received at an inverter driver. The message may be received with a simple latency, as in the first waveform where no PWM edge distortions are introduced. This scenario is indicated by the waveform indicated in 308. However, if the resulting inverter timing is affected such that any of the individual waveform edges move in relation to each other, causing their PWM time durations to alter, then edge distortion is introduced (indicated by numeral 309).

[0077] This effect can be introduced when 1) the PWM signal generation within the control module (see numeral 102 or 104) is provided asynchronously with respect to the digital serial communication sub-system (see numeral 126), and/or 2) the control module generated PWM signalling contains a number of transitions within a window of time such that it exceeds the timing representation limits defined by the control message format combined with the available serial connection bandwidth. The former has negligible effect and is limited by the reference clock frequency of the digital serial communication sub-system (typically of the order of a few nanoseconds). However, the latter can introduce more significant effects and depends on the defined timing content of the command messages and the available bandwidth of the serial connection; these edge distortion effects might range from tens of nanoseconds to 1 microsecond. [0078] It should be noted that it is possible to limit the above mentioned PWM edge distortions to only the reference clock period. One possible method is to include sufficient information in the control message format to preserve the individual timings of all the PWM signal transitions of interest. For example, an indication of edge positions within a particular PWM packet could be given. This method would result in an increase of control message latency (see numeral 302) due to higher control message data content, but may be acceptable due to the typical control loop performance requirements. An alternative method to limit the edge distortion effect, without increasing control message latency, is for the control module to generate the PWM in such a way that the minimum time durations between all PWM transitions will not exceed the limits of the control message format and serial bandwidth. This could be accomplished by including commonly used minimum pulse filters as part of the PWM generation.

[0079] If minimizing the control message latency is a concern and minimum pulse filtering is not incorporated, then the waveform edge distortion introduced should be considered as a design trade off in the definition of the inverter command message format for a given serial bandwidth. Just as, at the expense of increasing the information content and control message latency, the edge distortion effect can be limited. Conversely, by selecting a message format that sends precise timing information for only limited subset of PWM control signals per inverter control message, the latency can be reduced at the expense of increase PWM edge distortions when the generated PWM edges are in close proximity in time.

[0080] One possible control messaging implementation is described below with reference to Figure 11. In this specific example, each control message can only precisely represent one PWM edge transition with any adjacent PWM transitions having edge distortions introduced in time equal up to a maximum of a single control message transmission latency. The time taken to transmit a data packet over the serial link is called the transmission latency.

[0081] Figure 11 shows a possible messaging scheme, indicated generally by the reference numeral 310, between the control module 104 and the inverters 106, 108 and 110 in accordance with an embodiment of the present invention. [0082] The messaging scheme 3 10 shows a number of PWM signals (U_up, V_up, W_up, Uiow, Viow, Wiow) generated by the control module (102 or 104), a reference clock signal indicating when the PWM signals can be sampled and a number of control messages that are the encoded PWM signals sent to the inverters 106, 108 and 1 10. The PWM packets implement the control messages described above with reference to Figure 10.

[0083] The PWM signals are sampled by reference clock events as indicated by the upward arrows at times 3 12, 3 16, 3 18, 320 and 322. When a PWM edge transition is detected, this event determines the insertion of a constant delay (in this example equal to the serial transmit latency) until the PWM data is resampled and then transmitted as a serial data packet. Thus, the PWM data sample detected at 3 16 causes the sent data packet 324 which includes the latest the PWM data sampled at 3 18 prior to transmission. The PWM data sample 320 is sent as data packet 326.

[0084] The timing of the sampling and sending of data packets is determined by whether a transition in any of the PWM signals is detected. If no changes are detected (such as between the samples 3 18, 320 and 322), then PWM samples are taken

periodically and data packets are sent immediately after being sampled. In one form of the invention, the periodic delay between data samples (and hence between the start of data packets) is equal to the transmission latency.

[0085] When a change in any of the PWM signals is detected (such as at the time indicated by the reference numeral 3 16), a new message transmission sequence is started. The message transmission sequence includes taking a sample of the PWM signals after a constant delay period equal to the transmission latency has passed since the edge was detected and then sending a new data packet based on that sample. The period (see 302) between the change in the PWM signal and the data packet being fully received at the inverter is therefore equal to twice the transmission latency. If another PWM edge occurs during the constant delay period (such as the edge indicated by the reference numeral 3 17), this does not start a new message transmission sequence: this has implications, as described further below. [0086] If the edges in the PWM control signals are sufficiently well spaced apart in time, then the only distortions introduced between the PWM signals generated at the control module 126 and the PWM signals regenerated at the inverters are the inherent latencies in the system (see the waveforms 302 described above) and the waveform skew (see the waveforms 304 described above).

[0087] However, as shown in Figure 11 , if the edges in the PWM signals are sufficiently close together, then more than one change in the PWM signals may occur in the time between the edge being detected at time 316 and the data sample being taken at time 318. The transmitted data packet 324 is based on the data sample taken at time 318. Accordingly, the effect at the inverters, the PWM signals (U_up, V_up, and W_up) will appear to change at the same moment in time (as all PWM signal states were captured during the sample 318). Thus, the scheme 310 introduces an edge distortion into the PWM signals implemented by the inverters 106, 108 and 110 in figure 3. Such edge distortions are an inevitable result of the selected command message format and limited bandwidth of the serial link 120, 122 and 124 and are common to all channels. This implementation is able to very accurately preserve the PWM edge timing for the first PWM transition, but introduces edge distortions for any additional subsequent transitions.

[0088] Given previous descriptions above, the edge distortion effects can be reduced or even eliminated by increasing the timing information contained in the data content of the control message (at the expense of increased latency) and/or by increasing the serial connection bandwidth (at the expense of increased component cost). This balance is part of the design process of the system 100.

[0089] As shown in Figure 11 , there is a gap between the sending of the packets 314 and 324. This gap is due to the resetting of the packet sending time caused by the detection of the PWM edge at time 316. If the serial connection scheme allows for a DC level to be sent, then this gap can be a simple DC signal and the gap can vary in duration based on the constant delay after the detected edge. However, if the serial connection scheme requires a DC neutral coding scheme (i.e. Manchester encoding or 8B10B) the serial signal will require constant symbol transitions and duration specifying the edge(s) will need to be encoded within the transmitted control message. Thus, the mechanism for handling this is dependent on the implementation.

[0090] The messaging scheme 310 is described by way of example only. Many variants of the messaging scheme 310 are possible. Moreover, an entirely different messaging scheme could be adopted in alternative embodiments of the invention. For example, if six PWM signals were desired to be transmitted with their timing preserved without edge distortions, a sufficient number of bits could be allocated (for each PWM signal) to represent an offset in time within a message transmission latency to indicate where each PWM signal transition should be recreated at the inverter.

[0091] The algorithm 150 described above with reference to Figure 4 indicates how the control module 126 provides gate control instructions received from the controller 102 to each of the inverter modules. Figure 5 is a flow chart showing an algorithm, indicated generally by the reference numeral 170, for providing inverter data, received at the control module 126 from each of the inverter modules, to the controller 102 in an embodiment of the present invention.

[0092] The algorithm 170 starts at step 172, where messages from each of the inverter modules 106, 108 and 110 are received at the control module 126 (over dedicated digital connections 121, 123 and 125 respectively). The messages include inverter operation data, such as current and voltage measurement data, from each of the inverters.

[0093] The messages (if encoded) are decoded at step 174 and an error

detection/correction process may be implemented at step 176. The decoded messages provide the data required by the controller in relation to the performance of the inverters.

[0094] The data received at the control module 126 from the inverter modules provides information relating to the functionality and performance of each of those inverter modules. Some of this information can be stored/processed by the control module 126 in step 178. This information may be used in the step 156 described above. [0095] The inverter operation data received from the inverter modules is summed for sending to the controller 102. The summed data is encoded as a message (possibly including error detection/correction algorithms) in step 180 and then sent to the controller 102 using the dedicated digital connection 119 (step 182).

[0096] An advantage of the modular drives system of the present invention is the flexibility that it provides. Figure 6 is a block diagram of a system, indicated generally by the reference numeral 200, that uses a similar configuration of hardware elements to the system 100 described above to provide a different solution.

[0097] The system 200 includes the AC power source 4, rectifier 6, controller 102, interface module 104 (including the control module 126), first inverter module 106, second inverter module 108, and third inverter module 110 described above. In addition, the system 100 includes a fourth inverter module 134 and a second motor 142. The fourth inverter module 134 includes a control module 136 and receives the DC power from the rectifier 6. A ninth dedicated digital connection 138 is provided from the interface module 104 to the fourth inverter module. A tenth dedicated digital connection 140 is provided from the fourth inverter module to the interface module.

[0098] As shown in Figure 6, the configuration of the system 200 differs from the configuration of the system 100 described above.

[0099] The three phase inputs of the first motor 112 are connected to the three phase outputs of the first inverter module 106 and to the three phase outputs of the second inverter module 108 so that the first and second inverter modules are connected in parallel. However, in contrast to the system 100, the first motor 112 is not connected to the third inverter module 110. Instead, the three phase inputs of the second motor 142 are connected to the three phase outputs of the third inverter module 110 and to the three phase outputs of the fourth inverter module 134 so that the third and fourth inverter modules are connected in parallel. Of course, the system 200 provides just one example of the provision of the control multiple motors: many paralleling combinations are possible. [00100] In the system 200, the controller 102 provides messages to the control module 126 of the interface module for driving the first motor 112 and the second motor 142. The control module 126 translates these driving instructions on the basis of the knowledge that the control module 126 has of the system 200. Importantly, the controller 102 does not need to know the details of the system 200: the controller 102 simply provides driving instructions for the motors 112 and 142.

[00101] Figure 7 is a block diagram of a system, indicated generally by the reference numeral 220, that uses a similar configuration of hardware elements to the systems 100 and 200 described above to provide a different solution.

[00102] The system 220 includes the controller 102 and the interface module 104 (including the control module 126) described above. In addition, the system 220 includes a DC power source 222, a first inverter module 226, second inverter module 236, a first load 232 and a second load 242. The first inverter module 226 includes a control module 224 and receives DC power from the DC power source 222. A dedicated digital connection 228 is provided from the interface module 104 to the first inverter module and a dedicated digital connection 230 is provided from the first inverter module to the interface module. Similarly, the second inverter module 236 includes a control module 234 and receives DC power from the DC power source 222. A dedicated digital connection 238 is provided from the interface module 104 to the second inverter module and a dedicated digital connection 240 is provided from the second inverter module to the interface module.

[00103] The DC power source 222 may, for example, be a photovoltaic array or a wind turbine, but many other sources of DC power could be provided. The system 200 therefore differs from the systems 100 and 200 described above in that an AC power source and a rectifier are not used to generate DC power for the inverters.

[00104] The loads 232 and 242 may be motors (such as three-phase motors, as described above). Accordingly, the DC source may be used as a power source for driving AC motors. However, this is not essential. For example, the second load 242 may be a utility grid. Accordingly, the system 200 can be used to connect a DC power source (such as a photovoltaic array or one or more wind turbines) to a utility grid. In one embodiment, the first load 232 is a motor and the second load 242 is a utility grid, such that the controller 102 can be used to control the provision of power to a motor and also to the grid. In a further embodiment, the first load is a utility grid and the second load is omitted such that the system is used solely for converting DC power (e.g. from a photovoltaic array) into AC power for provision to a utility grid.

[00105] In the embodiments of the invention described above, the inverters have been used to drive three-phase loads. This is not essential. For example, inverter could be used to drive one or more one-phase loads. Figure 8 is a block diagram of a system, indicated generally by the reference numeral 250, in which one inverter drives a three-phase load and another inverter drives a one-phase load.

[00106] The system 250 includes the AC power source 4, rectifier 6, controller 102 and interface module 104 (including the control module 126) of the systems 100 and 200 described above. In addition, the system 250 comprises a first inverter module 254 (including a control module 252), a second inverter module 262 (including a control module 260), a third inverter module 272 (including a control module 270), a first load 268 and a second load 278.

[00107] Dedicated digital connections 256, 264 and 274 are provided from the interface module 104 to the first, second and third inverter modules respectively. Similarly, dedicated digital connections 258, 266 and 276 are provided from the first, second and third inverter modules respectively to the interface module.

[00108] The first load 268 is a three-phase load. The three-phase load 268 has connections to first, second and third phase outputs of both the first inverter 254 and the second inverter 262. Therefore, the first and second inverters 254 and 262 are connected in parallel. The load 268 may be a motor, but this is not essential.

[00109] The second load 278 is a one -phase load. The one -phase load is connected to an output of the inverter 272 that provides a one -phase output for driving the one-phase load. The load 278 may be a motor, but this is not essential. [00110] It is clear from the various embodiments of the invention described above that the present invention is very flexible. The principles of the invention can be used to drive many different loads (such as motors and utility grids) and can be used to drive loads having different numbers of phases. Electrical power for systems in accordance with the invention may be derived from AC power sources (such as a utility grid) or from DC sources (such as a photovoltaic array). Systems in accordance with the invention can be readily modified to change the power source, the number of loads being driven, the type of load being drive, or the power required at any particular time for any particular load. Accordingly, systems in accordance with the present invention are modular in nature.

[00111] Figure 9 is a block diagram of a system, indicated generally by the reference numeral 200, demonstrating the modularity of the present invention. The system 200 comprises a controller 202, an interface module 204, a source of DC power 206, an inverter 208 and a load 210. The interface module 204 includes a control module 212. The interface module 204 and control module 212 are shown in dotted form, indicating that they could be omitted (as described further below).

[00112] The controller 202 is in two-way communication with the control module 212 of the interface module 204. This two-way communication can be implemented in many ways (such as using one or more optical fibres). Similarly, the control module 212 is in two-way communication with the inverter 208.

[00113] The source of DC power 206 may be a DC source (such as a photovoltaic array). Alternatively, the DC source 206 may be provided by an AC power source and a rectifier.

[00114] The inverter 208 receives DC power from the source of DC power 206 and gate control instructions from the interface module 204. The inverter drives the load 210 in accordance with those instructions. The load may be a motor, but this is not essential. The load can have any number of phases (e.g. the load may be a one-phase load, a three- phase load, a six-phase load etc.) The inverter can be a single inverter or multiple inverters (each with a separate connection to the control module 212) may be provided. [00115] As indicated above, in some embodiments of the invention, the interface 204 (and control module 212) may be omitted. Thus, the controller 202 may provide instructions (in digital form) directly to the inverter(s) 208. The instructions may be encoded (for example to enable error detection and/or correction). Data sent from the inverter(s) to the controller 202 may also be encoded. A dedicated digital connection (such as a fibre optic pair) may be provided between the controller 202 and the inverter(s) 208. In some forms of the invention, a connector box may be provided in place of the interface module 204 to enable the controller 202 to be physically connected to the inverter(s) 208. In the event that multiple inverters are provided, the summing module described as part of the control module 212 may be provided within the controller 202 in the event that the control module 212 is omitted.

[00116] The system 200 is a building block that can be used to generate many systems in accordance with the principles of the present invention. Some exemplary embodiments have been described above, but the skilled person will be able to develop many more systems that make use of the principles of the present invention.

[00117] The embodiments of the invention described above are provided by way of example only. The skilled person will be aware of many modifications, changes and substitutions that could be made without departing from the scope of the present invention. The claims of the present invention are intended to cover all such modifications, changes and substitutions as fall within the spirit and scope of the invention.

Claims

CLAIMS:

1. An apparatus for driving a plurality of inverters, the apparatus comprising a first input, a first output, a plurality of second inputs, a plurality of second outputs and a control module, wherein:

the first input is configured to receive inverter driving instructions from a controller;

the plurality of second inputs are configured to receive digital operation data from the respective inverters;

the control module is configured to combine the digital operation data received from each inverter;

the first output is configured to provide the combined digital operation data to the controller;

the control module is further configured to generate digital driving instructions for each of the plurality of inverters based on the inverter driving instructions received from the controller; and

the plurality of second outputs are configured to provide the digital driving instructions to the respective inverters.

2. An apparatus as claimed in claim 1, further comprising a dedicated digital connection to and from each of the plurality of inverters.

3. An apparatus as claimed in claim 2, wherein each dedicated digital connection comprises a first channel for sending data to the respective inverter and a second channel for receiving data from the respective inverter.

4. An apparatus as claimed in any preceding claim, where at least one of said inverters is used to drive a different load to at least one other inverter.

5. An apparatus as claimed in any preceding claim, wherein in the event that no changes occur in the digital driving instructions received from the controller, then digital driving instructions are sent to the plurality of inverters with a predetermined period.

6. An apparatus as claimed in any preceding claim, wherein in the event that a change in the digital driving instructions received from the controller is detected, a new message transmission sequence for sending digital driving instructions to the plurality of inverters is started.

7. An apparatus as claimed in claim 6, wherein, when the new message transmission sequence is in progress, no further message transmission sequence is started in the event that a further change in the digital driving instructions received from the inverter is detected.

8. An apparatus as claimed in any preceding claim, wherein the control module is configured to analyse the digital operation data to determine whether any of said inverters is operating in an unexpected manner.

9. An apparatus as claimed in claim 8, wherein the control module seeks to compensate for the operation of an inverter that is operating in an unexpected manner.

10. A system comprising an apparatus as claimed in any preceding claim and further comprising a plurality of inverters, wherein each inverter comprises a control input coupled to one of the plurality of second outputs of the apparatus, a control output coupled to one of the plurality of second inputs of the apparatus, a control module, a switching module and a plurality of power outputs.

11. A method for driving a plurality of inverters, the method comprising:

receiving inverter driving instructions from a controller;

generating digital driving instructions for each of the plurality of inverters, the driving instructions being based on the inverter driving instructions received from the controller and providing the digital driving instructions to the said inverters;

receiving digital operation data from each of the plurality of inverters; and generating combined digital inverter data for provision to the controller by combining the digital operation data received from said inverter and providing said combined digital inverter data to the controller.

12. A method as claimed in claim 11, further comprising encoding the digital driving instructions sent to the respective inverters.

13. A method as claimed in claim 11 or claim 12, wherein the digital driving instructions provided to each of the plurality of inverters are the same and synchronised.

14. A method as claimed in claim 11 or claim 12, wherein the digital driving instructions provided to at least some of the plurality of inverters are set independently of one another.

15. A method as claimed in any one of claims 11 to 14, wherein in the event that no changes occur in the digital driving instructions received from the controller, then digital driving instructions are sent to the plurality of inverters with a predetermined period.

16. A method as claimed in any one of claims 11 to 15, wherein in the event that a change in the digital driving instructions received from the controller is detected, a new message transmission sequence for sending digital driving instructions to the plurality of inverters is started.

17. A method as claimed in claim 16, wherein, when the new message transmission sequence is in progress, no further message transmission sequence is started in the event that a further change in the digital driving instructions received from the controller is detected.

18. A method as claimed in any one of claims 11 to 17, wherein the digital driving instructions include timing information, the method further comprising selecting the quantity of timing information to be included in the digital driving instructions in order to control edge distortion effects.

19. A method as claimed in any one of claims 11 to 18, wherein the digital driving instructions are sent to each of the plurality of inverters using a serial connection, the method further comprising defining a bandwidth of the serial connection in order to control edge distortion effects.

20. A method as claimed in any one of claims 11 to 19, wherein the digital driving instructions sent to a particular one of said inverters is dependent on the performance of said inverter.