WO2012176178A2

WO2012176178A2 - Multi-level inverter

Info

Publication number: WO2012176178A2
Application number: PCT/IB2012/053200
Authority: WO
Inventors: Andries Hercules Putter
Original assignee: Andries Hercules Putter
Priority date: 2011-06-23
Filing date: 2012-06-25
Publication date: 2012-12-27
Also published as: WO2012176178A3

Abstract

A system for generating an alternating current waveform from a direct current source is provided. The system comprises a plurality of inverter-transformer stages, each comprising at least one single phase inverter, which in turn comprises a plurality of switching arrangements, and at least one single phase transformer, each transformer having a primary side and a secondary side, the secondary side of the transformer/s being coupled in series to a load, each of the transformers comprising a secondary binary weighted coil so as to produce a predetermined voltage over the secondary side of each of the transformers. The switching arrangements including a plurality of switches, the switching arrangements being coupled to the primary side of each of the transformers so as to selectively connect the primary side of each transformer to the direct current source. An alternating current waveform is generated across the load having a voltage level corresponding to the sum of the weighting of said secondary binary weighted coils on each of said single-phase transformers.

Description

MULTI-LEVEL INVERTER

FIELD OF THE INVENTION

This invention relates to the generation of a sinusoidal voltage output. More particularly, this invention relates to a system for generating a sinusoidal voltage output from a direct current input, where an output power requirement is present.

BACKGROUND TO THE INVENTION

In the power electronics industry alternating current (AC) has been found to provide significant advantages over direct current (DC) in transforming and transmission and this is also the main form of electric power distribution used in industry today.

Hence, in those instances where the voltage source is in the form of a direct current source (e.g. a battery) a requirement exists to convert direct current generated into alternating current.

A technique well-known in the industry to achieve this purpose is to operate a single-phase inverter through a technique known as pulse width modulation (PWM). In terms of this technique the single-phase inverter is used to generate alternating current, from a direct current source to provide a sinusoidal waveform output. In terms of this technique, the sinusoidal waveform output can then be filtered using various filter arrangements incorporating passive components, such as capacitors and inductors to produce a sinusoidal waveform with a very low harmonic content.

However, such pulse width modulated inverters are limited by various factors, such as the filter component values and switching frequency of the constituent electronic switches. It will be appreciated by those skilled in the art that these factors cause the slew rate (or bandwidth) to be reduced as the output power requirement is increased.

In an alternative arrangement, a component generally known as a multi-level inverter is used for this purpose. A multi-level inverter can also be used in conjunction with the pulse-width modulation technique described above. However, a limitation of present multi-level inverters is that these components essentially operate as oscillators and produce a pre-programmed periodic waveform. Only the amplitude, phase and frequency of the basic periodic wave shape can be varied to compensate for variations caused by load current and supply voltage variations (transient non-periodic variations cannot be accommodated). In this regard, it is to be appreciated that such inverters are not capable of varying the instantaneous voltage at their outputs in a non-periodic manner. Such an inverter is capable of synchronizing its output with another source by adjusting the amplitude, frequency and phase with the other source, but should the other source produce a transient spike, a conventional inverter would not be capable of tracking this by means of a variation of the abovementioned three parameters. These limitations are also found with other types of inverters, such as pure pulse width modulated inverters and hybrid multi-level inverters with pulse width modulation.

To counter-act this limitation, what is required is a power amplifier arrangement with a very high slew rate (or bandwidth) that can be operated in a closed loop arrangement, as shown in Figure 1 . This is a classic feedback amplifier configuration used to ensure that accurate representation of the input signal 10.1 is applied to the load 10.5, thereby counteracting disturbances. Those skilled in the art will recognize this as an amplifier with negative feedback. This high gain, high slew rate amplifier 10.4 is supplied with an error signal 10.3. The error signal is obtained from the difference between the reference signal 10.1 and an attenuated version 10.10 of the amplifier output 10.5. The attenuated signal 10.10 is produced by the attenuator 10.6. The amplifier is supplied with power via a positive 10.7 and a negative 10.8 terminal from a direct voltage source 10.9.

It is known in the industry, that through a mechanism of negative feedback an amplified version of a reference signal can be reproduced at the output of the amplifier, including suppressing variations in the direct voltage supply. It is to be appreciated that the limiting factor in this design is the amplifier, and therefore it is common practice to design these amplifiers with a very high open loop gain and a as high as possible slew rate or bandwidth.

Existing pulse width modulated inverters can be used in this manner, but the slew rate (or bandwidth) is limited by various factors, such as filter component values and switching frequency of the electronic switches, and these factors cause the slew rate to be reduced as the output power requirement is increased. The objective of this invention is to provide a solution that can achieve high slew rates at power levels higher than 10kW extending several hundred kW's and MW's. Although, it is to be appreciated that the invention is capable of being used at power ratings lower than 10kW as well.

Such a multi-level inverter is conventionally made-up of a number of single phase inverters which in turn comprise a plurality of electronically controlled switches. The functional components which constitute such a conventional multi-level inverter will be dealt with in turn below. Single-Phase Inverter

The purpose of a single-phase inverter is to generate alternating current from a direct current source. An arrangement of this well-known component is exemplified in Figure 2.

The basic building block of a single-phase inverter is an interconnection of four electronically controlled switches 20.37, 20.38, 20.39, 20.40. The functioning of such an electronic switch

20.37, 20.38, 20.39, 20.40 is well-known in the industry and, as such, will not receive further attention here.

More particularly, the input terminal 20.53 of 20.37 and the input terminal 20.54 of 20.39, are connected to the positive terminal 20.61 of a direct current source 20.51. The output terminal 20.41 of electronic switch 20.37 is connected to the input terminal 20.43 of electronic switch

20.38. This connection between 20.37 and 20.38 is also connected to a terminal 20.42 of a load 20.52. The output terminal of 20.38 is connected to the negative terminal 20.62 of a direct current source 20.51 . The output terminal 20.45 of 20.40 is connected to the negative terminal 20.62 of the same direct current source 20.51. The output terminal 20.47 of 20.39 is connected to the input terminal 20.48 of 20.40, and both terminals 20.47 and 20.48 are connected to the terminal 20.46 of the load 20.52.

Each of the electronic switches 20.37, 20.38, 20.39 and 20.40, are controlled using control elements 20.21 , 20.22, 20.23, and 20.24. In addition there are diodes 20.64, 20.66, 20.69 and 20.73, connected in anti-parallel with each of the switches, 20.37, 20.38, 20.39 and 20.40 respectively. The cathode 20.63 of 20.64 is connected to the output terminal 20.53 of 20.37, while the anode 20.65 of 20.64 is connected to the output terminal 20.41 of 20.37. The same connections are repeated for 20.66 and 20.38, 20.69 and 20.39, 20.40 and 20.73. The arrangement shown in Figure 2 is well known by those skilled in the art of power electronics.

Resistive Load

The basic operation of the single phase inverter is to produce an alternating voltage waveform across the load 20.52, as described above wiith reference to Figure 2 above. This is achieved as follows. By activating electronic switches 20.37 and 20.40, terminal 20.42 of the load is connected to the positive terminal 20.61 of the direct current source 20.51 via electronic switch 20.37, and the remaining terminal 20.46 of the load is connected to the negative terminal 20.62 of the direct current source 20.51 via electronic switch 20.40. Apart from the small voltage drop across 20.37 and 20.40, the full voltage of 20.51 will appear across the load 20.52. By deactivating 20.37, and activating 20.38, while keeping 20.40 activated, both terminals of 20.52 are connected together, effectively reducing the voltage across 20.52 to zero.

By de-activating 20.40 and activating 20.39 while keeping 20.38 activated, the voltage across 20.52 is again set equal to the full voltage of 20.51 , but with 20.42 connected to the negative terminal 20.62 of 20.51 and 20.46 connected to the positive terminal 20.61 of 20.51 . By deactivating 20.38 and activating 20.37 while keeping 20.39 activated, the voltage across 20.52 is again reduced to zero. The above sequence shows how the voltage across 20.52 can be switched to a positive voltage with 20.42 connected to 20.61 and 20.46 connected to 20.62, to zero and to a negative voltage with 20.42 connected to 20.62 and 20.46 connected to 20.61. This means that an alternating voltage has been created across a load from a direct current source.

The typical alternating voltage which is generated by the single-phase inverter and which can be applied to a load, in accordance with the functioning described with reference to Figure 2 above, is shown in Figure 3. It will be appreciated that such an alternating voltage consists of a series of "n" positive pulses separated by instances where the voltage across the load is zero, and a series of negative pulses separated by instances where the voltage is zero. In the case of a resistive load there is no restriction on the arrangement of positive and negative pulses. Any pattern can be generated and applied to a resistive load, but this cannot be extended to an inductive or transformer coupled load, in which case the positive and negative halves of the waveform must be symmetrical to ensure a zero average value.

If the load 20.52 is a purely resistive load, the current flow through the resistive load 20.52 would be in phase with the voltage. This means that when the voltage across 20.52 is positive, the current through 20.52 would flow from 20.42 to 20.46, and when the voltage across 20.52 is reduced to zero the current would also be zero, and when the voltage across 20.52 is negative, the current through 20.52 would flow from 20.46 to 20.42.

Inductive Load

Turning now to Figure 4, the load can also take the form of an inductive load 40.52, which would alter the flow of current during switching. To accommodate this situation, anti-parallel diodes 40.64, 40.66, 40.69 and 40.73 are included. The characteristic of such a diode is that it conducts current in one direction, using diode 40.64, for example, current flows from its anode 40.65 to its cathode 40.63. This conduction is triggered when the anode 40.65 voltage is higher than the cathode 40.63, and it is terminated when the cathode 40.63 is higher than the anode 40.65 voltage. The same principle of operation applies to the other diodes 40.66, 40.69 and 40.73 in the circuit.

With switches 40.37 and 40.40 active on-state, the current through the inductive load 40.52 flows from the direct current source 40.51 through 40.37, entering the inductive load at 40.42 and leaving the inductive load at 40.46 and returning to the direct current source 40.51 via 40.40.

If switch 40.37 is de-activated, the inductive load 40.52 will generate a "back-emf so that 40.42 is more negative than 40.46, forcing diode 40.66 to conduct. The load current will circulate through 40.40 and 40.66. This current will continue to flow, until the energy stored in the magnetic field of the inductive load 40.52 is dissipated. This dissipation is caused by the resistance of the circuit, and the load resistance.

If, under these conditions, switch 40.40 is also de-activated, the back-emf of the inductive load 40.52 will cause diode 40.69 to be switched on, thus conducting current from its anode 40.71 to its cathode 40.70, returning current to the direct current source 40.51 via its positive terminal 40.61 , and completing the circuit via the negative terminal 40.62 and diode 40.66. This current will continue to flow until the energy stored in the magnetic field of the inductive load 40.52 is returned to the direct current source 40.51.

As per Figure 2, control circuitry or elements 40.21 , 40.22, 40.23, 40.24 for the electronic switches 40.37, 40.38, 40.39, 40.40 are included, the operation of which is similar to the control elements 20.21 , 20.22, 20.23, 20.24 described above.

With the change from a resistive load 20.52 of Figure 2 to an inductive load 40.52 of Figure 4, a restriction is placed on the waveform that can be applied by the single phase inverter to the load. An inductive load 40.52 requires a periodic waveform with a zero average value. This means that the positive and negative periods of the voltage waveform applied to the inductive load has to be symmetrical, as is shown with reference to Figure 5. This rule that the voltage waveform has to be symmetrical applies to any load that contains an inductive component, including a transformer. Transformer Load

By connecting the single phase inverter described in the previous section, to the primary winding of a single phase transformer, as shown in Figure 6, voltage translation and isolation can be achieved by the combination of a single phase inverter and transformer.

It is to be appreciated that the operation of the control circuitry or elements 60.21 , 60.22, 60.23, 60.24 for the electronic switches 60.67, 60.38, 60.39, 60.40 have been omitted, but in the implementation these are still required to operate the electronic switches, as described previously in relation to elements 20.21 , 20.22, 20.23, 20.24.

The one terminal of the primary winding 60.52 of the transformer is connected to the negative pole 60.41 of electronic switch 60.37 and the positive pole 60.43 of electronic switch 60.38 with conductor 60.42. The remaining terminal of the primary winding 60.52 of the transformer is connected to the negative terminal 60.47 of electronic switch 60.39, and the positive terminal 60.48 of electronic switch 60.40 with conductor 60.46.

The inverter operation described in the previous section (i.e. the Inductive Load) is used to apply periodic square waves to the primary winding 60.52 of the transformer, as described above. The square waves appear at the secondary winding 60.75 of the transformer at a different voltage determined by the winding ratio of the transformer. The secondary winding 60.75 of the transformer is connected to a load 60.78 with two conductors 60.76 and 60.77. Terminal 60.79 of the secondary winding 60.75 of the transformer is marked with a polarity dot, as well as terminal 60.80 of the primary winding 60.52. This convention indicates the polarity of the voltages.

If terminal 60.80 is connected to a positive voltage, by activating electronic switches 60.37, 60.40, then terminal 60.79 of the secondary winding 60.75 will also have a positive voltage relative to terminal 60.79. If the polarity dot was placed at terminal 60.82 of the primary winding 60.52, it would mean that when electronic switches 60.37 and 60.40 are activated the voltage across the secondary winding 60.75 would be reversed, with terminal 60.81 being positive relative to terminal 60.79. The dot convention indicates the winding direction of the primary 60.52 and secondary 60.75 windings during manufacture. Normally the dot indicates the start of each winding. This convention is well known by those skilled in the art of transformer design and manufacture. This arrangement allows an alternating voltage to be generated across a load from a direct voltage source, such as a battery or any other type of direct voltage source, at a voltage that can be higher or lower, than the voltage of the direct voltage source An advantage of this arrangement is that the transformer provides galvanic isolation between the load and the battery.

An example embodiment of a three stage multi level inverter with primary side inverter connection to each transformer, is shown with reference to Figure 7. For clarity, the control circuitry for the electronic switches have been omitted from Figure 7, but in the implementation these are still required to operate the electronic switches, as described previously.

Electronic switches 70.1 , 70.2, 70.3 and 70.4, and freewheel diodes 70.5, 70.6, 70.7 and 70.8 make up the first single phase inverter, which is connected to the primary winding 70.9 of the first transformer. Electronic switches 70.1 1 , 70.12, 70.13 and 70.14, and freewheel diodes 70.15, 70.16, 70.17 and 70.18 make up the second single phase inverter, which is connected to the primary winding 70.19 of the second transformer.

Electronic switches 70.21 , 70.22, 70.23 and 70.24, and freewheel diodes 70.25, 70.26, 70.27 and 70.28 make up the third single phase inverter, which is connected to the primary winding 70.29 of the third transformer. It is to be appreciated that typical multi level inverter arrangements found in industry today, seldom use more than three single phase inverters and transformers.

The secondary winding 70.10 of the first transformer, and the secondary winding 70.20 of the second transformer, and the secondary winding 70.30 of the third transformer are connected in series across a load 70.31. All three single phase inverters are fed from a single direct voltage source 70.32. The voltage across the secondary winding 70.10 of the first transformer can have a positive, negative of zero value. The same applies to the secondary winding 70.20 of the second transformer and the secondary winding 70.30 of the third transformer.

The result of the arrangement described above, is that a multi step voltage waveform can be created across the load, as shown with reference to Figure 8. The voltage waveform shown in Figure 8 is a multi level approximation of a sinusoidal waveform, which is used most frequently to supply power to a load. Other periodic wave shapes can be generated in a similar way. With reference to the circuit shown in Figure 7, in so far as the transformers all have the same winding ratio, the amplitude of the voltages at the secondary windings illustrated in Figure 8 will be the same. The output multi level inverter shown in Figure 7 is subjected to the following variations:

- Variation of the direct voltage source 70.32

- Variation of the voltage across the load 70.31.

Dealing first with supply regulation, the operation of the direct voltage source 70.32 can cause variations in the inverter output voltage outside the control of the inverter control electronics. For example, voltage source 70.32 might be a battery with a voltage that reduces over time as the battery discharges. In addition, the impedance in series with voltage source 70.32 causes a voltage drop. This impedance consists of the cable impedance and the internal impedance of the direct voltage source 70.32. The resistance part of this impedance causes a voltage drop proportional to the current, and the inductive part causes a voltage drop proportional to the rate of current variation.

During operation the distortion of the voltage waveform across the load must be minimized by the operation of a closed loop control mechanism. The effect of direct voltage source variation must be mitigated by this control loop.

This can be achieved by varying the duration of the pulses produced by each of the three inverters, thereby keeping the effective voltage across the load free from distortion caused by the direct supply voltage 70.32 variation, or finer control can be implemented by using pulse width modulation. It is relevant to point out that the multi level inverter arrangement described thus far only allows the effective value of the voltage across the load to be varied in response to voltage variations from the direct voltage source, and not the instantaneous voltage across the load. For example, if there is a rapid increase in the load current, caused by a change in the load, this rapid current rise will be reflected in the supply current from the direct current source, and the inductive part of the impedance in series with this source will cause a voltage drop proportional to the rate of current variation. This voltage drop across the series inductance will be transient in nature, but with the present arrangement it will be reflected across the load, which is an undesirable feature of a power supply.

One of the aims of the present invention is to eliminate the fast voltage transients caused by the inductive part of the line impedance, as will become clearer further on in the specification. The present state of the art is limited in this aspect, including the purely pulse width modulated topologies. Other mechanisms can also cause the supply voltage to vary, such as through the use of a battery. As current is drawn from a battery the terminal voltage reduces and this reduction in terminal voltage is reflected in the voltage across the load unless mitigated by a closed loop control mechanism. In the state of the art, the function to mitigate the effect of the variation of the supply voltage is referred to as supply regulation.

Turning now to load regulation, there is normally impedance in series with the load, which is not part of the load itself. This impedance is unintentional, and is caused by the cables connecting the output of the inverter to the load. The resistive part of this impedance causes a voltage drop proportional to the load current, and the inductive part causes a voltage drop proportional with the rate of change of the current. The net effect of these voltage drops is that the voltage across the load deviates from the desired value, distorting the wave shape of the voltage across the load. To counter this effect closed loop control is used, but its effect is restricted by the limitations of the present multi level inverter topology to act quickly.

Steady state variations, such as that caused by the resistive part of the cable impedance can be mitigated sufficiently, but transient disturbances caused by the effect of the inductance part of the cable impedance in conjunction with rapidly varying load currents, cannot be mitigated sufficiently by existing multi level inverter topologies. This level of response at high power levels is also beyond the capabilities of state of the art pulse width modulated inverters. It is desired that a feedback control be provided which is capable of eliminating this phenomena. In this regard, it is to be appreciated that should such a feedback control be applied to a conventional inverter, the result would be very limited, and the output waveform would be distorted by the effect of load and supply line inductances present during current transients.

For the purpose of the present invention, two types of inverter applications have been identified. The first group is referred to as grid connected, and the second group as a standalone.

Grid Connected Inverters

In a grid connected application, the inverter is connected in parallel with the load and the grid. Typical applications include, active harmonic filters, dynamic voltage regulators, backup power supply and renewable energy interfacing.

An inverter used in a grid connected application has to be able to produce a voltage waveform that tracks the grid voltage with a high degree of accuracy. While the grid voltage is stable, in other words close to a perfect sinusoidal waveform, an inverter can quite easily track the grid voltage within a small error band. But when the grid voltage contains distortion, especially high- frequency distortion, it becomes more difficult for existing inverter technology to produce a voltage waveform that tracks a distorted grid voltage.

Existing inverter technology is limited in terms of accuracy and speed of response with which a voltage reference waveform can be tracked. It is a further requirement for a grid connected inverter to be able to operate as a bidirectional power source, capable of supplying and absorbing power rapidly. It is also a requirement that the voltage waveform produced by a grid connected inverter contains very low voltage ripple. Voltage ripple at the output of a grid connected inverter gives rise to high-frequency currents in the grid circuit which is undesirable.

In the case of an active harmonic filter, an inverter is required to produce a compensating current waveform, which is injected into the load circuit to compensate for current distortion caused by non-linear loads. This is usually achieved with a voltage source inverter operating with a current controlled output. For a for a voltage source inverter to be able to produce a current control output, with high dynamic response, it has to be able to vary the output voltage rapidly. It is also a requirement for a current controlled inverter to be able to operate as a bidirectional power source, capable of high dynamic response.

To operate effectively in any of the grid connected applications, an inverter should be capable of producing the full range of waveforms shown in the diagram below.

PERIODIC APERIODIC

SYMMETRICAL Existing Inverters

ASYMMETRICAL

Symmetrical waveforms are waveforms that are symmetrical around the zero point, in other words, such waveforms have an average value of zero. Asymmetrical waveforms have a nonzero average value. Periodic waveforms have an amplitude pattern that repeats periodically. Aperiodic waveforms have amplitude patterns that do not repeat.

Existing inverter technology, comprising inverter power circuit topologies and control electronics, only produce periodic, symmetrical waveforms (with reference to the table above), and in particular they are mostly used to produce sinusoidal waveforms. Practical application requires inverters that are capable of producing a full range (all four) of waveforms shown in the table above.

Multi-level inverters containing transformers cannot be used to produce asymmetrical waveforms. This means that diode clamped, and flying capacitor multilevel inverters can produce all four types of waveforms. Cascaded multilevel inverters operating from a single DC source, contains a transformer output stage, and can therefore not be used to produce asymmetrical waveforms. It is a further requirement that any such inverter operates at a very high efficiency, and the inverter must be capable of handling high power levels.

Stand-Alone Inverters

Stand-alone inverters are inverters used as power supplies, the AC power from a DC source to a load with no grid connection in the load circuit. In a stand-alone application and inverter must be able to achieve good dynamic and steady-state load and supply regulation. Dynamic load and supply regulation require an inverter that can respond rapidly, as has already been described above. The lower the response time of the inverter, the worse the dynamic regulation performance, which leads to output voltage waveform distortion during dynamic situations.

Steady-state load and supply regulation require an inverter capable of producing output waveforms with very low ripple content. The requirements for a stand-alone inverter are the same as for a grid connected inverter, namely good dynamic performance and low voltage ripple. And therefore the design trade-offs are the same for both types of inverters.

Design Trade-Offs

As stated elsewhere in this document, the switching frequency of an inverter produce as power rating of the inverter increases. Qualitatively this relationship can be presented as:

Power x Switching Frequency = K1 (Equation 1 )

Taking a broad range of pulse width modulated inverters, the above constant can be calculated, and the result will yield a range of values. High performance pulse width modulated inverters will have a high power frequency constant while low quality pulse width modulated inverters will have a lower power frequency constant. But this equation gives no indication of the quality of output waveform in terms of voltage ripple nor does it give an indication of the dynamic response capabilities of the inverter. These two parameters are determined by the cut off frequency of the low pass filter on the output of a pulse width modulated inverter.

Assuming that the cut off frequency of the low pass filter is directly proportional to the switching frequency of the inverter:

Cut Off Frequency = K2 x Switching Frequency (Equation 2) and the voltage ripple is inversely proportional to the cut off frequency:

Voltage Ripple = K3 / Cut Off Frequency (Equation 3)

and the dynamic response is directly proportional to the cut off frequency:

Dynamic Response = K4 x Cut Off Frequency (Equation 4)

Using equations 2, 3 and 4 above, the voltage ripple and dynamic response can be expressed as a function of switching frequency.

Voltage Ripple = K3 / (K2 x Switching Frequency) (Equation 5)

Voltage Ripple = K5/Switching Frequency (Equation 6)

K5 = K3/K2 (Equation 7)

Dynamic Response = K2 x K4 x Switching Frequency (Equation 8)

K6 = K2 x K4 (Equation 9)

Dynamic Response = K6 x Switching Frequency (Equation 10)

And the efficiency of an inverter is inversely proportional to the switching frequency:

Efficiency = K7 / Switching Frequency (Equation 1 1 ) Equations 6, 10 and 1 1 express performance parameters of an inverter in terms of the switching frequency. The switching frequency is the only independent variable that can be selected to achieve a certain set of performance parameters and the switching frequency is limited by the relationship set out in Equation 1 . The above explanation illustrates the limitation that the switching frequency places on the performance of a pulse width modulated inverter.

In the case of multilevel inverters, this limitation is reduced. In terms of the above equation, it means that multilevel inverters have a:

- lower K5 value (less voltage ripple for the same switching frequency)

- higher K6 value (higher dynamic response so the same switching frequency)

- higher K7 value (higher efficiency for the same switching frequency)

Existing inverter technology comprises three broad groups, some of which have already been described above, as follows:

- pulse width modulated inverters,

- multilevel inverters, and

- multilevel inverters with pulse width modulation.

Pulse width modulated inverters produce two level voltage waveforms that are duty cycle modulated. The frequency of the square wave is equal to the switching frequency of the inverter. To obtain a sinusoidal voltage, the square wave is passed through a low pass filter. The cut off frequency of this low pass filter is determined by the switching frequency of the inverter, the higher the switching frequency of the inverter, the higher the cut off frequency of the low pass filter. And a higher cut off frequency implies smaller filter components.

It is therefore beneficial to operate an inverter at the highest possible switching frequency. But the switching frequency is limited by the switching losses experienced by the semiconductor power switches in the inverter. The switching losses are directly proportional to the switching frequency and power rating of the inverter. As a result of this relationship, the inverter switching frequency normally reduces with increased power.

The ripple content of the output voltage waveform of a pulse width modulated inverter is determined by the cut-off frequency of the low pass filter on the output of the inverter. A lower cut-off frequency leads to reduced voltage ripple, but a lower cut off frequency means larger filter components. Dynamic response of a pulse width modulated inverter is directly proportional to the cut off frequency of the low pass filter.

From the previous two paragraphs, it is clear that the requirement for low voltage ripple and high dynamic response, are in opposition. Low voltage ripple requires a reduction in the filter cut off frequency, while an increase in the cut off frequency improves the dynamic response. The switching frequency of the inverter can be increased to improve the situation, but it is limited by the switching losses. For a given power rating, there is a maximum inverter switching frequency can be achieved (limited by the switching losses), and given the switching frequency, the low pass filter cut off frequency can be selected to achieve a certain dynamic response and voltage ripple, keeping in mind the opposing requirements these two parameters place cut off the frequency of the low pass filter. This clearly illustrates the limitations of pulse width modulated inverters.

Multi-level inverters offer an improvement over pulse width modulated inverters. Instead of producing only two level waveforms, multi-level inverters produce multi-level voltage waveforms by combining various voltage levels to produce a staircase approximation of a sinusoidal waveform. By increasing the number of levels in a multilevel inverter, the staircase approximation of the sinusoidal voltage waveform improves.

This overcomes the limitations set by the switching frequency and filter cut off frequency, because the voltage waveform produced by a multilevel inverter contains lower harmonic content when compared with a pulse width modulated voltage waveform. This means that the cut off frequency of the low pass filter can be increased without compromising the ripple content of the output voltage waveform. The switching frequency requirement for a multilevel inverter is also reduced, when compared with a pulse width modulated inverter.

A multi-level inverter can therefore be used to produce voltage waveforms with lower ripple content and higher dynamic performance, compared with pulse width modulated inverters, when both type of inverters are operating at the same switching frequency and power.

A further improvement can be made by operating multilevel inverters with pulse width modulation. The staircase approximation is improved by employing pulse width modulation at each of the voltage levels. Typically, pulse width modulation is incorporated in conjunction with the leading-edge or trailing edge of the square wave produced by each level. This reduces the harmonic content of the output of the output voltage waveform. OBJECT OF THE INVENTION

An object of the invention is to provide a system for generating an alternating current waveform from a direct current source that will, at least partly, alleviate at least some of the above problems and provide the advantages set out above. In particular, the objects of the present invention are to:

- produce an inverter capable of better accuracy and speed of response than existing inverter technologies (i.e. have a high dynamic response), and be capable of bidirectional power flow as well;

- produce an inverter capable of producing an output voltage waveform with very low ripple content;

- produce an inverter having a high output power rating;

- produce a control circuit for a multilevel inverter that allows it to produce all four types of waveforms (with reference to the above table);

- produce a multilevel inverter technology and control system for which the values of K5,

K6 and K7 (as defined above) are much higher than what can be achieved with the present state-of-the-art, without increasing the switching frequency.

SUMMARY OF THE INVENTION

According to the invention, there is provided a system for generating an alternating current waveform from a direct current source, said system comprising: a plurality of inverter-transformer stages, each comprising: at least one single phase inverter, which in turn comprises a plurality of switching arrangements; and at least one single phase transformer, each transformer having a primary side and a secondary side, the secondary side of the transformer/s being coupled in series to a load, each of the transformers comprising a secondary binary weighted coil so as to produce a predetermined voltage over the secondary side of each of the transformers; the switching arrangements including a plurality of switches, the switching arrangements being coupled to the primary side of each of the transformers so as to selectively connect the primary side of each transformer to the direct current source, wherein an alternating current waveform is generated across the load having a voltage level corresponding to the sum of the weighting of said secondary binary weighted coils on each of said single-phase transformers.

In particular, the present invention discloses a system for generating an alternating current waveform from a direct current source, said system comprising: a plurality of inverter-transformer stages, each stage comprising: at least one single phase inverter, which in turn comprises a plurality of switching arrangements; and at least one single phase transformer, each transformer having a primary side and a secondary side, the secondary side of the transformer being coupled in series to a load, wherein the secondary sides of the transformers define binary weighted coils so as to produce a predetermined voltage over the secondary side of each of the transformers, wherein the switching arrangements include a plurality of switches, the switching arrangements being coupled to the primary side of each of the transformers so as to selectively connect the primary side of each transformer to the direct current source, wherein an alternating current waveform is generated across the load having a voltage level corresponding to the sum of the weighting of said secondary binary weighted coils of each of said single phase transformers.

In an embodiment, each of said plurality of transformers is binary weighted, so as to increase the voltage output across the secondary side of each successive one of said plurality of transformers in multiples of two.

In an embodiment, the system further comprises a controller to control the switching of one or more of the plurality of switches in said switching arrangements. In an embodiment, the system further comprises a decoder, said decoder being operable to convert a low power signal into a binary encoded signal, said binary encoded signal being input to said controller to thereby control each of said plurality of switching arrangements.

In an embodiment, the binary encoded signal comprises one or more bits, each of said one or more bits being allocated to each of said plurality of single phase transformers.

In an embodiment, in response to a predetermined voltage level being required across said secondary windings of said plurality of transformers, said controller is driven by said binary encoded signal to control the activation of said plurality of switching arrangements, so as to generate the predetermined voltage level across said load.

In an embodiment, the load is provided in series with a line impedance, the system thus generating a transient emf in response to a rapid increase in load current, so that by measuring the voltage across the load, the system can increase its output voltage rapidly to compensate for this voltage drop and once stabilized it can continue normal operation.

In an embodiment, the increase in output voltage is provided under the control of a feedback loop. In this manner, because of its fast transient response capabilities of the system, higher overall performance can be achieved.

In an embodiment, the decoder is connected to an analogue to digital converter to receive a sample incoming signal and convert it to a corresponding digital signal for the inverter- transformer stages, the combined decoder, analogue to digital converter and plurality of inverter-transformer stages defining a bidirectional, binary multi-level inverter.

In an embodiment, the bidirectional, binary multi-level inverter forms part of a closed loop operational amplifier circuit, utilizing either an inverting or non-inverting operational amplifier.

In an embodiment, the operational amplifier circuit comprises an isolated step down voltage sensor to sense the output voltage of the binary bidirectional multilevel inverter, to thereby define two amplifier sub-circuits.

In an embodiment, the bidirectional, binary multi-level inverter forms part of a closed loop operational amplifier circuit in conjunction with a grid supplied load, wherein the amplifier circuit is used to inject current in parallel with a grid supply into the load. In an embodiment, the system further includes a current sensor to sense the output current of the amplifier and an amplifier to compare the sensed output current with a reference signal derived from an amplifier controller.

In an embodiment, the system includes an amplifier controller to generate a reference signal as an input to the operational amplifier, the amplifier controller in turn receiving a signal from a step down voltage sensor that measures the instantaneous grid voltage from the grid supply.

In an embodiment, the amplifier controller can control the direction of the flow of power at the output of the binary bidirectional multilevel inverter, so that by setting the voltage at the input of the amplifier to achieve an output voltage at the output of the binary bidirectional multilevel inverter that is higher than the grid voltage, power can flow from a battery power supply via the binary bidirectional multilevel inverter into the load, and vice versa.

In an embodiment, each of said plurality of switching arrangements is activated, the sum of each of the voltage levels of each of the activated switching arrangements corresponding to the required, predetermined voltage level.

In an embodiment, the controller determines the highest multiple of two equal to the required predetermined voltage level.

In an embodiment, the controller determines the difference between said highest multiple of two and the predetermined voltage level.

In an embodiment, the difference between said highest multiple of two and the predetermined voltage level is provided as the new required, predetermined voltage level.

In an embodiment, eight transformers are provided in combination with eight correspondingly connected switching arrangements.

In an example embodiment of the invention, the switching arrangement comprises four switches, an input terminal of each of two of said switches being connected to a positive terminal of said direct current source and an output terminal of each of said two switches being connected to an input terminal of a further two of said switches, so as to selectively provide a positive or a negative voltage level over an output terminal of said switching arrangement. In an example embodiment of said invention, a diode comprising an anode and a cathode, is connected in anti-parallel with each of said switches in each of said plurality of switching arrangements, said anode being connected to an output terminal of a corresponding switch and said cathode being connected to said input terminal of said corresponding switch.

In this example embodiment, one or more of said plurality of switching arrangements and one or more corresponding transformers is switched on, so as to produce a predetermined voltage level across said load.

In an example embodiment of the invention, eight transformers are provided in combination with eight correspondingly connected switching arrangements.

In this embodiment of the invention, the system is used in combination with pulse width modulation techniques including the selection of one or more passive components for the filtration of signal content so as to generate a sinusoidal waveform output having a reduced harmonic content.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described, by way of example only, with reference to the accompanying drawings in which:

Figure 1 shows a schematic view of an existing, classic feedback amplifier circuit;

Figure 2 shows a schematic view of an existing single-phase inverter circuit;

Figure 3 shows a diagrammatic view of the alternating voltage generated by the single-phase inverter circuit of Figure 2;

Figure 4 shows a schematic view of the existing single-phase inverter circuit of Figure 2 having an inductor as load;

Figure 5 shows a diagrammatic view of the alternating voltage generated by the single-phase inverter circuit of Figure 4;

Figure 6 shows a schematic view of the existing single-phase inverter circuit of Figure 2 having an single-phase inductor as load;

Figure 7 shows a schematic view of an existing multi-level inverter cicruit;

Figure 8 shows a diagrammatic view of the alternating voltage generated by the multi-level inverter circuit of Figure 7;

Figure 9 shows a circuit diagram of a system according to an embodiment of the present invention;

Figure 10 shows a circuit diagram of a system according to another embodiment of the present invention;

Figure 11 shows a circuit diagram of a binary bidirectional multi-level inverter according to a further embodiment of the present invention;

Figure 12 shows a circuit diagram of a conventional inverting operational amplifier configuration, which the binary bidirectional multi-level inverter shown in Figure 1 1 may be used in conjunction with;

Figure 13 shows a circuit diagram of the conventional inverting operational amplifier configuration (Figure 12) in combination with the binary bidirectional multi-level inverter (Figure 1 1 );

Figure 14 is essentially the same as Figure 13, but it shows the various components comprising the complete binary bidirectional multilevel inverter (as depicted in Figure 1 1 );

Figure 15 shows a circuit diagram of a conventional non-inverting operational amplifier configuration, which the binary bidirectional multi-level inverter shown in Figure 1 1 may be used in conjunction with;

Figure 16 shows a circuit diagram of the conventional non-inverting operational amplifier configuration (Figure 15) in combination with the binary bidirectional multi-level inverter (Figure 1 1 );

Figure 17 is essentially the same as Figure 16, but it shows the various components comprising the complete binary bidirectional multilevel inverter (as depicted in Figure 1 1 );

Figure 18 shows how a non-inverting amplifier configuration (i.e. Figures 16 and 17) interfaces with a grid connected load circuit under a fault condition;

Figure 19 shows how the closed loop power amplifier is used to inject current (as opposed to a fault as shown in Figure 18) in parallel with the grid into the load circuit; and

Figure 20 shows a closed loop power amplifier circuit, similar to Figure 19, but modified to implement a battery charging function.

DETAILED DESCRIPTION OF THE DRAWINGS

With reference to Figure 9, an embodiment of the present invention is described consisting of a number single phase inverter-transformer stages 90.1 10, 90.1 12, 90.1 14, 90.1 16, 90.1 18, 90.120, 90.122, 90.124. Each stage 90.1 10, 90.1 12, 90.1 14, 90.1 16, 90.1 18, 90.120, 90.122, 90.124 comprises a single phase inverter, which in turn comprises switching arrangements 90.1 - 90.4, 90.9 - 90.12, 90.17 - 90.20, 90.25 - 90.28, 90.33 - 90.36, 90.41 - 90.44, 90.49 - 90.52 and 90.57 - 90.60, respectively, and associated control elements (not shown, but which are similar to the control elements described above with reference to Figures 2, 4 and 6). Each switching arrangement has associated anti-parallel diodes 90.5 - 90.8, 90.13 - 90.16, 90.21 - 90.24, 90.37 - 90.40, 90.45 - 90.48, 90.53 - 90.56 and 90.61 - 90.64, respectively. In an embodiment, there are 8 inverter-transformer combinations or stages, but more may be included, if need be, as explained in more detail further on in the specification.

Each stage 90.1 10, 90.1 12, 90.1 14, 90.1 16, 90.1 18, 90.120, 90.122, 90.124 further comprises single phase transformers 90.65, 90.66, 90.67, 90.68, 90.69, 90.70, 90.71 and 90.72. The winding ratios of the transformers are binary weighted, with the secondary windings of the transformers being connected in series with each other and with a load 70.1 1. Thus, the lowest weighting can have a winding ratio so that the voltage at the secondary winding of the transformer equals +1V, 0V or -1V, based on the typical switching pattern produced by a single-phase inverter, as described previously, with reference to Figure 7.

The weightings of these transformers increase from the abovementioned levels in multiples of 2, each weighting increasing by a factor of two, as follows:

Weighting of the inverter-transformer stage 90.1 10: +1V, 0V or -1V

Weighting of the inverter-transformer stage 90.1 12: +2V, 0V, -2V

Weighting of the inverter-transformer stage 90.1 14: +4V, 0V, -4V

Weighting of the inverter-transformer stage 90.1 16: +8V, 0V, -8V

Weighting of the inverter-transformer stage 90.1 18: +16V, 0V, -16V

Weighting of the inverter-transformer stage 90.120: +32V, 0V, -32V

Weighting of the inverter-transformer stage 90.122: +64V, 0V, -64V

Weighting of the inverter-transformer stage 90.124: +128V, 0V, -128V

With the above example, any voltage between ±255V with a resolution of ±1 V may be achieved and applied to the load 70.1 1 , and by increasing the number of inverter-transformer stages, higher voltages can be generated. It is also possible to start at a higher voltage (and not necessarily 1V) if the resolution does not have to be 1V. For example, if a resolution of 4V is adequate, the lowest step can start at 4V. The speed with which the voltage across the load can be changed is limited by the switching speed of the electronics switching elements. This switching speed can be in the range of 25μ8. For example, if all eight inverters are activated to produce 0V across their secondary windings, as described earlier, the resultant voltage across the load will be zero. To increase this voltage across the load from zero to 255V, all eight inverters must be switched to produce a positive voltage across their secondary windings of their respective transformers, and this can take place in a time interval as short as 25μ8. It will be appreciated that this scenario is distinct from that depicted in Figure 7. In particular, the abovementioned switching speed is of no use with the configuration of Figure 7 because of the limited number of output voltages that can be generated by the three transformers. In particular, when the abovementioned switching speed is used to generate pulse-width modulated waveforms and these waveforms are required to be filtered by low bandwidth filters, the performance of the system will be limited.

With reference to Figure 10, by adding a decoder 100.107 to the basic multi-level inverter arrangement, an amplifier arrangement is realized. A low power signal 100.108 is fed to the decoder 100.107, and passes through the decoder 100.107 where it is converted to a binary signal. The decoder 100.107 uses the binary signal produced as an input to the control elements of each of the switches. It is to be appreciated that this low power signal 100.108 is the reference signal. This signal 100.108 can be generated by another outer loop controller, and a large number of different types of reference signals exist, some of which will be described with reference to Figures 1 1 to 19. In this embodiment, the amplifier is capable of tracking a signal from an outer control loop controller provided in the form of a random signal. It will be appreciated that such a random signal cannot be tracked by a conventional inverter. Furthermore, in a different embodiment of the invention, the reference signal is provided in the form of a normal sine wave signal. In such an embodiment, it will be appreciated that the present inverter provides an advantage, in that the sine wave signal can be tracked and the load and supply regulation improved as a result (i.e. it is capable of compensating for a transient voltage drop across the supply and load line impedances), which is beyond the scope of conventional inverters. It will further be appreciated that this low power signal 100.108 can be any AC signal (i.e. a signal which does not have a DC component).

To illustrate the embodiment shown in Figure 10, assume that a voltage of 58V is to be produced across a load 102. In this regard, it is to be appreciated that the highest power of 2 that is lower or equal 58V is 32. Through the subtraction of 32 from 58, 26 is yielded. The highest power of 2 that is lower or equal to 26 is 16. Similarly, through the subtraction of 16 from 26, 10 is yielded. It will further be appreciated that the highest power of 2 lower or equal to 10 is 8. In this regard, by subtracting 8 from 10, 2 is yielded. It will be appreciated that the highest power of 2 lower or equal to 2 is 2.

To generate the 32V, the inverter-transformer stage or combination 100.136 must be switched to produce 32V across the secondary winding of the transformer 100.70. This requires control element 100.95 to turn on switching element 100.41 , and control element 100.98 to turn on switching element 100.44. Switching elements 100.43 and 100.42 remain switched off.

To generate the 16V, the inverter-transformer stage or combination 100.134 must be switched to produce 16V across the secondary winding of the transformer 100.69. This requires control element 100.91 to turn on switching element 100.33, and control element 100.94 to turn on switching element 100.36. Switching elements 100.34 and 100.35 remain switched off.

To generate the 8V, the inverter-transformer stage or combination 100.132 must be switched to produce 8V across the secondary winding of the transformer 100.68. This requires control element 100.87 to turn on switching element 100.25, and control element 100.90 to turn on switching element 100.28. Switching elements 100.26 and 100.27 remain switched off.

To generate the 2V, the inverter-transformer stage or combination 100.128 must be switched to produce 2V across the secondary winding of the transformer 100.66. This requires control element 100.79 to turn on switching element 100.9, and control element 100.82 to turn on switching element 100.12. Switching elements 100.10 and 100.1 1 remain switched off. The rest of the transformers, are switched to produce 0V across their secondary windings.

To generate the 0V:

- control element 100.76 turns on switching element 100.2, and control element 100.78 turns on switching element 100.4, or alternatively control element 100.75 must switch on switching element 100.1 and control element 100.77 must switch on switching element 100.3; and

- control element 100.100 turns on switching element 100.50, and control element 100.102 turns on switching element 100.52, or alternatively control element 100.99 must switch on switching element 100.49 and control element 100.101 must switch on switching element 100.51 ; and

- control element 100.104 turns on switching element 100.58, and control element 100.106 turns on switching element 100.60, or alternatively control element 100.103 must switch on switching element 100.57 and control element 100.105 must switch on switching element 100.59.

With this switching arrangement, 58V will be produced across the load 102.

Turning now to Figures 1 1 to 19, the embodiment in Figure 10 is further expanded upon.

In particular, Figure 1 1 shows a symbolic representation 120 of a binary bidirectional multilevel inverter. In this example, the binary bidirectional multilevel inverter 120 is shown with the input ranging between ±4V corresponding to an output voltage range of ±310V. Below the symbol 120 is shown the various elements that make up the binary bidirectional multilevel inverter 120, consisting of an analog to digital converter (ADC) 122, a digital decoder (DEC) 124 and the power section 126 of the binary bidirectional multilevel inverter 120. The power section 126 corresponds to the inverter-transformer stages shown in, and described with reference to, Figures 9 and 10 i.e. this symbol 126 represents the eight inverters plus the eight binary weighted transformers connected to the outputs of the corresponding inverter, as well as auxiliary and control electronics required for the binary bidirectional multilevel inverter.

The input to the power section 126 of the inverter 120 comprises 32 digital signals, used to drive the semiconductor power switches in each of the inverters. Each inverter consists of 4 semiconductor power switches, as described above, and there are a total of eight such inverters in the binary bidirectional multilevel inverter power section 126, and so a total of 32 digital control inputs are required. The number of inverters need not be limited to 8, and the design can be implemented with any number of inverters, depending on the requirements of the application.

The 32 digital control signals are generated by the digital decoder (DEC) 124 which in turn is supplied with 8 control signals received from the analog to digital converter (ADC) 122. The analog to digital converter 122 sits at the front end of the chain and receives an analog signal in the voltage range ±4V.

The analog to digital converter 122 periodically samples this analog signal, the sampling being indicated schematically by arrow 128 and every sample it updates its output with a digital representation of the analog signal at its input. Typically this sample rate is less than 100 s, but it can be varied to suit different applications. Also shown in this part of the schematic, is a block 130 containing a delay. This is not a physical component of the system, but presents the signal delay caused by the various system components. This delay is in the order of about 25

Figure 12 shows a schematic drawing of a conventional inverting operational amplifier 132 configuration. The binary bidirectional multilevel inverter 120 will be used in conjunction with this circuit, as described further on in the specification.

Figure 13 shows the binary bidirectional multilevel inverter 120 in combination with an inverting operational amplifier 132 configuration. The binary bidirectional multilevel inverter 120 is connected in series with the output of the operational amplifier 132. The output voltage of the binary bidirectional multilevel inverter 120 is sensed using an isolated step down voltage sensor 134. The behaviour of this configuration is the same as that of an inverting operational amplifier shown in Figure 12. The only difference is that the forward path contains two amplifiers, instead of the single amplifier normally used. This configuration will operate in the same way as a normal inverting operational amplifier, the input voltage (V1 ) will be amplified and presented at the output (V3).

The feedback network consists of the isolated step down voltage sensor 134, and resistors R1 and R2. Not shown in this diagram, are the power supply connections to the operational amplifier (A1 ) and the binary bidirectional multilevel inverter (A2).

Figure 14 is essentially the same as Figure 13, but it shows the various components comprising the complete binary bidirectional multilevel inverter, as depicted in Figure 1 1 . The configuration shown in Figure 14 is used as a closed loop power amplifier, capable of high dynamic response and bidirectional power flow.

Figure 15 shows a conventional, non inverting operational amplifier 136 configuration, with Figure 16 showing the binary bidirectional multilevel inverter 120 in combination with the non- inverting operational amplifier 136 configuration. The binary bidirectional multilevel inverter 120 is connected in series with the output of the operational amplifier 136. The output voltage of the binary bidirectional multilevel inverter 120 is sensed using an isolated step down voltage sensor 138. The behaviour of this configuration is the same as that of the inverting operational amplifier shown in Figure 12. The only difference is that the forward path contains two amplifiers, instead of the single amplifier normally used. This configuration will operate in the same way as a normal inverting operational amplifier, wherein the input voltage (V1 ) will be amplified and presented at the output (V3). The feedback network consists of the isolated step down voltage sensor 138, and resistors R1 and R2. Not shown in this diagram, are the power supply connections to the operational amplifier (A1 ) and the binary bidirectional multilevel inverter (A2).

Figure 17 is essentially the same as Figure 16, but it shows the various components comprising the complete binary bidirectional multilevel inverter 120, as depicted in Figure 1 1 . The configuration shown in Figure 17 defines a closed loop power amplifier, which is capable of high dynamic response and bidirectional power flow.

Figure 18 shows how a non inverting amplifier 140 configuration interfaces with a load 142 that in turn is connected to a supply 144. Switch SSR1 connects the output of the non-inverting amplifier 140 configuration in parallel with the load 144. In addition, switch SSR2 connects the load 144 to the grid supply 144. Choke L1 represents the stray inductance of the supply path from the grid 144 to the load 142. Switch SSR2 is used to disconnect the load 142 from the grid supply in the event of a power failure.

Figure 18 does not show any synchronisation of V3 with the grid voltage. V3 will simply be an amplified version of V1 , but from this diagram it is clear that voltage V1 can be manipulated to create any desired voltage V3.

Figure 19 shows how a closed loop power amplifier 150 is used to inject current (instead of a fault, as shown in Figure 18) in parallel with the grid 152 into the load circuit 154. A current sensor 156 is used to sense the output current of the power amplifier 150 and their signal is compared with a reference signal (l_ref(t)) using amplifier A3 158. Reference signal for the current controlling can be derived from a higher level amplifier controller 160 such as an active harmonic filter. A battery 162 may be connected to the power section 126, the operation of which, in part, will be described in more detail below with reference to Figure 20.

Finally, Figure 20 shows a battery charging function 170 for the binary bidirectional multilevel inverter. This function can be implemented in any one of a number of ways, with Figure 20 illustrating one way in which this may be done. The reference signal for the operational amplifier at the input, A1 , is generated by an amplifier controller 172. The amplifier controller 172 receives a signal from a step down voltage sensor 174, which measures the instantaneous grid voltage from the grid supply 176. The controller 170 reproduces a replica of the grid voltage at its output, which serves as input A1. By manipulating this replica of the grid voltage at the input of A1 , the controller 170 is able to control the direction of the flow of power at the output of the binary bidirectional multilevel inverter 120. The amplifier controller 172 can set the voltage at the input of A1 to achieve an output voltage at the output of the binary bidirectional multilevel inverter 120 that is higher than the grid voltage, resulting in a power flow from a battery power supply 178 via the binary bidirectional multilevel inverter 120 into the load circuit 180. The level of power supplied to the load circuit 180 is directly proportional to the difference between the output voltage of the binary bidirectional multilevel inverter 120 and the grid voltage.

If the amplifier controller 172 sets the voltage at the input of A1 to achieve an output voltage at the output of the binary bidirectional multilevel inverter 120 less than the grid voltage, resulting in a power flow into the battery 178 via the binary bidirectional multilevel inverter 120 from the load circuit 180, this power will be supplied from the grid supply 176. Under these conditions the battery 178 will be charged. The level of power supplied to the battery 178 is directly proportional to the difference between the output voltage of the binary bidirectional multilevel inverter 120 and the grid voltage.

The amplifier controller 172 can also set the voltage at the input of A1 so that the voltage at the output of the binary bidirectional multilevel inverter 120 is exactly equal to the grid voltage. In this situation, the binary bidirectional multilevel inverter 120 will have an instantaneous output power of zero.

By manipulating the voltage at the input of A1 the amplifier controller 172 can regulate the power flow into and out of the battery 178 in accordance with a preset charge and discharge profile.

It will be appreciated that the present invention shown therefore provides an amplifier capable of high slew rates, and the power level is only limited by the capabilities of the switching elements, and by the appropriate selection of the number of transformers and their winding ratios, any voltage can be generated using any direct voltage source.

In particular, by making use of a binary multilevel inverter, where the output voltage of the lowest rated voltage level in the multilevel inverter is equal to the ripple voltage, and the next level produces a voltage double that of the lowest level, and the next level produces a voltage that is double that of the previous level and so on, and the total number of levels are selected so that a series combination of all the levels produces a voltage equal to the maximum required voltage. Combining such an inverter with the control system presented in this invention, an inverter can be produced with performance parameters that are much better than existing state- of-the-art inverters. The control system presented in this invention is different from existing multilevel inverter controls. Existing multilevel inverter control system produces control signals based on pre-programmed patterns. The control system presented in this invention allows the multilevel inverter to be control dynamically, in other words it is capable of accepting a dynamically and randomly variable input waveform and it controls the multilevel inverter so as to reproduce this dynamically and randomly variable waveform accurately at the output of the multilevel inverter. In other words, the binary bidirectional multilevel inverter together with the unique control closed loop control system allows the overall implementation to operate as a high-power, high bandwidth, power amplifier with very high efficiency. In addition, the control system allows multi-level inverters to be used to produce asymmetrical, aperiodic voltage waveforms, provided of course that the multi-level inverter topology used is capable of transmitting asymmetrical aperiodic voltage waveforms, as opposed to a conventional state-of- the-art control system which produces only periodic voltage waveforms.

Claims

A system for generating an alternating current waveform from a direct current source, said system comprising: a plurality of inverter-transformer stages, each stage comprising: at least one single phase inverter, which in turn comprises a plurality of switching arrangements; and at least one single phase transformer, each transformer having a primary side and a secondary side, the secondary side of the transformer being coupled in series to a load, wherein the secondary sides of the transformers define binary weighted coils so as to produce a predetermined voltage over the secondary side of each of the transformers, wherein the switching arrangements include a plurality of switches, the switching arrangements being coupled to the primary side of each of the transformers so as to selectively connect the primary side of each transformer to the direct current source, wherein an alternating current waveform is generated across the load having a voltage level corresponding to the sum of the weighting of said secondary binary weighted coils of each of said single phase transformers.

The system of claim 1 , wherein each of said plurality of transformers is binary weighted, so as to increase the voltage output across the secondary side of each successive one of said plurality of transformers in multiples of two.

The system of either claim 1 or claim 2, which further comprises a controller to control the switching of one or more of the plurality of switches in said switching arrangements.

The system of claim 3, which further comprises a decoder, said decoder being operable to convert a low power signal into a binary encoded signal, said binary encoded signal being input to said controller to thereby control each of said plurality of switching arrangements.

5. The system of claim 4, wherein the binary encoded signal comprises one or more bits, each of said one or more bits being allocated to each of said plurality of single phase transformers.

6. The system of either claim 4 or claim 5, wherein in response to a predetermined voltage level being required across said secondary windings of said plurality of transformers, said controller is driven by said binary encoded signal to control the activation of said plurality of switching arrangements, so as to generate the predetermined voltage level across said load

7. The system of claim 6, wherein the load is provided in series with a line impedance, the system thus generating a transient emf in response to a rapid increase in load current, so that by measuring the voltage across the load, the system can increase its output voltage rapidly to compensate for this voltage drop and once stabilized it can continue normal operation.

8. The system of claim 7, wherein the increase in output voltage is provided under the control of a feedback loop.

9. The system of any one of claims 3 to 7, wherein the decoder is connected to an analogue to digital converter to receive a sample incoming signal and convert it to a corresponding digital signal for the inverter-transformer stages, the combined decoder, analogue to digital converter and plurality of inverter-transformer stages defining a bidirectional, binary multi-level inverter.

10. The system of claim 9, wherein the bidirectional, binary multi-level inverter forms part of a closed loop operational amplifier circuit, utilizing either an inverting or non-inverting operational amplifier.

1 1. The system of claim 10, wherein the operational amplifier circuit comprises an isolated step down voltage sensor to sense the output voltage of the binary bidirectional multilevel inverter, to thereby define two amplifier sub-circuits.

12. The system of claim 9, wherein the bidirectional, binary multi-level inverter forms part of a closed loop operational amplifier circuit in conjunction with a grid supplied load, wherein the amplifier circuit is used to inject current in parallel with a grid supply into the load.

13. The system of claim 12, which further includes a current sensor to sense the output current of the amplifier and an amplifier to compare the sensed output current with a reference signal derived from an amplifier controller.

14. The system of claim 12, which includes an amplifier controller to generate a reference signal as an input to the operational amplifier, the amplifier controller in turn receiving a signal from a step down voltage sensor that measures the instantaneous grid voltage from the grid supply.

15. The system of claim 14, wherein the amplifier controller can control the direction of the flow of power at the output of the binary bidirectional multilevel inverter, so that by setting the voltage at the input of the amplifier to achieve an output voltage at the output of the binary bidirectional multilevel inverter that is higher than the grid voltage, power can flow from a battery power supply via the binary bidirectional multilevel inverter into the load, and vice versa.

16. The system of any one of claims 6 to 8, wherein each of said plurality of switching arrangements is activated, the sum of each of the voltage levels of each of the activated switching arrangements corresponding to the required, predetermined voltage level.

17. The system of claim 16, wherein the controller determines the highest multiple of two equal to the required predetermined voltage level.

18. The system of claim 17, wherein the controller determines the difference between said highest multiple of two and the predetermined voltage level.

19. The system of claim 18, wherein the difference between said highest multiple of two and the predetermined voltage level is provided as the new required, predetermined voltage level.

20. The system of any one of the preceding claims, wherein eight transformers are provided in combination with eight correspondingly connected switching arrangements.