WO2010096709A2

WO2010096709A2 - Solar chargeable battery for portable devices

Info

Publication number: WO2010096709A2
Application number: PCT/US2010/024810
Authority: WO
Inventors: Peter English; Steven R. Brimmer
Original assignee: Suncore, Inc.
Priority date: 2009-02-19
Filing date: 2010-02-19
Publication date: 2010-08-26
Also published as: WO2010096709A3

Abstract

A solar chargeable battery comprises a built-in photovoltaic array and a programmable battery charging circuit. The photovoltaic array provides a variable power source in response to light. The battery charging circuit receives the variable power source and operates in different modes to charge the battery over a range of lighting conditions. For example, the battery charging circuit charges the battery to a substantially fixed regulated voltage level in a first mode when a voltage level of the variable power source is above a predefined threshold. The battery charging circuit charges the battery to an adjustable regulated voltage level in a second mode when the voltage level of the variable power source is below the predefined threshold.

Description

SOLAR CHARGEABLE BATTERY FOR PORTABLE DEVICES

BACKGROUND Field

[0001] This disclosure relates generally to battery charging circuits and solar chargeable replacement batteries for portable devices. Description of the Related Art

[0002] Portable communication and entertainment devices (e.g., laptop computers, cameras, cell phones, PDAs, GPS units, music player devices, and other handheld devices) typically have battery packs that are recharged through tethered charging systems (e.g., AC adapters or USB interfaces). The tethered charging systems limit mobility and may inconvenience users. Batteries can also be charged using solar energy. For examples, photovoltaic (PV) cells can absorb energy from electromagnetic waves and convert photon energy into electrical energy for charging a battery. However, the PV cells generally cannot provide a continuously stable energy source like the tethered charging systems. That is, the electrical energy from the PV cells fluctuates when lighting conditions change and charging the battery becomes a challenge.

SUMMARY

[0003] In one embodiment, the present invention solves this and other problems by using a battery charging circuit (or charge management circuitry) that continuously manipulates a rate or amount of charge from PV cells based on varying light conditions to charge a battery. For example, the battery charging circuit includes a power regulator configured to receive a variable DC power source at an input terminal and to charge the battery coupled to an output terminal. In some implementations, the power regulator is a DC- DC switching regulator such as a synchronous buck converter. The variable DC power source can be provided by one or more PV cells. In one implementation, the variable DC power source comprises at least two PV cells connected in series.

[0004] The battery charging circuit also includes a controller that monitors or senses the variable DC power source and selectively operates the power regulator in a first mode or a second mode based on a voltage level of the variable DC power source. For example, the controller provides one or more control signals to the power regulator to selectively operate the power regulator in the first mode when the variable DC power source is above a first predefined voltage threshold indicative of relatively bright light conditions and in the second mode when the variable DC power source is below the first predefined voltage threshold indicative of relatively low light conditions. The relatively bright light conditions may occur when the PV cells are exposed to direct sunlight or bright indoor lights. The relatively low light conditions may occur when the PV cells are partially covered, in shadows, or exposed to dim indoor lights.

|0005] The power regulator operates with a predetermined regulated voltage level in the first mode and operates with an adjustable regulated voltage level in the second mode. That is, the power regulator charges the battery to the predetermined regulated voltage level in the first mode and charges the battery to the adjustable regulated voltage level in the second mode. In one application, the battery is a lithium based battery and the predetermined regulated voltage is about 4.2V. In the second mode, the adjustable regulated voltage level tracks the voltage level of the variable DC power source and is approximately equal to the voltage level of the variable DC power source less a predetermined amount. The different modes of operation allow the power regulator to efficiently charge or recharge the battery under various light conditions. The adjustable regulated voltage level also allows the power regulator to continue providing accurate (or well-controlled) voltage regulation and current regulation over a range of lighting conditions.

10006] In one embodiment, the battery charging circuit charges the battery using a constant-current/constant-voltage (CC/CV) algorithm comprising interleaving current regulation phases and voltage regulation phases. The battery charging circuit provides a substantially constant battery charging current during the current regulation phases to increase battery voltage to a desired level. The battery charging circuit provides a decreasing battery charging current during the voltage regulation phases to maintain the desired level of battery voltage. The battery stops charging in the voltage regulation phases when the decreasing battery current reaches a termination current level. In one embodiment, the termination current level is a programmable parameter that is stored in the controller using a standard interface (e.g., I²C interface, JTAG interface). Other battery parameters, such as the predetermined regulated voltage level, are also programmable and similarly stored in the controller using the standard interface.

[0007] In some applications, the substantially constant battery charging current has a predetermined current level when a current level of the variable DC power source is above a predefined current threshold. The substantially constant battery charging current has an adjusted current level that tracks or is approximately equal to the current level of the variable DC power source when the current level of the variable DC power source is below the predefined current threshold. To reduce electromagnetic interference (EMl) in some applications, the substantially constant battery charging current has a stepped rising edge near a beginning of each current regulation phase. For example, the stepped rising edge may comprise a plurality of incremental current steps with programmable step sizes and intervals to implement configurable and controlled rising edges for the battery charging current.

[0008] In one embodiment, the battery charging circuit is part of a solar chargeable replacement battery package for a portable device. The solar chargeable replacement battery package is an encapsulated package having a substantially similar form factor as a standard battery specified by a manufacturer of the portable device. The encapsulated or self-contained package includes a battery placed on a bottom surface, a PV array placed on top of the battery and isolated from the battery by a thermal barrier layer, and a clear protective layer placed on top of the PV array. The clear protective layer fonns a top surface of the encapsulated package. The solar chargeable replacement battery package may be part of a kit that further includes a replacement cover with a central opening. When the solar chargeable replacement battery package is installed in the portable device, the clear protective layer faces outward and is exposed through the central opening of the replacement cover for the portable device such that light can reach the PV array to generate electricity. In one embodiment, the battery charging circuit occupies a portion of the battery layer and electrically interfaces the battery layer to the PV array.

[0009] In some applications directed to mobile communication devices such as cell phones, the battery layer is approximately 3.5mm thick and comprises a lithium-ion or a lithium-polymer battery. The thermal barrier layer comprises a polyimide film with a thickness of approximately 25μm-50μm. The PV array comprises one or more single- junction or multi-junction PV cells having a thickness of approximately 140μm. The clear protective layer has a thickness of approximately 70μm-90μm. Other dimensions are possible to achieve application specific form factors for the solar chargeable replacement battery package.

[0010] In one embodiment, the battery charging circuit includes a status diode electrically coupled between the PV array and a status pin of the power regulator. The status diode is positioned in the encapsulated package to provide a visible light on an outer surface to indicate when the battery is being charged by the PV array. In some implementations, the power regulator and the controller enter a sleep mode when the voltage provided by the PV array is less than a second predefined voltage threshold. The battery is not charged during the sleep mode. In addition, the controller can monitor the battery's temperature and disable the power regulator when the temperature is outside a predetermined temperature range. Similar to other battery parameters, the predetermined temperature range can be a programmable parameter that is stored in the controller using the standard interface. The status diode is dark when the power regulator is inactive (e.g., upon completion of charging the battery, during the sleep mode, or when the power regulator is disabled).

[0011] In one embodiment, the battery charging circuit includes a direction resistor configured for coupling between the battery and a battery terminal of the portable device. The controller monitors the direction resistor for current flow. Current flowing from the portable device to the battery indicates that an external power source (e.g., an AC adapter, a car adapter, or a USB interface) is connected to the portable device and attempting to charge the battery. Current flowing from the battery to the portable device indicates that the portable device is active. In some implementations, the controller disables the power regulator to avoid redundancy or conflict when the external power source (e.g., a substantially fixed DC power source) is available to charge the battery as indicated by the direction resistor. In some applications, the controller also selectively disables the power regulator to reduce EMI when the direction resistor indicates that the portable device (e.g., a cell phone) is active or being used. [0012] For purposes of summarizing the embodiments and the advantages achieved over the prior art, certain items and advantages are described herein. Of course, it is to be understood that not necessarily all such items or advantages may be achieved in accordance with any particular embodiment. Thus, for example, those skilled in the art will recognize that the inventions may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught or suggested herein without necessarily achieving other advantages as may be taught or suggested herein.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] A general architecture that implements the various features of the disclosed systems and methods will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments and not to limit the scope of the disclosure.

[0014] Figure 1 is a block diagram of a solar chargeable battery system in accordance with one embodiment of the present invention.

[0015] Figure 2 is a circuit diagram for one implementation of the solar chargeable battery system.

[0016] Figure 3A illustrates an example communication device with a solar chargeable replacement battery package.

[0017] Figure 3B illustrates one embodiment of a replacement battery kit with a solar chargeable battery for a portable device.

[0018] Figure 4 illustrates a cross-sectional view of one embodiment of the solar chargeable replacement battery package.

[0019] Figure 5 is a graph showing example battery voltages, regulated voltage levels, and charging currents as a function of time.

[0020] Figure 6 is a graph showing example adjustments to a regulated voltage level in response to a variable source voltage.

[0021] Figure 7 is a schematic cross-sectional view of an assembly for a multi- junction PV cell.

[0022] Figure 8A depicts an assembly comprising three subcells. [0023] Figure 8B depicts an assembly comprising four subcells.

[0024] Figure 8C depicts an assembly comprising six subcells. . [0025] Figure 9 is a schematic top-down representation of an example multi- junction PV cell.

[0026] Figure 10 is a schematic representation of an example circuit comprising a multi-junction PV cell.

[0027] Figure 11 is a flow chart showing an example method for current loss compensation in a multi-junction PV cell.

[0028] Throughout the drawings, reference numbers are re-used to indicate correspondence between referenced elements. In addition, the first digit of each reference number indicates the figure in which the element first appears.

DETAILED DESCRIPTION

|0029] The present invention relates to a method and an apparatus for charging a battery using a variable power source such as solar energy or light. While the specification describes several example embodiments of the invention, it should be understood that the invention can be implemented in many ways and is not limited to the particular examples described below or to the particular manner in which any features of such examples are implemented.

[0030] As described above, PV cells can be used to convert solar energy or light into electrical energy for charging a battery. Figure 1 is a block diagram of one embodiment of a solar chargeable battery system 160 comprising a PV array 100 with one or more PV cells 102. 104. The PV array 100 outputs a substantially DC power source at a voltage level and a current level that vary with lighting conditions. For example, the voltage and/or current provided by the PV array 100 varies greatly depending upon the density and the wavelength of available light exposed to the PV cells 102, 104. The solar chargeable battery system 160 includes a programmable charge management circuit comprising a power regulator 1 10 and a microcontroller 120 to efficiently charge a battery 140 from the variable voltage/current DC power source provided by the PV array 100. [0031] The PV cells 102, 104 of the PV array 100 can be single-junction PV cells, multi-junction PV cells, or a combination of both. Particular embodiments of multi-junction PV cells are discussed in further detail below with reference to Figures 7-1 1 and in commonly-owned pending U.S. Application Number 12/389,307 (Attorney Docket No. SNCR.004A), entitled ''Photovoltaic Multi-Junction Wavelength Compensation System and Method," which is hereby incorporated by reference herein in its entirety.

[0032] In one embodiment, the power regulator 110 receives the substantially DC power source from the PV array 100 at an input teπninal and provides a charging current to the battery 140 at an output terminal. The power regulator 1 10 also receives feedback signals from the battery 140 for voltage and/or current regulation. The microcontroller 120 monitors the substantially DC power source from the PV array 100 and provides one or more control signals to the power regulator 1 10. For example, one of the control signals selectively adjusts a regulated voltage level at the output terminal of the power regulator 1 10 in response to voltage variations of the substantially DC power source. The microcontroller 120 may also provide control signals to the PV array 100 to improve PV cell efficiency and reduce variations in the output of the PV array 100 as described below with reference to Figures 7-1 1 and in commonly-owned pending U.S. Application Number 12/389,307 (Attorney Docket No. SNCR.004A).

[0033] In one embodiment, the microcontroller 120 configures the power regulator 110 to operate in different modes to efficiently charge and recharge the battery 140 under different lighting conditions. For example, the power regulator 1 10 is configured to operate in a first mode when the substantially DC power source is above a first predefined voltage threshold indicative of bright light conditions and in a second mode when the substantially DC power source is below the first predefined voltage threshold indicative of dim light conditions. The power regulator 1 10 operates with a predetermined regulated voltage level in the first mode. The power regulator 1 10 operates with a variable regulated voltage level in the second mode. The variable regulated voltage level is less than the predetermined regulated voltage level and allows the power regulator 1 10 to continue charging the battery 140 when available voltage and/or power from the PV array 100 decreases. [0034] In other words, the microcontroller 120 dynamically adjusts the regulated voltage level at the output of the power regulator 1 10 to compensate for vaπations of the substantially DC power source at the output of the PV array 100 In one embodiment, the microcontroller 120 is powered by the battery 140 rather than the PV array 100 such that the microcontroller^'s operations are not affected by fluctuations at the output of the PV array 100 For example, a low drop-out (LDO) regulator 130 may be coupled to the battery 140 to generate a power source at an appropriate level for the microcontroller 120

[0035] By way of example, the battery 140 can be a lithium based battery, such as a lithium-ion battery or a lithium-polymer battery used in many consumer electronic devices or a mobile communication device 150 In one embodiment, the solar chargeable battery system 160 comprising the battery 140, PV array 100, and charge management circuitry are integrated in an encapsulated or self-contained package having a substantially similar form factor as a standard battery package specified by a device manufacturer This allows manufacturers or consumers to easily replace the standard battery package with the solar chargeable battery system 160 and enjoy the many benefits of solar energy In one embodiment, the microcontroller 120 of the charge management circuitry is programmable to allow the manufacturers to configure the solar chargeable battery system 160 for difference devices and applications using a standard programming interface

[0036] Figure 2 is a circuit diagram for one implementation of the solar chargeable battery system 160 By way of example, the embodiment in Figure 2 shows two PV cells 102, 104 connected in seπes to provide a vaπable DC power source having a nominal voltage range of 4 6V-5 OV for charging the battery 140 Less or more PV cells may be employed to generate the vaπable DC power source and other nominal voltage ranges are possible A source sensing resistor (R2) 200 is coupled in series with the PV cells 102, 104 to an input terminal (IN) of a charge regulator 110 In one embodiment, the charge regulator 110 is a switching regulator (or synchronous buck converter) implemented with on-chip switching transistors (e g , field-effect-transistors Pl and Nl) 204, 206 and an off-chip inductor (Ll) 218 coupled to an output terminal (OUT) of the charge regulator 1 10 An output sensing resistor 220 is coupled in seπes with the inductor 218 to a positive terminal of the battery 140. An output capacitor (Cl) 224 is coupled between ground and a common node connecting the inductor 218 and the output sensing resistor 220.

[0037] The charge regulator 1 10 includes a pulse-width-modulation (PWM) circuit 208 and a feedback circuit 210. The feedback circuit 210 receives one or more feedback signals (e.g., FBI and FB2) indicative of a charge current provided to the battery 140 and/or a battery voltage at the positive terminal of the battery 140. The feedback circuit 210 outputs one or more control signals to the PWM circuit 208 which generates driving signals for the switching transistors 204, 206 to regulate the charge current and/or the battery voltage. The feedback circuit 210 can be programmed to run different charging algorithms (e.g., CC/CV or chemical polarization) with programmable charge current profiles and voltage regulation levels. In one embodiment, the battery 140 is a lithium based battery for a mobile communication device 150 and the voltage regulation level is about 4.2V. The functions of the charge regulator 1 10 can be implemented with a programmable chip such as Texas Instruments bq24150.

[0038] In one embodiment, the charge regulator 110 further includes a state machine 212 configured to selectively operate the charge regulator 1 10 in different modes. For example, a microcontroller 120 monitors the variable DC power source and provides one or more control signals/commands to the charge regulator 1 10 to control the operating modes and operating parameters. The control signals/commands may be communicated to the charge regulator 1 10 directly via dedicated pins or through a standard interface such as an I²C interface. As described above, the microcontroller 120 monitors a voltage level (V PV) of the variable DC power source to selectively operate the charge regulator 1 10 in a first mode with a substantially fixed regulated voltage when the variable DC power source is above a first predefined voltage threshold and in a second mode with an adjustable regulated voltage when the variable DC power source is below the first predefined voltage threshold.

[0039] In one embodiment, the microcontroller 120 also monitors a current level (I PV) of the variable DC power source using the source sensing resistor 200. The microcontroller 120 uses a maximum power point tracking (MPPT) algorithm 214 to generate a duty-cycle control signal (Power PV) to the PWM circuit 208 to further improve operating efficiency. The microcontroller 120 optionally inhibits or temporarily suspends operations of the charge regulator 1 10 when the variable DC power source provides relatively low power (e.g., based on detection of a predefined low current level or a predefined low voltage level).

[0040] The microcontroller 120 is powered by the battery 140 for reliable operations. Batteries typically have built-in protection for depleted batteries and have a minimum battery voltage (e.g., 2.7V). A LDO regulator 130 operates within a voltage range including the minimum battery voltage to reliably generate power (Vcc or about 1.8V) for the microcontroller 120. In one embodiment, the solar chargeable battery system including the microcontroller 120 enter a quiescent mode (or sleep mode) when the variable DC power source is not present or at a low level to prevent draining of the battery 140. In one application for charging lithium based batteries, the microcontroller 120 enters the sleep mode when the voltage level of the variable DC power source is less than the battery voltage. The microcontroller 120 continues to monitor the variable DC power source during the sleep mode but other functions are turned off to reduce power consumption.

[0041] In addition to monitoring the variable DC power source, the microcontroller 120 is configured to monitor other parameters (e.g., battery voltage and battery temperature) that affect charging operations. For example, the microcontroller 120 samples the battery temperature (Thermistor) and terminates charging operations if the battery temperature is outside a programmable temperature range (e.g., 0°C-40°C) deemed unsafe for charging. The microcontroller 120 is optionally configured to monitor the positive terminal of the battery 140 to perform battery chemistry analysis. In one embodiment, the microcontroller 120 is implemented by digital circuits and include one or more analog-to- digital converters (ADCs) to convert analog samples of the various parameters (e.g., I PV, V PV, VJBattery, V Direction, Thermistor) into digital signals for further processing.

[0042] As mentioned above, the solar chargeable battery system can be embodied as a replacement battery package for portable devices such as a cell phone 150. A small sensing resistor (RlO) 222 is coupled between the positive terminal of the battery 140 and a battery terminal of the cell phone 150 to detect current flow between the cell phone 150 and the battery 140. The microcontroller 120 monitors the voltage across the small sensing resistor (or direction resistor) 222 to determine the direction of the current flow. When the voltage (V Direction) at the battery terminal of the cell phone 150 is higher than the voltage (V-Battery) at the positive terminal of the battery 140, an internal charger of the cell phone 150 is connected to an external power source (e.g., a wall adapter, a car charger or a USB port) and attempting to charge the battery 140 from a fixed voltage source. In this circumstance, the microcontroller 120 disables the power regulator 110 to avoid conflict or redundancy. Thus, the solar chargeable battery system does not impact the battery charging circuits that are already designed into the cell phone 150. As a replacement battery package, the solar chargeable battery system's interface to the cell phone 150 is simple and does not violate any of the cell phone^'s internal circuit functions.

[0043] In one embodiment, the small sensing resistor 222 is also used to detect when the cell phone 150 is active (or being used). For example, current flows from the battery 140 to the active cell phone 150. The voltage at the battery terminal of the cell phone 150 would be lower than the voltage at the positive terminal of the battery 140. Thus, the voltage across the small sensing resistor 222 has one polarity when the cell phone 150 is connected to an external source for charging the battery 140 and an opposite polarity when the cell phone 150 is active. In some applications, the microcontroller 120 disables the power regulator 110 when the voltage polarity of the small sensing resistor 222 indicates activity by the cell phone 150. As mentioned above, the power regulator 110 can be implemented as a switching regulator. If the cell phone 150 is susceptible to EMI, it may be beneficial to temporarily turn off the power regulator 1 10 to reduce EMI while the cell phone 150 is being used.

[0044] In one embodiment, the solar chargeable battery system includes a charging status diode 202 coupled between the input terminal and a status terminal (STAT) of the power regulator 1 10. The charging status diode 202 is a light emitting diode that lights up to indicate the battery 140 is being charged by the variable DC power source provided by the PV cells 102, 104. The charging status diode 202 is dark when the power regulator 1 10 is disabled or otherwise inactive. Additional status indicators can be included as desired for the various charging conditions discussed above.

[0045] The solar chargeable battery system is highly adaptable and can be easily configured to implement application specific requirements. For example, the microcontroller 120 has a standard interface (e.g., I²C interface, JTAG interface) for defining parameters such as the battery temperature range, battery regulation voltages, charging current levels, charging termination thresholds, and the like. In one embodiment, the parameter definitions are specified by the manufacturer and stored in flash memory (e.g., EPROM) 216 of the microcontroller 120 for reference during operations.

[0046] Figure 3A illustrates an example communication device 300 with a solar chargeable replacement battery package 302. The solar chargeable replacement battery package 302 is a plug in replacement of a standard battery package for the communication device 300. That is, the solar chargeable replacement battery package 302 has a substantially similar form factor as the standard battery package specified by a manufacturer of the communication device 300. Thus, the overall dimensions of the communication device 300 do not change, but the solar chargeable replacement battery package 302 has an added flexibility of being chargeable by light. In some applications, a cover for the communication device 300 may be modified to ensure exposure of the PV cells 102, 104 to light. In addition, the cover may be modified to accommodate an opening 304 to view the charging status diode 202.

|0047] Figure 3B illustrates one embodiment of a replacement battery kit with a solar chargeable battery 308 for a portable device 312. The replacement battery kit also includes a replacement cover 306. The replacement cover 306 has substantially similar outer dimensions as a standard cover specified by a manufacturer for the portable device 312 and an opening to expose PV cells of the solar chargeable battery 308 after installation in the portable device 312. For example, the replacement cover 306 can have a frame-like structure with a central opening. The solar chargeable battery 308 has substantially similar dimensions as a standard battery and includes similar electrical contacts (e.g., positive and negative battery terminals, a temperature sensing terminal) 310a, 310b, 310c to interface the portable device 312. Although not shown in Figure 3B, the solar chargeable battery 308 can include a status diode in some applications and the replacement cover 306 can include a small opening for viewing the status diode.

[0048] Figure 4 illustrates a simplified cross-sectional view of one embodiment of a solar chargeable replacement battery package. The solar chargeable replacement battery package is a self-contained package comprising a battery layer 400, a PV array 404, and charge management circuitry 408. In one embodiment, an encapsulating epoxy potting compound 410 defines bottom and side surfaces of the solar chargeable replacement battery package. The battery layer 400 is placed inside the bottom surface. The PV array 404 is placed on top of the battery layer 400 and isolated from the battery layer 400 by a thermal barrier layer 402. The thermal barrier layer 402 provides thermal isolation between the battery layer 400 and the PV array 404 such that solar heat is not conducted to the battery layer 400 and battery heat is not conducted to the PV array 404. A protective layer 406 is placed on top of the PV array 404. The protective layer 406 is optically transparent (e.g., clear) to allow both visible and invisible light to reach the PV array 404 for converting into electrical energy. The protective layer 406 defines a top surface of the solar chargeable replacement battery package and combines with the encapsulating epoxy potting compound 410 to enclose the battery layer 400, the PV array 404. and the charge management circuitry 408.

|0049] The charge management circuitry 408 interfaces with the PV array 404 and charges the battery layer 400 from a variable DC power source provided by the PV array 404. In one embodiment, the charge management circuitry 408 occupies a portion of the battery layer 400. In some applications incorporating a status diode, a portion the charge management circuitry 408 may extend into the PV array 404 such that the status diode is viewable from the top surface. In some applications directed to mobile communication devices such as cell phones, the battery layer 400 is approximately 3.5mm thick and comprises a lithium-ion or a lithium-polymer battery. The thermal barrier layer 402 comprises a polyimide film with a thickness of approximately 25μm-50μm to provide thermal insulation of up to 75O⁰F. The PV array 404 comprises one or more single-junction or multi-junction PV cells having a thickness of approximately 140μm. The protective layer 406 has a thickness of approximately 60μm -lOOμm, preferably 70μm-90μm, and about 80μm to provide impact resistance for the PV array 404. Other dimensions are possible to achieve application specific form factors for the solar chargeable replacement battery package. [0050] Figure 5 is a graph showing example battery voltages, regulated voltage levels, and charging currents as a function of time when the power regulator 1 10 of the solar chargeable battery system is charging the battery 140 using a CC/CV algorithm. A graph 500 shows the regulated voltage levels (V_REG) as a function of time. A graph 502 shows the battery voltages (Vβ_aπ) as a function of time. A graph 504 shows a first example charging current (I_CHA_RGEI) as a function of time. Finally, a graph 506 shows a second example charging current (I<Γ_HARGE2) as a function of time.

[0051] As discussed above, the solar chargeable battery system operates with a substantially fixed regulated voltage level in a first mode and an adjustable regulated voltage level in a second mode. In the example shown in Figure 5, the solar chargeable battery system is operating in the first mode during times to-t₂ and tg-t^ and in the second mode during time t3-tg. The regulated voltage levels shown in the graph 500 is substantially fixed (e.g., about 4.2V) in the first mode and varies (e.g.. changes with time below 4.2V) in the second mode. The battery voltages shown in the graph 502 fluctuate between the regulated voltage levels and a battery recharge threshold. In one embodiment, the battery recharge threshold changes with the regulated voltage levels and is approximately 100mV-150mV (or about 12OmV) below the regulated voltage levels.

[0052] The CC/CV algorithm includes interleaving current regulation phases and voltage regulation phases. The power regulator 1 10 charges the battery 140 with a substantially constant battery charging current during the current regulation phases and a decreasing battery charging current during the voltage regulation phases. Referring to the graph 504, the current regulation phases occur during times t_rt₂. t₄-t₅, Vt₈, and tio-tu while the voltage regulation phases occur during times t₂-t₃, t<s-t₆, t₈-t₉, and t] i-t^.

[0053] A current regulation phase is triggered (or started) when the level of the battery voltage reaches the battery recharge threshold (e.g.. at times t], U, h, and t₎₀). The level of the battery voltage increases (e.g., linearly) with time while the battery 140 is charged with the substantially constant battery charging current during the current regulation phase. In one embodiment, the level of the substantially constant battery charging current is programmable (e.g., by the manufacturer). In some applications for the lithium based batteries, the level of the substantially constant battery charging current is about 20OmA. In some implementations, the microcontroller 120 monitors the variable DC power source provided by the PV array 100 and reduces the level of the substantially constant battery charging current when the current level of the variable DC power source is less than a predefined current threshold (e.g., during time t₎₀-ti i). The current regulation phase ends (or stops) when the level of the battery voltage reaches the level of the regulated voltage (e.g., at times t₂, t₅, t₈, and tn).

[0054] A voltage regulation phase follows each current regulation phase. The charging current decreases during the voltage regulation phase to maintain the battery voltage at approximately the regulated voltage level. The voltage regulation phase ends when the charging current reaches a predetermined teπnination level (e.g., at times t₃, t₆, tg, and ti₂). In one embodiment, the predetermined termination level is programmable (e.g., between 8mA- 64mA in predefined steps of 8mA) and defined by the manufacturer for each specific device. After the voltage regulation phase ends, the power regulator 1 10 enters an idle phase in which no charge current is provided to the battery 140 and the battery voltage decreases at a rate that is dependent on usage of the mobile device 150. When the battery voltage reaches the battery recharge threshold, the power regulator 1 10 starts another current regulation phase.

[0055] The second example charging current (I_CHARGE2) shown in the graph 506 is substantially similar to the first example charging current (I_{CHARGE I}) shown in the graph 504, except the second example charging current includes a soft-start transition at the beginning of each current regulation phase. A graph 508 shows an expanded view of the soft-start transition between time tj-t] '. The soft-start transition is a stepped rising edge comprising a plurality of incremental current steps. In one embodiment, the step sizes (ΔI) and intervals (Δt) are programmable and controlled by the microcontroller 120. The soft-start transition helps to reduce EMI.

[0056] Figure 6 is a graph showing example adjustments to a regulated voltage level in response to a variable source voltage. A graph 600 shows the variable source voltage (Vpv) as a function of time. A graph 604 shows the regulated voltage level (VRE_G) as a function of time. As discussed above, the microcontroller 120 monitors the variable source voltage provided by the PV array 100 and selectively adjusts the regulated voltage level of the power regulator 1 10 with reference to a predefined voltage threshold (V_TH) 602. In one embodiment, the microcontroller 120 is a digital circuit and adjusts the regulated voltage level in discrete steps. If desired, additional filtering can be used to smooth the discrete steps and make the graph 604 appear more like the graph 500 in Figure 5.

[0057] Ln the example shown in Figure 6, the microcontroller 120 samples the variable source voltage at each of the marked times. At times to-t3 and ti₅-t]₇, each sample of the variable source voltage is above the predefined voltage threshold (e.g., 4.45V) and the power regulator 110 operates in the first mode with a substantially fixed regulated voltage level (e.g., 4.2V). Between times t₄ and tπ, each sample of the variable source voltage is below the predefined voltage threshold and the power regulator 1 10 operates in the second mode with an adjustable regulated voltage level that tracks the variable source voltage. For example, the adjustable regulation voltage level is approximately equal to the sampled level of the variable source voltage less a predetermined amount (e.g., about 25OmV). The predetermined amount is programmable by the manufacturer for specific devices or applications.

[0058] In the example shown in Figure 6, the microcontroller 120 uses hysteresis in the second mode and the adjustable regulation voltage level is not updated when a subsequent sample of the variable source voltage is within the hysteresis (e.g., +/- ΔV_Hγs). For example, samples of the variable source voltage at times t₇ and tg are within the hysteresis of the sample taken at time t₆, and the adjustable regulated voltage level stays at the level set at time t₆. Similarly, the sample of the variable source voltage at time tπ is within the hysteresis of the sample taken at time tio, and the adjustable regulated voltage level is not updated. The hysteresis helps to reduce unnecessary updates to the adjustable regulation voltage level and thus reduce system noise that may produce EMI in sensitive applications such as cell phones. In one embodiment, the hysteresis level is programmable and is about +/- 3OmV in some applications.

[0059] Figures 7-1 1 describe assemblies, circuits, and methods of multi-junction PV cells which can be used in various embodiments described above. The use of direct electrical contact with the interconnect layers in a PV cell can improve cell efficiency over variable lighting conditions. Electrical contact with each interconnect layer can advantageously permit disconnection of subcells operating at low current or voltage. The result is multi-junction PV cells that can adapt to variable lighting conditions and compensate for a decrease in current in certain subcells, thereby advantageously improving the PV cell^'s total output current.

[0060] Reference is first made to FIG. 7. which illustrates a schematic cross- sectional view of an assembly 700 for a multi-junction PV cell. In general, an assembly comprises a plurality of subcells configured in a stack. An interconnect layer is disposed between at least two of the plurality of subcells. Vias are used to provide communication between interconnect layers and an assembly surface.

[0061] The example assembly 700 comprises two outward-facing surfaces, a light-facing surface 701 and a substrate-facing surface 703. The example assembly 700 comprises three subcells, designated in this example as bottom subcell 705 (comprising substrate-facing surface 703), middle subcell 709, and top subcell 713 (comprising light- facing surface 701). The subcells are configured in a stack and disposed on an optional substrate 715. A first interconnect layer 707 is disposed between bottom subcell 705 and middle subcell 709. A second interconnect layer 711 is disposed between the middle subcell 709 and top subcell 713.

[0062] The substrate 715 can be provided to support the stack of subcells 705, 709, 713. A wide variety of suitable substrate materials are known in the art and include glass, polymers, metal foil, semiconductor materials, e.g., Ge or GaAs wafers, and combinations thereof. A substrate can optionally include additional layers such as an ohmic contact between the stack and the substrate, anti-reflective coating layer, and the like, as are known in the art.

[0063] As used henceforth, a subcell (represented in FIG. 7 as bottom subcell 705, middle subcell 709, and top subcell 713) is a layer that produces a current output when exposed to certain wavelengths of the electromagnetic spectrum. A subcell comprises an oppositely doped base region and emitter region and a p-n or n-p junction between the regions. An assembly can comprise two, and more preferably, three, four, five, six, or more subcells.

[0064] Various subcell configurations are suitable for use in the disclosed embodiments. The p-n or n-p junction can be a homojunction. A homojunction is a junction between a p-type doped region and an n-type doped region, wherein the same semiconductor mateπal having the same characteristic band gap is found on both sides of the junction The p-n or n-p junction can be a heterojunction A heteroj unction is a junction between a p-type doped region and an n-type doped region, wherein different semiconductor mateπals having different characteristic band gaps are found on both sides of the junction In certain embodiments, a subcell further comprises a front and/or back window, back surface field (BSF), buffer/nucleation layer, or other regions as are known in the art

[0065] A variety of semiconductor matenals are suitable for use in subcells In certain embodiments, a subcell comprises one or more of C, Si, S, Ge, In, Ga, Al, N, P, Se, and As For example, suitable semiconductor mateπals include, but are not limited to, Si (crystalline and amorphous), carbon (e g , diamond and diamond-like amorphous carbon), InP, InGaAsP, SiGe, GaAs. AlInP₂, GaInP₂, AlGaAs, CIS (copper mdium selemde), CGS (copper gallium selemde), CIGS (copper indium gallium selemde), and CIGSS (copper indium gallium sulfur selemde) As explained above, the semiconductor mateπals preferably can be selected to absorb a specific range of photon energies over the entire light spectrum Example subcell configurations with suitable semiconductor mateπals (along with their characteπstic band gap energies) for three-, four-, and six-subcell configurations are shown in FIG. 8A, FIG. 8B, and FIG. 8C, respectively Other configurations, of course, are suitable for use in the embodiments disclosed herein

[0066] An interconnect layer (represented in FIG. 7 as first interconnect layer 707 and second interconnect layer 711) can be configured to aid the flow of electrons between two subcells In certain embodiments, the interconnect layer comprises an ohmic interconnect, that is, an inteiconnect configured to aid the flow of current The interconnect layer can permit current to pass between two subcells, without generating a large voltage drop Preferably, the interconnect layer is thin and is characterized by a low resistivity An example of a suitable ohmic interconnect is a tunnel junction Suitable tunnel junctions include tunnel transistors and tunnel diodes A tunnel junction can include one or more optional BSF layers, as is known in the art In preferred embodiments the interconnect layer includes a tunnel diode compπsmg one or more oppositely doped semiconductor matenals The semiconductor mateπal can be selected to be non-absorbing to light energy intended for lower subcells. Suitable interconnect layer materials are known in the art and include, but are not limited to, GaAs, InGaP, InGaAs, AlGaAs, etc. An interconnect layer need not be provided between each subcell.

[0067] Vias are holes configured to provide communication between interconnect layers and an assembly surface. Referring again to FIG. 7, the example assembly 700 comprises two vias (a first via 717 and a second via 719). The first via 717 provides communication between the first interconnect 707 and the light-facing surface 701 of the assembly 700. The second via 719 provides communication between the second interconnect 711 and the light-facing surface 701 of the assembly 700. A via is preferably, but need not be, provided for each interconnect layer.

[0068] In various embodiments, a via can comprise an optional electrically conductive fill. In FIG. 7, a first conductive fill 721 fills the first via 717, and a second conductive fill 723 fills the second via 719. Preferably, the electrically conductive fill comprises a metal. Examples of suitable metals include Al, Cu, and Au. However, other conductive metals, conductive non-metals, and combinations thereof are also suitable for use.

[0069] A dielectric material optionally can be disposed on the walls of one or more of the vias. In FIG. 7, a first dielectric 725 is disposed on the walls of the first via 717, and a second dielectric 727 is disposed on the walls of the second via 719. A dielectric material advantageously can insulate an electrically conductive fill from the subcells. Preferably, the dielectric material comprises SiO₂. However, various low-K and high-K non- SiO₂ dielectrics are also suitable for use herein.

[0070] The assembly 700 can optionally be configured with a front contact 729. The front contact 729 is configured to collect electrons from the assembly 700 through the top subcell 713. As explained above, the top subcell 713 is exposed to a source of electromagnetic radiation, such as sunlight. Photons travel through the top subcell 713 and toward the lower cells, namely, middle subcell 709 and bottom subcell 705. When the energy of an incident photon is greater than or equal to a subcell^'s characteristic band gap, the photon is absorbed by the subcell to create an electron-hole pair. The freed electron travels toward the front contact 729, which is configured to remove the electrons for use in an external circuit. Suitable front contacts are known in the art and comprise a conductive material, such as a metal. A variety of metals can be used, such as metals comprising Al, Au, Ag, Cu, and Zn. A front contact can further comprise a semiconductor material such as GaAs or the like and/or an anti-reflective coating layer. The front contact 729 can be configured in a comb or grid pattern on the light-facing surface 701 of the top subcell 713, as described in more detail below.

[0071] In certain embodiments, an assembly can comprise additional layers, which are not shown in FIG. 7. For example, the light-facing surface 703 of the top subcell 713 can be treated with an anti -reflective coating layer, a passivation layer, and/or other treatments to improve assembly performance.

[0072] A variety of manufacturing techniques are suitable for constructing an assembly 100 for a multi-junction PV cell, as shown in FIG. 7. For example, the subcells and interconnect layers can be deposited using suitable deposition techniques known in the art. Vias can be opened through the subcells and interconnect layers using a variety of suitable semiconductor manufacturing techniques. For example, to fonn second via 719 to second interconnect layer 111, a negative photoresist can be spun over top subcell 713. The photoresist can be exposed to light, thereby patterning circles in the photoresist. The photoresist can be subsequently developed to remove the exposed circles, forming holes in the photoresist. A suitable selective wet or dry etch can be used to remove the top subcell 713 material below the holes. For example, a reactive ion etch that is selective to the top subcell 713 material and that does not substantially react with second interconnect layer 711 can be used to form second via 719 to the second interconnect layer 711. Suitable etch stops as known in the art can also be used to protect the interconnect layer as needed. Second dielectric layer 727 (described above) can be subsequently deposited into the resulting via using suitable techniques such as atomic layer deposition, sputtering, vapor deposition, and the like. Electrodeposition or electroless metallization processes can be used to fill second via 719 to form second conductive fill 723. The remaining photoresist can be removed by a suitable clean process.

[0073] Reference is next made to FIG. 9, which illustrates a schematic top-down representation of an example multi-junction PV cell. In general, the PV cell shown in FIG. 8 comprises the assembly of FIG. 7 as described above, and also a front contact 729 to the top subcell 713, a back contact (not shown) to the substrate (not shown), and conductive connectors 901, 903 configured to connect with the vias.

[0074] A back contact (not shown) is configured to provide an electrical connection to the substrate (not shown). As explained above, photons travel through the top subcell 713 and toward the lower cells. When the energy of an incident photon is greater than or equal to a subcell's characteristic band gap, the photon is absorbed by the subcell to create an electron-hole pair. The freed electrons travel toward the front contact 729, while the electron holes travel toward the back contact (not shown), which can contribute to a current flow to a load outside the PV cell. Suitable back contacts are known in the art and can comprise a conductive material, such as a metal. A variety of metals can be used, such as metals comprising Al, Ag, Au, Cu, and Mo. The back contact can be configured as a solid metal sheet or film disposed on the bottom surface of the substrate. However, other configurations for the back contact 729 are suitable.

(0075] The operation and structure of the front contact 729 was explained above in conjunction with FIG. 7. Because the front contact 729 is disposed on the light-facing surface 701 of the top subcell 713, the front contact 729 can block incoming sunlight from entering the PV cell 900. Configuring the front contact 729 in a comb or grid formation (as shown in FIG. 9) can advantageously provide improved PV cell performance. The comb or grid formation can provide a sufficient surface area for the front contact 729 to facilitate collecting of a large number of electrons. At the same time, the formation limits the surface area of the top subcell 713 that is blocked from incoming sunlight. While a comb or grid formation can provide desirable PV cell performance, other configurations for the front contact 129 are also suitable.

[0076] As shown in FIG. 9, a plurality of vias can be provided between various interconnect layers and an outer surface of a PV cell. As explained with reference to FIG. 7, first via 717 provides communication between the first interconnect 707 and the light-facing surface 701 of the assembly 700. Referring now to FIG. 9, a plurality of first via 717 can be used to provide communication from the light-facing surface 701 to the first interconnect layer (not shown). Likewise, a plurality of second via 719 can be used to provide communication from the light-facing surface 701 to the second interconnect layer (not shown). In certain embodiments, however, a single via can be used to provide communication to an interconnect layer.

[0077] A conductive connector, as used herein, is a conductive structure configured to electrically connect to an electrically conductive fill in at least one via. In the example of FIG. 9, first conductive fills (not shown) in the plurality of first via 717 are electrically connected by first conductive connector 901. Likewise, second conductive fills (not shown) in the plurality of second via 719 are electrically connected by second conductive structure 903. Suitable conductive connectors are similar to those described above with regard to front contact 729. Preferably, a conductive connector comprises at least one conductive metal, such as Al, Au, Ag, Cu, Zn, etc. Other conductive metals and non-metals are also suitable for use. As explained above with reference to front contact 729, the interconnect structures advantageously can be configured in a comb or grid pattern on the light-facing surface 701 of the top subcell 713, as shown in FIG. 9.

|0078] Reference is now made to FIG. 10, which illustrates an example circuit 1000. The circuit comprises a multi-junction PV cell 1001 and a microcontroller 1003 comprising a state machine 1005. The state machine 1005 can be configured for transitioning the circuit between an operational mode and a test mode. During the operational mode, the PV cell 1001 energizes a load 1007. During the test mode, the PV cell 1001 is tested for weak subcells and certain subcells are shorted as needed to improve the PV cell 1001 output current or voltage.

[0079] When the circuit functions in operational mode, PV operational switch 1009 is closed and PV testing switch 1011 switch is open. As used herein, a switch refers to an electro-mechanical or semiconductor switch configured to make or break an electric circuit, such as a switching transistor or other solid state switch. In operational mode, the multi-junction PV cell 1001 generates an output current for energizing a load 1007, such as a maximum power-point tracker (MPPT) used in conjunction with a battery or powering a mobile communication device, as described below. The load 1007 could also be, for example, a cellular phone battery without a MPPT or a solar farm. In some embodiments, the circuit functions in operational mode for a predetermined time period T2. [0080] After time period T2 elapses, state machine 1005 generates instructions configured to transition the circuit from operational mode to test mode. When the circuit functions in test mode, PV testing switch 1011 is closed and PV operational switch 1009 is opened, thus disconnecting the load 1007. The microcontroller can subsequently execute a testing sequence configured to test each subcell for current or voltage output.

[0081] In some embodiments, the testing sequence begins with all subcells shorted except for top subcell 1013. In the example embodiment of FIG. 10, first cell switch 1015 is opened and second cell switch 1021, N-lth cell switch 1029, and Nth cell switch 1035 are closed. The lower layers (e.g., second subcell 1019, N-lth subcell 1027, and Nth subcell 1033) are consequently short-circuited, and the first interconnect layer 1017 is effectively electrically connected to the back contact. Preferably, the cell switches are field effect transistors (FETs), such as positive channel field effect transistors (PFETs), which can desirably be used for to test for weak junctions and also short certain subcells as described in more detail below.

[0082] The current output generated by the top subcell 1013 is measured. For example, the microcontroller 1003 can sample the resistor's 1037 voltage using an analog-to- digital converter 1039, which indicates the current generated by the top subcell 1013 γ according to the formula z = — . The microcontroller can store the resulting current value in

R memory.

[0083] The testing sequence then repeats the above-described process for the second subcell 1019 in the PV cell 1001. In the example embodiment of FIG. 10, the first cell switch 1015 is closed (short circuiting the top subcell 1013) and the second cell switch 1021 is opened. N-lth cell switch 1029 and Nth cell switch 1035 remain closed, short circuiting the lower layers (e.g., N-lth subcell 1027 and Nth subcell 1033). Thus, first interconnect 1017 is effectively electrically connected to the front contact, while second interconnect 1023 is effectively electrically connected to the back contact. The current output generated by the next cell is measured, as described above. The testing sequence proceeds by sequentially unshorting each subcell independently, with all other subcells shorted. [0084] To accomplish the sequential unshorting and shorting, the cell switches can be desirably used in conjunction with a shift/register 1041 and memory 1043. Of course, other techniques are also suitable. The shift/register 1041 can comprise an array of bits. In some embodiments, each bit in the shift/register 1041 can drive one of the transistors or other cell switches. During the testing mode, for example, one bit can be set to logic zero by supplying no voltage to the bit. A logic zero setting can correspond to a closed (or shorted) position for an associated PFET (e.g., first cell switch 1015). Concurrently, the other bits are set to logic one, for example, by supplying a discrete voltage (e.g., 1 V, 5 V, etc.) to the bits. A logic one setting can correspond to an open (or unshorted) position for the associated PFET (e.g., second cell switch 1021, N-lth cell switch 1029, and Nth cell switch 1035). For simplicity, the above-described register memory configuration may be denoted by the following short-hand representation: [0,1,1,1, . . .].

[0085] After the current or voltage for the desired subcell is sampled, the current or voltage can be stored in memory 1043, and a binary clock shifts the bits in the shift/register 1041. Consequently, using the above short-hand representation, the shift/register 1041 after one shift may be denoted as [1,0,1,1, . . .], after two shifts as [1,1,0,1 , . . .]. after three shifts as [1 ,1 ,1,0, . . . ], and so forth. This shifting process can proceed to sample the desired number of subcells.

[0086] In the example of FIG. 10, the weak subcells are identified in N steps. However, alternative embodiments comprising more or fewer steps can be used. Moreover, the testing process need not proceed in the series fashion described in the above example. Cells and combinations of cells can be tested in any practicable sequence.

[0087] After measuring the current or voltage generated by each subcell, the microcontroller subsequently loads the shift/register 1041 (or other suitable component) to short the identified weak subcell or subcells (e.g., [0,1 ,0,1 , . . .]). As an example, the cell switches corresponding to the weak subcells can be closed, while the cell switches corresponding to the strong subcells can be opened.

[0088] A wide variety of thresholds are suitable for deciding whether to short a layer. In some embodiments, the threshold can be based on the total output current of the PV cell (ipv). As an example, prior to shorting any subcells, ipy can be evaluated. As discussed above, the output current will be limited by the weakest subcell. Consequently, the microcontroller can short any subcells having an output current (Zs,) equal to ipy. This threshold may also be based on a difference from i_PV (Δ), e.g., do not short if is, ≥ ipv + Δ, or based on a factor or ratio (F) from ipy, e.g., do not short if is, ≥ Fi _PV. The threshold can also be based on the previous output current of the PV cell, regardless of whether layers have been shorted. For example, if the current of a subcell is less than the previous output current of the PV cell, the the subcell can be shorted. In some embodiments, the microcontroller can incorporate voltage loss in the decision whether to short a subcell. For instance, if the voltage losses from shorting a subcell are unacceptably high to justify the gain in current, then the cell will not be shorted.

[0089] The test period ends at a time period designated here as Tl . Tl need not be a predetermined time period and can be equal to the time needed to test each subcell and short the subcells determined to be weak.

|0090] After time period Tl elapses, state machine 1005 generates instructions configured to transition the circuit from test mode to operational mode by opening testing switch 1011 and closing operational switch 1013. Because the current-limiting weak subcells have been shorted out, the PV cell^'s 1001 output current is consequently increased. Shorting of subcells can cause a reduction in the output voltage, which can be recovered by using an optional boost synchronous converter 1043 or other suitable voltage-increasing mechanism.

[0091] The above-described method for compensating current loss can be implemented in the solar chargeable battery system of FIGS. 1 or 2. For example, the circuit 1000 can be included in the solar chargeable battery system of FIG. 1 by replacing, for example, the PV cell 102 with the PV cell 1001 and by adding the switches 1009, 1011, 1015, 1021, 1029, 1035 and resistor 1037 to the PV array 100. Additionally, the microcontroller 120 can be configured to sample the resistor^'s 1037 voltage, open or close the switches 1009, 1011, 1015, 1021, 1029, 1035, and to implement the functionality of the microcontroller 1003 described above. The switch 1009 can be configured to directly provide a current from the PV cell 1001 to the power regulator 110, or optionally, the boost converter 1043 can be included to provide the current from the PV cell 1001 to the power regulator 110 at an increased voltage. The microcontroller 120 can be configured to switch from a test mode to an operational mode in order to selectively charge the battery 140 or to compensate for current loss in the PV cell 1001.

[0092] The above-described method for compensating for current loss in a multi- junction PV cell is shown as a flowchart in FIG. 11. As shown in Block 1101, for time period T2, the circuit operates in operational mode, in which the operational switch is closed and the test switch is open. A timer or other suitable decision function checks whether T2 has elapsed, as shown in Block 1103. If time period T2 has not yet elapsed, the circuit continues operating in operational mode. If time period T2 has elapsed, the circuit transitions to test mode by opening the operational switch and closing the test switch, as shown in Block 1105. A counter variable s is initialized by setting 5 = 1.

[0093] As shown in Block 1107, the test mode begins with all subcells shorted except subcell 1, for example, the top subcell. In Block 1109, the current output generated by subcell 1 is measured and recorded. A decision processor checks whether the counter variable s is equal to the total number of subcells (N), as shown in Block 1111. This process determines whether all subcells have been shorted and measured. If the counter variable s is not equal to Ν, then the counter variable is incremented by 1 , and the above-described method of shorting and measuring is repeated for subcell s = s + 1. However, if counter variable s is equal to the total number of subcells N, then all weak subcells are shorted and the circuit transitions from test mode to operational mode.

[0094] The operational period T2 is preferably much longer than the test period Tl . In some embodiments, the operational time period T2 (on the order of seconds, minutes, or hours) can be selected depending upon the PV cell's 1001 intended environment. For example, if the PV cell 1001 is intended to operate in a cellular phone, the lighting conditions may change rapidly as the user walks in and out of buildings or moves the phone^'s position. Consequently, a shorter operational period T2 and more frequent testing period Tl may be desirable. As another example, if the PV cell is intended to operate in a solar array in the southwestern United States, T2 may be configured to operate with a longer operational mode, on the order of several hours. In some embodiments, T2 can increase or decrease over the course of a day (e.g., longer T2 between the hours of 10 a.m. and 2 p.m. and shorter T2 during the remaining daylight hours). A computational processor (not shown) can optionally adjust T2 based upon the prior sampling results. For example, T2 can be increased if the sampling results have been substantially stable over a certain number of (e.g., 3 or 4) Tl testing periods. Conversely, T2 can be decreased if prior sampling results indicate variable lighting conditions.

[0095] There is a loss of efficiency due to the surface area of the PV cells used for metal vias and due to the Tl sampling period, where no current is passed to the load. However, if one junction of a multi-junction cell loses its wavelength, then PV cell efficiency drops dramatically, as that weak junction determines the overall current. It has been found that the efficiency loss due to surface area reduction and Tl testing is small compared to the efficiency loss for failing to compensate for variable lighting conditions.

[0096] The disclosed embodiments can improve the performance of an MPPT connected to a PV circuit. Wavelength fluctuations in a non-compensated PV cell cause extra work for a MPPT. An MPPT is a high efficiency DC to DC converter that can be used as an electrical load in PV cells. A PV cell has an exponential relationship between current

V and voltage, and the maximum power point (MPP) occurs where the resistance — is equal to i dV the negative of the differentia] resistance, . An MPPT uses a control circuit or logic to di search for this point and thus to allow the converter circuit to extract the maximum power available from a cell. The loss of one subcell in a multi-junction PV cell causes a major loss of current and some loss of voltage, causing the MPP to fluctuate. As explained above, the embodiments disclosed herein can improve the current reduction problem by shorting out current-limiting subcells and compensate for the voltage drop by using a boost synchronous converter. The stabilized input to the MPPT consequently reduces the number of local maxima the MPPT system would have to deal with otherwise.

[0097] While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other foπns; furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.

Claims

WHAT IS CLAIMED IS:

1. A battery charging circuit for a portable device comprising: a switching regulator configured to receive a substantially DC power source from one or more photovoltaic cells at an input terminal and to charge a battery coupled to an output terminal; and a controller configured to monitor the substantially DC power source and to provide one or more control signals to the switching regulator to selectively operate the switching regulator in a first mode when a voltage level of the substantially DC power source is above a first predefined voltage threshold and in a second mode when the voltage level of the substantially DC power source is below the first predefined voltage threshold, wherein the switching regulator operates with a predetermined regulated voltage level in the first mode and operates with a variable regulated voltage level that tracks the voltage level of the substantially DC power source in the second mode.

2. The battery charging circuit according to Claim 1 , wherein the substantially DC power source comprises at least two photovoltaic cells connected in series.

3. The battery charging circuit according to Claims 1 or 2, wherein the battery comprises a lithium-ion or a lithium polymer battery.

4. The battery charging circuit according to any of Claims 1 to 3, wherein the switching regulator charges the battery using a constant-current/constant-voltage algorithm comprising interleaving current regulation phases and voltage regulation phases, the switching regulator provides a substantially constant battery charging current during the current regulation phases, the substantially constant battery charging current has a predetermined current level when a current level of the substantially DC power source is above a predefined current threshold, and the substantially constant battery charging current has an adjusted current level that is approximately equal to the current level of the substantially DC power source when the current level of the substantially DC power source is below the predefined current threshold.

5. The battery charging circuit according to Claim 4, wherein the substantially constant battery charging current has a stepped rising edge near a beginning of each current regulation phase and the stepped rising edge comprises a plurality of incremental current steps with programmable step sizes and intervals.

6. The battery charging circuit according to Claims 4 or 5, wherein the switching regulator provides a decreasing battery charging current during the voltage regulation phases and stops charging the battery in the voltage regulation phases when the decreasing battery charging current reaches a termination current level.

7. The battery charging circuit according to Claim 6, wherein the termination current level, the predetermined current level of the substantially constant battery charging current, and the predetermined regulated voltage level are programmable parameters that are stored in the controller using a standard interface.

8. The battery charging circuit according to any of Claims 1 to 7, further comprising a direction resistor coupled between the portable device and the battery, wherein the controller monitors the direction resistor to disable the switching regulator when current flow is detected from the portable device to the battery.

9. The battery charging circuit according to any of Claims 1 to 8, further comprising a direction resistor coupled between the portable device and the battery, wherein the controller monitors the direction resistor to disable the switching regulator when current flow is detected from the battery to the portable device.

10. The battery charging circuit according to any of Claims 1 to 9, further comprising a status diode coupled between the substantially DC power source and a status pin of the switching regulator, wherein the status diode lights up while the switching regulator is charging the battery.

1 1. The battery charging circuit according to any of Claims 1 to 10, wherein the controller monitors the battery^'s temperature and disables the switching regulator when the battery^'s temperature is outside a predetermined temperature range, and the predetermined temperature range is a programmable parameter that is stored in the controller using a standard interface.

12. The battery charging circuit according to any of Claims 1 to 1 1. wherein the switching regulator and the controller enter a sleep mode when the voltage level of the substantially DC power source is less than the battery^'s voltage.

13. A method to charge a battery from a variable DC power source, the method comprising: sensing a voltage level of the variable DC power source, wherein the variable DC power source is provided by a photovoltaic array; selectively operating in a first mode when the voltage level of the variable DC power source is above a predefined voltage threshold, wherein the variable DC power source charges the battery to a predetermined regulated voltage level in the first mode and the predeteπnined regulated voltage level is approximately 4.2 volts; and selectively operating in a second mode when the voltage level of the variable DC power source is below the predefined voltage threshold, wherein the variable DC power source charges the battery to an adjustable regulated voltage level in the second mode and the adjustable regulated voltage level is approximately equal to the voltage level of the variable DC power source less a predetermined amount.

14. The method according to Claim 13, wherein the photovoltaic array is integrated with the battery and isolated from the battery by a thermal layer.

15. The method according to Claims 13 or 14, further comprising sensing the battery's temperature, wherein the battery stops charging when the battery's temperature exceeds a predefined temperature threshold.

16. The method according to any of Claims 13 to 15, wherein the battery is installed in a device connectable to a substantially fixed DC power source and the variable DC power source stops charging the battery when the substantially fixed DC power source is connected.

17. An integrated solar charging battery package comprising: a battery layer placed on a bottom surface of an encapsulated package; a thermal barrier layer placed above the battery layer; a photovoltaic array layer placed above the thermal barrier layer; a protective layer placed above the photovoltaic array layer, wherein the protective layer forms a top surface of the encapsulated package; and a charging circuit configured to electrically interface the battery layer and the photovoltaic array layer, wherein the charging circuit occupies a portion of the battery layer in the encapsulated package.

18. The integrated solar charging battery package according to Claim 17, wherein the battery layer has a thickness of approximately 3.5mm.

19. The integrated solar charging battery package according to Claims 17 or 18, wherein the thermal barrier layer comprises polyimide film with a thickness of approximately 25μm-50μm.

20. The integrated solar charging battery package according to any of Claims 17 to

19, wherein the photovoltaic layer has a thickness of approximately 140μm.

21. The integrated solar charging battery package according to any of Claims 17 to

20, wherein the protective layer is substantially transparent and has a thickness of approximately 70μm -90μm.

22. A battery charger comprising: a power regulator configured to receive a variable DC power source and to charge a battery; and a controller configured to sense the variable DC power source, to operate the power regulator in a first mode when a voltage of the variable DC power source is above a predefined voltage level, and to operate the power regulator in a second mode when the voltage of the variable DC power source is below the predefined voltage level, wherein the power regulator charges the battery to a substantially fixed regulated voltage level in the first mode and to an adjustable regulated voltage level in the second mode.

23. A solar chargeable replacement battery package for a handheld portable electronic device comprising: a package having a substantially similar form factor as the standard battery specified by a manufacturer of the device; a battery placed on a lower portion of the package; a photovoltaic array placed on top of the battery and isolated from the battery by a theπnal barrier, wherein the photovoltaic array supplies power to charge the battery; and a clear protective layer placed on top of the photovoltaic array, wherein the clear protective layer forms a top surface of the package.

24. A replacement battery kit for a portable electronic device, said replacement battery kit comprising: a replacement cover with a central opening; and a solar chargeable battery having a substantially similar form factor as the standard battery of the device, wherein the solar chargeable battery comprises: one or more photovoltaic cells configured for optical exposure through the central opening of the replacement cover after installation of the replacement battery kit; a battery; and a charging circuit configured to charge the battery from the photovoltaic cells.

25. The replacement battery kit according to Claim 24, wherein at least one of the one or more photovoltaic cells comprises: a plurality of subcells comprising a front subcell having an outward-facing surface, a back subcell, and one or more middle subcells, wherein the one or more middle subcells are configured in a stack between the front subcell and the back subcell; an output teπninal in communication with the front subcell and an output tenninal in communication with the back subcell, wherein the output terminals are configured to receive an electrical load; and an interconnect layer disposed between each of the subcells in the plurality of subcells; for each of the interconnect layers, a plurality of vias configured to provide electrical communication between the outward-facing surface of the front subcell and the interconnect layer, and a conductive connector contacting the plurality of vias and configured to provide electrical communication between the interconnect layer and a microprocessor configured to measure the current or voltage from the interconnect layer.

26. The battery charging circuit according to Claims 1 to 12, wherein at least one of the one or more photovoltaic cells comprises: a plurality of subcells comprising a front subcell having an outward-facing surface, a back subcell, and one or more middle subcells, wherein the one or more middle subcells are configured in a stack between the front subcell and the back subcell; an output terminal in communication with the front subcell and an output terminal in communication with the back subcell, wherein the output terminal is configured to provide the substantially DC power source; an interconnect layer disposed between each of the subcells in the plurality of subcells. wherein each of the interconnect layers includes a plurality of vias configured to provide electrical communication between the outward-facing surface of the front subcell and the interconnect layer, and a conductive connector contacting the plurality of vias and configured to provide electrical communication between the interconnect layer and the controller, wherein the controller is configured to measure the current or voltage from the interconnect layer; and a switch for each conductive connector, wherein the switch is in electrical communication with the conductive connector, and wherein the controller can direct the switch to bypass a subcell adjacent the interconnect layer in communication with the conductive connector, wherein the microcontroller selects each switch to bypass based upon the current or voltage measured by the controller from each interconnect layer so that the substantially DC power source provided to the switching regulator approaches the optimum the at least one of the one or more photovoltaic cells can provide for a given electromagnetic radiation condition and the capability of the combined plurality of subcells.

27. The battery charging circuit according to any of Claims 1 to 12, comprising a photovoltaic cell having a plurality of photovoltaic subcells connected in series, wherein each of the plurality of photovoltaic subcells have different current generating characteristics and each includes a switch configured to bypass the subcell when activated, and wherein the microcontroller is configured to selectively activate each switch based on the electromagnetic radiation conditions whereby the substantially constant DC power source approaches the optimum for the electromagnetic radiation conditions and the capability of the combined subcells.