WO2010047455A1 - Inverter system and operating method thereof - Google Patents

Inverter system and operating method thereof Download PDF

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Publication number
WO2010047455A1
WO2010047455A1 PCT/KR2009/002890 KR2009002890W WO2010047455A1 WO 2010047455 A1 WO2010047455 A1 WO 2010047455A1 KR 2009002890 W KR2009002890 W KR 2009002890W WO 2010047455 A1 WO2010047455 A1 WO 2010047455A1
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Prior art keywords
switch
controller
diode
signal
inverter system
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PCT/KR2009/002890
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French (fr)
Korean (ko)
Inventor
정동열
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주식회사 디엠비테크놀로지
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Publication of WO2010047455A1 publication Critical patent/WO2010047455A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/538—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a push-pull configuration
    • H02M7/53803—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a push-pull configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G02F1/33—Acousto-optical deflection devices
    • G02F1/335—Acousto-optical deflection devices having an optical waveguide structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/282—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
    • H05B41/2825—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage
    • H05B41/2828—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage using control circuits for the switching elements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Definitions

  • the present invention relates to an inverter system of a display device and a method of operating the same. More particularly, in an inverter system for generating an alternating voltage, a control is performed to reduce power consumption generated by a freewheeling current and improve efficiency. An inverter system and a method of operating the same.
  • LCD Liquid Crystal Display
  • LCD Liquid Crystal Display
  • a cold cathode tube (CCFL) is used as the back light.
  • the cold cathode tube is a fluorescent lamp that is turned on at a low temperature without heating the filament.
  • the cold cathode tube includes a glass tube containing a predetermined amount of a mixed gas such as mercury, argon, and neon, and an electrode disposed at both ends of the glass tube. Electrons are emitted by the high-voltage electric field applied to the two electrodes, mercury is excited by the emitted electrons, and ultraviolet rays are emitted. The emitted ultraviolet rays collide with the phosphor on the inner wall of the glass tube to emit visible light.
  • a cold cathode tube requires an AC voltage of several hundred V or more, and an inverter system is required.
  • Such an inverter system includes a half bridge, a full bridge, and a push pull method.
  • the half-bridge or push-pull method uses only two power semiconductors as switch elements, so it is used for LCD monitors with lower output power than large LCDs such as TVs.
  • FIG. 1 is a diagram illustrating a configuration of an inverter system implemented by a general half-bridge method, assuming an inverter system when driving one lamp.
  • a typical half-bridge inverter system uses a pulse width modulation (PWM) control method to control the lamp current to a desired value while converting an input DC voltage into an alternating voltage of several hundred V to drive a CCFL lamp.
  • PWM pulse width modulation
  • the inverter system compares the smoothed voltage VF with the reference voltage Vref to output an error voltage Verr and an error amplifier output Verr by comparing a triangular wave with a lamp current.
  • PWM comparator 12 for outputting the PWMO signal for controlling the signal
  • oscillator 30 for generating the triangular wave for PWM comparison
  • Logic Controller 14 for making the PWMO signal to drive the switch
  • Switch A switch block 16 for outputting an input voltage VIN or ground in response to an on / off control signal
  • an AC amplifier 18 for receiving an output OUT of the switch block 16 as an input and amplifying the signal to a bipolar voltage for driving a lamp
  • a CCFL lamp load 20 for outputting the PWMO signal for controlling the signal
  • oscillator 30 for generating the triangular wave for PWM comparison
  • Logic Controller 14 for making the PWMO signal to drive the switch
  • Switch A switch block 16 for outputting an input voltage VIN or ground in response to an on / off control signal
  • the gate driver 15 for amplifying the output signals DrvH and DrvL of the logic controller 14 and delivering them to the switch block 16, and the rectifier 22 for converting the lamp current into a voltage and smoothing the AC voltage to a DC voltage. It includes.
  • FIG. 2 is a circuit diagram showing a power stage circuit in FIG. 1
  • FIG. 2 (a) is a diagram showing the configuration of a switch block and an AC amplifier
  • FIG. 2 (b) is a circuit diagram of FIG. Equivalent circuit equivalently converted to the primary side of a transformer
  • 3 is a diagram illustrating waveforms of voltage and current according to the operation of the switch block in FIG. 2.
  • the two switch elements M1 and M2 constituting the switch block may be provided with a semiconductor such as a MOSFET, and as a result, the parasitic capacitances C1 and C2 may be included in a circuit as shown in FIG. do.
  • Cb the primary capacitor of the transformer
  • Cb the primary capacitor of the transformer
  • the load Ro connected to the secondary side is a transformer turn ratio. Converted to the primary side as a function of.
  • the equivalent inductance Leq is approximately equal to the leakage inductance of the transformer primary side
  • the equivalent capacitance Ceq is equal to the secondary side capacitance capacitance Cr multiplied by the squared n 2 of the turn ratio
  • the equivalent load resistance Req is the secondary side load resistance Ro Is divided by n 2 .
  • the inductor current Ip becomes zero and thus the body diode D2 of the second switch element is turned off.
  • the second switch element M2 is not yet turned on, and thus resonates due to parasitic capacitances C1 and C2 and the inductor Leq of each switch element.
  • Equivalent capacitance (Ceq) is relatively large compared to the parasitic capacitance (C1, C2), so the resonant frequency is much higher frequency than the resonance caused by the inductor (Leq) and equivalent capacitance (Ceq) and also equivalent load (Req) Since the resonance is small, the resonance disappears quickly.
  • the body diodes D1 and D2 of the switch element are automatically turned on during a freewheeling period in which the inductor current Ip direction is maintained as it is. Since the current flows to the body diodes D1 and D2 and consumes power at the body diode side, the efficiency of the inverter system is lowered and the heat generation of the switch element is increased.
  • On-resistance of MOSFET switches used in inverter systems, such as LCD monitors, is typically on the order of tens of milliohms, and the on-voltage of the body diode is about 0.5V.
  • the maximum current flowing through the switch of the inverter increases in proportion to the size of the LCD panel and the number of CCFL lamps used. At this time, when comparing the conduction loss caused by the MOSFET switch-on resistance with the diode loss, which is the power consumed when the diode is turned on, the power consumed by the diode cannot be ignored.
  • the maximum current of a switch with an on resistance of 20 m ⁇ and a body diode on voltage of 0.5 V is 7 A and freewheeling with the diode at this current
  • the maximum instantaneous power consumption by the switch on resistance is 0.98 W.
  • the diode is very large, 3.5W.
  • the present invention is to improve the above-mentioned problems, by controlling the freewheeling current to flow to the switch during the period of flow to the body diode of the switch element to improve the power efficiency of the inverter system and reduce heat generation of the switch element to improve durability
  • An inverter system and a method of operating the same are provided.
  • the inverter system of the display device a period in which the freewheeling current flows by automatically turning on the body diode of each switch while each switch performs an inverting operation.
  • the operating method of the inverter system comprising a second step of the switch to perform an on / off operation to generate an AC voltage, and applying the generated AC voltage to the lamp to emit light. And a third step of generating a control signal for temporarily turning on each switch in a period during which the freewheeling current flows to the body diode of the switch, thereby improving the power efficiency of the inverter system.
  • FIG. 1 is a view showing the configuration of an inverter system implemented in a general half-bridge method
  • FIG. 2 is a circuit diagram showing a power stage circuit in FIG. 1;
  • FIG. 3 is a diagram illustrating waveforms of voltage and current according to a switch operation in FIG. 2;
  • FIG. 5 is a diagram showing the configuration of an inverter system implemented according to the first embodiment of the present invention.
  • FIG. 6 is an exemplary view showing the configuration of a switch controller in FIG. 5;
  • FIG. 7 shows an operating waveform of a circuit constructed in accordance with FIG. 6;
  • FIG. 8 is an exemplary view showing the configuration of a switch controller implemented according to a second embodiment of the present invention.
  • FIG. 9 is an exemplary diagram showing an internal configuration of a switch controller implemented according to the third embodiment of the present invention.
  • FIG. 10 is a diagram illustrating a diode freewheeling period in an inverter system according to the present invention.
  • FIG. 11 is a circuit diagram illustrating an example of implementing a variable pulse width generator in FIG. 10.
  • FIG. 4 is a diagram illustrating an operation concept of the present invention.
  • Inverter system is a method for reducing the power loss consumed by a diode in a general inverter control method, by turning on the corresponding switch element during the period in which the body diode is on, the inductor current (Ip) is not a diode switch Control to flow.
  • Ip inductor current
  • the second switch is turned on in accordance with the freewheeling period in which the body diode of the second switch is turned on so that the inductor current maintains the direction of the current, and the second switch in a similar manner.
  • the first switch is turned on in accordance with the freewheeling period during which the body diode of the first switch is turned on.
  • FIG. 5 is a diagram illustrating a configuration of an inverter system implemented according to the first embodiment of the present invention.
  • the smoothed voltage VF is compared with the reference voltage Vref.
  • Error amplifier 10 for outputting error voltage Verr
  • PWM comparator 12 for outputting signal PWMO for PWM control of lamp current by comparing output voltage Verr of error amplifier with triangle wave CT
  • An oscillator 30 for generating a triangular wave for the switch controller 50 and a switch controller 50 for generating a control signal for turning on a corresponding switch instead of a diode in the freewheeling period in addition to the general PWM duty control signal of the switch.
  • a gate driver 60 that amplifies the switch so that it can be driven by the output signal.
  • the CCFL lamp is received by receiving the switch block 16 which connects the output signal OUT to the input voltage VIN or the ground, and OUT which is the output signal of the switch block 16.
  • It is an inverter system which consists of an AC amplifier 18 which amplifies to AC of more than several hundred V to drive, a CCFL lamp 20 as a load, and a rectifier 22 which converts lamp current into voltage and smoothes AC voltage into DC voltage. .
  • the switch controller 50 has a signal corresponding to the freewheeling period so that the corresponding switches M1 and M2 can be turned on in accordance with the freewheeling period in which the body diodes D1 and D2 are turned on. It includes a diode controller (Diode On-Time Controller) 100 for outputting the logic controller 150 to make a separate signal for the PWM control of the switches.
  • Diode controller Diode On-Time Controller
  • the diode controller 100 output signal PWMAd corresponding to the period in which the body diode (D1, D2) of each switch element (M1, M2) constituting the switch block 16 is turned on You can output
  • the logic controller 14 of the general inverter system as shown in FIG. 1 receives the PWMO which is the output signal of the PWM comparator 12 and the charge / discharge control signal of the oscillator 30 to control the first switch for PWM control.
  • the logic controller 150 included in the switch controller 50 is a PWM control signal from the PWM comparator 12.
  • the PWMO and the charge / discharge control signal CK of the oscillation controller 32 and the control signal PWMAd corresponding to the freewheeling period are input from the diode controller 100 to perform PWM control and simultaneously switch the switch according to the freewheeling period.
  • the control signals DrvH and DrvN are controlled to be turned on and supplied to the gate driver 60.
  • the error amplifier 10 amplifies the difference between the output voltage VF and the reference voltage Vref of the rectifier 22 to output the output signal Verr so that the PWM duty can be increased or decreased, and the capacitor Cc is Stabilize the inverter system.
  • the error amplifier 10 is illustrated as a transconductance amplifier that outputs a difference in input voltage as an output current, but is not limited thereto, and may also be configured as a voltage amplifier.
  • Oscillator 30 is a circuit for making a triangular wave for PWM control is composed of an oscillation controller 32 and an oscillation capacitor (Cosc).
  • the oscillation controller 32 outputs the charge / discharge control signal CK, and the triangular wave is generated by charging or discharging the oscillation current source Iosc with the oscillation capacitor Cosc as this signal becomes high or low.
  • the gate driver 60 drives the gate-source voltage of the switch elements M1 and M2 constituting the switch block 16 to a sufficiently large voltage so that the switch-on resistance is reduced while simultaneously switching It is composed of a first gate driver (not shown) and a second gate driver (not shown) for driving with a large current to charge and discharge the input capacitors of the elements M1 and M2 sufficiently fast.
  • the first gate driver amplifies the first driving control signal DrvH of the logic controller 150 to output the GP signal
  • the second gate driver amplifies the second driving control signal DrvL of the logic controller 150 to GN. Output the signal.
  • the switch block 16 alternately connects the output signal OUT to the input voltage VIN and ground.
  • the switch block 16 includes a first switch element M1 located above and a second switch element M2 located below.
  • the switch element includes body diodes D1 and D2, respectively.
  • the first switch device M1 is described with an example in which a P-type MOSFET is applied, but is not limited thereto.
  • An N-type MOSFET may be used.
  • the first switch element M1 may be turned on / off according to the first gate driving signal GP of the gate driver 60, and when turned on, the first switch element M1 may connect OUT to an input voltage VIN.
  • the second switch element M2 operates on / off according to the second gate driving signal GN and, when on, connects OUT to ground. Therefore, OUT becomes a square wave AC voltage having a voltage of VIN or ground (0V).
  • the AC amplifier 18 amplifies the input signal into an AC signal of several hundred volts or more so as to drive the CCFL lamp 20, and more specifically, OUT, which is an output signal output from the square wave AC voltage of the switch block 16, is output.
  • the LC resonance converts the output to a sine wave output VAC with positive and negative voltages.
  • the AC amplifier may include a DC blocking capacitor Cb, a transformer T1 and a resonant capacitor Cr that amplify at a turn ratio of 1: n.
  • the DC blocking capacitor Cb In the DC blocking capacitor Cb, a large value capacitor is usually used for DC blocking. Therefore, when the symmetric PWM control method is used, the DC blocking capacitor Cb is charged with a DC voltage of VIN / 2. Accordingly, the input voltage Vx of the transformer T1 becomes an AC voltage having voltages of + VIN / 2 and -VIN / 2.
  • the rectifier 22 senses and rectifies the lamp current and performs a filtering operation to enable PWM control.
  • the rectifier 22 includes a sense resistor (Rs), a half-wave rectifier diode (D3), and a smoothing resistor ( Rf) and a capacitor Cf.
  • the rectifier 22 may be a circuit configuration in a variety of ways according to the designer as an example shown when one CCFL lamp 20 is provided, and also in the case of a plurality of lamps are connected in various ways depending on the designer The configuration of the circuit may vary.
  • FIG. 6 is an exemplary diagram showing a configuration of a switch controller in FIG. 5, and FIG. 7 is a diagram showing an operation waveform of a circuit constructed according to FIG. 6.
  • the diode controller 100 of the switch controller 50 includes at least one rising-edge-delay-circuit. 102, 108 and logic circuits 104, 106, 110.
  • the PWMO_Ax signal output from the first rising-edge-delay-circuit 102 and the PWMOB signal output as the PWMO passes through the inverter 104 and the charge / discharge of the oscillation controller are delayed by the PWMO signal by a freewheeling period.
  • the control signal CK is input to the NOR gate 106, a PWMOA signal corresponding to the freewheeling period can be obtained.
  • the second rising-edge-delay- that delays the PWMOA from the rising edge by a certain time, i.e., dead time (Td), should not occur at the same time even when the corresponding switching element is turned on instead of the diode during the freewheeling period.
  • Td dead time
  • the logic controller 150 is a diode in the PWM duty control signal PWMO for the PWM duty control from the PWM comparator 12 to implement an inverter system of high efficiency. Instead, the control signal PWMOAd corresponding to the freewheeling period and the charge / discharge control signal CK for generating a signal capable of driving the gate driver separately are received from the diode controller 100 to turn on the corresponding switch. . That is, when the charge / discharge control signal CK passes through the T-type flip-flop (TFF) 152, the frequency is 1/2 of the charge / discharge control signal CK, and at the oscillation maximum voltage VH of the oscillation waveform CT.
  • T-type flip-flop T-type flip-flop
  • the transitional complementary square wave signals VFD and BVFD can be obtained, and these signals can pass through a logic gate to output switch control signals for symmetric PWM control.
  • the PWM duty control signal PWMO and the square wave signal BVFD are input terminals of the NOR gate 154, a DrvP signal corresponding to the PWM duty control period of the first switch element M1 can be obtained.
  • the output signal PWMAd and the square wave signal VFD are input terminals of the NOR gate 156, the DrvPA signal corresponding to the freewheeling period of the body diode D1 of the first switch element M1 can be obtained.
  • DrvP signal and the DrvPA signal are input to the NOR gate 162, the first switch element M1 is turned on during the PWM duty control period of the first switch element M1 and the freewheeling period of the body diode D1. DrvH can be obtained.
  • the oscillator 30 is a circuit which generates or oscillates the waveform CT by charging or discharging the oscillation capacitor Cosc with the charge / discharge current source Iosc according to the charge / discharge control signal CK of the oscillation controller 32.
  • the oscillation controller 32 causes the charge / discharge control signal CK to go low when the oscillation waveform CT becomes smaller than the oscillation minimum voltage VL, thereby driving the oscillation capacitor Cosc to the current source Iosc.
  • the charge / discharge control signal CK becomes high at the moment when the oscillation waveform CT becomes larger than the oscillation maximum voltage VH so that the oscillation capacitance Cosc is discharged. Therefore, the frequency of the CK waveform is equal to the frequency of the CT waveform.
  • FIG. 8 is an exemplary view showing the configuration of a switch controller implemented according to a second embodiment of the present invention.
  • the switch controller implemented according to the second embodiment of the present invention further includes a delay time controller 202 capable of changing the diode on period by an external signal in the diode controller 200.
  • the logic controller 250 further includes a duty limiter 270 that limits only the specific PWM duty to be switched on instead of the diode in the freewheeling period.
  • the diode on period depends on the design of the power stage circuit, such as the inductance of the transformer T1. Therefore, it is advantageous for system design to be able to vary by external signal rather than fixing diode on period.
  • the delay time controller 202 is preferably for varying the freewheeling period to achieve this characteristic, so that the delay time of the first rising-edge-delay-circuit 204 varies according to the FWT pin state.
  • the switch controller according to the second embodiment of the present invention is configured to ignore the output of the diode controller 200 when a certain PWM duty is exceeded.
  • any signal of PWMO and PWMAd is a PWM duty control signal. It is not known which signal is the diode on time control signal. Therefore, as a solution to this problem, the switch controller can be configured to ignore the output of the diode controller 200 when the PWM duty is lowered below.
  • the switch controller 50 ′ provides a duty limiter 270 for operating the output PWMAd of the diode controller 200 only in any region of the PWM duty. It may be further included in the logic controller 250.
  • Duty limiter 270 may comprise at least one comparator 272, 274 and a NAND gate 276. Since the PWM duty is determined by the output voltage Verr of the error amplifier 10, the output voltage Verr and the duty limit voltage Vmax and Vmin of the error amplifier may be compared to limit the maximum and minimum of the PWM duty. Where Vmax is the reference voltage that sets the maximum PWM duty and Vmin is the reference voltage that sets the minimum PWM duty.
  • the output FWD goes low only when the output voltage Verr of the error amplifier is greater than Vmin and less than Vmax so that the output PWMAd of the diode controller 200 operates.
  • the error amplifier output voltage (Verr) is less than Vmin or greater than Vmax, FWD is high and DrvPA and DrvNA are always low regardless of PWMAd. Therefore, the output PWMAd of the diode controller 200 is ignored and the switch controller 50 'performs only the PWM duty control.
  • the diode controller implemented according to the first and second embodiments of the present invention controls the diode on time to be constant regardless of the PWM duty.
  • the diode controller turns on the switch instead of the diode in the freewheeling period longer than the actual freewheeling period, the distortion of the current waveform is generated, and the distortion increases as the period for turning on the switch is longer.
  • the diode freewheeling period becomes shorter as the PWM duty increases. Therefore, as the PWM duty increases, shortening the diode-on time generated by the diode controller will improve the efficiency when the PWM duty is small and improve the current waveform when the PWM duty is high. .
  • FIG. 9 is an exemplary diagram showing an internal configuration of a switch controller implemented according to the third embodiment of the present invention.
  • the switch controller implemented according to the third embodiment of the present invention is to achieve the above-described object, and is implemented such that the output PWMAd of the diode controller 300 changes according to the PWM duty. More specifically, as shown in FIG. 9, when the variable pulse width generator 302 outputs a signal PWMO_Ax1 whose pulse width is changed according to the PWM duty, the output signal passes through a logic circuit to the variable diode on time. It is output with the corresponding PWMAd.
  • the minimum duty limiter instead of the duty limiter in the configuration of the logic controller implemented according to the second embodiment of the present invention in order to ignore the output of the diode controller 300 and to operate as simple PWM duty control. 370. Therefore, if the output voltage Verr of the error amplifier is less than Vmin, FWDm becomes high so that DrvPA and DrvNA always go low regardless of PWMAd, and the output PWMAd of diode controller 300 is ignored and the switch controller 50 ′′. Will only control the PWM duty.
  • variable pulse width generator In the switch controller implemented according to the third embodiment of the present invention, the configuration of the variable pulse width generator is as follows.
  • FIG. 10 is a diagram illustrating a diode freewheeling period in an inverter system according to the present invention.
  • FIG. 10 (a) illustrates a model of the freewheeling period as a linear function according to PWM duty. The relationship between the PWM duty and the diode freewheeling period T FW is shown.
  • T FW may be represented by the following equation.
  • the diode controller 300 may operate as shown in Equation 1 below.
  • the error amplifier output voltage (Verr) represents the current PWM duty. Therefore, if the voltage V FW higher than the error amplifier output voltage Verr is compared with the triangular CT, the diode freewheeling period can be obtained and if the V FW voltage is decreased as the PWM duty increases, the diode controller 300 increases the PWM duty.
  • the equation (1) can be made a signal that reduces the diode freewheeling period.
  • Equation 1 Substituting Equation 1 into Equation 2 derived as described above may obtain the following equation.
  • Equation 3 K 1 , V FW, OFFSET are derivable values, and Verr is an error amplifier output voltage, so a circuit satisfying Equation 3 can be designed and applied to the variable pulse width generator.
  • FIG. 11 is a circuit diagram illustrating an example of implementing a variable pulse width generator in FIG. 10.
  • the variable pulse width generator may include a variable voltage generator 410 and a comparator 420.
  • the variable voltage generator 410 is implemented as a circuit to satisfy Equation 3 so that the variable voltage V FW gradually decreases as the PWM duty increases.
  • V FW is always greater than the error amplifier output voltage Verr, when V FW is compared with the triangular CT in the comparator 420, a PWMO_Ax1 signal in which the pulse width gradually decreases as the PWM duty increases.
  • the variable voltage generator 410 receives a voltage-current converter 412 that outputs an output current I 1 proportional to an error amplifier output voltage Verr, and receives the output as an input sourcing current.
  • the current mirror 416 includes a voltage-current converter 414 for outputting an output current I 2 proportional to an offset voltage Voff, and a current mirror 418 for receiving the output as an input and outputting a sourcing current.
  • it consists of the resistor R3 which adds the output current of the current mirrors 416 and 418, and converts it into a voltage.
  • the gains of the current mirrors 416 and 418 are 1, the output V FW of the variable voltage generator 410 may be represented by the following equation.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The present invention relates to an inverter system that is controlled to improve the efficiency thereof, and to an operating method thereof. The inverter system includes a switch controller that generates a PWM control signal for each switch to perform an inverting operation and temporarily turns on a corresponding switch on a body diode during a free-wheeling period when current flows with the body diode of the switch on so that the direction of the current flowing on an inductor may be maintained after each switch is turned off. Therefore, the free-wheeling current flows to the switch instead of the body diode, thereby reducing the power consumption of the switch and reducing the generation of heat in the switch and improving the efficiency of the inverter system.

Description

인버터 시스템 및 그의 동작방법{INVERTER SYSTEM AND ITS OPERATING METHOD}Inverter system and its operation method {INVERTER SYSTEM AND ITS OPERATING METHOD}
본 발명은 디스플레이 장치의 인버터 시스템 및 그의 동작방법에 관한 것으로, 보다 상세하게는 교류전압을 생성하기 위한 인버터 시스템에서 프리휠링 전류에 의한 보디 다이오드에서 발생하는 전력 소모를 줄여 효율을 향상시킬 수 있도록 제어하는 인버터 시스템 및 그의 동작방법에 관한 것이다.The present invention relates to an inverter system of a display device and a method of operating the same. More particularly, in an inverter system for generating an alternating voltage, a control is performed to reduce power consumption generated by a freewheeling current and improve efficiency. An inverter system and a method of operating the same.
LCD(Liquid Crystal Display)는 디스플레이 장치로 TV, 모니터 등에 많이 사용되고 있다. LCD의 동작원리에 따라, LCD를 통해 영상이 표시되기 위해서는 후면 광(Back Light)이 필요하다. LCD (Liquid Crystal Display) is a display device is widely used in TVs, monitors, and the like. According to the operation principle of the LCD, a back light is required to display an image through the LCD.
이러한 후면 광으로는 냉음극관(CCFL; Cold Cathode Florescent lamp)이 사용되고 있다. 냉음극관은 필라멘트의 가열 없이 저온에서 점등되는 형광등으로, 내부에 일정량의 수은, 아르곤, 네온 등의 혼합 가스가 들어있는 유리관과, 유리관 양 단에 배치되는 전극을 포함한다. 두 전극에 가해진 고전압 전계에 의해 전자가 방출되며, 방출된 전자에 의해 수은이 여기 되어 자외선이 발산하며, 발산된 자외선이 유리관 내벽의 형광체와 충돌하면서 가시광선이 발산하게 된다.A cold cathode tube (CCFL) is used as the back light. The cold cathode tube is a fluorescent lamp that is turned on at a low temperature without heating the filament. The cold cathode tube includes a glass tube containing a predetermined amount of a mixed gas such as mercury, argon, and neon, and an electrode disposed at both ends of the glass tube. Electrons are emitted by the high-voltage electric field applied to the two electrodes, mercury is excited by the emitted electrons, and ultraviolet rays are emitted. The emitted ultraviolet rays collide with the phosphor on the inner wall of the glass tube to emit visible light.
냉음극관이 빛을 발산하기 위해서는 수백 V 이상의 교류전압이 요구되므로 인버터 시스템이 요구되며, 이러한 인버터 시스템에는 하프 브리지(Half Bridge), 풀 브리지(Full Bridge), 푸쉬 풀(Push Pull) 방식 등이 있으며 하프 브리지나 푸쉬 풀 방식은 스위치 소자로 2개의 전력 반도체만을 사용하므로 TV 등의 대화면 LCD에 비해 출력 전력이 낮은 LCD 모니터 등에 많이 사용된다.In order to emit light, a cold cathode tube requires an AC voltage of several hundred V or more, and an inverter system is required. Such an inverter system includes a half bridge, a full bridge, and a push pull method. The half-bridge or push-pull method uses only two power semiconductors as switch elements, so it is used for LCD monitors with lower output power than large LCDs such as TVs.
도 1 은 일반적인 하프 브리지 방식으로 구현된 인버터 시스템의 구성이 도시된 도로서, 하나의 램프를 구동하는 경우의 인버터 시스템을 가정한 도이다.FIG. 1 is a diagram illustrating a configuration of an inverter system implemented by a general half-bridge method, assuming an inverter system when driving one lamp.
일반적인 하프 브리지 방식의 인버터 시스템은 CCFL 램프를 구동하기 위해 입력 직류 전압을 수백 V 이상의 교류 전압으로 변환하면서 램프 전류를 원하는 값으로 제어하기 위한 방법으로 PWM(Pulse Width Modulation) 제어 방식을 사용한다. A typical half-bridge inverter system uses a pulse width modulation (PWM) control method to control the lamp current to a desired value while converting an input DC voltage into an alternating voltage of several hundred V to drive a CCFL lamp.
보다 구체적으로 일반적인 인버터 시스템은, 도 1에 도시된 바와 같이, 평활된 전압 VF와 기준 전압 Vref를 비교하여 에러 전압 Verr을 출력하는 에러 앰프(10), 에러 앰프 출력 Verr를 삼각파와 비교하여 램프 전류를 제어하기 위한 PWMO 신호를 출력하는 PWM 비교기(12), PWM 비교를 위한 삼각파를 발생하는 발진기(30), PWMO를 스위치를 구동하기 위한 신호로 만들어 주는 로직제어기(Logic Controller)(14), 스위치 온/오프 제어 신호에 따라 입력전압 VIN 또는 접지를 출력하는 스위치 블록(16), 스위치 블록(16)의 출력 OUT를 입력으로 받아 램프를 구동하기 위한 양극성의 전압으로 증폭하는 교류 증폭기(18), 및 CCFL 램프 부하(20)를 포함한다.More specifically, as shown in FIG. 1, the inverter system compares the smoothed voltage VF with the reference voltage Vref to output an error voltage Verr and an error amplifier output Verr by comparing a triangular wave with a lamp current. PWM comparator 12 for outputting the PWMO signal for controlling the signal, oscillator 30 for generating the triangular wave for PWM comparison, Logic Controller 14 for making the PWMO signal to drive the switch, Switch A switch block 16 for outputting an input voltage VIN or ground in response to an on / off control signal, an AC amplifier 18 for receiving an output OUT of the switch block 16 as an input and amplifying the signal to a bipolar voltage for driving a lamp; And a CCFL lamp load 20.
또한, 로직제어기(14)의 출력 신호 DrvH와 DrvL를 증폭하여 스위치 블록(16)으로 전달하는 게이트 드라이버(15), 및 램프 전류를 전압으로 변환하고 교류 전압을 직류 전압으로 평활하는 정류기(22)를 포함한다.In addition, the gate driver 15 for amplifying the output signals DrvH and DrvL of the logic controller 14 and delivering them to the switch block 16, and the rectifier 22 for converting the lamp current into a voltage and smoothing the AC voltage to a DC voltage. It includes.
도 2 는 도 1에 있어서, 전력단 회로가 도시된 회로도로서, 도 2(a)는 스위치 블록 및 교류증폭기의 구성이 도시된 도이며, 도 2(b)는 도 2(a)의 회로도에서 변압기의 1차측으로 등가변환한 등가회로이다. 또한, 도 3 은 도 2에 있어서, 스위치 블록의 동작에 따른 전압 및 전류의 파형이 도시된 도이다. FIG. 2 is a circuit diagram showing a power stage circuit in FIG. 1, FIG. 2 (a) is a diagram showing the configuration of a switch block and an AC amplifier, and FIG. 2 (b) is a circuit diagram of FIG. Equivalent circuit equivalently converted to the primary side of a transformer. 3 is a diagram illustrating waveforms of voltage and current according to the operation of the switch block in FIG. 2.
스위치 블록을 구성하는 두 개의 스위치 소자(M1, M2)는 MOSFET와 같은 반도체로 구비될 수 있으며, 이에 따라 도 2(a)에 도시된 바와 같이 회로적으로 기생 커패시턴스(C1, C2)를 포함하게 된다.The two switch elements M1 and M2 constituting the switch block may be provided with a semiconductor such as a MOSFET, and as a result, the parasitic capacitances C1 and C2 may be included in a circuit as shown in FIG. do.
등가회로가 도시된 도 2(b)의 경우, 변압기의 1차측 커패시터인 Cb는 상대적으로 용량이 매우 크므로 Cb를 VIN/2의 전압원으로 나타냈으며, 2차측에 연결된 부하(Ro)는 변압기 턴비의 함수로 일차 측으로 변환하였다. 1차측 등가 회로에서 등가 인덕턴스 Leq는 트랜스포머 1차측의 누설 인덕턴스와 거의 같으며, 등가 커패시턴스 Ceq는 2차측 공진 커패시턴스 Cr를 턴비의 제곱 n 2으로 곱한 것과 같으며 등가 부하 저항 Req는 2차측 부하 저항 Ro를 n 2으로 나눈 것과 같다.In FIG. 2 (b) where the equivalent circuit is shown, Cb, the primary capacitor of the transformer, has a relatively large capacity, and thus Cb is represented as a voltage source of VIN / 2, and the load Ro connected to the secondary side is a transformer turn ratio. Converted to the primary side as a function of. In the primary equivalent circuit, the equivalent inductance Leq is approximately equal to the leakage inductance of the transformer primary side, the equivalent capacitance Ceq is equal to the secondary side capacitance capacitance Cr multiplied by the squared n 2 of the turn ratio, and the equivalent load resistance Req is the secondary side load resistance Ro Is divided by n 2 .
도 2(b) 및 도 3을 참조하여 스위치 블록 및 교류 증폭기의 동작을 보다 상세히 설명하면 다음과 같다. 이때, 스위치 소자(M1, M2)의 보디 다이오드(D1, D2)의 턴온(turn-on) 전압은 VD로 동일한 것으로 가정한다. t=0에서 제 1 스위치 소자(M1)가 온 되면 OUT=VIN, Vp=VIN/2이 된다. 따라서 인덕터(Leq)의 전류(Ip)는 인덕터(Leq)와 등가 커패시턴스(Ceq)에 의한 공진에 의해 증가하고 등가 커패시턴스(Ceq)의 전압(Vo)도 공진에 의해 증가한다. 이때 제 1 스위치 소자의 기생 커패시턴스(C1)는 0(zero)으로 제 2 스위치 소자의 기생 커패시턴스(C2)는 VIN으로 충전된다. Referring to Figures 2 (b) and 3 will be described in more detail the operation of the switch block and the AC amplifier as follows. At this time, it is assumed that the turn-on voltages of the body diodes D1 and D2 of the switch elements M1 and M2 are the same as VD. When the first switch element M1 is turned on at t = 0, OUT = VIN and Vp = VIN / 2. Therefore, the current Ip of the inductor Leq is increased by resonance due to the equivalent capacitance Ceq with the inductor Leq, and the voltage Vo of the equivalent capacitance Ceq is also increased by resonance. At this time, the parasitic capacitance C1 of the first switch element is zero and the parasitic capacitance C2 of the second switch element is charged to VIN.
t= t1에서 제 1 스위치 소자(M1)가 오프 되면 인덕터 전류(Ip)에 의해 제 2 스위치 소자의 기생 커패시턴스(C2)는 VIN 전압에서 방전하고 제 1 스위치 소자의 기생 커패시턴스(C1)은 0(zero)에서 충전되기 시작한다. 따라서 OUT과 Vp 전압은 점점 감소한다. OUT 전압이 점점 감소하여 t=t2에서 OUT=-VD 전압이 되면 제 2 스위치 소자의 보디 다이오드(D2)가 온 되고 Vp=-VIN/2-VD가 된다. 따라서 인덕터(Leq)에는 VL=-VIN/2-VD-Vo의 전압이 최대로 걸리게 되고 인덕터 전류(Ip)는 급격하게 감소하기 시작한다. When t = t1, when the first switch element M1 is turned off, the parasitic capacitance C2 of the second switch element is discharged at the VIN voltage by the inductor current Ip, and the parasitic capacitance C1 of the first switch element is 0 ( starts charging at zero). Therefore, the voltages OUT and Vp decrease gradually. When the OUT voltage gradually decreases and becomes the OUT = -VD voltage at t = t2, the body diode D2 of the second switch element is turned on and Vp = -VIN / 2-VD. Therefore, the inductor Leq receives the maximum voltage of VL = -VIN / 2-VD-Vo and the inductor current Ip starts to decrease rapidly.
t=t3에서 인덕터 전류(Ip)는 0(zero)이 되고 따라서 제 2 스위치 소자의 보디 다이오드(D2)는 오프 된다. 그러나, 제 2 스위치 소자의 보디 다이오드(D2)는 오프 되었지만 아직 제 2 스위치 소자(M2)는 온 되지 않아 각 스위치 소자의 기생 커패시턴스(C1, C2) 및 인덕터(Leq)에 의해 공진하게 된다. 등가 커패시턴스(Ceq)는 기생 커패시턴스(C1, C2)에 비해 그 값이 상대적으로 매우 크므로 공진 주파수는 인덕터(Leq)와 등가 커패시턴스(Ceq)에 의한 공진보다 훨씬 높은 주파수이며 또한 등가 부하(Req)가 작으므로 이 공진은 빨리 소멸된다. At t = t3, the inductor current Ip becomes zero and thus the body diode D2 of the second switch element is turned off. However, although the body diode D2 of the second switch element is turned off, the second switch element M2 is not yet turned on, and thus resonates due to parasitic capacitances C1 and C2 and the inductor Leq of each switch element. Equivalent capacitance (Ceq) is relatively large compared to the parasitic capacitance (C1, C2), so the resonant frequency is much higher frequency than the resonance caused by the inductor (Leq) and equivalent capacitance (Ceq) and also equivalent load (Req) Since the resonance is small, the resonance disappears quickly.
t=t4에서 제 2 스위치 소자(M2)가 온 되면 OUT= 0이 되어 제 1 스위치 소자의 기생 커패시턴스(C1)는 VIN으로 충전되고 C2는 0으로 충전된다. OUT=0V 이므로 Vp=-VIN/2이며, 이에 따라 인덕터 전류(Ip)는 인덕터(Leq), 등가 커패시턴스(Ceq)에 의한 공진에 의해 이전과 다른 반대 방향으로 전류가 증가하기 시작한다. 이후의 동작은 제 1 스위치 소자(M1)가 온 된 경우 후의 동작과 같고 결과적으로 도 3에 도시된 파형과 동일하게 된다.When the second switch element M2 is turned on at t = t4, OUT = 0, and the parasitic capacitance C1 of the first switch element is charged to VIN and C2 is charged to zero. Since OUT = 0V, Vp = -VIN / 2, and thus the inductor current Ip starts to increase in the opposite direction to the previous one due to the resonance caused by the inductor Leq and the equivalent capacitance Ceq. The subsequent operation is the same as the operation after the first switch element M1 is turned on, and consequently becomes the same as the waveform shown in FIG.
상술한 바와 같이 일반적인 인버터 시스템의 구성 및 PWM 제어방식에서, 인덕터 전류(Ip) 방향이 그대로 유지되는 프리휠링(freewheeling) 기간 동안 스위치 소자의 보디 다이오드(D1, D2)가 자동으로 턴온 된다. 이 전류가 보디 다이오드(D1, D2)로 흐르면서 보디 다이오드 측에서 전력을 소모하기 때문에 인버터 시스템의 효율이 저하되고 스위치 소자의 발열이 증가하는 문제점이 발생하게 된다.As described above, in a general inverter system configuration and PWM control scheme, the body diodes D1 and D2 of the switch element are automatically turned on during a freewheeling period in which the inductor current Ip direction is maintained as it is. Since the current flows to the body diodes D1 and D2 and consumes power at the body diode side, the efficiency of the inverter system is lowered and the heat generation of the switch element is increased.
LCD 모니터 등의 인버터 시스템에서 사용되는 MOSFET 스위치의 온 저항은 일반적으로 수십mΩ 정도이고, 보디 다이오드의 온 전압은 0.5V 정도이다. 인버터의 스위치에 흐르는 전류의 최대치는 LCD 패널 사이즈와 사용되는 CCFL 램프 수에 비례해서 증가하며 보통 수 A 이상의 전류가 흐른다. 이때 MOSFET 스위치 온 저항에 의한 도통 로스(Conduction Loss)와 다이오드가 온 되었을 시 소모되는 전력인 다이오드 로스를 비교하면 다이오드에서 소모되는 전력을 무시할 수 없게 된다. On-resistance of MOSFET switches used in inverter systems, such as LCD monitors, is typically on the order of tens of milliohms, and the on-voltage of the body diode is about 0.5V. The maximum current flowing through the switch of the inverter increases in proportion to the size of the LCD panel and the number of CCFL lamps used. At this time, when comparing the conduction loss caused by the MOSFET switch-on resistance with the diode loss, which is the power consumed when the diode is turned on, the power consumed by the diode cannot be ignored.
예를 들어 20mΩ의 온 저항과 0.5V의 보디 다이오드 온 전압을 가지는 스위치의 최대 전류가 7A이고 이 전류에서 다이오드로 프리휠링을 한다고 가정하면, 스위치 온 저항에 의한 최대 순간 전력 소모는 0.98W인데 비해 다이오드는 3.5W로 매우 크다.For example, assuming that the maximum current of a switch with an on resistance of 20 mΩ and a body diode on voltage of 0.5 V is 7 A and freewheeling with the diode at this current, the maximum instantaneous power consumption by the switch on resistance is 0.98 W. The diode is very large, 3.5W.
본 발명은 상술한 문제점을 개선하기 위한 것으로, 프리휠링 전류가 스위치 소자의 보디 다이오드로 흐르는 기간에 해당 스위치로 흐르도록 제어하여 인버터 시스템의 전력 효율을 향상시키고 스위치 소자의 발열을 줄여 내구성을 향상시킬 수 있는 디스플레이 장치의 인버터 시스템 및 그의 동작방법을 제안한다.The present invention is to improve the above-mentioned problems, by controlling the freewheeling current to flow to the switch during the period of flow to the body diode of the switch element to improve the power efficiency of the inverter system and reduce heat generation of the switch element to improve durability An inverter system and a method of operating the same are provided.
보다 구체적으로, 본 발명의 일실시예에 따른 디스플레이 장치의 인버터 시스템은, 각 스위치가 인버팅(inverting) 동작을 수행하면서 각 스위치의 보디 다이오드가 자동으로 온 되어 프리휠링(freewheeling) 전류가 흐르는 기간 동안 일시적으로 상기 각 스위치가 온/오프 동작을 하도록 제어신호를 생성하는 스위치 제어기를 포함하여, 상기 프리휠링 전류가 보디 다이오드 대신에 스위치로 흐르도록 하여 전력 소모를 줄이고 효율을 높이면서 스위치에서의 발열을 줄일 수 있다.More specifically, the inverter system of the display device according to an embodiment of the present invention, a period in which the freewheeling current flows by automatically turning on the body diode of each switch while each switch performs an inverting operation. A switch controller for generating a control signal to temporarily turn on or off the respective switches during operation, thereby allowing the freewheeling current to flow to the switch instead of the body diode, thereby reducing power consumption and increasing efficiency Can be reduced.
또한, 본 발명의 일실시예에 따른 인버터 시스템의 동작방법은, 에러 앰프 출력 전압과 삼각파를 이용하여 다수 스위치에 대한 온/오프 제어신호를 생성하는 제 1 단계, 생성된 온/오프 제어신호에 따라 스위치가 온/오프 동작을 하여 교류전압을 생성하고, 생성된 교류전압을 램프에 인가하여 빛이 발광하도록 하는 제 2 단계로 이루어진 인버터 시스템의 동작방법에 있어서, 상기 제 1 단계는, 상기 각 스위치의 보디 다이오드로 프리휠링 전류가 흐르는 기간에 일시적으로 상기 각 스위치가 온 되도록 하는 제어신호를 생성하는 제 3 단계를 포함하여, 인버터 시스템의 전력 효율을 향상시킬 수 있다.In addition, the operating method of the inverter system according to an embodiment of the present invention, the first step of generating an on / off control signal for a plurality of switches using the error amplifier output voltage and a triangular wave, the generated on / off control signal In accordance with the method of operation of the inverter system comprising a second step of the switch to perform an on / off operation to generate an AC voltage, and applying the generated AC voltage to the lamp to emit light. And a third step of generating a control signal for temporarily turning on each switch in a period during which the freewheeling current flows to the body diode of the switch, thereby improving the power efficiency of the inverter system.
도 1 은 일반적인 하프 브리지 방식으로 구현된 인버터 시스템의 구성이 도시된 도,1 is a view showing the configuration of an inverter system implemented in a general half-bridge method,
도 2 는 도 1에 있어서, 전력단 회로가 도시된 회로도,FIG. 2 is a circuit diagram showing a power stage circuit in FIG. 1;
도 3 은 도 2에 있어서, 스위치 동작에 따른 전압 및 전류의 파형이 도시된 도,FIG. 3 is a diagram illustrating waveforms of voltage and current according to a switch operation in FIG. 2;
도 4 는 본 발명의 동작 개념이 도시된 도,4 is a diagram illustrating an operation concept of the present invention;
도 5 는 본 발명의 제 1 실시예에 따라 구현된 인버터 시스템의 구성이 도시된 도,5 is a diagram showing the configuration of an inverter system implemented according to the first embodiment of the present invention;
도 6 은 도 5에 있어서, 스위치 제어기의 구성이 도시된 예시도,6 is an exemplary view showing the configuration of a switch controller in FIG. 5;
도 7 은 도 6에 따라 구성된 회로의 동작 파형이 도시된 도,7 shows an operating waveform of a circuit constructed in accordance with FIG. 6;
도 8 은 본 발명의 제 2 실시예에 따라 구현된 스위치 제어기의 구성이 도시된 예시도,8 is an exemplary view showing the configuration of a switch controller implemented according to a second embodiment of the present invention;
도 9 는 본 발명의 제 3 실시예에 따라 구현된 스위치 제어기의 내부 구성이 도시된 예시도,9 is an exemplary diagram showing an internal configuration of a switch controller implemented according to the third embodiment of the present invention;
도 10 은 본 발명에 따른 인버터 시스템에 있어서, 다이오드 프리휠링 기간이 도시된 도, 및10 is a diagram illustrating a diode freewheeling period in an inverter system according to the present invention; and
도 11 은 도 10 에 있어서, 가변 펄스 폭 생성기를 구현하는 예가 도시된 회로도이다.FIG. 11 is a circuit diagram illustrating an example of implementing a variable pulse width generator in FIG. 10.
이하 첨부된 도면을 참조로 하여 본 발명에 따른 실시예를 설명한다.Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.
도 4 는 본 발명의 동작 개념이 도시된 도이다.4 is a diagram illustrating an operation concept of the present invention.
본 발명에 따른 인버터 시스템은, 일반적인 인버터 제어방식에 있어서 다이오드에서 소모되는 전력 손실을 줄이기 위한 방법으로서, 보디 다이오드가 온 상태인 기간동안 해당 스위치 소자를 온 시켜 인덕터 전류(Ip)가 다이오드가 아닌 스위치로 흐르도록 제어한다. 이에 따라 전력소모를 낮추어 효율을 향상시킬 수 있으며 스위치에서 발생하는 열을 줄여 내구성을 높일 수 있도록 한다.Inverter system according to the present invention is a method for reducing the power loss consumed by a diode in a general inverter control method, by turning on the corresponding switch element during the period in which the body diode is on, the inductor current (Ip) is not a diode switch Control to flow. As a result, efficiency can be improved by lowering power consumption and heat can be reduced to increase durability.
보다 상세하게 설명하면, 제 1 스위치가 오프된 후 인덕터 전류가 전류의 방향이 유지되도록 제 2 스위치의 보디 다이오드가 턴온 되는 프리휠링 기간에 맞추어 제 2 스위치를 턴 온 시키고, 유사한 방식으로 제 2 스위치가 오프된 후 제 1 스위치의 보디 다이오드가 온 되는 프리휠링 기간에 맞추어 제 1 스위치를 턴온 시킨다.In more detail, after the first switch is turned off, the second switch is turned on in accordance with the freewheeling period in which the body diode of the second switch is turned on so that the inductor current maintains the direction of the current, and the second switch in a similar manner. After turning off, the first switch is turned on in accordance with the freewheeling period during which the body diode of the first switch is turned on.
도 5 는 본 발명의 제 1 실시예에 따라 구현된 인버터 시스템의 구성이 도시된 도이다.5 is a diagram illustrating a configuration of an inverter system implemented according to the first embodiment of the present invention.
도 4에 도시된 동작 개념에 따라 구현된 본 발명의 제 1 실시예에 따른 디스플레이 장치의 인버터 시스템은, 도 5에 도시된 바와 같이, 평활된 전압(VF)를 기준 전압(Vref)와 비교하여 에러 전압(Verr)을 출력하는 에러 앰프(10), 에러 앰프의 출력전압(Verr)를 삼각파(CT)와 비교하여 램프 전류를 PWM 제어하기 위한 신호 PWMO를 출력하는 PWM 비교기(12), PWM 제어를 위한 삼각파를 발생하는 발진기(30), 스위치의 일반적인 PWM 듀티 제어신호에 부가하여 프리휠링 기간에 다이오드 대신에 해당 스위치를 온 시키는 제어 신호를 발생하는 스위치 제어기(50), 스위치 제어기(50)의 출력 신호에 의해 스위치가 구동될 수 있도록 증폭 시키는 게이트 드라이버(60)를 포함한다. 또한, 게이트 드라이버(60)의 스위치 제어 출력 신호에 따라 출력 신호인 OUT을 입력 전압 VIN 혹은 그라운드에 연결하는 스위치 블록(16), 스위치 블록(16)의 출력 신호인 OUT를 입력으로 받아 CCFL 램프를 구동 할 수 있도록 수백 V 이상의 교류로 증폭하는 교류 증폭기(18), 부하인 CCFL 램프(20), 램프 전류를 전압으로 변환하고 교류 전압을 직류 전압으로 평활하는 정류기(22)로 구성되는 인버터 시스템이다.In the inverter system of the display device according to the first embodiment of the present invention implemented according to the operation concept shown in FIG. 4, as shown in FIG. 5, the smoothed voltage VF is compared with the reference voltage Vref. Error amplifier 10 for outputting error voltage Verr, PWM comparator 12 for outputting signal PWMO for PWM control of lamp current by comparing output voltage Verr of error amplifier with triangle wave CT, PWM control An oscillator 30 for generating a triangular wave for the switch controller 50 and a switch controller 50 for generating a control signal for turning on a corresponding switch instead of a diode in the freewheeling period in addition to the general PWM duty control signal of the switch. And a gate driver 60 that amplifies the switch so that it can be driven by the output signal. In addition, according to the switch control output signal of the gate driver 60, the CCFL lamp is received by receiving the switch block 16 which connects the output signal OUT to the input voltage VIN or the ground, and OUT which is the output signal of the switch block 16. It is an inverter system which consists of an AC amplifier 18 which amplifies to AC of more than several hundred V to drive, a CCFL lamp 20 as a load, and a rectifier 22 which converts lamp current into voltage and smoothes AC voltage into DC voltage. .
본 발명의 일실시예에 따른 스위치 제어기(50)는 보디 다이오드(D1, D2)들이 온 되는 프리휠링 기간에 맞추어 맞추어 해당하는 스위치(M1, M2)를 온 시킬 수 있도록 프리휠링 기간에 해당하는 신호를 출력하는 다이오드 제어기(Diode On-Time Controller)(100) 및 스위치들의 PWM 제어를 하기 위한 개별 신호로 만들어 주는 로직제어기(150)를 포함한다.The switch controller 50 according to an embodiment of the present invention has a signal corresponding to the freewheeling period so that the corresponding switches M1 and M2 can be turned on in accordance with the freewheeling period in which the body diodes D1 and D2 are turned on. It includes a diode controller (Diode On-Time Controller) 100 for outputting the logic controller 150 to make a separate signal for the PWM control of the switches.
이때, 본 발명의 일실시예에 따른 다이오드 제어기(100)는 스위치 블록(16)을 구성하는 각 스위치 소자(M1, M2)의 보디 다이오드(D1, D2)가 온 되는 기간에 해당하는 출력 신호 PWMAd를 출력할 수 있다. At this time, the diode controller 100 according to the embodiment of the present invention output signal PWMAd corresponding to the period in which the body diode (D1, D2) of each switch element (M1, M2) constituting the switch block 16 is turned on You can output
즉, 도 1에 도시된 바와 같은 일반적인 인버터 시스템의 로직제어기(14)가 PWM 비교기(12)의 출력 신호인 PWMO와 발진기(30)의 충방전제어신호를 입력 받아 PWM 제어를 위한 제 1 스위치 제어 신호(DrvH) 및 제 2 스위치 제어 신호(DrvL)를 출력 하는데 반해, 본 발명의 일실시예에 따른 스위치 제어기(50)에 포함되는 로직 제어기(150)는 PWM 비교기(12)로부터 PWM 제어 신호인 PWMO와 발진 제어기(32)의 충방전제어신호(CK), 및 다이오드 제어기(100)로부터 프리휠링 기간에 해당하는 제어 신호(PWMAd)를 입력 받아 PWM 제어를 하면서 동시에 프리휠링 기간에 맞추어 해당 스위치를 온 시키도록 제어하는 제어 신호(DrvH, DrvN)을 출력 하여 게이트 드라이버(60)로 공급한다.That is, the logic controller 14 of the general inverter system as shown in FIG. 1 receives the PWMO which is the output signal of the PWM comparator 12 and the charge / discharge control signal of the oscillator 30 to control the first switch for PWM control. While outputting the signal DrvH and the second switch control signal DrvL, the logic controller 150 included in the switch controller 50 according to the embodiment of the present invention is a PWM control signal from the PWM comparator 12. The PWMO and the charge / discharge control signal CK of the oscillation controller 32 and the control signal PWMAd corresponding to the freewheeling period are input from the diode controller 100 to perform PWM control and simultaneously switch the switch according to the freewheeling period. The control signals DrvH and DrvN are controlled to be turned on and supplied to the gate driver 60.
에러 앰프(10)는 정류기(22)의 출력 전압(VF)와 기준 전압(Vref)의 차를 증폭하는 것으로 PWM 듀티를 증가 혹은 감소 할 수 있도록 출력 신호(Verr)를 출력하고 커패시터(Cc)는 인버터 시스템을 안정화 시킨다. 본 명세서에서, 에러 증폭기(10)는 입력 전압의 차를 출력 전류로 출력하는 트랜스컨덕턴스(Transconductance) 증폭기로 예시되어 있으나 이에 한정되지는 않으며 전압앰프로도 구성될 수 있다. The error amplifier 10 amplifies the difference between the output voltage VF and the reference voltage Vref of the rectifier 22 to output the output signal Verr so that the PWM duty can be increased or decreased, and the capacitor Cc is Stabilize the inverter system. In the present specification, the error amplifier 10 is illustrated as a transconductance amplifier that outputs a difference in input voltage as an output current, but is not limited thereto, and may also be configured as a voltage amplifier.
발진기(30)는 PWM 제어를 위한 삼각파를 만드는 회로로써 발진제어기(32)와 발진 커패시터(Cosc)로 구성 되어 있다. 발진제어기(32)는 충방전제어신호(CK)를 출력하며 이 신호가 하이 혹은 로우로 됨에 따라 발진 전류원(Iosc)를 발진 커패시터(Cosc)로 충전 혹은 방전하도록 하여 삼각파를 만든다. 게이트 드라이버(60)는 스위치 블록(16)을 구성하는 각 스위치 소자(M1, M2)들의 게이트-소오스(Gate-Source)간 전압을 충분히 큰 전압으로 구동하여 스위치 온 저항이 작아지도록 하면서 이와 동시에 스위치 소자(M1, M2)의 입력 커패시터를 충분히 빠르게 충방전할 수 있도록 큰 전류로 구동하기 위한 것으로 제 1 게이트 드라이버(미도시) 및 제 2 게이트 드라이버(미도시)로 구성되어 있다. 제 1 게이트 드라이버는 로직제어기(150)의 제 1 구동 제어 신호(DrvH)를 증폭하여 GP 신호를 출력하며 제 2 게이트 드라이버는 로직제어기(150)의 제 2 구동 제어 신호(DrvL)를 증폭하여 GN 신호를 출력한다. Oscillator 30 is a circuit for making a triangular wave for PWM control is composed of an oscillation controller 32 and an oscillation capacitor (Cosc). The oscillation controller 32 outputs the charge / discharge control signal CK, and the triangular wave is generated by charging or discharging the oscillation current source Iosc with the oscillation capacitor Cosc as this signal becomes high or low. The gate driver 60 drives the gate-source voltage of the switch elements M1 and M2 constituting the switch block 16 to a sufficiently large voltage so that the switch-on resistance is reduced while simultaneously switching It is composed of a first gate driver (not shown) and a second gate driver (not shown) for driving with a large current to charge and discharge the input capacitors of the elements M1 and M2 sufficiently fast. The first gate driver amplifies the first driving control signal DrvH of the logic controller 150 to output the GP signal, and the second gate driver amplifies the second driving control signal DrvL of the logic controller 150 to GN. Output the signal.
스위치 블록(16)은 출력 신호 OUT를 입력 전압 VIN과 그라운드에 번갈아 연결하도록 하는데, 상측에 위치한 제 1 스위치 소자(M1) 및 하측에 위치한 제 2 스위치 소자(M2)로 구성되어 있다. 스위치 소자는 각각 보디 다이오드(D1, D2)를 포함한다. The switch block 16 alternately connects the output signal OUT to the input voltage VIN and ground. The switch block 16 includes a first switch element M1 located above and a second switch element M2 located below. The switch element includes body diodes D1 and D2, respectively.
본 명세서에서, 제 1 스위치 소자(M1)는 P-type MOSFET가 적용된 것을 예로 하여 설명하나 이에 한정되지 않으며, N-type MOSFET를 사용할수도 있다. In the present specification, the first switch device M1 is described with an example in which a P-type MOSFET is applied, but is not limited thereto. An N-type MOSFET may be used.
제 1 스위치 소자(M1)는 게이트 드라이버(60)의 제 1 게이트 구동 신호(GP)에 따라 온/오프 동작하며 온 되면 OUT를 입력 전압인 VIN에 연결한다. 제 2 스위치 소자(M2)는 제 2 게이트 구동 신호(GN)에 따라 온/오프 동작하고 온 되면 OUT를 그라운드에 연결한다. 따라서 OUT은 VIN 혹은 그라운드(0V)의 전압을 가지는 구형파(Square Wave) 교류 전압이 된다. The first switch element M1 may be turned on / off according to the first gate driving signal GP of the gate driver 60, and when turned on, the first switch element M1 may connect OUT to an input voltage VIN. The second switch element M2 operates on / off according to the second gate driving signal GN and, when on, connects OUT to ground. Therefore, OUT becomes a square wave AC voltage having a voltage of VIN or ground (0V).
교류 증폭기(18)는 입력신호를 CCFL 램프(20)를 구동할 수 있도록 수백 볼트 이상의 교류 신호로 증폭하며, 보다 구체적으로는, 스위치 블록(16)의 구형파 교류 전압으로 출력된 출력신호인 OUT를 LC공진을 통해 양(+) 전압과 음(-) 전압을 갖는 정현파 출력 VAC로 변환 출력한다. 이를 위해 교류 증폭기는 직류 블로킹(DC Blocking) 커패시터(Cb), 1:n의 턴비(Turn Ratio)로 증폭하는 트랜스포머(Transformer)(T1) 및 공진 커패시터(Cr)를 포함하여 구성될 수 있다. The AC amplifier 18 amplifies the input signal into an AC signal of several hundred volts or more so as to drive the CCFL lamp 20, and more specifically, OUT, which is an output signal output from the square wave AC voltage of the switch block 16, is output. The LC resonance converts the output to a sine wave output VAC with positive and negative voltages. To this end, the AC amplifier may include a DC blocking capacitor Cb, a transformer T1 and a resonant capacitor Cr that amplify at a turn ratio of 1: n.
직류 블로킹 커패시터(Cb)는 직류 블로킹을 위해 큰 값의 커패시터가 보통 사용된다. 따라서 대칭 PWM 제어 방식을 사용하는 경우 직류 블로킹 커패시터(Cb)에는 VIN/2의 직류 전압이 충전된다. 이에 따라 트랜스포머(T1)의 입력 전압 Vx는 +VIN/2와 -VIN/2의 전압을 가지는 교류 전압이 된다. In the DC blocking capacitor Cb, a large value capacitor is usually used for DC blocking. Therefore, when the symmetric PWM control method is used, the DC blocking capacitor Cb is charged with a DC voltage of VIN / 2. Accordingly, the input voltage Vx of the transformer T1 becomes an AC voltage having voltages of + VIN / 2 and -VIN / 2.
정류기(22)는 램프 전류를 센스(sense)하고 정류한 후 PWM 제어가 가능하도록 평활(Filtering)하는 동작을 수행하며, 구체적으로는 센스 저항(Rs), 반파 정류 다이오드(D3), 평활 저항(Rf) 및 커패시터(Cf)를 포함하여 구성될 수 있다. 이때 정류기(22)는 CCFL 램프(20)가 하나 구비된 경우 도시된 예로서 설계자에 따라 여러 가지 방법으로 회로 구성을 달리 할 수 있으며, 또한 다수의 램프가 연결되는 경우에는 설계자에 따라 여러 방법으로 회로의 구성이 달라질 수 있다.The rectifier 22 senses and rectifies the lamp current and performs a filtering operation to enable PWM control. Specifically, the rectifier 22 includes a sense resistor (Rs), a half-wave rectifier diode (D3), and a smoothing resistor ( Rf) and a capacitor Cf. At this time, the rectifier 22 may be a circuit configuration in a variety of ways according to the designer as an example shown when one CCFL lamp 20 is provided, and also in the case of a plurality of lamps are connected in various ways depending on the designer The configuration of the circuit may vary.
도 6 은 도 5에 있어서, 스위치 제어기의 구성이 도시된 예시도이며, 도 7 은 도 6에 따라 구성된 회로의 동작 파형이 도시된 도이다.FIG. 6 is an exemplary diagram showing a configuration of a switch controller in FIG. 5, and FIG. 7 is a diagram showing an operation waveform of a circuit constructed according to FIG. 6.
도 6에 도시된 바와 같이, 본 발명의 제 1 실시예에 따른 인버터 시스템에 있어서, 스위치 제어기(50)의 다이오드 제어기(100)는 적어도 하나 이상의 라이징-에지-지연-회로(Rising Edge Delay Circuit)(102, 108) 및 논리 회로(104, 106, 110)로 구성될 수 있다. PWMO 신호를 프리휠링 기간에 해당하는 만큼 지연 시키는 제 1 라이징-에지-지연-회로(102)로부터 출력된 PWMO_Ax 신호와 PWMO가 인버터(104)를 통과하면서 출력된 PWMOB 신호, 및 발진 제어기의 충방전 제어신호(CK)를 NOR 게이트(106)의 입력으로 하면, 프리휠링 기간에 해당하는 PWMOA 신호를 얻을 수 있다. 프리휠링 기간에 다이오드 대신 해당하는 스위치 소자를 온 시키는 경우에도 스위치 소자가 동시에 온 되는 현상은 없어야 하므로 PWMOA를 일정 시간, 즉 데드 타임(Td) 만큼 상승 에지로부터 지연 시키는 제 2 라이징-에지-지연-회로(108)와 인버터(110)를 거치면 프리휠링 기간 동안 다이오드 대신에 해당하는 스위치들을 온 시키고자 하는 기간에 해당하는 출력 신호 PWMOAd를 얻을 수 있다. As shown in FIG. 6, in the inverter system according to the first embodiment of the present invention, the diode controller 100 of the switch controller 50 includes at least one rising-edge-delay-circuit. 102, 108 and logic circuits 104, 106, 110. The PWMO_Ax signal output from the first rising-edge-delay-circuit 102 and the PWMOB signal output as the PWMO passes through the inverter 104 and the charge / discharge of the oscillation controller are delayed by the PWMO signal by a freewheeling period. When the control signal CK is input to the NOR gate 106, a PWMOA signal corresponding to the freewheeling period can be obtained. The second rising-edge-delay- that delays the PWMOA from the rising edge by a certain time, i.e., dead time (Td), should not occur at the same time even when the corresponding switching element is turned on instead of the diode during the freewheeling period. After passing through the circuit 108 and the inverter 110, an output signal PWMOAd corresponding to a period for turning on corresponding switches instead of a diode during the freewheeling period can be obtained.
도 6에 도시된 본 발명의 일실시예에 따른 로직제어기(150)는 고효율의 인버터 시스템을 구현하기 위해, PWM 비교기(12)로부터 PWM 듀티 제어를 위한 PWM 듀티 제어 신호 PWMO, 프리휠링 기간에 다이오드 대신에 해당하는 스위치를 온 시키기 위해 다이오드 제어기(100)로부터 프리휠링 기간에 상당하는 제어 신호 PWMOAd, 및 게이트 드라이버를 분리하여 구동할 수 있는 신호를 만들기 위한 충방전 제어신호(CK)를 입력으로 받는다. 즉, 충방전 제어신호(CK)가 TFF(T-type flip-flop)(152)를 거치면 주파수가 충방전 제어신호(CK)에 비해 1/2이고 발진 파형(CT)의 발진최대전압 VH에서 천이(Transition)하는 서로 상보(Complementary)인 구형파 신호 VFD와 BVFD를 얻을 수 있으며 이 신호들이 논리 게이트를 거치면서 대칭 PWM 제어를 위한 스위치 제어 신호들을 출력할 수 있다. 또한, PWM 듀티 제어신호인 PWMO와 구형파 신호 BVFD를 NOR 게이트(154)의 입력단으로 하면 제 1 스위치 소자(M1)의 PWM 듀티 제어 기간에 해당하는 DrvP 신호를 얻을 수 있으며, 다이오드 제어기(100)의 출력신호인 PWMAd와 구형파 신호 VFD를 NOR 게이트(156)의 입력단으로 하면 제 1 스위치 소자(M1)의 보디 다이오드(D1)의 프리휠링 기간에 해당하는 DrvPA 신호를 얻을 수 있다. 또한, NOR 게이트(162)에서 DrvP 신호와 DrvPA 신호를 입력단으로 하면 제 1 스위치 소자(M1)의 PWM 듀티 제어 기간과 보디 다이오드(D1)의 프리휠링 기간에 제 1 스위치 소자(M1)를 온 시킬 수 있는 제어신호인 DrvH를 얻을 수 있다. The logic controller 150 according to the embodiment of the present invention shown in FIG. 6 is a diode in the PWM duty control signal PWMO for the PWM duty control from the PWM comparator 12 to implement an inverter system of high efficiency. Instead, the control signal PWMOAd corresponding to the freewheeling period and the charge / discharge control signal CK for generating a signal capable of driving the gate driver separately are received from the diode controller 100 to turn on the corresponding switch. . That is, when the charge / discharge control signal CK passes through the T-type flip-flop (TFF) 152, the frequency is 1/2 of the charge / discharge control signal CK, and at the oscillation maximum voltage VH of the oscillation waveform CT. The transitional complementary square wave signals VFD and BVFD can be obtained, and these signals can pass through a logic gate to output switch control signals for symmetric PWM control. In addition, if the PWM duty control signal PWMO and the square wave signal BVFD are input terminals of the NOR gate 154, a DrvP signal corresponding to the PWM duty control period of the first switch element M1 can be obtained. When the output signal PWMAd and the square wave signal VFD are input terminals of the NOR gate 156, the DrvPA signal corresponding to the freewheeling period of the body diode D1 of the first switch element M1 can be obtained. In addition, when the DrvP signal and the DrvPA signal are input to the NOR gate 162, the first switch element M1 is turned on during the PWM duty control period of the first switch element M1 and the freewheeling period of the body diode D1. DrvH can be obtained.
유사한 방법으로 PWM 듀티 제어신호인 PWMO와 구형파 신호 VFD를 NOR 게이트(160)의 입력단으로 하면, 제 2 스위치 소자의 PWM 듀티 제어 기간에 해당하는 DrvN를 얻고, 다이오드 제어기(100)의 출력신호인 PWMAd와 구형파 신호 BVFD를 NOR 게이트(158)의 입력단으로 하면 제 2 스위치 소자(M2)의 보디 다이오드(D2)의 프리휠링 기간에 해당하는 DrvNA 신호를 얻을 수 있다. 따라서 DrvN 신호와 DrvNA 신호가 OR 게이트(164)를 거치면 제 2 스위치 소자(M2)의 PWM 듀티 제어 기간과 보디 다이오드의 프리휠링 기간에 제 2 스위치 소자(M2)를 온 시키는 제어 신호 DrvL을 얻을 수 있다.In a similar manner, if the PWM duty control signal PWMO and the square wave signal VFD are input terminals of the NOR gate 160, DrvN corresponding to the PWM duty control period of the second switch element is obtained, and the PWMAd output signal of the diode controller 100 is obtained. When the square wave signal BVFD is an input terminal of the NOR gate 158, a DrvNA signal corresponding to the freewheeling period of the body diode D2 of the second switch element M2 can be obtained. Therefore, when the DrvN signal and the DrvNA signal pass through the OR gate 164, a control signal DrvL for turning on the second switch element M2 in the PWM duty control period of the second switch element M2 and the freewheeling period of the body diode can be obtained. have.
발진기(30)는 발진제어기(32)의 충방전제어신호(CK)에 따라 충방전 전류원 (Iosc)로 발진 커패시터(Cosc)를 충전 혹은 방전하여 발진 파형(CT)를 만드는 회로이다. 보다 상세하게 설명하면, 발진제어기(32)는 발진 파형(CT)가 발진최소전압 VL 보다 작아지는 순간 충방전제어신호(CK)가 로우(low)로 되어 발진 커패시터(Cosc)를 전류원(Iosc)으로 충전한다. 또한, 계속 충전되어 발진 파형(CT)이 발진최대전압 VH 보다 커지는 순간 충방전제어신호(CK)는 하이(high)로 되어 발진 커패시턴스(Cosc)가 방전된다. 따라서 CK 파형의 주파수는 CT 파형의 주파수와 같다.The oscillator 30 is a circuit which generates or oscillates the waveform CT by charging or discharging the oscillation capacitor Cosc with the charge / discharge current source Iosc according to the charge / discharge control signal CK of the oscillation controller 32. In more detail, the oscillation controller 32 causes the charge / discharge control signal CK to go low when the oscillation waveform CT becomes smaller than the oscillation minimum voltage VL, thereby driving the oscillation capacitor Cosc to the current source Iosc. To charge. In addition, the charge / discharge control signal CK becomes high at the moment when the oscillation waveform CT becomes larger than the oscillation maximum voltage VH so that the oscillation capacitance Cosc is discharged. Therefore, the frequency of the CK waveform is equal to the frequency of the CT waveform.
도 8 은 본 발명의 제 2 실시예에 따라 구현된 스위치 제어기의 구성이 도시된 예시도이다.8 is an exemplary view showing the configuration of a switch controller implemented according to a second embodiment of the present invention.
본 발명의 제 2 실시예에 따라 구현된 스위치 제어기는 도 8에 도시된 바와 같이, 다이오드 제어기(200)에 외부 신호에 의해 다이오드 온 기간을 바꿀 수 있는 지연시간제어기(202)를 더 포함하고, 로직제어기(250)에는 어느 특정 PWM 듀티에서만 프리휠링 기간에 다이오드 대신에 스위치가 온 되도록 제한하는 듀티제한기(Duty Limiter)(270)를 더 포함한다. 다이오드 온 기간은 트랜스포머(T1)의 리키지 인덕턴스 등 전력단 회로의 설계에 따라 달라진다. 따라서 다이오드 온 기간을 고정하는 것 보다 외부 신호에 의해 가변할 수 있도록 하는 것이 시스템 설계에 유리하다. 지연시간제어기(202)는 바람직하게 이러한 특성을 달성할 수 있도록 프리휠링 기간을 가변 하기 위한 것으로 FWT 핀 상태에 따라 제 1 라이징-에지-지연-회로(204)의 지연 시간이 변하도록 한 것이다. As shown in FIG. 8, the switch controller implemented according to the second embodiment of the present invention further includes a delay time controller 202 capable of changing the diode on period by an external signal in the diode controller 200. The logic controller 250 further includes a duty limiter 270 that limits only the specific PWM duty to be switched on instead of the diode in the freewheeling period. The diode on period depends on the design of the power stage circuit, such as the inductance of the transformer T1. Therefore, it is advantageous for system design to be able to vary by external signal rather than fixing diode on period. The delay time controller 202 is preferably for varying the freewheeling period to achieve this characteristic, so that the delay time of the first rising-edge-delay-circuit 204 varies according to the FWT pin state.
PWM 제어에서 PWM 듀티가 점점 증가하면 인덕터 전류(Ip)는 공진의 최대점을 지나 감소하게 되고 따라서 프리휠링이 시작하는 시점에서의 전류 크기가 작아져 다이오드 온 기간도 줄어들게 된다. 따라서 듀티가 어느 이상으로 크게 되면 다이오드 프리휠링 기간에 다이오드 대신에 스위치를 온 시켜 효율을 좋게 하는 효과가 줄어들 수 있다. 그러나 본 발명의 제 1 실시예에 따라 구현된 스위치 제어기(50)의 경우 PWM 듀티에 상관없이 고정된 시간으로 프리휠링 기간에 스위치를 온 시키므로 듀티가 점점 커지면 프리휠링 기간보다 길게 스위치를 온 시키게 되고 그에 따라 전류 파형의 왜곡이 생긴다.In PWM control, as the PWM duty increases, the inductor current (Ip) decreases beyond the maximum point of resonance, thus reducing the diode on-period as the current magnitude decreases at the beginning of freewheeling. Therefore, if the duty is increased to a certain degree, the effect of improving efficiency by turning on the switch instead of the diode during the diode freewheeling period can be reduced. However, since the switch controller 50 implemented according to the first embodiment of the present invention turns on the switch in the freewheeling period at a fixed time regardless of the PWM duty, the switch is turned on longer than the freewheeling period as the duty gradually increases. This causes distortion of the current waveform.
본 발명의 제 2 실시예에 따른 스위치 제어기는 이를 방지하기 위한 보완으로서, 어떤 PWM 듀티 이상이 되면 다이오드 제어기(200)의 출력을 무시하도록 구성되는 것이 바람직하다. The switch controller according to the second embodiment of the present invention is configured to ignore the output of the diode controller 200 when a certain PWM duty is exceeded.
또한, PWM 듀티가 점점 줄어들면 CCFL 램프(20)에 공급되는 전력이 감소하게 되는데 이에 따라 스위치 전류도 감소하여 스위치가 온 상태를 유지하는 기간도 점차 감소하게 된다. 따라서, 본 발명의 제 1 실시예에 따라 구현된 스위치 제어기(50)와 같이 고정된 시간 동안 다이오드 대신에 스위치를 온 시키면 PWM 듀티가 점점 감소하는 경우 PWMO와 PWMAd 중 어느 신호가 PWM 듀티 제어 신호이고 어느 신호가 다이오드 온 시간 제어 신호인지 알 수 없다. 따라서, 이러한 문제점을 해결하기 위한 방안으로서, PWM 듀티가 어느 이하로 내려가면 다이오드 제어기(200)의 출력을 무시하도록 스위치 제어기를 구성할 수 있다.In addition, as the PWM duty decreases gradually, the power supplied to the CCFL lamp 20 decreases. As a result, the switch current also decreases, so that the period during which the switch remains on is gradually reduced. Therefore, if the PWM duty is gradually reduced when the switch is turned on instead of the diode for a fixed time, such as the switch controller 50 implemented according to the first embodiment of the present invention, any signal of PWMO and PWMAd is a PWM duty control signal. It is not known which signal is the diode on time control signal. Therefore, as a solution to this problem, the switch controller can be configured to ignore the output of the diode controller 200 when the PWM duty is lowered below.
상술한 기능을 수행하기 위한 것으로 본 발명의 제 2 실시예에 따른 스위치 제어기(50')는 PWM 듀티의 어느 영역에서만 다이오드 제어기(200)의 출력 PWMAd가 동작하도록 하기 위한 듀티 제한기(270)을 로직제어기(250)에 더 포함시킬 수 있다. 듀티 제한기(270)은 적어도 하나 이상의 비교기(272, 274) 및 NAND 게이트(276)을 포함하여 구성될 수 있다. PWM 듀티는 에러 앰프(10)의 출력 전압(Verr)에 의해 결정되므로 PWM 듀티의 최대와 최소를 제한하기 위해서는 에러 앰프의 출력 전압(Verr) 및 듀티 제한 전압 Vmax와 Vmin을 비교하도록 할 수 있다. 이때 Vmax는 최대 PWM 듀티를 설정하는 기준 전압이고 Vmin은 최소 PWM 듀티를 설정하는 기준 전압이다. In order to perform the above-described function, the switch controller 50 ′ according to the second embodiment of the present invention provides a duty limiter 270 for operating the output PWMAd of the diode controller 200 only in any region of the PWM duty. It may be further included in the logic controller 250. Duty limiter 270 may comprise at least one comparator 272, 274 and a NAND gate 276. Since the PWM duty is determined by the output voltage Verr of the error amplifier 10, the output voltage Verr and the duty limit voltage Vmax and Vmin of the error amplifier may be compared to limit the maximum and minimum of the PWM duty. Where Vmax is the reference voltage that sets the maximum PWM duty and Vmin is the reference voltage that sets the minimum PWM duty.
듀티 제한기(270)에서는 에러 앰프의 출력전압(Verr)이 Vmin보다 크고 Vmax 보다 작을 경우에만 출력 FWD가 로우로 되어 다이오드 제어기(200)의 출력 PWMAd가 동작한다. 또한, 에러 앰프의 출력전압(Verr)이 Vmin 보다 작거나 Vmax 보다 큰 경우에는 FWD가 하이로 되어 DrvPA와 DrvNA는 PWMAd와 상관없이 항상 로우가 된다. 따라서 다이오드 제어기(200)의 출력 PWMAd은 무시되고 스위치 제어기(50')는 PWM 듀티 제어만 하게 된다. In the duty limiter 270, the output FWD goes low only when the output voltage Verr of the error amplifier is greater than Vmin and less than Vmax so that the output PWMAd of the diode controller 200 operates. In addition, if the error amplifier output voltage (Verr) is less than Vmin or greater than Vmax, FWD is high and DrvPA and DrvNA are always low regardless of PWMAd. Therefore, the output PWMAd of the diode controller 200 is ignored and the switch controller 50 'performs only the PWM duty control.
한편, 본 발명의 제 1 및 제 2 실시예에 따라 구현된 다이오드 제어기는 다이오드 온 시간이 PWM 듀티와 상관 없이 일정하도록 제어한다. Meanwhile, the diode controller implemented according to the first and second embodiments of the present invention controls the diode on time to be constant regardless of the PWM duty.
실제의 프리휠링 기간보다 다이오드 제어기에 의해 프리휠링 기간 동안 다이오드 대신에 해당 스위치를 온 시키는 기간이 짧더라도 PWM 제어 동작에는 문제가 발생하지 않지만 효율 측면에서는 실제 필요한 프리휠링 기간만큼 해당 스위치를 온 시키는 것에 비해 효율적인 측면에서 조금 나쁘게 된다. Although the duration of turning on the switch instead of the diode during the freewheeling period by the diode controller is shorter than the actual freewheeling period, there is no problem in the PWM control operation, but in terms of efficiency, It's a bit worse in terms of efficiency.
반대로 실제 필요한 프리휠링 기간 보다 길게 다이오드 제어기가 프리휠링 기간에 다이오드 대신에 해당 스위치를 온 시키게 되면 전류 파형의 왜곡이 생기고 이 왜곡은 해당 스위치를 온 시키는 기간이 길수록 커진다. PWM 듀티 제어에서 다이오드 프리휠링 기간은 PWM 듀티가 증가할수록 짧아진다. 따라서 PWM 듀티가 증가함에 따라 다이오드 제어기에서 발생하는 다이오드 온 시간이 짧아지도록 하면 PWM 듀티가 작게 동작하는 경우에는 효율을 좀더 좋게 할 수 있고 PWM 듀티가 크게 동작하는 경우에는 전류 파형을 좋게 할 수 있을 것이다.On the contrary, if the diode controller turns on the switch instead of the diode in the freewheeling period longer than the actual freewheeling period, the distortion of the current waveform is generated, and the distortion increases as the period for turning on the switch is longer. In PWM duty control, the diode freewheeling period becomes shorter as the PWM duty increases. Therefore, as the PWM duty increases, shortening the diode-on time generated by the diode controller will improve the efficiency when the PWM duty is small and improve the current waveform when the PWM duty is high. .
도 9 는 본 발명의 제 3 실시예에 따라 구현된 스위치 제어기의 내부 구성이 도시된 예시도이다.9 is an exemplary diagram showing an internal configuration of a switch controller implemented according to the third embodiment of the present invention.
본 발명의 제 3 실시예에 따라 구현된 스위치 제어기는 상술한 목적을 달성하기 위한 것으로서, 다이오드 제어기(300)의 출력 PWMAd가 PWM 듀티에 따라 변하도록 구현되었다. 보다 상세하게 설명하자면, 도 9에 도시된 바와 같이, 가변 펄스폭 생성기(302)에서 PWM 듀티에 따라 펄스폭이 변하는 신호 PWMO_Ax1를 출력하면, 출력된 신호는 로직 회로를 거친 후 가변 다이오드 온 시간에 해당하는 PWMAd로 출력된다. The switch controller implemented according to the third embodiment of the present invention is to achieve the above-described object, and is implemented such that the output PWMAd of the diode controller 300 changes according to the PWM duty. More specifically, as shown in FIG. 9, when the variable pulse width generator 302 outputs a signal PWMO_Ax1 whose pulse width is changed according to the PWM duty, the output signal passes through a logic circuit to the variable diode on time. It is output with the corresponding PWMAd.
PWM 듀티가 낮아지는 경우에는 다이오드 제어기(300)의 출력을 무시하고 단순한 PWM 듀티 제어로 동작하게 하기 위해 본 발명의 제 2 실시예에 따라 구현된 로직제어기의 구성에서 듀티 제한기 대신 최소듀티제한기(370)를 포함한다. 따라서, 에러 앰프의 출력 전압(Verr)이 Vmin 보다 작아지면 FWDm이 하이로 되어 DrvPA와 DrvNA는 PWMAd와 상관없이 항상 로우가 되며, 다이오드 제어기(300)의 출력 PWMAd은 무시되고 스위치 제어기(50″)는 PWM 듀티 제어만 하게 된다.When the PWM duty is lowered, the minimum duty limiter instead of the duty limiter in the configuration of the logic controller implemented according to the second embodiment of the present invention in order to ignore the output of the diode controller 300 and to operate as simple PWM duty control. 370. Therefore, if the output voltage Verr of the error amplifier is less than Vmin, FWDm becomes high so that DrvPA and DrvNA always go low regardless of PWMAd, and the output PWMAd of diode controller 300 is ignored and the switch controller 50 ″. Will only control the PWM duty.
본 발명의 제 3 실시예에 따라 구현된 스위치 제어기에 있어서, 가변 펄스 폭 발생기의 구성을 살펴보면 다음과 같다.In the switch controller implemented according to the third embodiment of the present invention, the configuration of the variable pulse width generator is as follows.
도 10 은 본 발명에 따른 인버터 시스템에 있어서, 다이오드 프리휠링 기간이 도시된 도로서, 도 10(a)는 프리휠링 기간을 PWM 듀티에 따라 일차 함수로 모델링 한 도이며, 도 10(b)는 PWM 듀티와 다이오드 프리휠링 기간 TFW의 관계가 도시된 도이다.FIG. 10 is a diagram illustrating a diode freewheeling period in an inverter system according to the present invention. FIG. 10 (a) illustrates a model of the freewheeling period as a linear function according to PWM duty. The relationship between the PWM duty and the diode freewheeling period T FW is shown.
도 10(a)를 참조하면, TFW는 다음의 수학식과 같이 나타낼 수 있다.Referring to FIG. 10 (a), T FW may be represented by the following equation.
수학식 1
Figure PCTKR2009002890-appb-M000001
 Equation 1
Figure PCTKR2009002890-appb-M000001
다이오드 제어기(300)가 발생하는 다이오드 프리휠링 기간이 PWM 듀티에 따라 감소하도록 하기 위해서는 수학식1과 같이 동작하도록 하면 된다. PWM 제어에서 에러 앰프 출력 전압(Verr)은 현재 동작하고 있는 PWM 듀티를 나타내고 있다. 따라서 에러 앰프 출력전압(Verr)보다 높은 전압 VFW을 삼각파 CT와 비교하면 다이오드 프리휠링 기간을 얻을 수 있고 VFW 전압이 PWM 듀티가 증가함에 따라 감소하도록 하면 다이오드 제어기(300)는 PWM 듀티가 증가할 때 수학식1을 만족하면서 다이오드 프리휠링 기간이 감소하는 신호를 만들 수 있다.In order to reduce the diode freewheeling period generated by the diode controller 300 according to the PWM duty, the diode controller 300 may operate as shown in Equation 1 below. In PWM control, the error amplifier output voltage (Verr) represents the current PWM duty. Therefore, if the voltage V FW higher than the error amplifier output voltage Verr is compared with the triangular CT, the diode freewheeling period can be obtained and if the V FW voltage is decreased as the PWM duty increases, the diode controller 300 increases the PWM duty. When satisfying the equation (1) can be made a signal that reduces the diode freewheeling period.
또한, 에러 앰프 출력 전압(Verr) 보다 높은 전압 VFW로 삼각파 CT와 비교할 때 PWM 듀티와 다이오드 프리휠링 기간 TFW의 관계가 도시된 도 10(b)를 참조하면, 다음의 수학식 2가 도출될 수 있다.Also, referring to FIG. 10 (b) in which the relationship between the PWM duty and the diode freewheeling period T FW is shown in comparison with the triangular CT with a voltage V FW higher than the error amplifier output voltage Verr, the following equation 2 is derived. Can be.
수학식 2
Figure PCTKR2009002890-appb-M000002
 Equation 2
Figure PCTKR2009002890-appb-M000002
상술한 바와 같이 도출된 수학식 2에 수학식 1을 대입하면 다음과 같은 수학식을 얻을 수 있다.Substituting Equation 1 into Equation 2 derived as described above may obtain the following equation.
수학식 3
Figure PCTKR2009002890-appb-M000003
 Equation 3
Figure PCTKR2009002890-appb-M000003
수학식 3에서 K1과 VFW,OFFSET은 도출할 수 있는 값이며, Verr은 에러 앰프 출력 전압이므로 수학식 3을 만족하는 회로를 설계하여 가변 펄스 폭 생성기로 적용할 수 있다.In Equation 3, K 1 , V FW, OFFSET are derivable values, and Verr is an error amplifier output voltage, so a circuit satisfying Equation 3 can be designed and applied to the variable pulse width generator.
도 11 은 도 10 에 있어서, 가변 펄스 폭 생성기를 구현하는 예가 도시된 회로도이다.FIG. 11 is a circuit diagram illustrating an example of implementing a variable pulse width generator in FIG. 10.
본 발명의 제 3 실시예에 따른 스위치 제어기에 있어서, 가변 펄스 폭 생성기는 가변전압발생기(410)와 비교기(420)를 포함할 수 있다. 가변전압발생기(410)는 수학식 3을 만족하도록 회로로 구현되어 PWM 듀티가 증가함에 따라 가변 전압 VFW가 점점 감소하도록 한다. 이때 VFW는 에러 앰프 출력전압(Verr) 보다 항상 큰 값이므로 VFW를 비교기(420)에서 삼각파 CT와 비교하면 PWM 듀티가 증가함에 따라 펄스폭이 점점 감소하는 PWMO_Ax1 신호를 얻을 수 있다. In the switch controller according to the third embodiment of the present invention, the variable pulse width generator may include a variable voltage generator 410 and a comparator 420. The variable voltage generator 410 is implemented as a circuit to satisfy Equation 3 so that the variable voltage V FW gradually decreases as the PWM duty increases. At this time, since V FW is always greater than the error amplifier output voltage Verr, when V FW is compared with the triangular CT in the comparator 420, a PWMO_Ax1 signal in which the pulse width gradually decreases as the PWM duty increases.
보다 상세하게 설명하자면, 가변전압발생기(410)는 에러 앰프 출력전압(Verr)에 비례하는 출력 전류 I1을 출력하는 전압-전류 변환기(412)와 그 출력을 입력으로 받아 소오싱 전류로 출력하는 전류미러(416), 옵셋 전압 Voff에 비례하는 출력 전류 I2을 출력하는 전압-전류 변환기(414)와 그 출력을 입력으로 받아 소오싱 전류로 출력하는 전류미러(418)를 포함한다. 또한, 전류미러(416, 418)의 출력 전류를 합하여 전압으로 변환하는 저항 R3로 구성되어 있다. 이때 전류미러(416, 418)의 이득이 1인 경우 가변전압발생기(410)의 출력 VFW는 다음의 식으로 나타날 수 있다.In more detail, the variable voltage generator 410 receives a voltage-current converter 412 that outputs an output current I 1 proportional to an error amplifier output voltage Verr, and receives the output as an input sourcing current. The current mirror 416 includes a voltage-current converter 414 for outputting an output current I 2 proportional to an offset voltage Voff, and a current mirror 418 for receiving the output as an input and outputting a sourcing current. Moreover, it consists of the resistor R3 which adds the output current of the current mirrors 416 and 418, and converts it into a voltage. In this case, when the gains of the current mirrors 416 and 418 are 1, the output V FW of the variable voltage generator 410 may be represented by the following equation.
수학식 4
Figure PCTKR2009002890-appb-M000004
 Equation 4
Figure PCTKR2009002890-appb-M000004
수학식 3 및 수학식 4를 비교하면, K1=R3/R1이고 VFW,OFFSET=(R3/R2)*Voff 임을 알 수 있다. 따라서 VFW를 삼각파 CT와 비교하면 PWM 듀티가 증가함에 따라 펄스폭이 감소하는 신호 PWMO_Ax1을 얻을 수 있다. Comparing Equations 3 and 4, it can be seen that K 1 = R 3 / R 1 and V FW, OFFSET = (R 3 / R 2 ) * V off . Thus, comparing VFW with a triangular CT, we can obtain a signal PWMO_Ax1 whose pulse width decreases as the PWM duty increases.
이상과 같이 본 발명에 따른 디스플레이 장치의 인버터 시스템 및 그의 동작방법을 예시된 도면을 참조로 하여 설명하였으나, 스위치 소자의 보디 다이오드로 전류가 흐르는 기간에 해당 스위치를 온 시켜 인버터 시스템의 전력 효율을 향상시키고 스위치 소자의 내구성을 증진시킬 수 있도록 하는 본 발명의 기술사상은 보호되는 범위 이내에서 당업자에 의해 용이하게 응용될 수 있음은 자명하다.As described above, the inverter system of the display device and the operation method thereof according to the present invention have been described with reference to the illustrated drawings. However, by turning on the corresponding switch in a period in which current flows through the body diode of the switch element, the power efficiency of the inverter system is improved. It is apparent that the technical idea of the present invention, which can improve the durability of the switch element, can be easily applied by those skilled in the art within the scope of protection.
CROSS-REFERENCE TO RELATED APPLICATIONCROSS-REFERENCE TO RELATED APPLICATION
본 특허출원은 2008년 10월 23일 한국에 출원한 특허출원번호 제10-2008-0104243호에 대해 미국 특허법 119(a)조(35 U.S.C § 119(a))에 따라 우선권을 주장하면, 그 모든 내용은 참고문헌으로 본 특허출원에 병합된다.(This non-provisional application claims priorities under 35 U.S.C § 119(a) on Patent Application No.(특허출원번호) filed in Korea on October 23, 2008, the entire contents of which are hereby incorporated by reference.) 아울러, 본 특허출원은 미국 이외에 국가에 대해서도 위와 동일한 동일한 이유로 우선권을 주장하면 그 모든 내용은 참고문헌으로 본 특허출원에 병합된다.This patent application claims priority under Patent Application No. 10-2008-0104243, filed in Korea on October 23, 2008, pursuant to Article 119 (a) (35 USC § 119 (a)). All content is incorporated by reference in this non-provisional application claims priorities under 35 USC § 119 (a) on Patent Application No. filed in Korea on October 23, 2008, the entire In addition, if this patent application claims priority to countries other than the United States for the same reasons as above, all the contents are incorporated by reference in this patent application.

Claims (10)

  1. 다수 스위치가 온/오프 동작하여 생성된 교류전압이 인가되면 램프가 발광하도록 하는 디스플레이 장치의 인버터 시스템에 있어서,In the inverter system of the display device to cause the lamp to emit light when the AC voltage generated by the on / off operation of the multiple switches,
    상기 각 스위치가 오프된 후 전류의 방향이 유지되는 프리휠링(freewheeling) 기간 동안 상기 각 스위치의 보디 다이오드(body diode)로 프리휠링 전류가 흐르는 것을 방지하고 일시적으로 상기 각 스위치가 온 되도록 제어신호를 생성하는 스위치 제어기The control signal is prevented from flowing to the body diode of each switch during a freewheeling period in which the direction of the current is maintained after each switch is turned off, and the control signal is temporarily turned on. Generating switch controller
    를 포함하는 디스플레이 장치의 인버터 시스템.Inverter system of the display device comprising a.
  2. 제 1 항에 있어서,The method of claim 1,
    상기 스위치 제어기는 상기 프리휠링 기간 중 상기 보디 다이오드가 도통하는 기간에 해당하는 신호를 생성하는 다이오드 제어기; 및The switch controller may include a diode controller generating a signal corresponding to a period during which the body diode conducts during the freewheeling period; And
    상기 다이오드 제어기로부터 출력되는 신호로부터 프리휠링 기간동안 상기 각 스위치의 온/오프 동작을 제어하기 위한 제어신호를 생성하는 로직 제어기Logic controller for generating a control signal for controlling the on / off operation of each switch during the freewheeling period from the signal output from the diode controller
    를 포함하는 디스플레이 장치의 인버터 시스템.Inverter system of the display device comprising a.
  3. 제 2 항에 있어서,The method of claim 2,
    상기 다이오드 제어기는 외부 입력신호에 의해 상기 보디 다이오드가 도통하는 시간에 해당하는 신호를 조절하는 지연시간 제어기를 포함하는 디스플레이 장치의 인버터 시스템.The diode controller includes a delay time controller for controlling a signal corresponding to the time the body diode conducts by an external input signal.
  4. 제 2 항에 있어서,The method of claim 2,
    상기 스위치 제어기는 상기 지연시간 제어기의 동작을 조절하여 특정 PWM 듀티에서만 프리휠링 기간에 해당 스위치가 온/오프 동작하도록 제어신호를 생성하여 상기 로직 제어기로 전달하는 듀티 제한기를 포함하는 디스플레이 장치의 인버터 시스템.The switch controller includes a duty limiter for controlling the operation of the delay time controller to generate a control signal and transmit the control signal to the logic controller during the freewheeling period during a freewheeling period only at a specific PWM duty. .
  5. 제 1 항에 있어서,The method of claim 1,
    상기 스위치 제어기는 상기 인버터 시스템의 PWM 듀티에 따라 프리휠링 기간에 해당하는 신호를 생성하는 다이오드 제어기; 및The switch controller includes a diode controller for generating a signal corresponding to a freewheeling period according to the PWM duty of the inverter system; And
    상기 PWM 듀티가 일정 값 이하로 낮아지면 상기 다이오드 제어기의 출력신호를 무시하고 상기 각 스위치의 온/오프 제어신호를 생성하는 로직 제어기Logic controller to ignore the output signal of the diode controller to generate the on / off control signal of each switch when the PWM duty is lowered below a certain value
    를 포함하는 디스플레이 장치의 인버터 시스템.Inverter system of the display device comprising a.
  6. 제 5 항에 있어서,The method of claim 5,
    상기 다이오드 제어기는 상기 PWM 듀티에 따라 출력 펄스 폭을 가변시키는 가변 펄스 폭 발생기를 포함하는 디스플레이 장치의 인버터 시스템.The diode controller includes a variable pulse width generator for varying the output pulse width in accordance with the PWM duty.
  7. [규칙 제26조에 의한 보정 17.07.2009]　
    제 6 항에 있어서, 상기 가변 펄스 폭 발생기는 다음의 수학식을 만족하는 디스플레이 장치의 인버터 시스템.
    Figure WO-DOC-MATHS-1
     (Verr; 에러앰프 출력전압, TFW; 프리휠링 기간, VOFFSET; 오프셋 전압)     [Revision 17.07.2009 under Rule 26]
    The inverter system of claim 6, wherein the variable pulse width generator satisfies the following equation.
    Figure WO-DOC-MATHS-1
     (Verr; Error Amplifier Output Voltage, T FW ; Freewheeling Period, V OFFSET ; Offset Voltage)
  8. 제 5 항에 있어서,The method of claim 5,
    상기 로직 제어기는 상기 PWM 듀티가 일정 수치 이하로 낮아지면 상기 다이오드 제어기의 출력신호를 무시하도록 하는 최소듀티 제한기를 포함하는 디스플레이 장치의 인버터 시스템.The logic controller includes a minimum duty limiter to ignore the output signal of the diode controller when the PWM duty is lowered below a predetermined value.
  9. 에러앰프 출력 전압과 삼각파를 이용하여 다수 스위치에 대한 온/오프 제어신호를 생성하는 제 1 단계, 생성된 온/오프 제어신호에 따라 스위치가 온/오프 동작을 하여 교류전압을 생성하고, 생성된 교류전압을 램프에 인가하여 빛이 발광하도록 하는 제 2 단계로 이루어진 인버터 시스템의 동작방법에 있어서,The first step of generating an on / off control signal for a plurality of switches using the error amplifier output voltage and a triangular wave, the switch is turned on / off in accordance with the generated on / off control signal to generate an alternating voltage In the operating method of the inverter system consisting of a second step of applying light to the lamp to emit light,
    상기 제 1 단계는, 상기 각 스위치가 오프된 동안 각 스위치의 보디 다이오드로 프리휠링 전류가 흐르는 것을 방지하기 위하여 일시적으로 상기 각 스위치가 온 되도록 하는 제어신호를 생성하는 제 3 단계The first step is a third step of generating a control signal for temporarily turning on each switch so as to prevent freewheeling current from flowing to the body diode of each switch while the switches are turned off.
    를 포함하는 인버터 시스템의 동작방법.Method of operation of the inverter system comprising a.
  10. 제 9 항에 있어서,The method of claim 9,
    상기 제 3 단계는 상기 각 스위치가 오프된 후 전류의 방향이 유지되는 기간인 프리휠링(freewheeling) 기간에 해당하는 신호를 생성하고, 생성된 신호로부터 해당 스위치의 온/오프 동작을 수행하도록 하는 제어신호를 생성하는 단계를 포함하는 인버터 시스템의 동작방법.The third step is to generate a signal corresponding to a freewheeling period, which is a period in which the direction of current is maintained after each switch is turned off, and controls to perform an on / off operation of the corresponding switch from the generated signal. A method of operating an inverter system comprising generating a signal.
PCT/KR2009/002890 2008-10-23 2009-05-29 Inverter system and operating method thereof WO2010047455A1 (en)

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