WO2008152565A2

WO2008152565A2 - Supply circuit, in particular for leds

Info

Publication number: WO2008152565A2
Application number: PCT/IB2008/052259
Authority: WO
Inventors: Matthias Wendt; Georg Sauerlaender; Heinz W. Van Der Broeck; Martin Christoph; Joseph H. A. M. Jacobs; Dirk Hente
Original assignee: Philips Intellectual Property & Standards Gmbh; Koninklijke Philips Electronics N.V.
Priority date: 2007-06-13
Filing date: 2008-06-09
Publication date: 2008-12-18
Also published as: WO2008152565A3; TW200915922A

Abstract

Supply circuit for supplying an output signal to a load, in particular for supplying a DC output current (Io) to an electronic lamp unit (LE), comprising: an input circuit (1) comprising input terminals (10, 11) for receiving an input supply signal (Us), a transistor H-bridge circuit (12) having separately controllable transistors (Tl, T2, T3, T4) for converting said input supply signal (Us) into a pulse signal (Ul), and an inductance circuit (Li) coupled between an input terminal (10, 11) and a H- bridge circuit input terminal (121), an output circuit (2) comprising a resonance circuit (Cs, Ls), a transformer (Tr) and an output rectifier circuit (B2), in particular a full bridge rectifier circuit, for converting said pulse signal (Ul) into said output signal (Io), and output terminals (20, 21) for outputting said output signal (Io) to said load (LE), a control circuit (3) for generating control signals (si, s2) for controlling the transistors (Tl, T2, T3, T4) of said transistor H-bridge circuit (12).

Description

SUPPLY CIRCUIT, IN PARTICULAR FOR LEDS

FIELD OF THE INVENTION

The present invention relates to a supply circuit for supplying an output signal to a load, in particular for supplying a DC output current to an electronic lamp unit. Further, the present invention relates to a corresponding method for supplying an output signal.

BACKGROUND OF THE INVENTION

Solid state lighting is of growing interest for residential, automotive and professional applications. Since solid state lamps such as LEDs cannot be supplied from a battery or the AC mains directly, electronic power drivers are needed. For efficiency reasons LED drivers have to be operated in a switched mode. They convert the available DC or AC voltage into a DC current for LEDs. Moreover, these electronic drivers have to control the current in the LEDs, which are typically connected in series (LED string).

European patent application 06110730.6 describes a resonant galvanic isolating power driver, which feeds a current into a series connection of LEDs. In particular, a supply circuit for supplying output current signals to loads and comprising first circuits with transistors coupled as a H-bridge for converting input voltage signals into pulse signals and comprising second circuits with inductance circuits and rectifying circuits for receiving the pulse signals and for supplying the output current signals to the loads are provided with third circuits for controlling the first circuits. The third circuits comprise generators for generating control signals for controlling the transistors for reducing dependencies between the input voltage signals and the output current signals. The third circuits supply the control signals in dependence on the input voltage signals and independently of the output current signals. The pulse signals comprise first pulses having a first amplitude and second pulses having a second amplitude different from the first amplitude and they comprise levels having a third amplitude different from the first and second amplitudes. Using this supply circuit the LED light can be dimmed by reducing the frequency. In most applications the power of the whole LED lighting system has to be supplied from the AC mains. One standard solution for the required AC to DC conversion consists of a diode bridge rectifier with a smoothing capacitor. As is well known, this rectifier circuit shows some disadvantages: a) The rectified output voltage varies with the mains voltage: b) the resulting mains current consists of small current pulses and the corresponding low frequency harmonics exceed certain standards; and c) the power factor is poor.

The problems can be solved by applying a preconditioner circuit, where apart from the diode bridge rectifier a boost converter is used to control the current drawn from the mains. The current can be controlled by the transistor to be proportional to the mains voltage. As a result the low- frequency harmonics are substantially reduced and a one-per-unit power factor can be achieved. The disadvantage of this solution is that the LED driver as a whole needs an additional active power stage, which increases size and cost.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide an improved supply circuit for supplying output current signals to loads, in particular an improved resonant galvanic isolating power driver, which feeds a current into a series connection of LEDs and by which a mains rectifier power factor correction (PFC) function can be performed without influencing the resonant driver operation of the H-bridge of transistors to a variable (LED) load and without requiring an additional active power stage. Further, a corresponding method is to be provided.

In a first aspect of the present invention, a supply circuit is presented for supplying an output signal to a load, in particular for supplying a DC output current to an electronic lamp unit, comprising: an input circuit comprising input terminals for receiving an input supply signal, a transistor H-bridge circuit having separately controllable transistors for converting said input supply signal into a pulse signal, and an inductance circuit coupled between an input terminal and a H-bridge circuit input terminal, an output circuit comprising a resonance circuit, a transformer and an output rectifier circuit, in particular a full bridge rectifier circuit, for converting said pulse signal into said output signal and output terminals for outputting said output signal to said load, a control circuit for generating control signals for controlling the transistors of said transistor H-bridge.

In a further aspect of the present invention a corresponding method is presented. Preferred embodiments of the invention are defined in the dependent claims. It shall be understood that the claimed supply circuit and the claimed method have similar and/or identical preferred embodiments to those defined in the dependent claims.

The invention is based on the idea to achieve PFC mains input performance without the need for additional transistors and diodes. The transistors of the H-bridge circuit are not only used to control the output current in the load, but they also perform the function of the active elements of a PFC rectifier. Thus, the PFC performance is achieved according to the present invention without needing additional power semiconductors. In particular, by the supply circuit according to the present invention not only an output signal is provided to a load, but also an input signal is generated. In a particular application a DC output current is supplied to an electronic lamp unit and a sinusoidal current is drawn from the mains. According to an embodiment the supply circuit further comprises a supply signal conversion circuit, coupled to said input terminals of said input circuit, comprising an input rectifier circuit, in particular a full bridge rectifier circuit comprising a bridge of diodes and/or electronic switches, for rectifying a mains signal, in particular an AC mains voltage signal, to obtain said input supply signal, in particular a DC supply voltage signal. Preferably said supply signal conversion circuit further comprises a low-pass filter circuit, coupled to input terminals of said input rectifier circuit, for low-pass filtering said mains signal. Thus, a discontinuous signal flow (in particular discontinuous current flow) in the inductance circuit and the additional filtering are applied to achieve an optimized preconditioning or power factor correcting function and to enable an adaptation of the power drawn from the mains depending on a variation of the load, e.g. due to dimming or a change of the load elements (e.g. LEDs).

The use of electronic switches (e.g. thyristors) for the full bridge rectifier instead of or in combination with diodes provides the ability to achieve full range dimming. In addition, an electronic switch can be provided to the input path to disconnect the converter from mains in order to reduce the delivered power.

According to a further embodiment the inductance circuit comprises an one or more inductors having a low inductance value, in particular in the range from lOμH to ImH, which leads to a discontinuous current flow through the inductor. In an embodiment two inductors, each being connected to a half bridge of the transistor H-bridge is provided, preferably coupled by a diode so that both inductors can be used alternately. With such an embodiment losses can be reduced and smaller input current ripples can be obtained.

Preferably, said input supply signal is supplied to a first and a second input terminal of said input circuit, said pulse signal being outputted at a first and a second output terminal of said input circuit, and said second input terminal corresponding to to said first output terminal or being coupled via inductors to said first and second output terminals.

An advantageous embodiment of the input circuit comprises transistor control means, in particular gate drivers, for separately switching said transistors on and off. However, other means can equally be applied, e.g. digital control means, by which the same switching function can be achieved.

According to a further embodiment said transistor control means and/or said control circuit are adapted for controlling first transistors of first half-bridges of said H- bridge circuit, such that they are switched on when the corresponding second transistor of the respective half-bridge of said transistor H-bridge circuit is switched off and vice versa. It is also possible that the dead times can be set individually.

In this way, gate drivers can be used which operate with an inverse output, and four gate drivers can be controlled by only two control signals. Thus, in the H-bridge circuit, either the upper or lower transistor is conducting, so that the output terminal of each half- bridge is either connected to the positive or negative rail of a DC link voltage across the H- bridge circuit.

Advantageously, said input circuit is adapted to generate a pulse signal having alternately positive and negative pulses of a pulse width, said pulse width being adapted to the resonant period of said resonance circuit. This has the advantage that the H-bridge generates sinusoidal current pulses and that the output current is almost constant independent of the output voltage.

In a still further embodiment said input circuit is adapted to generate a pulse signal having a freewheel path between the pulses, the freewheel time being variable to control the pulse signal, in particular to control the repetition frequency. This is particularly important in the case of a dimming operation and input voltage compensation. In further dependent claims, preferred embodiments of the control circuit are defined. According to one embodiment said control circuit is adapted to generate said control signals based on a measured DC link voltage across said H-bridge circuit and on a predetermined average output current to said load. This allows a stabilisation of the DC link voltage. According to a further embodiment said control circuit is adapted to generate two control signals having pulses which do not overlap in time, the first control signal being provided for control of the first two transistors of the H-bridge circuit and the second control signal being provided for control of the second two transistors of the H-bridge circuit. The voltage related to the difference of these two control signals determines the output current. The voltage related to the first control signal determines the input current of the H-bridge and thus the mains current. In case of a sinusoidal mains voltage, this results in an almost sinusoidal mains current.

According to an alternative embodiment said control circuit is adapted to two control signals having pulses which do partly overlap in time, the first control signal being provided for control of the first two transistors of the H-bridge circuit and the second control signal being provided for control of the second two transistors of the H-bridge circuit. This enables a stabilisation of the DC link voltage above the H-bridge circuit and matching of the input and output power of the supply circuit. The two overlapping pulses have no influence on the output current.

Preferably, the control circuit is adapted to generate two control signals having a constant switching frequency, rather than a changing switching frequency (changed simultaneously with the on-time of the transistors of the H-bridge). In this way flicker can be avoided or reduced. It is also advantageous that the control circuit is adapted to generate two control signals each having a fixed duty cycle, in particular a duty cycle of 25%, 50% or 75%. In this way zero voltage switching (ZVS) can be obtained.

In still another embodiment the control circuit is adapted to generate two control signals such that the product of switching frequency and DC link voltage is kept constant so that all transistors can be operated in ZVS mode.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter. In the following drawings

Fig. 1 shows a block diagram of a known supply circuit, Fig. 2 shows the characteristic voltages and current waves of the supply circuit shown in Fig. 1, Fig. 3 shows a block diagram of a diode bridge rectifier circuit,

Fig. 4 shows a block diagram of a preconditioner circuit,

Fig. 5 shows a block diagram of an embodiment of a supply circuit according to the present invention, Fig. 6 shows control signals, converter current and output voltage of the supply circuit shown in Fig. 5 having a duty cycle of 25%, Fig. 7 shows the simulated averaged mains current for a sinusoidal mains voltage,

Fig. 8 shows a further embodiment of control signals, converter current and output voltage of the supply circuit shown in Fig. 5 having a duty cycle between 25% and 40%, Fig. 9 shows a further embodiment of control signals, converter current and output voltage of the supply circuit shown in Fig. 5 having a duty cycle of 40%, Figs. 10 to 12 show a further embodiments of control signals, converter current and output voltage of the supply circuit shown in Fig. 5 having various duty cycles, but a constant switching period, Fig. 13 shows a further embodiment of control signals, converter current and output voltage of the supply circuit shown in Fig. 5 for achieving zero voltage switching,

Fig. 14 shows the PFC current at different DC link voltages,

Fig. 15 shows the switching frequency and PFC power for constant output current,

Fig. 16 shows a block diagram of a rectifier circuit using thyristors only, Fig. 17 shows a block diagram of a rectifier circuit using thyristors and diodes,

Fig. 18 shows a block diagram of a rectifier circuit using an additional switch, Fig. 19 shows a block diagram of another embodiment of a supply circuit according to the present invention, and

Fig. 20 shows a block diagram of still another embodiment of a supply circuit according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

Fig. 1 shows a supply circuit (also called driver) as described in European patent application 06110730.6 the description of which is herewith incorporated by reference. As shown, this driver comprises a transistor H-bridge 12 having four transistors Tl, T2, T3, T4, a transformer Tr, a series capacitor Cs, a full bridge rectifier B2 and a smoothing capacitor Co connected in parallel to the load LE (here five LEDs). The series capacitor Cs and the leakage inductance Ls of the transformer form a series resonant circuit, which is

characterized by the resonance frequency fres = and the resonant impedance

Zres = / — . V Cs Basically, the transistor H-bridge 12 generates alternately positive and

negative voltage pulses with a fixed pulse width x = . Between these pulses the output

2 - fres voltage of the H-bridge 12 is zero (Ul=O), set by a freewheel operation.

As a result all currents of the converter are composed by sinusoidal half waves only and the current is zero at all switching instants. Figs. 2 A and 2B show the characteristic voltages and current waves of this circuit.

If the voltage drop Uo of the supplied LED string is within the voltage range

N2 1 N2

Ui ≥ Uo ≥ Ui , a constant current is fed into the LED load given by the equation:

Nl 3 Nl j _ Ui 2 N2 fs Zres π Nl fres

Since the output current Io is proportional to the operating frequency fs of the

H-bridge, the LED light can be dimmed by reducing the frequency — • fres ≥ fs > 0 .

In most applications the power of the whole LED lighting system has to be supplied from the AC mains. One standard solution for the required AC to DC conversion consists of a diode bridge rectifier comprising four diodes D1-D4 with a smoothing capacitor Cl as shown in Fig. 3. The disadvantages of such a rectifier circuit (see above) can be solved by applying a preconditioner circuit as shown in Fig. 4, where apart from the diode bridge rectifier a boost converter (Tp, Dp, Lp) is used to control the current Im(t) drawn from the mains. The current Im(t) can be controlled by the transistor Tp to be proportional to the mains voltage Um(t). As a result the low frequency harmonics are substantially reduced and a one-per-unit power factor can be achieved. The disadvantage of this solution is that the overall LED driver needs an additional active power stage, which increases size and cost. An embodiment of the supply circuit according to the present invention is shown in Fig. 5. This embodiment is based on the H-bridge LED driver as shown in Fig. 1 extended with a mains rectifier Bl and an inductor Li and by applying an advanced control scheme to the H-bridge, as will be explained below.

In particular, the supply circuit according to this embodiment comprises an input circuit 1 having input terminals 10, 11 for receiving an input supply voltage Us, the transistor H-bridge circuit 12 having separately controllable transistors Tl, T2, T3, T4 for converting said input supply voltage Us into a stabilised DC link voltage Ui and for converting the DC link voltage Ui into pulse voltage signal Ul (outputted by output terminals 122, 123), and an inductance circuit Li coupled between the first input terminal 10 and an upper H-bridge circuit input terminal 121. The supply circuit further comprises an output circuit 2 comprising a resonance circuit formed by the capacitor Cs and the inductor Ls, a transformer Tr and a full bridge rectifier circuit B2 for converting said pulse voltage signal Ul into the output current Io and output terminals 20, 21 for outputting said output current Io to said load LE. A control circuit is provided for generating control signals si, s2 for controlling the transistors Tl, T2, T3, T4 of said transistor H-bridge circuit 12.

The mains voltage Um is first rectified by a full bridge rectifier Bl (e.g. a simple diode bridge shown in Fig. 3, but without the smoothing capacitor Cl) of a supply signal conversion circuit 4. Its output terminals 10, 11 are connected in parallel to the transistor Tl of the H-bridge 12 via an inductor Li. Between the mains 5 and the rectifier bridge BI a low pass frequency filter Fl is inserted.

The inductor Li, the transistor Tl and the internal reverse diode of transistor T3 perform a boost converter function for the mains rectifier B 1. It can be used to draw an almost sinusoidal current from the mains 5 and to stabilize the DC link voltage Ui. Since the freewheel operation of the H-bridge 12 can either be realized by turning on Tl and T2 or by turning on T3 and T4 one degree of freedom is given to adapt the input mains current Im to the load LE. Preferably, the boost converter operates in the discontinuous mode. This results in a triangular input current whose peak value is proportional to the instantaneous mains voltage. The low pass frequency filter Fl smoothes the high frequency triangular current so that the mains current is almost sinusoidal and contains no high frequency parts. The power drawn from the mains 5 is set by mains voltage Um, the on-time of transistor Tl and the repetition frequency fs. Input and output power should be equal, which can be set by the inductance Li of the choke (the lower the inductance Li the higher the input power).

In the case of a dimming operation, both the output current and the mains current are reduced simultaneously. Hence, the input power automatically matches the load. Changes in the load (e.g. different numbers of series connected LEDs) and the changes of the RMS mains voltage can be compensated by splitting the freewheel operation to the upper Tl, T2 and lower transistors T3, T4 of the H-bridge. Thus, by applying a proper control scheme the PFC function is integrated in the basic H-bridge operation of the original resonant LED driver. The PFC rectifier function does not need any additional active power semiconductor. The whole rectifier part is preferably composed of passive components. The PFC operation can be controlled by choosing the freewheel path of the H-bridge without influencing the output voltage of the H-bridge.

Briefly summarized, by adding a rectifier bridge Bl and a series connected choke Li to the H-bridge 12 and by adapting the control scheme of the H-bridge, a mains rectifier PFC function can be performed according to the present invention without influencing the resonant driver operation of the H-bridge to a variable LED load.

In more detail, with reference to the embodiment of the supply circuit shown in Fig. 5, the H-bridge cl2 consisting of the transistors Tl, T2, T3 andT4 controls both the output current Io in the LED and the mains input current Im. The DC link voltage Ui supplies the H-bridge. A capacitor Ci is applied to smooth the DC link voltage Ui.

Each transistor Tl, T2, T3 andT4 is connected to a gate driver Gl, G2, G3, G4. The two gate drivers of one half-bridge are turned-on and turned-off by a common binary control signal si, s2. The lower gate drivers G3, G4 operate with an inverted output. Thus, either the upper or the lower transistor is conducting, so that the output terminal of each half- bridge is either connected to the positive or the negative rail of the DC link voltage Ui.

The output terminals of the H-bridge are connected to the primary winding Nl of a transformer Tr via the series capacitor Cs. The secondary winding N2 of the transformer Tr is connected to a full bridge rectifier B2. Its output feeds the LED load and a capacitor Co is used to smooth the current in the LEDs.

The full bridge rectifier Bl rectifies the mains voltage Um. The positive terminal of the rectifier bridge is connected to the positive rail of the DC link voltage Ui via the inductor Li while the negative terminal of the bridge rectifier is connected to the output terminal of the first half-bridge Tl, T3. A low-pass frequency filter Fl between the mains and the rectifier prevents HF currents in the mains.

The two control signals sl(t) and s2(t) are generated by the control unit 3. This control unit measures the DC link voltage Ui and needs a set value for the desired average output current Io . The operation of the whole converter will be explained by studying the signals sl(t) and s2(t) and the resulting output voltage Ul(t). This is illustrated in Fig. 6.

In principle the control signal sl(t) and s2(t) are repetitively in the on- state for a certain pulse width x depending on the resonant period τ = \- Tres = 0.5/ fres . The repetition frequency fs is constant for a certain operation point but it can be varied to set another output current.

Both control signals sl(t) and s2(t) are identical but phase-shifted by half the repetition period. As a result, the desired square wave output voltage Ul (t) is generated. It leads to the sinusoidal current waves Il(t), as already shown in Fig. 2.

Based on this control sequence the rectifier part is shorted if signal sl(t) is in the on- state, and it is connected to the DC link voltage Ui if sl(t) is zero.

It is preferred that the inductor Li of the rectifier part is small. Preferred values are in the range from lOμH to ImH. This leads to a discontinuous current Ii(t). Hence, the current Ii(t) rises linearly if the signal sl(t) is HIGH. If sl(t) is LOW, transistor Tl is turned off. Since the DC link voltage Ui is larger than the rectified mains voltage |t/m(t)| , the current linearly decreases to zero.

The characteristic current wave Ii(t) is also depicted in Fig. 6. The peak value of the current Ii(t) is given by the equation: Since the on-time of transistor Tl is fixed, the peak value of current Ii(t) is proportional to the instantaneous voltage of the mains |t/m(t)| . The fall time tf of the current Ii(t) depends on the difference between the DC link voltage Ui and the absolute mains

voltage Um(t) ^■τ .

For the largest part of the mains period Ui » \Um(t)\ so that in this case τ » t_f . Hence, the averaged value of current Ii(t) is nearly proportional to the instantaneous voltage |t/m(t)| . It results in an almost sinusoidal mains current Im(t). Preferably, both the inductor Li and the filter Fl are provided in the supply circuit. As shown in Fig. 6, the current Ii(t) flows discontinuously at a high frequency. For EMI reasons it cannot be drawn directly from the mains. The filter Fl separates the high frequency part of current Ii(t). Under ideal conditions the line current Im(t) becomes sinusoidal at the mains frequency of 50Hz. Thus, generally the filter Fl is optional.

Fig. 7 shows the simulated averaged mains current Im for a sinusoidal mains voltage Um with Um = 0.9 • Ui . In order to stabilize the DC link voltage Ui , the average current flowing into the capacitor Ci has to be equal to the average current drawn from the H- bridge /_: ≡ s^t)- Z₁(^ . This condition can be fulfilled by varying the on-time of transistor

Tl. If this pulse width modulation is performed within a freewheel path of the H-bridge it does not influence the output voltage of the H-bridge. An embodiment of the control scheme according to the present invention is illustrated in Fig. 8. It shows the two control signals sl(t) and s2(t). Compared to the original pulses the pulse width τ of signal sl(t) is enlarged by the variable time ti. Simultaneously a small pulse of the same width is added to control signal s2(t). Hence, the pulse width ti has no influence on the output voltage Ul(t) of the H-bridge but enlarges the on-time of transistor Tl : ton =τ +ti . The inserted pulse enlargement ti can be used to stabilize the DC link voltage and thus to match input and output power

It should be noted that the averaged input current increases by the square of the on-time ton =τ +ti of transistor Tl.

For a proper operation of the resonant driver, the time span tl of the freewheel operation of the H-bridge between the pulses s2(t) and sl(t) should be at least t_λ >τ + ti . No extra restrictions are required for the freewheel operation between pulse sl(t) and s2(t). This time span t2 can be reduced down to t₂ ≥τ .

In general the time span tl may be equal to time span t2. For the point of maximum power these times may be different: t_λ =% +ti max and t₂ =τ . For a load range of 1 to 4 the maximum pulse enlargement becomes t_Λ max =τ . This leads to a minimum repetition period Tswitch,min = 4 τ +τ = 5 τ and to a

2 frequency range 0 < fs ≤ fres • — = 0.4 • fres .

Finally, it should be noted that the output current in the LEDs can still be controlled from a maximum value to zero by decreasing the switching frequency fs without influencing the power match, since the input and the output power vary proportionally to the switching frequency fs. Potential applications of the invention are for example energy saving lamps with LEDs, ballasts for LED installations for general illumination. Also LCD backlight drivers could make use of the integrated preconditioner function.

Compared to the supply circuit described in European patent application 06110730.6, there is generally no difference in the output performance of the H-bridge (Ul (t) = [ sl(t) - s2(t) ] x Ui). This means that the driver has the same output performance as that of the driver described in European patent application 06110730.6. The main difference is, however, the circuit behaviour at the input current, which can be controlled by the new time shift ti. Ul(t) is not influenced by ti, but UTl(t) = f (ton) = f ( ti) = Ui x ( 1 - sl(t)). The time shift ti is used to control the power drawn from the mains.

As explained, Ii(t) is new and not discussed in European patent application 06110730.6. In the H-bridge described in European patent application 06110730.6, the input voltage Ui may be directly supplied by a standard rectifier or by a PFC rectifier. The PFC rectifier (as shown in Fig. 4) prevents mains interactions and draws a sinusoidal current from the mains. Moreover, by using a preconditioner instead of a simple rectifier (as shown in Fig. 3) it is also possible to stabilize the DC voltage Ui above the peak voltage of the mains.

According to the present invention the mains AC voltage is rectified by a diode bridge and connected in parallel to transistor Tl via the inductor Li. The main advantage of the new concept is that PFC mains input performance can be achieved without the need for additional transistors and diodes. The transistors Tl and T2 are not only used to control the output current in the load, but the transistor Tl and the inner diode of T2 also perform the function of the transistor Tp and the diode Dp in the PFC rectifier shown in Fig. 4. This means that the PFC performance is added to the circuit by only a modified control scheme, without the need for additional power semiconductors. In the above described embodiments, the boost converter of the PFC stage and the discontinuous series resonant converter with constant average current output are combined into a single stage as depicted in Fig. 5. The big advantages of this topology are the reduced number of components and, hence a higher power density and reduced bill of materials. The control algorithm described above uses a variable duty cycle for the boost operation in order to keep the DC link voltage Ui at a constant level. The variation in duty cycle is achieved through alternating between the two freewheeling states. In the first freewheeling state, the upper two transistors Tl and T2 are closed and in the second freewheeling state, the lower two transistors T3 and T4 are closed. Additionally, on-time is added to the switching period of transistor Tl. Hence, the duty cycle of Tl can be varied between 25% and 40%. This control technique enables the reduction of the DC link voltage. Hence, the rating of components can be reduced saving costs.

The resulting waveforms for this mode of operation are depicted in Fig. 8. For comparison, the graphs depicted in Fig. 6 show the waveforms for the case only the second freewheeling mode (T3 and T4) is used. In this case, the duty cycle is fixed to d = 25%. In the graphs depicted in Fig. 9 the on-time ton of Tl is enhanced by τ. The resulting duty cycle is d = 40%. For proper control of the DC-link voltage, which is required for a constant output current, the duty cycle has to be adjusted. This is done by varying the on-time ton of transistor Tl . However, this control strategy might prevent that zero-voltage switching (ZVS) is obtained for all switching transitions leading to a reduction in efficiency. Further, the control guarantees a minimum duty cycle of 25%, so that dimming over a full range, i.e. down to zero, is not possible. Still further, there might be changes in the constant current output behavior. In the following, further embodiments of the present invention are presented providing solutions for these possible problems.

The switching scheme presented in Figs. 6, 8 and 9 changes the on-time ton and the switching frequency fs simultaneously. This leads to a lower switching frequency fs if the on-time is enhanced. Of course, this leads to a higher input power, because it is proportional to the switching frequency and proportional to the square of the on-time.

However, decreasing the switching frequency will directly result in a lower average output current. Consequently, the attached lamp might flicker. To avoid this, it it proposed in an embodiment to generally enhance the switching period by an additional time, also if it is not used for additional on-time. The resulting waveforms for a switching period which is generally enhanced by τ are shown in Figs. 10 (for d=25%), 11 (for 25% < d < 40%) and 12 (for d=40%). In this control strategy, the switching frequency fs is chosen a bit lower, but is kept constant during operation (T_swltch = const.). This way of control will avoid flicker problems, but has still switching transitions which are made without ZVS.

It shall be noted that in the embodiment illustrated in Figs. 10-12 the duration between positive and negative pulses of the DC link voltage Ui can also be equal.

In a further embodiment, aimed at providing a solution to obtain ZVS, it is proposed to operate the converter only with a duty cycle of 25%, 50% or 75% during every switching period (cycle-by-cycle variation between 25% and 50% or between 25% and 75% duty cycle), because ZVS is achieved for all switching transitions in these two cases. Further, no additional time is added to the switching period. This keeps the converter's constant current output behavior. Varying between both points operation allows proper control of the DC-link voltage Ui. The principle working is depicted in Fig. 13.

Alternatively, the switching scheme can be set at the beginning of every mains period and kept constant during this mains period to avoid current peaks and to obtain sinusoidal mains currents (grid-cycle variation between 25% and 50% duty cycle). In this case, the DC-link capacitor C_1n has to be designed bigger. This does not mean that the size of the converter also increases, because heat sinks of the switches can be made small (ZVS) and/or other passive components can be designed smaller (high switching frequency). If flicker is still a problem in some applications, only operation modes that guarantee no flicker can be allowed.

In still another embodiment of the present invention a solution is provided to control the PFC stage without changing the on-time of transistor Tl and to obtain ZVS. The power of the converter, which is delivered by the PFC stage, depends on the DC link voltage Ui (sometimes also called DC-bus voltage). At a lower DC link voltage Ui the PFC power is higher than at a high DC link voltage Ui. The PFC inductor current Ii(t) is shown in Fig. 14 at high DC link voltage Ui (Fig. 14A) and at low DC link voltage Ui (Fig. 14B).

The reason for a difference in the power is the different time the current needs to slope down t₀ff. At a lower DC link voltage, this time is longer. Sequentially, more energy is transferred from mains to the DC-bus.

Hence, this effect can be used to control the PFC stage in a very simply way. Therefore, the product of switching frequency fs and DC link voltage Ui is kept constant. This leads to a constant average output current. The switching frequency fs as a function of the DC link voltage Ui (normalized to the nominal DC link voltage UiO) is shown in Fig. 15. Additionally, the PFC power P_PFC is depicted in Fig. 15. It can be seen, that a variation in the switching frequency fs results in a huge variation of the PFC power P_PFC- For example, if the DC link voltage Ui slopes down to 96% of its nominal value the switching frequency fs has to increase to about 104% of its nominal value. In contrast to this small variation of the switching frequency fs, the PFC power P_PFC increases to about 112% of its nominal value. For the control, i.e. to keep the voltage constant and subsequently the output current, the switching frequency fs can be adjusted.

This interrelation can be used to control the PFC power. If the load or the input voltage varies and the product of switching frequency and DC link voltage is kept constant, the converter will operate at stable operating points with different DC link voltages. With this control strategy, the converter only switches at its normal switching points. Consequently, all transistors can operate in ZVS mode.

Another embodiment is provided to obtain dimming over the full range. Full range dimming can be achieved by replacing the rectifier diodes of the input rectifier bridge Bl (cf. Figs. 3 and 4) with electronic switches, e.g. thyristors. Two examples for those embodiments of an input rectifier bridge are depicted in Figs. 16 and 17 using thyristors TyI- Ty4 only (Fig. 16) or using two thyristors TyI, Ty3 and two diodes D2, D4 (Fig. 17). The gating of the thyristors TyI - Ty4 can be controlled by the central control unit 3 (cf. Fig. 5).

Another possibility is to add an electronic switch S to the input path as depicted in the example of Fig. 18. The depicted transistor can be controlled by the central control unit 3.

In the above embodiments, the converter can be disconnected from mains in order to reduce the power delivered by the preconditioner.

The embodiment presented in Fig. 5 uses only one PFC inductor Li. Additionally, the PFC operates in discontinuous boost mode. This might lead to a high current ripple. Consequently, the PFC stage may cause losses and possibly requires an input filter to avoid mains current disturbance. A solution to achieve lower losses and a smaller input current ripple is the use of two PFC inductors LiI, Li2 as shown in the embodiment depicted in Fig. 19. Each of the two PFC inductors LiI, Li2 is connected to a half-bridge of the full-bridge converter 12. Both PFC inductors LiI, Li2 are decoupled by diodes DiI, Di2.

In this configuration, both PFC inductors LiI, Li2 are used alternately resulting from the switching scheme of the full bridge 12. The first PFC inductor LiI is used at the beginning of the switching period and the second PFC inductor Li2 is used after the half switching period. The peak currents of the inductors LiI, Li2 will be lower if the same power is delivered. Consequently, losses of the inductors LiI, Li2 may become lower and the input current ripple will be lower, due to the decreased peak currents and two discontinuous boost PFC converters are used alternately. Further, the PFC current Ii is distributed more evenly on all four transistors Tl - T4. This can reduce the transistor losses of the converter. Fig. 20 shows a block diagram of still another embodiment of a supply circuit according to the present invention. Compared to the supply circuit shown in Fig. 5 an additional capacity Czvs and an additional inductor Lzvs coupled in series between the first and second output terminals 122, 123. These additional elements provide for a softer switching of the transistors T1-T4. This is achieved by zero voltage switching. While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.

In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Any reference signs in the claims should not be construed as limiting the scope.

Claims

CLAIMS:

1. Supply circuit for supplying an output signal to a load, in particular for supplying a DC output current (Io) to an electronic lamp unit (LE), comprising: an input circuit (1) comprising input terminals (10, 11) for receiving an input supply signal (Us), a transistor H-bridge circuit (12) having separately controllable transistors (Tl, T2, T3, T4) for converting said input supply signal (Us) into a pulse signal (Ul), and an inductance circuit (Li) coupled between an input terminal (10, 11) and a H- bridge circuit input terminal (121), an output circuit (2) comprising a resonance circuit (Cs, Ls), a transformer (Tr) and an output rectifier circuit (B2), in particular a full bridge rectifier circuit, for converting said pulse signal (Ul) into said output signal (Io), and output terminals (20, 21) for outputting said output signal (Io) to said load (LE), a control circuit (3) for generating control signals (si, s2) for controlling the transistors (Tl, T2, T3, T4) of said transistor H-bridge circuit (12).

2. Supply circuit as claimed in claim 1, further comprising a supply signal conversion circuit (4), coupled to said input terminals (10, 11) of said input circuit (1), comprising an input rectifier circuit (Bl), in particular a full bridge rectifier circuit comprising a bridge of diodes and/or electronic switches, for rectifying a mains signal (Um), in particular an AC mains voltage signal, to obtain said input supply signal (Us), in particular a DC supply voltage signal.

3. Supply circuit as claimed in claim 2, wherein said supply signal conversion circuit (4) further comprises a low-pass filter circuit (Fl), coupled to input terminals of said input rectifier circuit (Bl), for low-pass filtering said mains signal (Um).

4. Supply circuit as claimed in claim 1, wherein said inductance circuit comprises one or more inductors (Li; LiI, Li2) having a low inductance value, in particular in the range from lOμH to ImH.

5. Supply circuit as claimed in claim 1, wherein said input supply signal (Us) is supplied to a first and a second input terminal (10, 11) of said input circuit (1), said pulse signal (Ul) being outputted at a first and a second output terminal (122, 123) of said input circuit (1), and said second input terminal (11) corresponding to said first output terminal (122) or being coupled via inductors (LiI, Li2) to said first and second output terminals (122, 123).

6. Supply circuit as claimed in claim 1, wherein said input circuit (1) comprises transistor control means (Gl, G2, G3, G4), in particular gate drivers, for separately switching said transistors (Tl, T2, T3, T4) on and off.

7. Supply circuit as claimed in claim 1 or 6, wherein said transistor control means (Gl, G2, G3, G4) and/or said control circuit (3) are adapted for controlling the first transistors (Tl, T2) of first half-bridges of said transistor H- bridge circuit (12) such that they are switched on when the corresponding second transistor (T3, T4) of the respective half-bridge of said transistor H-bridge circuit (12) is switched off and vice versa.

8. Supply circuit as claimed in claim 1, wherein said input circuit (1) is adapted to generate a pulse signal (Ul) having alternately positive and negative pulses of a pulse width, said pulse width being adapted to the resonant period of said resonance circuit (Cs, Ls).

9. Supply circuit as claimed in claim 1, wherein said input circuit (1) is adapted to generate a pulse signal (Ul) having a freewheel path between the pulses, the freewheel time being variable to control the repetition frequency.

10. Supply circuit as claimed in claim 1, wherein said control circuit (3) is adapted to generate said control signals (si, s2), based on a measured DC link voltage (Ui) across said transistor H-bridge circuit (12) and on a predetermined current signal (Iref), in particular a predetermined average output current to said load (LE).

11. Supply circuit as claimed in claim 1 , wherein said control circuit (3) is adapted to generate two control signals (si, s2) having pulses which do not overlap in time, the first control signal (si) being provided for control of the first two transistors (Tl, T3) of the transistor H-bridge circuit (12) and the second control signal (s2) being provided for control of the second two transistors (T2, T4) of the transistor H-bridge circuit (12).

12. Supply circuit as claimed in claim 1, wherein said control circuit (3) is adapted to generate two control signals (si, s2) having pulses which do partly overlap in time, the first control signal (si) being provided for control of the first two transistors (Tl, T3) of the transistor H-bridge circuit (12) and the second control signal (s2) being provided for control of the second two transistors (T2, T4) of the transistor H-bridge circuit (12).

13. Supply circuit as claimed in claim 1, wherein said control circuit (3) is adapted to generate two control signals (si, s2) having a constant switching frequency.

14. Supply circuit as claimed in claim 1, wherein said control circuit (3) is adapted to generate two control signals (si, s2) each having a fixed duty cycle, in particular a duty cycle of 25%, 50% or 75%.

15. Method of supplying an output signal to a load, in particular for supplying a DC output current (Io) to an electronic lamp unit (LE), comprising the steps of: receiving an input supply signal (Us) by input terminals (10, 11), converting said input supply signal (Us) into a pulse signal (Ul) by a transistor H-bridge circuit (12) having separately controllable transistors (Tl, T2, T3, T4), said input circuit (1) further having an inductance circuit (Li) coupled between an input terminal (10, 11) and a H-bridge circuit input terminal (121), converting said pulse signal (Ul) into said output signal (Io) by an output circuit (2) comprising a resonance circuit (Cs, Ls), a transformer (Tr) and an output rectifier circuit (B2), in particular a full bridge rectifier circuit, outputting said output signal (Io) to said load (LE) by output terminals (20, 21), and generating control signals (si, s2) for controlling the transistors (Tl, T2, T3, T4) of said transistor H-bridge circuit (12).