WO1994021021A1

WO1994021021A1 - Neutral commutated soft switched current source inverters

Info

Publication number: WO1994021021A1
Application number: PCT/US1994/002496
Authority: WO
Inventors: Gerard Francis Ledwich
Original assignee: Electric Power Research Institute, Inc.
Priority date: 1993-03-10
Filing date: 1994-03-08
Publication date: 1994-09-15
Also published as: AU6362494A

Abstract

A resonant DC-link current source converter which incorporates a neutral-forming circuit (60-62) and an auxiliary commutating circuit (20) for commutating on a line-to-neutral basis, thereby improving the switch device (50-55) utilization and reducing voltage stresses. The invention also includes a transfer assist circuit (30) for expediting resonant transfers which employ neutral commutation.

Description

NEUTRAL COMMUTATED SOPT PITCHED CURRENT SOURCE INVES .8

Field of the Invention The present invention relates to resonant power converters and, more particularly, to a resonant DC link circuit in which zero-current resonant switching takes place with respect to a neutral point to reduce switching losses and voltage stresses.

BACKGROUND OF THE INVENTION Soft-switching (or resonant) converters are favored devices for static power conversion because they incur far lower switching losses than their hard-switched counterparts. This is because the active devices in soft-switched converters are switched at zero-voltage or zero-current intervals. For example, U.S. Patent No. 4,730,242 to Divan discloses a parallel resonant link converter in which the active switching devices are switched at times of zero-voltage intervals. Switching losses are comparatively small. Hence, commutation may occur at higher frequencies. However, the link current is bi-directional in soft-switched zero-voltage converters such as Divan '242. Consequently, costly bi¬ directional switching devices are required.

Series-resonant current source converters were developed to eliminate the need for bi-directional switching devices. Here, switching of the active devices occurs at times of zero- current intervals rather than zero-voltage. The typical series-resonant current source inverter comprises an input converter circuit coupled to an output inverter circuit through a DC link. The input converter circuit and output inverter circuit are assembled with uni-directional switching devices such as thyristors, which devices are switched according to a predetermined sequence to accomplish the desired transfer of current. The input converter circuit is switched in accordance with the three phase AC input to maintain a DC level based on the voltage difference between the most positive and most negative phases. The output inverter circuit is switched to synthesize a desired three- phase AC output from the DC level. Structurally, the input converter circuit may be the mirror image of the output inverter circuit, and only the switching sequences need differ.

For example, U.S. Patent No. 4,942,511 to Lipo et al. discloses a series resonant DC link converter in which switching occurs at zero-current intervals. The natural turn- off ability of the switching devices is used for commutation. Hence, only one switch in each of the input and output converters needs to be gated to effect a resonant commutation of the respective converters. Consequently, both converters can be implemented using inexpensive uni-directional switching devices such as thyristors. FIG. 1 illustrates a conventional output inverter circuit for a full line-to-line commutated series-resonant current source inverter such as used in Lipo et al. '511. The inverter circuit comprises a three phase bridge of thyristors 50-55 which takes its input from the resonant DC link circuit (not shown) of the series-resonant current source inverter. The thyristors 50-55 are fired according to a predetermined commutation sequence to supply a synthesized three-phase AC current i_ga, i_sb, and i_sc at the three outputs. One full cycle of the three-phase output current waveform is synthesized by a complete switching cycle of the output inverter circuit. Each complete switching cycle of the output inverter circuit comprises six 60° sectors, and during each 60° switching sector one upper switch 50, 52, and 54 must be gated together with its respective series-connected lower switch 51, 53, and 55. Problems remain in the above-described series-resonant converter circuit, since the switch devices 50-55 must still bear significant voltage and current stresses. The stresses are high because gating of each complementary pair of switch devices 50-55 (each pair comprising one upper switch device 50, 52, and 54 and one lower switch device 51, 53, and 55) incurs over-voltages measured from line-to-line. Such line- to-line voltage stresses compel the use of high-power active switch devices.

Moreover, when the switch devices 50-55 are switched on a line-to-line basis, the finite response time of switches 50-55 results in a wasteful NULL state during each sector during which no current is supplied to the outputs. The NULL state appears in each phase of the three-phase output waveform as an intermittent "dead-time" between pulses. This can be seen more clearly with reference to FIG. 2, which shows a synthesized output current for an exemplary phase of a conventional soft-switched series-resonant converter. Between pulses, the voltage across the switch devices is insufficient to allow switching. This is caused by the slew time of the resonant capacitance from line-to-line. As a result, the switch devices 50-55 sit inactive, and the resulting dead-time (or NULL state) between output pulses is clearly visible in FIG. 2. In higher frequency applications, the dead time can be several times greater than the reverse recovery time of the switches. Consequently, the switch device utilization can be very low.

These problems could be resolved by incorporating a neutral forming circuit, and by commutation on a line-to- neutral basis. The current and voltage stresses could be reduced by a factor of 1/ 3 in three-phase circuits and less expensive components could be used.

SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide a neutral forming circuit and suitable commutation sequence for a resonant DC-link current source converter in order to improve device utilization and reduce voltage stresses on the switch devices.

It is another object of the invention to provide an auxiliary commutating circuit for commutating between the neutral point formed by the above-described neutral forming circuit. It is still another object of the invention to provide a transfer assist circuit for expediting resonant commutations using the above-described auxiliary commutating circuit.

It is another object of the present invention to provide a neutral commutated resonant DC link current source converter which is especially suited for application in power system harmonic and VAR compensators, high power DC link systems, high power motor drives, and as an interface for superconducting magnet energy storage. In accordance with the present invention, the above- described and other objects are accomplished with a neutral commutated soft-switched current source inverter which incorporates line-to-neutral commutation, and in which each resonant commutation is accomplished using a single switch. This way, resonant over-voltages are incurred on a line-to- neutral basis. Assuming a peak load voltage of V which necessitates an excess link voltage of kV , the power rating of the switches may be reduced to 1/ 3(kV ) .

Moreover, the remaining active switch (which is not gated during commutation) can continue to carry link current, and the device utilization of the converter is improved.

In general terms, the current source converter comprises a neutral-commutated input converter circuit and/or output inverter circuit coupled to a resonant DC link. The converter/inverter circuit includes a full bridge three-phase switching circuit including a plurality of parallely-connected pairs of switch devices, the pairs of switch devices each including a top switch device connected in series to a bottom switch device. The converter/inverter circuit also includes a plurality of resonant inductances each having one end connected between one of the pairs of switch devices and another end for connection to a corresponding phase of a three-phase AC input/load. The converter/inverter circuit further includes a neutral forming circuit for connection across the three-phase AC input/load to establish a neutral point bearing a neutral voltage relative to the AC voltage supplied by the AC input or to the AC load. The converter/inverter circuit also includes an auxiliary commutating circuit connected in parallel with the full bridge switching circuit, the auxiliary commutating circuit further comprising a pair of auxiliary switch devices including a top auxiliary switch device and a bottom auxiliary switch device connected together at the neutral point for allowing commutation on a line-to-neutral basis.

The invention also includes a method for commutating the above-described input converter and/or output inverter, the method including the steps of turning off an active switch in said switching circuit corresponding to an outgoing phase, turning on one of the auxiliary commutating switches to establish a neutral point, and turning on another successive one of the switches in the switching circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects, features, and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments and certain modifications thereof when taken together with the accompanying drawings in which:

FIG. 1 is a schematic diagram of a conventional output inverter circuit for a full line-to-line commutated series- resonant current source inverter such as that shown and described in U.S. Patent No. 4,942,511 issued to Lipo et al.; FIG. 2 illustrates a synthesized output current for an exemplary phase of a conventional soft-switched series- resonant converter;

FIG. 3 is a schematic diagram of a neutral-commutated inverter circuit for a series-resonant current source in accordance with one embodiment of the present invention; FIG. 4 shows a space vector diagram of a commutation sequence for synthesizing a three-phase sine wave using the inverter circuit of FIG. 3;

FIG. 5 illustrates the firing sequence for thyristors 50- 55 of FIG. 3 necessary to generate synthesized three-phase AC output currents i_sa, i_sb, and i_sc; FIG. 6 is a schematic diagram of an output inverter circuit according to a second embodiment of the invention which is capable of mini-commutation;

FIG. 7 is a graph showing the voltage V across capacitor Cr as a function of time during one resonant commutation cycle between bottom switches for the circuits of FIGS. 3 and 6;

FIG. 8 shows simulated trace current and voltage outputs for each phase of a synthesized three-phase output waveform from the resonant current source inverter of the present invention as supplied to a resistive load;

FIG. 9 shows a space vector diagram of a commutation sequence for synthesizing a three-phase sine wave using a neutral current balancing commutation sequence according to the present invention; and FIG. 10 is a simulated trace diagram showing the trace of a synthesized three-phase sinusoidal output from the resonant current source inverter of the present invention as supplied to a resistive load using neutral current balancing.

DETAILED DESCRIPTION OF THE PREFERRED' EMBODIMENT(S. Generally, series-resonant current source inverters comprise an input converter circuit coupled to an output inverter circuit via a DC link. The input converter circuit and output inverter circuit are assembled with uni-directional switching devices such as thyristors, which devices are switched according to a predetermined sequence to accomplish the desired transfer of current. The input converter circuit is switched in accordance with the three-phase AC input to maintain a DC level based on the voltage difference between the most positive and most negative phases. The output inverter circuit is switched to synthesize a desired three- phase AC output from the DC level. Structurally, the input converter circuit may be the mirror image of the output inverter circuit, and only the switching sequences need differ. Both circuits have heretofore been switched on a line-to-line basis. For example, the conventional output inverter circuit of FIG. 1 comprises a three-phase bridge of thyristors 50-55 which takes its input from the resonant DC link circuit (not shown) of the series-resonant current source inverter. The thyristors 50-55 are fired according to a predetermined commutation sequence to supply synthesized three-phase AC current i_sa, i_8b and i_sc, as shown in FIG. 2, at the three outputs. A full cycle of the synthesized three-phase output waveform is generated by a complete switching cycle of the output inverter circuit. Each switching cycle of the output inverter circuit comprises six 60° sectors, hence, the duration of each sector is 1/6 that of a corresponding cycle of the synthesized three-phase output current. During each sector, the thyristors 50-55 are commutated through a sequence of active switch states in order to distribute link current to the three output phases. For conventional line-to-line switching, one upper switch 50, 52, and 54 must be gated together with its respective series-connected lower switch 51, 53, and 55 during each 60° switching sector. The finite response time of the switches results in a wasteful NULL state during each sector during which no current is supplied to the outputs. Moreover, voltage stresses are high when a complementary pair of switch devices 50-55 is gated since any over-voltages occur on a line-to-line basis. These problems are eliminated by the commutation circuits of the present invention because switching occurs on a line- to-neutral basis. Since complementary switch pairs are never switched together, there will always be a line-to-neutral current supplied to the outputs. Moreover, voltage stresses are much lower since they occur on a line-to-neutral basis.

FIG. 3 illustrates a neutral-commutated converter circuit for a series-resonant current source in accordance with one embodiment of the present invention. The concept of the invention may be incorporated in either/both the input converter circuit and/or the output inverter circuit of a series-resonant current source converter. Generally, the inverter comprises a three-phase bridge 10 which takes its main input from a three-phase supply. Three- phase bridge 10 includes six zero-current turn-off switches 51-55 arranged in series-connected pairs. The series connection of each pair of turn-off switches 50 & 51, 52 & 53, and 54 & 55 is connected to a corresponding input main through one of inductors 70-72. Inductors 70-72 present a small inductance for soft commutation.

In accordance with the present invention, an auxiliary commutating circuit 20 is connected in parallel across the three-phase bridge 10. Auxiliary commutating circuit 20 further comprises two zero-current turn-off switches Tal and Ta2 arranged in a series-connected pair. A star-connected filter capacitor bank including capacitors 60-62 is also connected across the input main to form a neutral, and the series connection of the turn-off switches Tal and Ta2 is connected to the neutral via an auxiliary capacitor Cr and auxiliary inductor Lrl.

The voltage and current ratings for the bridge switches 50-55 are comparable to conventional hard-switched converters, and the voltage rating for the auxiliary and transfer assist switches Trl-Tr4 is the same. However, the current rating for the latter switches Trl-Tr4 may be much smaller since they carry current only during the resonant commutation pulses. The inductors Lrl and Lr2 are sized in accordance with the rate of change of current permitted by the main switches 50- 55, and the resonant capacitor Cr is chosen to give the desired resonant frequency.

The invention also comprises a novel commutation sequence for the above-described inverter. The upper switches 50, 52, and 54 are commutated from the highest voltage phase through to the lowest voltage phase, while the lower switches 51, 53, and 55 are commutated from the lowest voltage phase through to the highest voltage phase. FIG. 4 shows a space vector diagram of a commutation sequence for synthesizing a three-phase sine wave according to the present invention. Each 360° cycle is broken into six 60o sectors, and the sequence alternates between commutation of the upper switches 50, 52, and 54 for 60° to commutation between lower switches 51, 53, and 55 for the next 60°. This way, either a lower switch 51, 53, or 55 remains on, or an upper switch 50, 52, or 54 remains on throughout each of the six sectors.

However, at the end of each sector involving commutation of the upper switches 50, 52, or 54, the particular upper switch corresponding to the lowest voltage phase will be left conducting. Likewise, at the end of each sector involving commutation of the lower switches 51, 53, or 55, the particular lower switch corresponding to the highest voltage phase will be left conducting.

The upper switch Tal of the auxiliary commutation circuit 20 is used to assist the upper switches 50, 52, and 54 in commutating from the lowest voltage phase back to the highest phase. Likewise, the lower switch Ta2 of the auxiliary commutation circuit 20 is used to assist the lower switches 51, 53, and 55 in commutating from the highest voltage phase back to the lowest.

For example, with regard to the upper switch commutation, the voltage across the auxiliary capacitor Cr is initially higher by a factor kV than any incoming phase voltage V so that the appropriate upper switch can be successfully commutated "on." Switch Tal is then gated "on," and the link current is diverted through switch Tal so that the conducting upper switch can be successfully commutated "off." The voltage across the auxiliary capacitor Cr then drops below the lowest voltage phase at the end of each cycle by -kV , thereby charging capacitor Cr in preparation for commutation back to the highest voltage phase. Capacitor Cr continues to charge until its voltage exceeds the incoming lowest voltage phase by factor -kV_p. When Cr is sufficiently charged, the upper switch 50, 52, or 54 corresponding to the highest voltage phase can be successfully gated "on." This reverse biases and turns "off" switch Tal. Ta2 is then fired to reverse the voltage across capacitor Cr in preparation for the next commutation cycle.

Use of the auxiliary commutation circuit 20 is substantially the same with reqard to commutation of the lower switches from the highest voltage phase back to the lowest with only polarities being reversed.

It is clear from the description of the above commutation sequence that use of the auxiliary commutation circuit 20 to assist in commutating between upper switches in any particular 60° sector will result in a short NULL state during which all the upper phase switches 50, 52, and 54 are off. The same holds true for use of the auxiliary commutation circuit 20 to assist in commutating between lower switches 51, 53, and 55. These NULL states endure until capacitor Cr is sufficiently charged to assist in the commutation.

The present invention facilitates current flow even during the NULL states. This is because the auxiliary commutating circuit 20 is gated during the NULL state to maintain a path through the auxiliary commutation circuit 20 to the neutral. The interval during each NULL state in which the auxiliary commutating circuit 20 is gated will be termed the "resonant reset condition," and during the resonant reset condition, some power is still transferred to the load despite the existence of the NULL state. Consider, for example, sector 1 in the vector space diagram of FIG. 4. We will assume that the current source inverter must synthesize a current of weight "a" in direction "A," "b" in direction "B," and "c" in "C," and we further assume that one transfer assist (or resonant) commutation will take place in sector 1, and that the fraction q represents the fraction of the switch cycle spent in the resonant reset state or NULL state relative to the total commutation cycle. The state AC refers to the DC link current flowing into phase "a" and returning from phase "c," and similarly, the state AB refers to the DC link current flowing into phase "a" and returning from phase "b." Hence, sector 1 involves a resonant commutation of the lower switches from the lower switch 53 to the lower switch 55. The NULL state AN occurs when switch 53 is turned "off" and switch 5" has yet to be gated "on" (capacitor Cr is charging) During this NULL state AN, the lower switch Ta2 of the auxiliary commutation circuit 20 is gated to initiate the resonant reset condition as noted above. In the resonant reset condition AN, current flows into phase "a" from the neutral.

The durations of the respective states AC, AB, AA and the resonant reset condition AN are governed by the following equation:

aA + bB + cC = y AB + x AC + q AN + (1 - x - y - q) AA (1) where, q is the fraction of the switch cycle spent in the resonant speed state AN, and AA is a NULL OUTPUT state which can be entered by turning both of switches 53 and 55 are "off" to thereby generate zero output current.

Note that as far as the load is concerned, the magnitude of the AA current contribution is zero, while the current contribution in the AN state is only the current flowing into the "a" phase of the load. Now decomposing^' AB = A-B and noting A+B+C=0, a+b+c=0 we get:

A(a - c) + B(b - c) = A(2x + y + q) + B(-y + x) (2)

Equating the coefficients in the two sides yields the following:

a - c = 2x + y + q (3) b - c = x - y (4) which has the solution: x = -c - q/3 (5) y = -b - q/3 (6)

Note that the duration of the resonant reset condition AN is the time it takes for the link current flowing into the auxiliary capacitor CR to cause the capacitor voltage to ramp between the peak negative and positive commutating levels. Since the peak commutating levels are constant, the duration of the resonant reset condition becomes known. Consequently, for an assigned time in the remaining states, the sector time is known and the fraction q can be determined. The fraction of the total cycle to spend in states AC and AB is given by x and y respectively in equations (5) and (6) .

Note the required "a" phase current is large and the values of "b" and "c" must be negative in sector 1. The occurrence of the resonant reset state will mean that the modulation equation (2) cannot be solved exactly when q/3 is greater than I d or I I bl . This modulation limitation occurs near the sector boundaries when the duration in these states is approaching zero. For small values of q, setting x or y to zero if (5) or (6) gave a negative result, will have little influence on the output waveform or spectra^*.

It is important to remember that the above-described resonant commutation is necessary only when commutating upper switches 50, 52, and 54 from a lower voltage phase to the higher phase, or when commutating lower switches 51, 53, and 55 from a higher voltage phase to a lower phase. Otherwise, as long as the output voltage exceeds 25% of the rated maximum, it is normally possible to avoid a resonant transfer, and to instead use the phase voltage differences to transfer the current between the phases (i.e., "natural commutation"). For example, in a sector such as sector 1 which involves modulation between the lower switches 51, 53, and 55, natural commutation can occur whenever the voltage difference between the outgoing and incoming phase is positive. Since switching occurs from the lowest phase voltage to the highest, the voltage difference between the outgoing and incoming phase is positive for two out of three transitions. Thus, the phase switching can be ordered so that there are two natural commutations before a resonant transfer is required. Likewise, in a sector such as sector 2 which involves modulation between the upper switches 50, 52, and 54, a natural commutation can occur whenever the voltage difference between the outgoing and incoming phase is negative. Since switching occurs from the highest phase voltage to the lowest, the voltage difference between the outgoing and incoming phase is negative for two out of three transitions. Thus, the phase switching within each sector can be ordered so that there are two natural commutations before a resonant transfer is required.

Of course, the phase switching within each sector depends on that of the previous sector. In the sectors which employ natural commutation, switching normally starts and finishes in one of the the NULL OUTPUT states (AA, BB, or CC) . Hence, a new modulation pattern for a new sector can be established without difficulty. However, in a sector employing a resonant transfer, the NULL OUTPUT states are not equivalent since it could require a simultaneous top and bottom resonant transfer which is not possible with the current configuration.

The commutation sequence according to the present invention provides a solution by always ending a sector in the active state which is common to the next sector. For example, state AC is common to sectors 1 and 2. One pattern of modulation for the output inverter circuit over six sectors of a complete 360° switching cycle would thus be:

TOP SWITCH I a I acb I b I bac I c I cba I

BOTTOM SWITCH I bac I c I cba I a I acb I b I SECTOR 1 2 3 4 5 6

The above-described commutation sequence is shown more clearly in FIG. 5, which is the firing sequence for thyristors 50-55 to supply synthesized three-phase AC current i_sa, i_sb and i_sc at the three outputs. The duration of each sector is 1/6 that of a corresponding cycle of the synthesized three-phase output current. Hence, for a 60 Hz system, the duration of each sector would be 2.78 ms. For a converter switching at 2kHz, the duration of the switch states within each sector would be 500us. For example, in the second sector, the thyristors 50-55 would cycle through the active states AC, CC, and BC once every 500us. A larger percentage of the 500us is spent in active state AC toward the beginning of the second sector. Conversely, a larger percentage of the 500us is spent in active state BC toward the end of the second sector.

Other sequences are possible as long as each sector always ends in the active state which is common to the next sector. Given this constraint, it is only the final active state which is important to the sequence of the next sector. Hence, the ordering of the initial two phases can be interchanged. Alternatively, the constraint may be seen as requiring that each sector always begin in the active state which was common to the last sector. From this perspective, it is only the first active state which is important, and the subsequent two active states may be interchanged.

At times, the output voltage differences will be less than 25% of the rated maximum. In this case, natural commutation cannot effectively transfer the current flow to the desired phase. Consequently, a resonant commutation is necessary even though upper switches 50, 52, and 54 are commutated from a lower voltage phase to the higher phase, or lower switches 51, 53, and 55 are commutated from a higher voltage phase to a lower phase. As a result, certain sectors may involve more than one resonant commutation.

A second full resonant transfer can be used as described above, but the effective switch period would be unduly increased. Alternatively, the capacitor CR can be used to assist in natural commutation. This form of "mini- commutation" is possible as long as the voltage of the phases to be commutated is of the same sign as the voltage across the auxiliary capacitor CR.

FIG. 6 illustrates a second embodiment of the invention which is capable of mini-commutation. Reverse thyristors Ta5 and Ta6 must be provided across Tal and Ta2 switches Tal and Ta2 to allow controlled reverse conduction during resonance around the load voltage. Alternatively, switches Tal and Ta2 could be bi-directional. The operation of the embodiment of FIG. 6 is the same as that of FIG. 3 and, in addition, the upper or lower transfer assist switch Tal or Ta2 corresponding to the switches (upper or lower) being commutated is turned "on" to initiate commutation "off" of the outgoing phase. Once the current through Cr has risen sufficiently, the incoming phase is fired. The capacitor CR will resonate around this new voltage to approximately its starting voltage. This form of mini- commutation is quicker because it does not have the resonant reset state. However, if used repeatedly, it would occasionally need to be supplemented by a full resonant commutation to restore the capacitor CR voltage. When a large capacitor CR is used to achieve the required reverse recovery time Tq for the switches 50-55, it can take 5Tq for the link current Id to ramp the capacitor Cr voltage to the level where the next incoming phase can be commutated on. To reduce the delay, the invention may additionally include a transfer-assist circuit 30 as shown in FIGS. 3 and 6, the circuit 30 including two parallely-connected bi-polar transfer-assist switches Ta3 and Ta4 connected through a second inductance Lr2 across the capacitance Cr.

The transfer assist circuit 30 may be used to enhance the transfer speed, and this is done simply by turning "on" a transfer assist switch Ta3 or Ta4 (depending on top or bottom commutation) after the reverse recovery time Tq for the commutated switch 50-55. The additional current diverted through the transfer assist circuit 30 speeds the transfer. The active transfer-assist switch Ta3 or Ta4 turns "off" naturally when the voltage reverses since the current therethrough reaches zero. The use of transfer assist circuit 30 can halve the time it takes for the link current Id to ramp the capacitor Cr voltage to the level where the next incoming phase can be commutated "on" to about 2.5 Tq. For example, given switches 50-55 with 20 uS reverse recovery times, a resonant transfer will then take 50uS. If the resonant transfer time is to be less than 10% of the PWM switch period, the effective switching frequency will be close to 2kHz. A slight reduction in frequency will result from the occasional need to complete an additional resonant transfer when the phase voltage difference is too low for natural commutation. The operation of the transfer assist circuit 30 is better seen with reference to FIG. 7, which illustrates the voltage V across capacitor Cr as a function of time during one resonant commutation cycle between bottom switches. The voltage V starts at one of the phase voltages. The auxiliary commutation circuit 20 is turned on at 14.965ms, and Cr begins to charge. The phase current drops to zero as V continues to rise. Bridge 10 is operated to complete a resonant commutation at time T=14.975, and the voltage V falls linearly to 500V (which gives a reverse bias time of close to 30uS) . At this point, the transfer assist circuit 320 is gated "on." The resonant current quickly returns to zero and the voltage V falls to -500V. The resonant commutation is completed by turning on the incoming phase at 15.075mS. FIG. 8 shows simulated trace current outputs IL(1) ,

IL(2), and IL(3) , and voltage outputs V(l) , V(2) , and V(3) for the respective phases of a synthesized three-phase output waveform from the resonant current source inverter of the present invention as supplied to a resistive load. In addition, trace voltage output V(4) shows the voltage across capacitance Cr.

The commutation sequence was devoted a fixed time to the active and NULL states, while the time in the resonant reset state depended on the need for additional resonant or mini- commutations. When low phase voltage differences existed, natural commutation was unreliable and resonant or mini- commutations were used. However, this was an infrequent event, and there were normally two natural commutations and one resonant commutation in each sector. The circuit was capable of satisfactory commutation between a phase to neutral voltage of 500V to another phase at -500V, i.e, a peak line- to-line voltage of 1000V using switches rated at 1300V peak (neglecting safety factors) .

The commutation sequence of the present invention has been described with reference to the simplest sequence for sector 1, namely, state AB to AC via the NULL OUTPUT state AA. Here, at least one transition of the bottom switches is resonant, and the resonant reset state AN will appear for a period. In the resonant reset state, current flows into phase A out of the neutral point via auxiliary capacitor Cr. If the same sequence were used continually, the voltage of the neutral point would gradually fall until resonant commutations are no longer possible. The commutation sequence may be slightly modified to balance the currents to the neutral during resonant commutations, thereby eliminating this problem. To accomplish balancing of the neutral currents, every neutral current flow must be balanced with a reverse flow. This is possible when the NULL OUTPUT state AA is of long duration, for the time can be used to commutate for a period to state NA and back to AA. The same is true for long states AC, wherein state NC can be inserted, and long states AB, wherein state NB can be inserted.

Use of any of the reverse reset states NC, NB, or NA has the advantage that they cause a reversal of the voltage of the auxiliary capacitor Cr in preparation for the AN resonant reset state. FIG. 9 shows a space vector diagram of a neutral current balancing commutation sequence for synthesizing a three-phase sine wave according to the present invention.

Let the required fraction of the switch period in the neutral state be "q." The modulation equations for sector 1 approaching sector 2 become: aA + bB + cC = xAB + yAC + qAN + qNC + (l-x-y-2q)AA which yields a - c + x + 2Y + 2q b - c + -x + y + q with solution y = -c -q x = -b For synthesis of a wave of size r: b = c = -r/2 and we need x + y + 2q<=l which gives r = 1 - q. This compares with the modulation when we have no neutral current balancing in the sector. In that case, the modulation limit is: r = 1 - q/3.

The simulation results for commutation with neutral current balancing are shown in FIG. 10. It is noteworthy that there is no jump transition at the sector edge and the sharp slope transitions which appeared in FIG. 8 have now been removed.

Having now fully set forth the preferred embodiments and certain modifications of the concept underlying the present invention, various other embodiments as well as certain variations and modifications of the embodiments herein described will obviously occur to those skilled in the art upon becoming familiar with said underlying concept. It is to be understood, therefore, that within the scope of the appended claims, the invention may be practiced otherwise than as specifically set forth herein.

Claims

We claim:

1. An input converter for a resonant DC link current source comprising: a switched full bridge rectifier circuit including a plurality of parallely-connected pairs of switch devices, said pairs of switch devices each including a top switch device connected in series to a bottom switch device; a plurality of resonant inductances each having one end connected between one of said pairs of switch devices of said full bridge rectifier circuit, and another end for connection to a corresponding phase of a multi-phase AC input main; a neutral forming circuit for connection across said multi-phase AC input main to establish a neutral point bearing a neutral voltage relative to an AC voltage supplied by said AC input main; and an auxiliary commutating circuit connected in parallel with said full bridge rectifier, said auxiliary commutating circuit further comprising a pair of auxiliary switch devices including a top auxiliary switch device and a bottom auxiliary switch device connected together at said neutral point.

2. The input converter according to claim 1 wherein said neutral forming circuit further comprises a star- connected filter capacitor bank having a plurality of filter capacitors each connected between a common star-point and one of said resonant inductances for like connection to the corresponding phase of said three-phase input main, and a series-connected auxiliary resonant capacitance and auxiliary resonant inductance connected between said star-point and said neutral point.

3. The input converter according to claim 2 further comprising a transfer-assist circuit connected in parallel across said auxiliary resonant capacitance for speeding commutation between successive top switch devices of said switched full bridge rectifier circuit.

4. The input converter according to claim 3 wherein said transfer-assist circuit further comprises a transfer inductance connected in series with an upper transfer switch device.

5. The input converter according to claim 5 wherein said transfer-assist circuit further speeds commutation between successive bottom switch devices of said switched full bridge rectifier circuit.

6. The input converter according to claim 5 wherein said transfer-assist circuit further comprises bi-polar pair of transfer switch devices including an upper transfer switch device in parallel with a lower transfer switch device, said bi-polar transfer switch devices being connected in series with said transfer inductance.

7. An output inverter for a resonant DC link current source converter comprising: a switched distribution bridge circuit including a plurality of parallely-connected pairs of switch devices, said pairs of switch devices each including a top switch device connected in series to a bottom switch device; a plurality of resonant inductances each having one end connected between one of said pairs of switch devices of said switched distribution bridge circuit, and another end for connection to a three-phase load; a neutral forming circuit for connection across said three-phase load to establish a neutral point bearing a neutral voltage relative to a voltage across said three-phase load; and an auxiliary commutating circuit connected in parallel with said switched distribution bridge circuit, said auxiliary commutating circuit further comprising a pair of auxiliary switch devices including a top auxiliary switch device and a bottom auxiliary switch device connected together at said neutral point.

8. The output inverter according to claim 7 wherein said neutral forming circuit further comprises a star- connected filter capacitor bank having a plurality of filter capacitors each connected between a common star-point and one of said resonant inductances for like connection to the corresponding phase of said three-phase load, and a series- connected auxiliary resonant capacitance and auxiliary resonant inductance connected between said star-point and said neutral point.

9. The output inverter according to claim 8 further comprising a transfer-assist circuit connected in parallel across said auxiliary resonant capacitance for speeding commutation between successive top switch devices of said switched distribution bridge circuit.

10. The output inverter according to claim 9 wherein said transfer-assist circuit further comprises a transfer inductance connected in series with an upper transfer switch device.

11. The output inverter according to claim 10 wherein said transfer-assist circuit further speeds commutation between successive bottom switch devices of said switched distribution bridge circuit.

12. The output inverter according to claim 11 wherein said transfer-assist circuit further comprises bi-polar pair of transfer switch devices including an upper transfer switch device in parallel with a lower transfer switch device, said bi-polar transfer switch devices being connected in series with said transfer inductance.

13. A neutral commutating circuit for a soft-switching DC- link current source converter comprising: a full bridge switching circuit including three parallely-connected pairs of series-connected switch devices; three resonant inductances each having one end connected between one of said pairs of switch devices of said full bridge rectifier circuit, and another end for connection to a corresponding phase of a three-phase input/output main; an auxiliary commutating circuit connected in parallel with said full bridge rectifier, said auxiliary commutating circuit further comprising a pair of series-connected auxiliary switch devices connected together at a neutral point; and a neutral forming circuit including a star-connected filter capacitor bank having three filter capacitors each connected between a common star-point and one of said resonant inductances for further connection to a corresponding phase of said three-phase input/output main, and a series-connected auxiliary capacitance and auxiliary inductance connected between said star-point and said neutral point.

14. The neutral commutating circuit according to claim

13 further comprising a transfer-assist circuit connected in parallel across said auxiliary resonant capacitance for speeding commutation between successive top switch devices and successive bottom switch devices of said full bridge switching circuit.

15. The neutral commutating circuit according to claim

14 wherein said transfer-assist circuit further comprises a bi-polar pair of transfer switch devices including an upper transfer switch device in parallel with a lower transfer switch device, said bi-polar transfer switch devices being connected in series with a transfer inductance.

16. A method for commutating a resonant DC link of a type having a switched full bridge rectifier circuit with a plurality of parallely-connected pairs of switch devices, a plurality of resonant inductances each connected between one of said pairs of full bridge rectifier switch devices and a corresponding phase of a multi-phase AC input main, and a neutral forming circuit connected across said multi-phase AC input main to establish a neutral point bearing a neutral voltage relative to an AC voltage supplied by said AC input main, and an auxiliary commutating circuit connected in parallel across said full bridge rectifier circuit, said auxiliary commutating circuit further comprising a pair of auxiliary switches connected together at said neutral point, the method comprising: a first step of turning off an active one of said full bridge rectifier switch devices; a second step of turning on one of said auxiliary commutating switches; and a third step of turning on another successive one of said auxiliary commutating switches.