US20110127927A1

US20110127927A1 - Buck-Store and Boost-Restore Converter

Info

Publication number: US20110127927A1
Application number: US12/773,140
Authority: US
Inventors: Ke-Horng Chen; Chun-Yu Hsieh; Chih-Yu Yang; Chao-Jen Huang
Original assignee: Industrial Technology Research Institute ITRI
Current assignee: Industrial Technology Research Institute ITRI
Priority date: 2009-11-30
Filing date: 2010-05-04
Publication date: 2011-06-02
Also published as: TWI407672B; US9236797B2; TW201119202A; US20140111103A1

Abstract

A buck-store and boost-restore converter is to be electrically connected to a pre-stage circuit, which provides a pre-stage output direct current (DC) voltage to a first capacitive load. The converter has an inductance element and is to be electrically connected to a second capacitive load. When the pre-stage output DC voltage is reduced from a first DC voltage to a second DC voltage, the inductance element outputs a current to the second capacitive load so as to transfer electric energy, which is stored in the first capacitive load, to the second capacitive load. When the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the inductance element outputs a current to the first capacitive load so as to transfer electric energy, which is stored in the second capacitive load, to the first capacitive load.

Description

This application claims the benefit of Taiwan application Serial No. 98140874, filed Nov. 30, 2009, the subject matter of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention
The invention relates in general to a converter, and more particularly to a buck-store and boost-restore converter.
2. Description of the Related Art
At present, when an output voltage of a DC-DC converter is switched from a high supply voltage to a low supply voltage, the problems of the too long switching time and the high energy loss tend to occur so that a post-stage circuit cannot be rapidly driven and the energy cannot be saved.
A conventional DC-DC converter provides an additional grounding path to transfer the excess energy to the ground and thus shorten the time of switching from the high supply voltage to the low supply voltage. However, the electric energy transferred to the ground also wastes the energy. Thus, it is an issue to enhance the switching speed and save the energy.

SUMMARY OF THE INVENTION

The disclosure is directed to a buck-store and boost-restore converter capable of storing the excess energy to save the energy when the output voltage of the DC-DC converter is switched from a high supply voltage to a low supply voltage. In addition, the switching speed of the DC-DC converter is advantageously increased and the power loss is advantageously reduced.
According to a first aspect of the present disclosure, a buck-store and boost-restore converter to be electrically connected to a pre-stage circuit and a first capacitive load is provided. The pre-stage circuit receives a pre-stage input DC voltage and provides a pre-stage output DC voltage to the first capacitive load. The pre-stage output DC voltage comprises a first DC voltage or a second DC voltage. The converter is characterized in that the converter has an inductance element and is to be electrically connected to a second capacitive load. When the pre-stage output DC voltage is reduced from the first DC voltage to the second DC voltage, the inductance element serves as a current source with a variable current to output a current to the second capacitive load, so as to transfer electric energy, stored in the first capacitive load, to the second capacitive load. When the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the inductance element serves as a current source with a variable current to output a current to the first capacitive load, so as to transfer electric energy, stored in the second capacitive load, to the first capacitive load.
According to a second aspect of the present disclosure, a buck-store and boost-restore converter to be electrically connected to a pre-stage circuit and a first capacitive load is provided. The pre-stage circuit receives a pre-stage input DC voltage and provides a pre-stage output DC voltage to the first capacitive load. The pre-stage output DC voltage comprises a first DC voltage or a second DC voltage. The converter includes an input terminal, a first switch, an inductance element, a second switch and an output terminal. The input terminal to be coupled to the first capacitive load receives the pre-stage output DC voltage. The first switch is coupled to the input terminal. The inductance element has a first end coupled to the first switch. The second switch is coupled between the inductance element and a constant voltage. The output terminal is coupled to a second end of the inductance element and further to a second capacitive load. When the pre-stage output DC voltage is reduced from the first DC voltage to the second DC voltage, the converter enters a buck-store operation mode and the first switch and the second switch are alternately turned on, so that the inductance element outputs a current to the second capacitive load to transfer electric energy, stored in the first capacitive load, to the second capacitive load. When the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the converter enters a boost-restore operation mode and the first switch and the second switch are alternately turned on, so that the inductance element outputs a current to the first capacitive load to transfer electric energy, stored in the second capacitive load, to the first capacitive load.
The invention will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic illustration showing a buck-store and boost-restore converter according to an embodiment of the invention.

FIG. 2 shows an example of a detailed circuit diagram of the buck-store and boost-restore converter of FIG. 1.

FIG. 3A is an equivalent circuit diagram showing the converter of FIG. 2 in a buck-store operation mode.

FIG. 3B is an equivalent circuit diagram showing the converter of FIG. 2 in a boost-restore operation mode.

FIG. 4 shows waveforms of a current I_Lof an inductance element L_BSBR, a pre-stage output DC voltage V_out, and a voltage V_BSBRof an output terminal N_outin an example.

FIG. 5 is a circuit block diagram showing an example of an operation of the converter of FIG. 2.

FIG. 6 shows waveforms of signals E_refand E_BSBRin an example.

FIG. 7 shows waveforms of a pre-stage input DC current I_IN, a current I_Lof an inductance element L_BSBR, a pre-stage output DC voltage V_outand a voltage V_BSBRof an output terminal N_outcorresponding to an example of the other embodiment.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic illustration showing a buck-store and boost-restore converter 100 according to an embodiment of the invention. As shown in FIG. 1, the buck-store and boost-restore converter 100 is to be electrically connected to a pre-stage circuit 102 and a first capacitive load C_Load. The pre-stage circuit 102 receives a pre-stage input DC voltage V_INand a pre-stage input DC current I_INand provides a pre-stage output DC voltage V_outto the first capacitive load C_Load. The pre-stage output DC voltage V_outmay include a first DC voltage V₁or a second DC voltage V₂. The buck-store and boost-restore converter 100 having an inductance element (not shown in FIG. 1) is to be electrically connected to a second capacitive load C_BSBR.
When the pre-stage output DC voltage V_outis reduced from the first DC voltage V₁to the second DC voltage V₂, the inductance element serves as a current source with a variable current to output a current to the second capacitive load C_BSBR, so as to transfer the electric energy, stored in the first capacitive load C_Load, to the second capacitive load C_BSBR. When the pre-stage output DC voltage V_outis raised from the second DC voltage V₂to the first DC voltage V₁, the inductance element serves as a current source with a variable current to output a current to the first capacitive load C_Load, so as to transfer the electric energy, stored in the second capacitive load C_BSBR, to the first capacitive load C_Load.
The details will be further described in the following. FIG. 2 shows an example of a detailed circuit diagram of the buck-store and boost-restore converter of FIG. 1. Referring to FIG. 2, the buck-store and boost-restore converter 200 includes an input terminal N_IN, a first switch M_BP1, an inductance element L_BSBR, a second switch M_BN1and an output terminal N_out. The input terminal N_INcoupled to the first capacitive load C_Loadreceives the pre-stage output DC voltage V_out. The first switch M_BP1is coupled to the input terminal N_IN. The inductance element L_BSBRhas a first end coupled to the first switch M_BP1. The second switch M_BN1is coupled between the inductance element L_BSBRand a constant voltage. The output terminal N_outis coupled to a second end of the inductance element L_BSBR, and further to the second capacitive load C_BSBR.
When the pre-stage output DC voltage V_outis reduced from the first DC voltage V₁to the second DC voltage V₂, the converter 200 enters a buck-store operation mode, and the first switch M_BP1and the second switch M_BN1are alternately turned on so that the inductance element L_BSBRoutputs a current to the second capacitive load C_BSBRto transfer the electric energy, stored in the first capacitive load C_Load, to the second capacitive load C_BSBR.
When the pre-stage output DC voltage V_outis raised from the second DC voltage V₂to the first DC voltage V₁, the converter 200 enters a boost-restore operation mode, and the first switch M_BP1and the second switch M_BN1are alternately turned on so that the inductance element L_BSBRoutputs a current to the first capacitive load C_Loadto transfer the electric energy, stored in the second capacitive load C_BSBR, to the first capacitive load C_Load.
The converter 200 may further include a first current sensor 202 and a second current sensor 204. The first current sensor 202 coupled to the first switch M_BP1senses the current flowing through the inductance element L_BSBR. The first current sensor 202 obtains the current of the inductance element L_BSBRby sensing the current flowing through the first switch M_BP1, for example. The second current sensor 204 coupled to the second switch M_BN1also senses the current flowing through the inductance element L_BSBR. The second current sensor 204 also obtains the current of the inductance element L_BSBRby sensing the current flowing through the second switch M_BN1, for example. In this example, the constant voltage is a ground voltage, for example.
FIG. 3A is an equivalent circuit diagram showing the converter 200 of FIG. 2 in a buck-store operation mode. FIG. 4 shows waveforms of a current I_Lof an inductance element L_BSBR, a pre-stage output DC voltage V_out, and a voltage V_BSBRof an output terminal N_outin an example. As shown in FIGS. 3A and 4, the current of the pre-stage input DC current I_INrelates to the energy of the power source (not shown) received by the pre-stage circuit 102. In the buck-store operation mode, the first switch M_BP1is turned on before the second switch M_BN1is turned on. At the time point t₁, the first switch M_BP1is turned on. Thereafter, the current outputted from the first capacitive load C_Loadflows through the first switch M_BP1and the inductance element L_BSBRalong a current path P1 to charge the second capacitive load C_BSBR. Thus, the current I_Lis continuously raised, the pre-stage output DC voltage V_outis gradually reduced from the first DC voltage V₁, and the voltage V_BSBRof the output terminal N_outstarts to raise from a third DC voltage V₃.
At the time point t₂, when the first current sensor 202 senses that the current I_Lof the inductance element L_BSBRexceeds an upper bound value I_max, the first switch M_BP1is turned off. At this time, the second switch M_BN1is turned on. Based on the continuous property of the current of the inductance element L_BSBR, the same current flows from the second switch M_BN1to the second capacitive load C_BSBRthrough the inductance element L_BSBR, as shown by a current path P2. Thus, the current I_Lof the inductance element L_BSBRis gradually reduced.
At this time, the first current sensor 202 may be regarded as a maximum current sensor. The allowable maximum transfer current of the converter 200 may be set by the use of the first current sensor 202.
At the time point t₃, the first switch M_BP1is again turned on and the second switch M_BN1is turned off. At this time, the current I_Lof the inductance element L_BSBRgradually increases. The current outputted from the first capacitive load C_Loadflows through the first switch M_BP1and the inductance element L_BSBRalong the current path P1 to charge the second capacitive load C_BSBR. After several times of repeating, the second switch M_BN1is continuously turned on after the time point t₄to gradually reduce the current I_Lof the inductance element L_BSBR.
At the time point t₅, the second current sensor 204 senses that the current I_Lof the inductance element L_BSBRis substantially equal to zero, and the second switch M_BN1is turned off. At this time, the second current sensor 204 may be regarded as a zero current sensor. According to the operations from the time points t₁to t₅, when the pre-stage output DC voltage V_outis reduced from the first DC voltage V₁to the second DC voltage V₂, the excess energy in the first capacitive load C_Loadis stored in the second capacitive load C_BSBRso that the voltage V_BSBRof the output terminal N_outis raised to a fourth DC voltage V₄.
Compared with the condition where all the switches are turned off when the inductance element L_BSBRstill has a current flowing therethrough so that the inductance element L_BSBRbecomes floating and the great potential difference is generated, this embodiment can prevent the switches from withstanding the great potential difference and thus reduce the possibility of damage caused by the high potential difference.
FIG. 3B is an equivalent circuit diagram showing the converter 200 of FIG. 2 in a boost-restore operation mode. As shown in FIGS. 3B and 4, in the boost-restore operation mode, the second switch M_BN1is turned on before the first switch M_BP1is turned on. At the time point t₆, the second switch M_BN1is turned on. Thereafter, the current outputted from the second capacitive load C_BSBRflows through the second switch M_BN1to the ground along a current path P₃.
At the time point t₇, when the second current sensor 204 senses that the current I_Lof the inductance element L_BSBRexceeds the upper bound value Imax, the second switch M_BN1is turned off. At this time, the first switch M_BP1is turned on, and the current flows from the second capacitive load C_BSBRto the first capacitive load C_Loadthrough the inductance element L_BSBRand the first switch M_BP1, as shown by a current path P₄.
At this time, the second current sensor 204 may be regarded as a maximum current sensor. The allowable maximum transfer current of the converter 200 may be set by the use of the second current sensor 204.
At the time point t₈, the second switch M_BN1is again turned on, and the first switch M_BP1is turned off. After several times of repeating, at the time point t₉, when the first current sensor 202 senses that the current I_Lof the inductance element L_BSBRis substantially equal to zero, the first switch M_BP1is turned off. At this time, the first current sensor 202 may be regarded as a zero current sensor. According to the operations from the time points t₆to t₉, the pre-stage output DC voltage V_outis raised to the first DC voltage V₁, and the electric energy originally stored in the second capacitive load C_BSBRis transferred to the first capacitive load C_Load. Thus, the electric energy originally stored in the second capacitive load C_BSBRmay be reused to decrease the electric energy consumed when the pre-stage circuit 102 is charging the first capacitive load C_Load. In addition, this embodiment further has the advantage of making the first capacitive load C_Loadprecisely and quickly reach the target level (e.g., the first DC level V₁or the second DC level V₂).
According to the current of the pre-stage input DC current I_IN, it is obtained that when the buck-store operation is performed from the time points t₁to t₅, the electric energy of the first capacitive load C_Loadis transferred to the second capacitive load C_BSBR. So, the pre-stage circuit 102 receives the less electric energy from the power source, and the current of the pre-stage input DC current I_INis also lower than that in other periods. When the boost-restore operation is performed from the time points t₆to t₉, the electric energy of the second capacitive load C_BSBRis transferred to the first capacitive load C_Load. So, the pre-stage circuit 102 receives the less electric energy from the power source, and the current of the pre-stage input DC current I_INis also lower than that in other periods.
Compared with the technique of charge sharing wherein only two capacitors are connected in parallel, this embodiment can effectively reduce the power loss of the overall circuit and reach the higher energy conversion efficiency.
The circuit block diagram of an example of the operation of the converter of FIG. 2 is implemented by taking a DC-DC converter 502 as an example of the pre-stage circuit 102, as shown in FIG. 5. The DC-DC converter 502 is controlled by a pulse width modulation (PWM) generator 504, and a buck-store and boost-restore converter 506 is controlled by a buck-store and boost-restore controller 508. The PWM generator 504 outputs a clock signal Clk and a signal V_PWMto the controller 508, which outputs a signal E_BSBRto the PWM generator 504. The PWM generator 504 and the controller 508 receive a signal E_reffrom the outside. The controller 508 further receives signals V_Pand V_Nrespectively outputted from current sensors 510 and 512. The controller 508 generates a signal Clk_BSBRaccording to the clock signal Clk and the signal E_BSBR, and generates signals V_Pmosand V_Nmos, which respectively control the first switch M_BP1and the second switch M_BN1, according to the signals V_Pand V_Nand the signal Clk_BSBR.
The signal E_refcontrols that the output DC voltage V_outis to be converted into which DC level. For example, when the signal E_refis enabled, it represents that the PWM generator 504 should control the DC-DC converter 502 to output the first DC voltage V₁. When the signal E_refis disabled, it represents that the PWM generator 504 should control the DC-DC converter 502 to output the second DC voltage V₂. The signal E_BSBRindicates whether the converter 506 should enter the buck-store operation mode or the boost-restore operation mode. The signal V_PWMindicates whether the output DC voltage V_outof the DC-DC converter 502 reaches the target level.
FIG. 6 shows waveforms of signals E_ref, E_BSBRand Clk_BSBRin an example. At the time point t₁′, when the level of the signal E_refis converted, it represents that the output DC voltage V_outwill be changed, so the signal E_BSBRis turned into enabled, and the converter 506 enters the boost-restore operation mode. At the time point t2′, the output DC voltage V_outhas reached the target level, so the signal E_BSBRis turned into disabled, and the converter 506 is controlled to work in the typical PWM operation.
At the time point t3′, the level of the signal E_refis converted, the signal E_BSBRis turned into enabled, and the converter 506 enters the buck-store operation mode. At the time point t4′, the output DC voltage V_outhas reached the target level, so the signal E_BSBRis turned into disabled, and the converter 506 is control to have the typical PWM operation.
When the converter 506 is controlled to work in the typical PWM operation, the electric energy stored in the second capacitive load C_BSBRmay be provided to a post-stage circuit 514. At this time, the converter 506 may perform the function of a DC-DC converter.
The converter 506 can be selectively controlled to work in the typical PWM operation, and may also be selectively controlled to work in a pulse frequency modulation (PFM) operation, or a sigma-delta modulation operation.
Although the pre-stage circuit 102 is the DC-DC converter 502 is illustrated in the example of FIG. 5, the pre-stage circuit 102 is not limited thereto. The pre-stage circuit 102 may also be a low drop regulator.
In addition, the pre-stage circuit 102 may receive the power coming from the external power source or battery, and may also receive the power of a solar energy electrode plate (also referred to as a solar cell). Thus, when the sunlight is stronger, the generated excess energy may be stored in the second capacitive load C_BSBRso that the stored energy may be utilized when the sunlight is not stronger.
The pre-stage output DC voltage V_outoutputted from the pre-stage circuit 102 may be provided to multiple LEDs connected in series. For example, in the backlight module of the display panel using the color sequence technique, the red LEDs connected in series, the green LEDs connected in series and the blue LEDs connected in series are sequentially lighted up. Applying the buck-store and boost-restore converter of this embodiment can effectively achieve the effects of saving the energy and increasing the driving speed when the pre-stage output DC voltage V_outis switched to different levels to provide different levels of driving voltage to drive the LEDs with different colors.
In addition, the pre-stage output DC voltage V_outmay also be provided to a central processing unit (CPU). The typical CPU requires different control voltages in different modes (e.g., a standby mode or a typical operation mode). Applying the buck-store and boost-restore converter of this embodiment can achieve the effects of saving the energy and the rapid operation when the pre-stage output DC voltage V_outcontrols the CPU.
FIG. 7 shows waveforms of a pre-stage input DC current I_IN, a current I_Lof an inductance element L_BSBR, a pre-stage output DC voltage V_outand a voltage V_BSBRof an output terminal N_outcorresponding to an example of the other embodiment. What is different from the embodiment of FIG. 4 is that, when the boost-restore operation is performed from the time points t′₆to t′₉, the electric energy of the second capacitive load C_BSBRfirstly serves as the electric energy, outputted from the pre-stage circuit 102, to drive the to-be-driven circuit, such as the LEDs connected in series or the CPU.
Consequently, the pre-stage circuit 102 needs not to receive a lot of electric energy from the power source in the period from the time points t′₆to t′₉, and can achieve the object of driving the to-be-driven circuit. As shown in FIG. 7, the average current from the time points t′₆to t′₉may be smaller than the currents in other periods. After the time point t′₁₀, if the voltage of the pre-stage output DC voltage V_outhas to be raised, the power source can provide the electric energy required to raise the voltage of the pre-stage output DC voltage V_out. As shown in FIG. 7, it is obtained that the average current from the time points t′₁₀to t′₁₁may be higher than that in any other period.
In addition, according to the suitable design of the switch control, the other embodiment of the invention can achieve the function of the boost-store and buck-restore converter.
The buck-store and boost-restore converter according to each embodiment of the invention can store the excess energy when the output voltage of the DC-DC converter is switched from the high supply voltage to the low supply voltage and can utilize the stored energy when the output voltage of the DC-DC converter is switched from the low supply voltage to the high supply voltage. So, the electric energy consumption of the pre-stage circuit can be effectively reduced. In addition, the advantages of increasing the switching speed of the DC-DC converter and reducing the power loss may further be obtained.
While the invention has been described by way of examples and in terms of preferred embodiments, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.

Claims

1. A buck-store and boost-restore converter to be electrically connected to a pre-stage circuit and a first capacitive load, wherein the pre-stage circuit receives a pre-stage input DC voltage and provides a pre-stage output DC voltage to the first capacitive load, and the pre-stage output DC voltage comprises a first DC voltage or a second DC voltage, characterized in that:

the converter has an inductance element and is to be electrically connected to a second capacitive load;

when the pre-stage output DC voltage is reduced from the first DC voltage to the second DC voltage, the inductance element serves as a current source with a variable current to output a current to the second capacitive load, so as to transfer electric energy, stored in the first capacitive load, to the second capacitive load; and

when the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the inductance element serves as a current source with a variable current to output a current to the first capacitive load, so as to transfer electric energy, stored in the second capacitive load, to the first capacitive load.

2. A buck-store and boost-restore converter to be electrically connected to a pre-stage circuit and a first capacitive load, wherein the pre-stage circuit receives a pre-stage input DC voltage and provides a pre-stage output DC voltage to the first capacitive load, and the pre-stage output DC voltage comprises a first DC voltage or a second DC voltage, the converter comprising:

an input terminal, to be coupled to the first capacitive load, for receiving the pre-stage output DC voltage;

a first switch coupled to the input terminal;

an inductance element having a first end coupled to the first switch;

a second switch coupled between the inductance element and a constant voltage; and

an output terminal coupled to a second end of the inductance element and a second capacitive load, wherein:

when the pre-stage output DC voltage is reduced from the first DC voltage to the second DC voltage, the converter enters a buck-store operation mode and the first switch and the second switch are alternately turned on, so that the inductance element outputs a current to the second capacitive load to transfer electric energy, stored in the first capacitive load, to the second capacitive load; and

when the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the converter enters a boost-restore operation mode and the first switch and the second switch are alternately turned on, so that the inductance element outputs a current to the first capacitive load to transfer electric energy, stored in the second capacitive load, to the first capacitive load.

3. The converter according to claim 2, wherein in the buck-store operation mode, the first switch is turned on before the second switch is turned on.

4. The converter according to claim 2, wherein in the boost-restore operation mode, the second switch is turned on before the first switch is turned on.

5. The converter according to claim 2, further comprising:

a first current sensor, coupled to the first switch, for sensing a current flowing through the inductance element; and

a second current sensor, coupled to the second switch, for sensing the current flowing through the inductance element.

6. The converter according to claim 5, wherein in the buck-store operation mode, the first switch is turned off when the first current sensor senses that the current of the inductance element exceeds an upper bound value, and the second switch is turned off when the second current sensor senses that the current of the inductance element is substantially equal to zero.

7. The converter according to claim 5, wherein in the boost-restore operation mode, the second switch is turned off when the second current sensor senses that the current of the inductance element exceeds an upper bound value, and the first switch is turned off when the first current sensor senses that the current of the inductance element is substantially equal to zero.

8. The converter according to claim 2, wherein the constant voltage is a ground voltage.

9. The converter according to claim 2, wherein the pre-stage circuit is a DC-DC converter.

10. The converter according to claim 2, wherein the pre-stage circuit receives a power of a solar energy electrode plate.

11. The converter according to claim 2, wherein the pre-stage circuit is a low drop regulator.

12. The converter according to claim 2, wherein the converter is further selectively controlled under a pulse width modulation (PWM) operation.

13. The converter according to claim 2, wherein the converter is further selectively controlled under a pulse frequency modulation (PFM) operation.

14. The converter according to claim 2, wherein the converter is further selectively controlled under a sigma-delta modulation operation.

15. The converter according to claim 2, wherein the converter further selectively provides electric energy to a post-stage circuit.

16. The converter according to claim 2, wherein the pre-stage output DC voltage is provided to a plurality of light-emitting diodes (LEDs) connected in series.

17. The converter according to claim 2, wherein the pre-stage output DC voltage is provided to a central processing unit (CPU).

18. A system, comprising:

a pre-stage circuit for receiving a pre-stage input DC voltage from a power source, and providing a pre-stage output DC voltage, wherein the pre-stage output DC voltage comprises a first DC voltage or a second DC voltage;

a first capacitive load for receiving the pre-stage output DC voltage;

a second capacitive load; and

a buck-store and boost-restore converter electrically connected to the pre-stage circuit and the first capacitive load, the converter comprising:

an input terminal, coupled to the first capacitive load, for receiving the pre-stage output DC voltage;

a first switch coupled to the input terminal;

an inductance element having a first end coupled to the first switch;

an output terminal coupled to a second end of the inductance element and further coupled to the second capacitive load,

wherein when the pre-stage output DC voltage is reduced from the first DC voltage to the second DC voltage, the converter enters a buck-store operation mode and the first switch and the second switch are alternately turned on, so that the inductance element outputs a current to the second capacitive load to transfer electric energy, stored in the first capacitive load, to the second capacitive load.

19. The system according to claim 18, wherein when the pre-stage output DC voltage is raised from the second DC voltage to the first DC voltage, the converter enters a boost-restore operation mode and the first switch and the second switch are alternately turned on, so that electric energy of the second capacitive load serves as electric energy outputted from the pre-stage circuit.