TWI760158B - Bridge-tied load class-d power amplifier, audio amplifying circuit and associated control method - Google Patents

Abstract

A bridge-tied load class-D power amplifier, an audio amplifying circuit and an associated control method are provided. The audio amplifying circuit integrates and modulates a first-path error signal and a second-path error signal to generate a first-path comparator output and a second-path comparator output. The audio amplifying circuit generates the first-path error signal according to a first analog differential input and a first-path feedback signal, and generates the second-path error signal according to a second analog differential input and a second-path feedback signal. The audio amplifying circuit generates the first-path feedback signal according to the first-path comparator output, and generates the second-path comparator output according to the second-path error signal, respectively. Moreover, the audio amplifying circuit selectively adjusts the phase of one of the first-path comparator output and the second-path comparator output.

Description

Bridge load class D power amplifier, audio amplifier circuit and its related Control Method

The present invention relates to a bridge-loaded class-D power amplifier, an audio amplifying circuit and a control method related thereto, and in particular to a bridge-loaded class-D power amplifier, an audio amplifying circuit and its relatedness that can suppress startup pops and shutdown pops control method.

Mobile devices with audio playback function are becoming more and more popular. Class D amplifiers are often used in mobile devices with audio playback functions due to their high efficiency, power saving and small size. The Class D amplifier amplifies the input audio signal and converts it into a pulse-width modulation (PWM) signal with high power. Next, the speaker converts the current frequency of the PWM signal into sound and plays it. With the development of technology, users have higher and higher requirements for the sound quality of speakers.

The present invention relates to a bridge-loaded class D power amplifier, an audio amplifying circuit and a related control method thereof. Through the setting of the phase shift circuit, the bridge load class D power amplifier and audio amplifier circuit can dynamically output the PWM output due to the non-inverting path. (PWM+) and negative-phase path PWM output (PWM-) phase inconsistency caused by the phenomenon of startup and shutdown popping noise is suppressed.

According to a first aspect of the present invention, an audio amplifying circuit is provided. An audio amplifying circuit includes: a modulation signal generating circuit, a first audio output circuit, and a second audio output circuit. The modulation signal generating circuit is electrically connected to the first audio output circuit and the second audio output circuit. The modulation signal generating circuit integrates and modulates the first path error signal to generate a first path comparator output, and integrates and modulates the second path error signal to generate a second path comparator output. The first audio output circuit includes: a first path adder, a first phase shift circuit, and at least one first path loop. The first path adder is electrically connected to the modulation signal generating circuit. The first path adder generates a first path error signal after subtracting the first path feedback signal from the first analog differential input. The first phase shift circuit selectively adjusts the phase of the output of the first path comparator. At least one first path loop is electrically connected to the modulation signal generating circuit, the first path adder and the first phase shift circuit. At least one first path loop generates a first path feedback signal according to the output of the first path comparator. The second audio output circuit includes: a second path adder, a second phase shift circuit, and at least one second path loop. The second path adder is electrically connected to the modulation signal generating circuit. The second path adder generates a second path error signal after subtracting the second path feedback signal from the second analog differential input. The second phase shift circuit selectively adjusts the phase of the output of the second path comparator. At least one second path loop is electrically connected to the modulation signal generating circuit, the second path adder and the second phase shift circuit. At least one second path loop generates a second path feedback signal according to the output of the second path comparator.

According to a second aspect of the present invention, a control method applied to an audio amplifying circuit is provided. The control method includes the following steps. First, the audio amplifier circuit integrates and modulates the first path error signal and the second path error signal to generate the first path comparator output and the second path comparator output, respectively. Secondly, the audio amplifier circuit generates a first path error signal according to the first analog differential input and the first path feedback signal. Then, the audio amplifier circuit generates a second path error signal according to the second analog differential input and the second path feedback signal. After that, the audio amplifier circuit generates the first path feedback signal and the second path feedback signal according to the output of the first path comparator and the output of the second path comparator, respectively. In addition, the audio amplifier circuit selectively adjusts the phase of one of the output of the first path comparator and the output of the second path comparator.

According to a third aspect of the present invention, a bridge-loaded class D power amplifier for driving a speaker is provided. The bridge-loaded class D power amplifier includes: a first half-bridge; a second half-bridge and a first phase shift circuit. The first half-bridge is in response to a first PWM signal and the second half-bridge is jointly driven in response to the second PWM signal. The first phase shift circuit is used for shifting the phase of the first PWM signal. The phase error formed between the first PWM signal and the second PWM signal is related to the noise of the speaker.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the following specific examples are given and described in detail in conjunction with the accompanying drawings as follows:

1: Audio playback module

12: Audio control circuit

14: Digital-to-Analog Converter

Sd: digital audio signal

Sctl: control signal

Va+: positive phase analog differential input

Va-: Negative phase analog differential input

13: Audio amplifier circuit

L-, L+: Inductance

PWM+: Non-inverting path PWM output

PWM-: Negative phase path PWM output

(PWM+)-(PWM-): PWM output voltage difference

15: Speakers

Ncmp+: non-inverting path comparator output endpoint

Ncmp-: Negative phase path comparator output endpoint

t1,t2: time point

△t1,△t2: Phase error

Ton_tr: During power-on transient

Top: During normal playback

Toff_tr: During shutdown transient

Pd1, Pd2: PWM output voltage difference (PWM+)-(PWM-) size

131: Modulation signal generation circuit

133: Negative phase audio output circuit

133a: Negative Path Adder

133b: Negative Phase Shift Circuit

133c: Negative phase path main circuit

133d: Negative phase path from loop

135: Positive phase audio output circuit

135a: Positive Path Adder

135b: Positive Phase Shift Circuit

135c: Non-phase path main circuit

135d: Non-inverting path from loop

21: Phase shift circuit

Cv: variable capacitance

Gnd: ground voltage

C1, C2, C3, C4, C5: Capacitors

sw1,sw2,sw3,sw4,sw5,SWm+,SWm-,SWa1+,SWa2+,SWa1-,SWa2-: switch

Sf+: Non-inverting path feedback signal

Sf-: Negative phase path feedback signal

Serr+: positive phase path error signal

Serr-: Negative phase path error signal

Sfm+: Main feedback signal of positive phase path

Sfm-: Negative phase path main feedback signal

Sfa+: Non-inverting path from feedback signal

Sfa-: Negative phase path from feedback signal

Rm+: Main feedback resistance of positive phase path

Rm-: Negative phase path main feedback resistance

Ra+: Non-inverting path from feedback resistor

Ra-: Negative phase path from feedback resistor

INVm+: Non-inverting path main driver

INVm-: Negative phase path main driver

INVa+: non-inverting path slave drive

INVa-: Negative phase path from driver

1311: Integrator

1313: Comparison Circuit

1313a: Carrier Generation Circuits

AMP: Fully Differential Amplifier

OP+: Non-Inverting Path Comparator

OP-: Negative Phase Path Comparator

S201, S203, S207, S207, S209, S211, S213, S215, S209a, S209b, S209c, S209d: Steps

Fig. 1 is a schematic diagram of an audio playback device.

Figure 2 is a waveform diagram of the popping phenomenon caused by the phase of the positive-phase path PWM output (PWM+) slightly leading the negative-phase path PWM output (PWM-) during the power-on/off period of the speaker.

FIG. 3A is a schematic diagram of the phase of the positive phase path PWM output (PWM+) leading the phase of the negative phase path PWM output (PWM-) during switching.

Figure 3B is a schematic diagram of adjusting the phase of the PWM output of the positive phase path (PWM+) and the phase of the PWM output of the negative phase path (PWM-) during switching to reduce noise.

FIG. 4 is a block diagram of an audio output module according to an embodiment of the present disclosure.

Fig. 5A shows that when the phase of the positive-phase path PWM output (PWM+) slightly leads the phase of the negative-phase path PWM output (PWM-), the audio amplifying circuit of the inventive concept embodiment of the present disclosure is used to suppress the noise formed by the speaker during the power-on and off period. Waveform diagram of the popping phenomenon.

Fig. 5B shows that when the phase of the positive-phase path PWM output (PWM+) is slightly behind that of the negative-phase path PWM output (PWM-), the audio amplifying circuit of the inventive concept embodiment of the present disclosure is used to suppress the noise formed by the speaker during switching on and off. Waveform diagram of the popping phenomenon.

FIG. 6A is a schematic diagram of the phase shift circuit being a variable capacitor.

FIG. 6B is a schematic diagram of a phase shift circuit including a plurality of capacitor paths in parallel.

FIG. 7 is a schematic diagram of an audio amplifying circuit according to the concept of the present disclosure.

FIG. 8A is a circuit diagram of an audio amplifying circuit according to an embodiment of the present disclosure, where the main feedback path is disconnected and the slave feedback path is turned on.

FIG. 8B is a circuit diagram of an audio amplifying circuit according to an embodiment of the present disclosure, which is turned on in the main feedback path and disconnected from the feedback path.

FIGS. 9A and 9B are flowcharts of dynamically selecting the feedback path according to the state of the audio output module according to the audio amplifying circuit conceived in the present disclosure.

Please refer to FIG. 1 , which is a schematic diagram of an audio playback device. The audio playback device includes an audio playback module 1 and an audio output module 10 .

The audio playback module 1 includes an audio control circuit 12 and a digital-to-analog converter 14 that are electrically connected to each other. The audio control circuit 12 can dynamically respond to the state of the audio output module 10 to send control signals Sct1 of different types and uses to the audio amplifying circuit 13 . After receiving the digital audio signal Sd transmitted by the audio control circuit 12, the digital-to-analog converter 14 converts the digital audio signal Sd into a positive-phase analog differential input Va+ and a negative-phase analog differential input ( negative-phase analog differential input)Va-.

The audio output module 10 includes an audio amplifying circuit 13 , inductors L+, L- and a speaker 15 . The inductors L+ and L- are both electrically connected between the audio amplifying circuit 13 and the speaker 15 . The audio amplifying circuit 13 is electrically connected to the audio control circuit 12 and the analog-to-digital converter 14 at the same time. The audio amplifying circuit 13 first amplifies and converts the positive-phase analog differential input Va+ and the negative-phase analog differential input Va- into a positive-phase path pulse width modulation signal (referred to as a positive-phase path PWM (pulse-width modulation) for short). Output PWM+)) and negative-phase path PWM signal (abbreviated as negative-phase path PWM output (PWM-)) to inductors L+, L-. The audio is then played by the speaker 15 . The sound effect heard by the user through the speaker 15 is at least determined by the PWM output voltage difference (PWM+)-(PWM-) between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-).

When the audio output module 10 is turned on and in the normal operation mode, the audio playback module 1 transmits the positive-phase analog differential input Va+ and the negative-phase analog differential input Va- to the audio amplifying circuit 13 . The audio amplifying circuit 13 generates a positive-phase path PWM output (PWM+) and a negative-phase path PWM output (PWM-) accordingly. Generally speaking, there is at least an impedance mismatch between the path used to deliver the PWM output (PWM+) associated with the positive phase path and the path used to deliver the PWM output associated with the negative phase path (PWM-), which will result in an output The positive phase path PWM output (PWM+) is not synchronized with the negative phase path PWM output (PWM-). Depending on the impedance mismatch, the positive path PWM output (PWM+) may lead or lag the negative path PWM output (PWM-). For ease of illustration, in Figure 2, it is assumed that the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-).

Please refer to FIG. 2 , which is a waveform diagram of pop noise caused by the phase of the positive-phase path PWM output (PWM+) leading the phase of the negative-phase path PWM output (PWM-) during the power-on/off period of the speaker 15 . In Figure 2, from top to bottom, the vertical axis represents the waveforms of the positive phase path PWM output (PWM+), the negative phase path PWM output (PWM-), and the PWM output voltage difference (PWM+)-(PWM-). The horizontal axis is time, and the activation period of the audio output module 10 may include three time periods, the power-on transient period Ton_tr, the normal playing period Top, and the power-off transient period Toff_tr.

The enlarged diagram in the upper left corner of Figure 2 shows the change of the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) during the switching period between the power-on transient period Ton_tr and the normal playback period Top. During this switching period, the voltage of the positive phase path PWM output (PWM+) rises at time point t1, and the voltage of the negative phase path PWM output (PWM-) rises at a time point (t1+Δt1) after time point t1. That is, the non-inverting path PWM output (PWM+) There is a phase error (Δt1) with the negative phase path PWM output (PWM-). Therefore, during the switching period between the power-on transient period Ton_tr and the normal playing period Top, the waveform of the PWM output voltage difference (PWM+)-(PWM-) has a voltage pulse during the phase error (Δt1). In the present disclosure, for the PWM output voltage difference (PWM+)-(PWM-), the potential of Ton_tr during the power-on transient period is used as the reference potential. When the potential of the voltage pulse is greater than the reference potential, the voltage pulse is regarded as a positive voltage pulse, and vice versa. Accordingly, a positive voltage pulse is generated during the period of the phase error (Δt1).

The graph in the upper right corner of Figure 2 is enlarged to show the change of the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) during the switching period between the normal playback period Top and the shutdown transient period Toff_tr. During this switching period, the voltage of the positive-phase path PWM output (PWM+) drops at time t2, and the voltage of the negative-phase path PWM output (PWM-) drops at a time (t2+Δt2) after time t2. That is, there is a phase error (Δt2) between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-). Therefore, during the switching period between the normal playback period Top and the shutdown transient period Toff_tr, the waveform of the PWM output voltage difference (PWM+)-(PWM-) has a negative voltage pulse during the phase error (Δt2).

Whether it is a positive voltage pulse during the switching period between Ton_tr during the power-on transient period and the normal playing period Top, or a negative voltage pulse during the switching period between the normal playing period Top switching to the power-off transient period Toff_tr, the user The popping sound can be heard through the speaker 15, which affects the user's hearing experience.

Please refer to FIG. 3A, which is a schematic diagram of the phase of the positive phase path PWM output (PWM+) leading the phase of the negative phase path PWM output (PWM-) during switching. This diagram is equivalent to the enlarged diagram in the upper left corner of Figure 2. When the positive phase path PWM output (PWM+) is connected to the negative When there is a phase error (Δt1) between the phase path PWM outputs (PWM-), the magnitude of the PWM output voltage difference (PWM+)-(PWM-) is expressed as Pd1.

Please refer to Figure 3B, which is a schematic diagram of adjustment to align the phase of the positive path PWM output (PWM+) with the phase of the negative path PWM output (PWM-) during switching to reduce noise. This diagram is equivalent to the diagram in the upper left corner of Figure 2, where the phase of the positive-phase path PWM output (PWM+) is shifted backward (delayed); or the phase of the negative-phase path PWM output (PWM-) is shifted forward (advanced). ) situation. At this time, the phase error (Δt1) does not exist, and the magnitude of the PWM output voltage difference (PWM+)-(PWM-) is expressed as Pd2.

When comparing the size (Pd1) of the PWM output voltage difference (PWM+)-(PWM-) in Figure 3A with the size (Pd2) of the PWM output voltage difference (PWM+)-(PWM-) in Figure 3B, it can be seen that Pd1 >Pd2. That is, after the phase adjustment, the magnitude of the PWM output voltage difference (PWM+)-(PWM-) is reduced. In addition, the noise of the speaker 15 can be reduced accordingly and the user's hearing experience can be improved. To this end, the audio amplifier circuit 13 of the present case provides a circuit structure of a phase shift circuit (eg, a delay circuit), which suppresses the aforementioned popping sound by adjusting the phase of the positive-phase path PWM output (PWM+) or the negative-phase path PWM output (PWM-). Phenomenon.

Please refer to FIG. 4 , which is a block diagram of an audio amplifying circuit according to an embodiment of the present disclosure. In this embodiment, the audio amplifying circuit 13 adopts a bridge-tied load class D power amplifier structure. The audio amplifying circuit 13 includes: a modulation signal generating circuit 131 , a positive-phase audio output circuit 135 , and a negative-phase audio output circuit 133 . The modulation signal generating circuit 131 is electrically connected to the positive-phase audio output circuit 135 and the negative-phase audio output circuit 133 at the same time. The modulation signal generating circuit 131 may be a pulse width modulation signal generating circuit.

The non-inverting audio output circuit 135 acts as one half bridge of the bridge load. The non-inverting audio output circuit 135 includes a non-inverting path adder 135a, a non-inverting phase shifting circuit 135b, a non-inverting path master loop 135c and a non-inverting path slave loop 135d. The non-inverting phase shift circuit 135b, the non-inverting path main loop 135c and the non-inverting path slave loop 135d are all electrically connected to the modulation signal generating circuit 131 through the non-inverting path comparator output terminal Ncmp+. The normal-phase path main circuit 135c and the normal-phase path slave circuit 135d are alternately conducted. The non-inverting path adder 135a receives the non-inverting path feedback signal Sf+, wherein the non-inverting path feedback signal Sf+ is the output of one of the non-inverting path main loop 135c and the non-inverting path slave loop 135d. The non-inverting path adder 135a subtracts the non-inverting path feedback signal Sf+ from the non-inverting analog differential input Va+ to generate the non-inverting path error signal Serr+, and transmits the non-inverting path error signal Serr+ to the modulation signal generating circuit 131 . The modulation signal generating circuit 131 outputs the non-inverting path comparator output Scmp+ to the non-inverting path comparator output terminal Ncmp+ according to the non-inverting path error signal Serr+.

The negative-phase audio output circuit 133 serves as another half-bridge of the bridge load, and is combined with the positive-phase audio output circuit 135 to form a full bridge for driving the speaker 15 . The negative phase audio output circuit 133 includes a negative phase path adder 133a, a negative phase phase shift circuit 133b, a negative phase path master loop 133c and a negative phase path slave loop 133d. The negative phase shift circuit 133b, the negative phase path main loop 133c and the negative phase path slave loop 133d are all electrically connected to the modulation signal generating circuit 131 through the negative phase path comparator output terminal Ncmp-. The negative-phase path main loop 133c and the negative-phase path slave loop 133d are alternately conducted. The negative phase path adder 133a receives the negative phase path feedback signal Sf-, wherein the negative phase path feedback signal Sf- is the output of one of the negative phase path main loop 133c and the negative phase path slave loop 133d. The negative-phase path adder 133a generates a negative-phase path error signal Serr- after deducting the negative-phase path feedback signal Sf- from the negative-phase analog differential input Va-, and adds The negative phase path error signal Serr− is sent to the modulation signal generating circuit 131 . The modulation signal generating circuit 131 outputs the negative-phase path comparator output Scmp- to the negative-phase path comparator output terminal Ncmp- according to the negative-phase path error signal Serr-.

As shown in Figure 2, there may be a phase error in the generation of the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-), resulting in popping noise. That is to say, solving the aforementioned phase error problem can at least reduce the popping phenomenon. To this end, the non-inverting phase shift circuit 135b provided in the non-inverting audio output circuit 135 can be used to shift the non-inverting path comparator output Scmp+ on the non-inverting path comparator output terminal Ncmp+ in timing, and, in The negative phase shift circuit 133b provided by the negative phase audio output circuit 133 can be used to shift the negative phase path comparator output Scmp- on the negative phase path comparator output terminal Ncmp- in timing.

In the present disclosure, there is symmetry in circuit structure between the positive-phase audio output circuit 135 and the negative-phase audio output circuit 133 . Therefore, the phase error caused by the positive phase path main loop 135c to the positive phase path comparator output Scmp+ can be regarded as the same as the phase error caused by the negative phase path main loop 133c to the negative phase path comparator output Scmp-. That is, the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) is positively related to the difference between the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp- phase error. Accordingly, the difference between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) can be adjusted by adjusting the phase error between the positive-phase path comparator output Scmp+ and the negative-phase path comparator output Scmp- phase error between. Therefore, the manufacturer of the audio playback device can perform a calibration procedure on the audio output module 10 before the product is shipped to reduce the popping phenomenon.

During the calibration procedure, if the popping phenomenon is found to be caused by the positive phase path PWM output (PWM+) leading the negative phase path PWM output (PWM-), the audio control circuit 12 uses the control signal Sct1 to set the positive phase shift circuit 135b The equalization capacitor Ceq+ increases the capacitance value of the equalization capacitor Ceq+, thereby delaying the generation time point of the non-inverting path PWM output (PWM+). Alternatively, the audio control circuit 12 uses the control signal Sctl to set the equalization capacitor Ceq- of the negative phase shift circuit 133b, so that the capacitance value of the equalization capacitor Ceq- is reduced, thereby advancing the generation time of the negative phase path PWM output (PWM-). .

On the contrary, if it is found that the popping phenomenon is caused by the positive phase path PWM output (PWM+) falling behind the negative phase PWM path output (PWM-), the control signal Sct1 is used to set the equalization capacitance Ceq- of the negative phase phase shift circuit 133b, so that The capacitance value of the equalization capacitor Ceq- increases, thereby delaying the generation timing of the negative-phase PWM path output (PWM-). Alternatively, the equalization capacitor Ceq+ of the positive phase shift circuit 135b is set by the control signal Sct1, so that the capacitance value of the equalization capacitor Ceq+ is reduced, thereby advancing the generation time of the positive phase path PWM output (PWM+).

In the embodiment of FIG. 4 , the audio amplifying circuit 13 may be provided with a positive-phase phase shift circuit 135b and a negative-phase phase shift circuit 133b at the same time, but the present disclosure is not limited thereto. In some embodiments, only one of the positive phase shift circuit 135b and the negative phase shift circuit 133b is provided. For example, if the signal transmission path of the main circuit 135c of the positive phase path and the signal transmission path of the main circuit 133c of the negative phase path can be determined in advance according to the wiring position of the circuit, etc. One of a positive-phase phase shift circuit 135b and a negative-phase phase shift circuit 133b is provided in the amplifier circuit 13 . That is, the positive phase shift Whether the bit circuit 135b or the negative phase shift circuit 133b is provided or not can be considered according to the characteristics of the audio amplifying circuit 13 and need not be limited.

Next, Figs. 5A and 5B are used to illustrate how the positive-phase phase shift circuit 135b and the negative-phase phase shift circuit 133b are used to improve the popping phenomenon by adjusting the phases. Please also note that in practical applications, the positive phase shift circuit 135b and the negative phase shift circuit 133b can delay the positive phase path PWM output (PWM+) and the negative phase path PWM output by setting capacitors and increasing the capacitance value (PWM-) one of the generation time points; or, by reducing the capacitance value of the existing capacitor on the output path, one of the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) will be generated The time of the person is earlier. The vertical axes of Figures 5A and 5B are, from top to bottom, the positive phase path PWM output (PWM+), the negative phase path PWM output (PWM-), and the PWM output voltage difference (PWM+)-(PWM-) under different conditions Case. The horizontal axis of FIGS. 5A and 5B is time.

Please refer to FIG. 5A , when the phase of the positive-phase path PWM output (PWM+) is slightly ahead of the negative-phase path PWM output (PWM-), the audio amplifying circuit of the embodiment of the present disclosure is used to suppress the speaker 15 during the power-on period. Waveform diagram of the resulting popping phenomenon.

When the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-) in phase, if the positive-phase phase shift circuit 135b or the negative-phase phase shift circuit 133b is not adjusted, the popping phenomenon will remain (same as the second one). Figure same).

When the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-), if the capacitance value of the positive-phase phase shift circuit 135b is increased, the time point when the positive-phase path PWM output (PWM+) is generated can be delayed , at this time the non-phase path PWM output (PWM+) The phase error with the negative phase path PWM output (PWM-) is reduced. Accordingly, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) is reduced. Therefore, the degree of popping sound generated by the speaker 15 becomes small.

On the other hand, if the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-), if the capacitance value of the negative-phase phase shift circuit 133b is further increased, the negative-phase path PWM output is further made to be output. The time point generated by (PWM-) is delayed, and the phase error between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) becomes larger at this time. In conjunction, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) becomes larger. Therefore, the degree of popping sound generated by the speaker 15 becomes large. It can be seen from Fig. 4A that when the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-), the PWM output voltage difference can be improved by increasing the capacitance value of the positive-phase phase shift circuit 135b. The popping phenomenon of (PWM+)-(PWM-).

Please refer to FIG. 5B , when the phase of the PWM output (PWM+) of the positive phase path is slightly behind the phase of the PWM output (PWM-) of the negative phase path, the audio amplifying circuit of the embodiment of the present disclosure is used to suppress the sound of the speaker 15 during the power-on period. Waveform diagram of the resulting popping phenomenon.

When the positive phase path PWM output (PWM+) lags the negative phase path PWM output (PWM-), if the positive phase shift circuit 135b or the negative phase shift circuit 133b is not adjusted, the popping phenomenon will remain.

When the positive-phase path PWM output (PWM+) lags behind the negative-phase path PWM output (PWM-), if the capacitance value of the positive-phase phase shift circuit 135b is increased, the time point when the positive-phase path PWM output (PWM+) is generated will be delayed , making the non-inverting path PWM output The phase error between (PWM+) and the negative-phase path PWM output (PWM-) further increases. In conjunction, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) becomes larger. Therefore, the degree of popping sound generated by the speaker 15 becomes large.

When the positive-phase path PWM output (PWM+) lags behind the negative-phase path PWM output (PWM-), if the capacitance value of the negative-phase phase shift circuit 133b is increased, the time point generated by the negative-phase path PWM output (PWM-) can be delayed After that, the phase error between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-) becomes smaller at this time. In conjunction, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) becomes smaller. Therefore, the degree of popping sound generated by the speaker 15 becomes small.

As can be seen from Fig. 5B, when the positive-phase path PWM output (PWM+) lags the negative-phase path PWM output (PWM-), the PWM output voltage difference can be improved by increasing the capacitance value of the negative-phase phase shift circuit 133b. The popping phenomenon of (PWM+)-(PWM-).

According to the description of Figures 5A and 5B, it can be known that whether the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-), or the positive-phase path PWM output (PWM+) lags the negative-phase path PWM output (PWM- ), the audio amplifying circuit 13 conceived according to the present disclosure can reduce the switching period between the power-on transient period Ton_tr and the normal playing period Top and the switching period between the general playing period Top and the power-off transient period Toff_tr. the popping phenomenon.

When the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-), the audio control circuit 12 uses the control signal Sct1 to increase the capacitance value of the positive phase shift circuit 135b; alternatively, the audio control circuit 12 uses the control signal Sctl reduces the capacitance value of the negative phase shift circuit 133b.

On the other hand, when the positive phase path PWM output (PWM+) lags the negative phase path PWM output (PWM-), the audio control circuit 12 uses the control signal Sct1 to increase the capacitance value of the negative phase shift circuit 133b; or, the audio control circuit 12. The capacitance value of the positive phase shift circuit 135b is reduced by the control signal Sct1.

Further, if there is a popping sound, it cannot be determined whether the positive-phase path PWM output (PWM+) leads the negative-phase path PWM output (PWM-), or the positive-phase path PWM output (PWM+) lags behind the negative-phase path PWM output (PWM-). When this occurs, the capacitance value of the positive-phase phase shift circuit 135b or the negative-phase phase shift circuit 133b can also be adjusted according to the waveforms in FIGS. 5A and 5B. For example, after first trying to increase the capacitance value of the positive phase shift circuit 135b, it is found that the volume of the popping sound decreases, which means that the positive phase path PWM output (PWM+) before the phase adjustment leads the negative phase path PWM output (PWM-) before the phase adjustment. ). Therefore, it is necessary to keep increasing the capacitance value of the positive-phase phase shift circuit 135b (or decrease the capacitance value of the negative-phase phase shift circuit 133b). On the contrary, if the capacitance value of the positive phase shift circuit 135b is increased, it is found that the volume of the popping sound increases, which means that the positive phase path PWM output (PWM+) before the phase adjustment is behind the negative phase path PWM output (PWM-) before the phase adjustment, In this case, the capacitance value of the negative-phase phase shift circuit 133b should be increased instead (or the capacitance value of the positive-phase phase shift circuit 135b should be decreased).

Similarly, if you first try to increase the capacitance value of the negative phase shift circuit 133b and find that the volume of the popping sound decreases, it means that the positive phase path PWM output (PWM+) before the phase adjustment lags behind the negative phase path PWM output ( PWM-). Therefore, it is necessary to keep increasing the capacitance value of the negative-phase phase shift circuit 133b (or decrease the capacitance value of the positive-phase phase shift circuit 135b). On the contrary, if the capacitance value of the negative phase shift circuit 133b is increased, it is found that the volume of the popping sound increases, which means that the positive phase path PWM output (PWM+) before the phase adjustment is ahead of the adjustment. The negative phase path PWM output (PWM-) before the phase adjustment must be changed to increase the capacitance value of the positive phase phase shift circuit 135b (or decrease the capacitance value of the negative phase phase shift circuit 133b).

In some embodiments, the positive phase shift circuit 135b and the negative phase shift circuit 133b can each use the delayed phase shift circuit 21 as shown in FIGS. 6A and 6B . However, in practical application, the circuits of the positive-phase phase shift circuit 135b and the negative-phase phase shift circuit 133b are not limited to this.

Please refer to FIG. 6A , which is a schematic diagram of the phase shift circuit 21 being a variable capacitor. In this figure, the variable capacitor Cv is used as the phase shift circuit 21, and the phase shift circuit 21 is electrically connected to Ncmp (Ncmp+ and Ncmp- in FIG. 6A). The capacitance value of the variable capacitor Cv is controlled by the control signal Sctl, and the equalization capacitance Ceq of the phase shift circuit 21 is equal to the capacitance value of the variable capacitor Cv.

Please refer to FIG. 6B , which is a schematic diagram of the phase shift circuit 23 including a plurality of capacitor paths in parallel. In this figure, a plurality of parallel capacitor paths are used as the phase shift circuit 23, wherein each capacitor path includes a switch and a capacitor connected in series with each other. For identification, the switches and capacitances of each capacitive path are distinguished by different Roman numerals. For example, the switch of the first capacitor path is marked as sw1 and the capacitor is marked as C1 , and the rest are deduced by analogy, which will not be repeated. In this figure, it is assumed that capacitors C1, C2, C3, C4 and C5 have different capacitance values. The switches sw1, sw2, sw3, sw4 and sw5 are controlled by the control signal Sctrl. When at least one of the switches sw1 , sw2 , sw3 , sw4 and sw5 is turned on, the equalization capacitance Ceq of the phase shift circuit 23 will change. For example, when only the switch sw1 is turned on, the equivalence capacitance Ceq of the phase shift circuit 23 is equal to C1; and, when the switches sw1 and sw2 are turned on at the same time, the equivalence capacitance Ceq of the phase shift circuit 23 is equal to the capacitance C1 in parallel with the capacitance C2 equirectangular capacitance.

Fig. 6B assumes that the capacitance values of the capacitors C1, C2, C3, C4 and C5 are C, 2C, 4C, 8C and 16C, respectively. Based on the configuration setting of the capacitance value, the audio control circuit 12 can generate the control signal Sct1 corresponding to the switches sw1 , sw2 , sw3 , sw4 and sw5 in a binary manner. By switching the switches sw1 , sw2 , sw3 , sw4 and sw5 , the audio control circuit 12 can determine the capacitance value of the equalization capacitor Ceq. The switching of the switches sw1 , sw2 , sw3 , sw4 and sw5 and the calculation of the capacitance value of the equalization capacitance Ceq of the phase shift circuit 23 will not be described in detail here. Moreover, the number of capacitor paths included in the phase shift circuit 23 is not limited to this diagram.

Please refer to FIG. 7 , which is a schematic diagram of an audio amplifying circuit according to the concept of the present disclosure. It can be seen from the diagram that the modulation signal generating circuit 131 includes an integrator 1311 and a comparison circuit 1313 .

The integrator 1311 includes a fully differential amplifier AMP, capacitors Cin+, Cin-, and input resistors Rin+, Rin-. The non-inverting input terminal (+) of the fully differential amplifier AMP is electrically connected to the resistor Rin+, which receives the non-inverting path error signal Serr+ via the input resistor Rin+. Two ends of the capacitor Cin+ are respectively electrically connected to the non-inverting input terminal (+) and the inverting output terminal (-) of the fully differential amplifier AMP. The inverting input terminal (-) of the fully differential amplifier AMP is electrically connected to the input resistor Rin-, which receives the negative phase path error signal Serr- via the input resistor Rin-. Two ends of the capacitor Cin- are respectively electrically connected to the inverting input terminal (-) and the non-inverting output terminal (+) of the fully differential amplifier AMP.

The comparison circuit 1313 includes a positive phase path comparator OP+, a negative phase path comparator OP- and a carrier wave generating circuit 1313a. The carrier generating circuit 1313a generates a carrier signal (eg, a triangular wave SAW) to the non-inverting input terminal (+) of the non-inverting path comparator OP+ and the negative Inverting input (-) of phase path comparator OP-. The comparison circuit 1313 compares the output signal of the integrator 1311 with the output signal of the integrator 1311 via the positive phase path comparator OP+ and the negative phase path comparator OP- by using the triangular wave SAW, and the positive phase path comparator output terminal Ncmp+ and the negative phase path comparator output terminal Ncmp+. Ncmp- generates a square wave-like type of the positive phase path comparator output Scmp+, and the negative phase path comparator output Scmp-. The output frequency of the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp- is the same as the frequency of the input triangle wave SAW, while the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp- The duty cycle varies with the amplitude of the output signal (sine wave) of the integrator 1311.

As mentioned above, the positive phase audio output circuit 135 includes a positive phase path master loop 135c and a positive phase path slave loop 135d; the negative phase audio output circuit 133 includes a negative phase path master loop 133c and a negative phase path slave loop 133d. Next, the internal circuits of the positive-phase path master circuit 135c, the positive-phase path slave circuit 135d, the negative-phase path master circuit 133c, and the negative-phase path slave circuit 133d will be described, respectively.

The normal-phase path main loop 135c includes a switch SWm+, a normal-phase path main driver INVm+, and a normal-phase path main feedback resistor Rm+. The switch SWm+ is selectively turned on according to the control signal Sct1. When the switch SWm+ is turned on, the non-inverting path main driver INVm+ generates a non-inverting path PWM output (PWM+) based on the non-inverting path comparator output Scmp+. Next, the non-inverting path main feedback resistor Rm+ further converts the non-inverting path PWM output (PWM+) into the non-inverting path main feedback signal Sfm+.

The normal-phase path slave loop 135d includes switches SWa1+, SWa2+, a normal-phase path slave driver INVa+, and a normal-phase path slave feedback resistor Ra+. The switches SWa1+ and SWa2+ are selectively synchronously turned on or synchronously turned off according to the control signal Sct1. on. when the switch When SWa1+ and SWa2+ are turned on at the same time, the non-inverting path drives the non-inverting path comparator output Scmp+ from the driver INVa+ to generate the non-inverting driving signal (Sdrv+). Next, the positive-phase path slave feedback resistor Ra+ further converts the positive-phase drive signal (Sdrv+) into the positive-phase path slave feedback signal Sfa+.

The negative-phase path main loop 133c includes a switch SWm-, a negative-phase path main driver INVm-, and a negative-phase path main feedback resistor Rm-. The switch SWm- is selectively turned on according to the control signal Sctl. When the switch SWm- is turned on, the negative phase path main driver INVm- generates the negative phase path PWM output (PWM-) based on the negative phase path comparator output Scmp-. Next, the negative-phase path main feedback resistor Rm- further converts the negative-phase path PWM output (PWM-) into the negative-phase path main feedback signal Sfm-.

The negative-phase path slave loop 133d includes switches SWa1-, SWa2-, a negative-phase path slave driver INVa-, and a negative-phase path slave feedback resistor Ra-. The switches SWa1- and SWa2- are selectively synchronously turned on or synchronously turned off according to the control signal Sct1. When the switches SWa1- and SWa2- are turned on at the same time, the negative-phase path generates a negative-phase drive signal (Sdrv-) from the driver INVa- based on the negative-phase path comparator output Scmp-. Next, the negative-phase path slave feedback resistor Ra- further converts the negative-phase drive signal (Sdrv-) into the negative-phase path slave feedback signal Sfa-.

According to the embodiment of the present invention, the positive phase path master loop 135c and the positive phase path slave loop 135d are not turned on at the same time; and the negative phase path master loop 133c and the negative phase path slave loop 133d are not turned on at the same time. In addition, the positive-phase path main loop 135c and the negative-phase path main loop 133c are turned on at the same time; and the positive-phase path slave loop 135d and the negative-phase path slave loop 133d are turned on at the same time. For the convenience of description, the conduction states of each switch are listed in Table 1 here.

Table 1

It can be seen from FIG. 4 that the internal circuits of the positive-phase audio output circuit 135 and the negative-phase audio output circuit 133 are similar and symmetrical to each other. According to the concept of the present disclosure, when the positive-phase path main loop 135c and the negative-phase path main loop 133c are turned on at the same time, the positive-phase path slave loop 135d and the negative-phase path slave loop 133d are simultaneously disconnected. Conversely, when the positive-phase path main loop 135c and the negative-phase path main loop 133c are disconnected at the same time, the positive-phase path slave loop 135d and the negative-phase path slave loop 133d are turned on at the same time. For ease of understanding, the positive-phase path main loop 135c and the negative-phase path main loop 133c are simultaneously disconnected in Figure 8A, and when the positive-phase path slave loop 135d and the negative-phase path slave loop 133d are turned on at the same time, the audio amplifier circuit 13 equivalence circuit. As shown in Figure 8B, when the positive phase path main loop 135c and the negative phase path main loop 133c are turned on at the same time, and the positive phase path slave loop 135d and the negative phase path slave loop 133d are simultaneously disconnected, the audio amplifier circuit 13 equalizes the circuit.

Please refer to FIG. 8A , which is a circuit diagram of an audio amplifying circuit according to an embodiment of the present disclosure, where the main feedback path is disconnected and the slave feedback path is turned on. Because the positive-phase path main loop 135c and the negative-phase path main loop 133c are disconnected at the same time, the positive-phase path main loop 135c and the negative-phase path main loop 133c are not drawn here. In FIG. 8A, only the positive phase slave loop circuit 135d is related to the operation of the negative phase path slave loop circuit 133d and the modulation signal generating circuit 131.

In the non-inverting path slave loop 135d, the switches SWa1+ and SWa2+ are both turned on. The non-inverting path slave driver INVa+ receives the non-inverting path comparator output Scmp+ due to the conduction of switch SWa1+, and the non-inverting path adder 135a receives the non-inverting path slave feedback signal generated by the non-inverting path slave loop 135d due to the conduction of switch swa2+. Sfa+. At this time, the feedback signal Sf+ of the non-inverting path is the feedback signal Sfa+ from the non-inverting path (Sf+=Sfa+). Furthermore, the normal phase path error signal Serr+ received by the modulation signal generating circuit 131 is the difference between the positive phase analog differential input Va+ and the normal phase path slave feedback signal Sfa+.

In the negative-phase path slave circuit 133d, the switches SWa1- and SWa2- are both turned on. The negative phase path from the driver INVa- receives the negative phase path comparator output Scmp- due to the conduction of the switch SWa1-, and the negative phase path adder 133a receives the negative phase path from the loop 133d due to the conduction of the switch swa2-. From the feedback signal Sfa-. At this time, the negative-phase path feedback signal Sf- is the negative-phase path slave feedback signal Sfa- (Sf-=Sfa-). Furthermore, the negative-phase path error signal Serr- received by the modulation signal generating circuit 131 is the difference between the negative-phase analog differential input Va- and the negative-phase path slave feedback signal Sfa-.

Since the positive-phase path slave loop 135d and the negative-phase path slave loop 133d are not used to output the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-), they are directly connected to the positive-phase path adder. 135a, negative phase path adder 133a. Therefore, if the switches SWm+, SWm-, SWa1+, SWa2+, SWa1-, SWa2- of the audio amplifying circuit 13 are in the setting state as shown in FIG. 8A, the speaker 15 will not receive the non-inverting path PWM output (PWM+) and Negative Phase Path PWM Output (PWM-). Therefore, the speaker 15 does not emit any sound.

Please refer to FIG. 8B , which is a circuit diagram of an audio amplifying circuit according to an embodiment of the present disclosure, which is turned on in the main feedback path and disconnected from the feedback path. Because the positive-phase path from the loop 135d and the negative-phase path from the loop 133d are simultaneously disconnected, the positive-phase path from the loop 135d and the negative-phase path from the loop 133d are not drawn here. In FIG. 8B, only the positive-phase main loop circuit 135c is related to the operations of the negative-phase path main loop circuit 133c and the modulation signal generating circuit 131.

In the normal-phase path main loop 135c, the switch SWm+ is turned on. The non-inverting path main driver INVm+ receives the non-inverting path comparator output Scmp+ due to the conduction of the switch SWm+ and generates the non-inverting path PWM output (PWM+). The non-inverting path adder 135a receives the non-inverting path main feedback signal Sfm+ generated by the non-inverting path main loop 135c. At this time, the normal-phase path feedback signal Sf+ is the normal-phase path main feedback signal Sfm+ (Sf+=Sfm+). Furthermore, the normal phase path error signal Serr+ received by the modulation signal generating circuit 131 is the difference between the positive phase analog differential input Va+ and the normal phase path main feedback signal Sfm+.

In the negative phase path main loop 133c, the switch SWm- is turned on. The negative phase path main driver INVm- receives the negative phase path comparator output Scmp- due to the conduction of the switch SWm- and generates the negative phase path PWM output (PWM-). The negative phase path adder 133a receives the negative phase path main feedback signal Sfm- generated by the negative phase path main loop 135c. At this time, the negative-phase path feedback signal Sf- is the negative-phase path main feedback signal Sfm- (Sf-=Sfm-). Furthermore, the negative-phase path error signal Serr- received by the modulation signal generating circuit 131 is the difference between the negative-phase analog differential input Va- and the negative-phase path main feedback signal Sfm-.

Since the positive phase path main loop 135c and the negative phase path main loop 133c are used to output the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). because Therefore, if the audio amplifier circuit 13 is in the state shown in FIG. 8B, the speaker 15 will emit sound according to the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-).

Please refer to FIGS. 9A and 9B , which are flowcharts of dynamically selecting the feedback path according to the state of the audio output module according to the audio amplifying circuit conceived in the present disclosure. See also Figures 5A, 5B, 8A, 8B, 9A, and 9B.

First, in step S201, the audio output module 10 is enabled. Next, in step S203, when the audio output module 10 is in the power-on transient period Ton_tr, the audio control circuit 12 generates a control signal Sctr for switching the switch state to the audio amplifying circuit 13, so that the audio amplifying circuit 13 is in step 8A. state shown in the figure. During the power-on transient period Ton_tr, the modulation signal generating circuit 131 has not yet reached stability. At the same time, the audio amplifying circuit 13 can utilize the positive-phase path from the loop 135d and the negative-phase path from the loop 133d for feedback to avoid generating unexpected positive-phase path PWM output (PWM+) and negative-phase path PWM output (PWM-) . That is, Ton_tr can use the positive-phase path from the loop 135d and the negative-phase path from the loop 133d to avoid popping during the power-on transient.

Next, in step S205, the audio control circuit 12 determines whether the audio output module 10 is switched to the normal operation mode. If not, repeat the steps to execute step S203. If the determination result of step S205 is affirmative, it proceeds to step S207. In step S207, it is further judged whether or not to execute the pre-delivery calibration program. If the judgment result of step S207 is affirmative, step S209 is further executed. Please also note that step S209 is performed by the manufacturer of the audio playback device before the audio playback device is shipped. When a general user operates, the judgment result of step S207 is preset as negative.

Step S209 further includes the following steps. First, in step S209a, it is determined whether or not the speaker 15 produces a popping sound. If not, the calibration procedure ends. If the determination result of step S209a is affirmative, it proceeds to step S209b. In step S209b, it is further determined whether the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-). If the determination result of step S209b is affirmative, go to step S209c. In step S209c, the capacitance value of the positive phase shift circuit 135b is increased. If the judgment result of step S209b is negative, then go to step S209d. In step S209d, the capacitance value of the negative-phase phase shift circuit 133b is increased. In addition, in the calibration procedure, the capacitance value of the positive phase shift circuit 135b or the negative phase shift circuit 133b may be adjusted several times, so step S209 may be selectively repeated depending on the calibration process.

If the determination result of step S207 is negative, it means that the audio amplifying circuit 13 is in the normal playing period Top, and the process proceeds to step S211. At this time, in step S211, the audio control circuit 12 generates a control signal Sctrl for switching the switch state to the audio amplifying circuit 13, so that the audio amplifying circuit 13 is in the state shown in FIG. 8B. Next, in step S213, the audio control circuit 12 determines whether the audio output module 10 is to be turned off. If the determination result of step S213 is negative, the audio amplifying circuit 13 maintains the setting state of step S211.

If the determination result of step S213 is affirmative, it proceeds to step S215. In step S215, the audio control circuit 12 generates a control signal to the audio amplifying circuit 13 to turn off all switches. According to the concept of the present disclosure, the arrangement of the positive-phase path slave loop 135d and the negative-phase path slave loop 133d can avoid the popping phenomenon due to the modulation signal generating circuit 131 not reaching a stable state during startup. On the other hand, during the shutdown transient period Toff_tr, since the operation of the modulation signal generating circuit 131 is quite stable, in step S215, the audio amplifying power can be The switches SWa1-, SWa2-, SWm-, SWa1+, SWa2+, and SWm+ in the circuit 13 are all turned off.

According to the above description, the present disclosure can dynamically set the positive phase shift circuit and the negative phase shift according to the leading and trailing conditions of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). The capacitance value of the circuit. Once the original leading signal is delayed, the PWM output voltage difference (PWM+)-(PWM-) pops due to the phase inconsistency between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). suppressed. Or, once the originally lagging signal is advanced, the PWM output voltage difference (PWM+)-(PWM-) is popped due to the phase mismatch between the positive-phase path PWM output (PWM+) and the negative-phase path PWM output (PWM-). phenomenon can be suppressed. Due to the time difference caused by impedance mismatch, the original leading signal can be delayed by adjusting the capacitor value, so as to suppress the popping sound at the moment of power-on and power-off. In addition, with the configuration of the positive-phase path slave loop and the negative-phase path slave loop, Ton_tr can reduce the popping noise generated during the transition period waiting for the voltage of the modulation signal generating circuit 131 to become stable during the power-on transient period.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art to which the present invention pertains can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the appended patent application.

Va+: positive phase analog differential input

Va-: Negative phase analog differential input

13: Audio amplifier circuit

PWM+: Non-inverting path PWM output

PWM-: Negative phase path PWM output

Ncmp+: non-inverting path comparator output endpoint

Ncmp-: Negative phase path comparator output endpoint

131: Modulation signal generation circuit

133: Negative phase audio output circuit

133a: Negative Path Adder

133b: Negative Phase Shift Circuit

133c: Negative phase path main circuit

133d: Negative phase path from loop

135: Positive phase audio output circuit

135a: Positive Path Adder

135b: Positive Phase Shift Circuit

135c: Non-phase path main circuit

135d: Non-inverting path from loop

Sf+: Non-inverting path feedback signal

Sf-: Negative phase path feedback signal

Serr+: positive phase path error signal

Serr-: Negative phase path error signal

Claims (17)

An audio amplifying circuit includes: a modulation signal generating circuit, which integrates and modulates a first path error signal to generate a first path comparator output, and integrates and modulates a second path error signal After the transformation, a second path comparator output is generated; a first audio output circuit includes: a first path adder, electrically connected to the modulation signal generation circuit, which subtracts a first analog differential input by a The first path error signal is generated after the first path feedback signal; a first phase shift circuit selectively adjusts the phase of the output of the first path comparator; and at least one first path loop is electrically connected to The modulation signal generating circuit, the first path adder and the first phase shift circuit generate the first path feedback signal according to the output of the first path comparator; and a second audio output circuit , comprising: a second path adder, electrically connected to the modulation signal generating circuit, which generates the second path error signal after subtracting a second path feedback signal from a second analog differential input; a first path error signal; A two-phase shift circuit selectively adjusts the phase of the output of the second path comparator; and at least one second path loop is electrically connected to the modulation signal generating circuit, the second path adder and the second path adder The phase shift circuit generates the second path feedback signal according to the output of the second path comparator. The audio amplifying circuit of claim 1, wherein the at least one first path loop comprises: a first path main loop, including: a first path main loop switch electrically connected to the modulation signal generating circuit and the The first phase shift circuit is selectively turned on; a first path main driver is electrically connected to the first path main loop switch, which drives the first path comparison when the first path main loop switch is turned on The output of the device generates a first-path PWM signal; and a first-path main feedback resistor is electrically connected to the first-path main driver and the first-path adder, which is used for the first-path pulse wave The width modulation signal is converted into the first path feedback signal. The audio amplifying circuit of claim 2, wherein the at least one second path loop comprises: a second path main loop, including: a second path main loop switch, electrically connected to the modulation signal generating circuit and the The second phase shift circuit is selectively turned on; a second path main driver is electrically connected to the second path main loop switch, which drives the second path comparator when the second path main loop switch is turned on The output of the device generates a second-path PWM signal; and a second-path main feedback resistor is electrically connected to the second-path main driver and the second-path adder, which is used for the second-path pulse wave The width modulated signal is converted into the second path feedback signal. The audio amplifying circuit of claim 3, wherein the relationship between the first path main circuit switch and the second path main circuit switch is turned on at the same time. The audio amplifying circuit of claim 3, wherein when the phase of the first path PWM signal leads the phase of the second path PWM signal, the first phase shift circuit is used for delaying The phase of the first path comparator output. The audio amplifying circuit of claim 3, wherein when the phase of the first path PWM signal lags behind the phase of the second path PWM signal, the second phase shift circuit is used for delaying The phase of the second path comparator output. The audio amplifying circuit of claim 1, wherein the at least one first path loop comprises: a first path slave loop, including: a first first path slave loop switch electrically connected to the first phase shifter The circuit is selectively turned on; a first path slave driver is electrically connected to the first first path slave loop switch, which drives the first path error signal when the first first path slave loop switch is turned on generating the first drive signal; a second first path slave loop switch electrically connected to the first path slave loop resistor, which is selectively turned on; and, A first path slave loop resistor is electrically connected to the first path slave driver and the second first path slave loop switch, which converts the first drive signal when the second first path slave loop switch is turned on A signal is fed back for the first path. The audio amplifying circuit of claim 7, wherein the at least one second path loop comprises: a second path slave loop, including: a first second path slave loop switch electrically connected to the second phase shifter The circuit is selectively turned on; a second path slave driver is electrically connected to the first and second path slave loop switches, which drives the second path error signal when the first and second path slave loop switches are turned on generating the second driving signal; a second second path slave loop switch electrically connected to the second path slave loop resistor, which is selectively turned on; and a second path slave loop resistor electrically connected to the second path slave loop resistor The path slave driver and the second path slave loop switch convert the second drive signal into the second path feedback signal when the second path slave loop switch is turned on. The audio amplifier circuit of claim 8, wherein the first first path slave loop switch, the second first path slave loop switch, the first second path slave loop switch and the second second path slave loop switch The open relationship is turned on at the same time. The audio amplifying circuit of claim 1, wherein the first phase shift circuit is a variable capacitor. The audio amplifying circuit of claim 1, wherein the first phase shifting circuit comprises: A first capacitor path, electrically connected to the modulation signal generating circuit and the at least one first path loop, including a first capacitor and a first switch connected in series with each other; and a second capacitor path, electrically connected The modulation signal generating circuit and the at least one first path loop include a second capacitor and a second switch connected in series with each other, wherein the first capacitor path and the second capacitor path are connected in parallel with each other. The audio amplifying circuit of claim 11, wherein the capacitance value of the first capacitor is not equal to the capacitance value of the second capacitor. A control method applied to an audio amplifier circuit, comprising the following steps: the audio amplifier circuit integrates and modulates a first path error signal and a second path error signal to respectively generate a first path comparator output and a a second path comparator output; the audio amplifier circuit generates the first path error signal according to a first analog differential input and a first path feedback signal; the audio amplifier circuit generates the first path error signal according to a second analog differential input and a first path feedback signal The second path feedback signal generates the second path error signal; the audio amplifier circuit generates the first path feedback signal and the second path according to the output of the first path comparator and the output of the second path comparator respectively a feedback signal; and the audio amplifier circuit selectively adjusts the phase of one of the output of the first path comparator and the output of the second path comparator. A bridge-tied load (BTL) class D power amplifier for driving a speaker, wherein the bridge-tied load class D power amplifier comprises: a first half-bridge, including: a first path adder, A first path error signal is generated after subtracting a first path feedback signal from a first analog differential input, wherein the first path error signal is integrated and modulated to generate a first path comparator output; a first path error signal a phase shift circuit for selectively adjusting the phase of the output of the first path comparator; and at least one first path loop for generating a first PWM signal according to the output of the first path comparator and the first path feedback signal; and a second half-bridge, wherein the first half-bridge is responsive to the first PWM signal and the second half-bridge is responsive to a second PWM signal The loudspeaker is jointly driven, and a phase error formed between the first PWM signal and the second PWM signal is related to the noise of the loudspeaker. The bridge-loaded class D power amplifier of claim 14, wherein the second half-bridge comprises: a second phase shift circuit for shifting the phase of the second PWM signal. The bridge-loaded class D power amplifier of claim 15, wherein the first phase shift circuit and the second phase shift circuit are each used to provide a plurality of capacitance values. The bridge-loaded class D power amplifier of claim 16, further comprising: a modulation signal generating circuit for providing the first PWM signal and the second PWM signal, wherein The first phase shift circuit is electrically connected to a first output end of the modulation signal generating circuit, and the second phase shift circuit is electrically connected to a second output end of the modulation signal generating circuit.

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