TWI751798B - Power supply device with tunable gain - Google Patents

Abstract

A power supply device with tunable gain includes an input switch circuit, a first transformer, a second transformer, a third transformer, a tunable resonant circuit, an output stage circuit, a first driver, and a second driver. The input switch circuit generates a switching voltage according to an input voltage. The first transformer includes a first main coil, a first secondary coil, and a second secondary coil. The first main coil receives the switching voltage. The tunable resonant circuit is coupled to the first secondary coil and the second secondary coil. The output stage circuit is coupled to the tunable resonant circuit. The output stage circuit generates an output voltage and an output current. The minimum resonant frequency of the tunable resonant circuit is adjusted by the first driver and the second driver according to the output current.

Description

Power Supply with Adjustable Gain

The present invention relates to a power supply, in particular to a power supply with adjustable gain.

Generally, when the power supply operates in a light-load mode, its resonant frequency is relatively high, and when the power supply operates in a heavy-load mode, its resonant frequency is relatively low. However, conventional power supplies are often limited by a fixed minimum resonant frequency, so they often cannot provide sufficient gain value in heavy duty mode. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by the previous technology.

In a preferred embodiment, the present invention provides a power supply with adjustable gain, comprising: an input switching circuit that generates a switching potential according to an input potential, wherein the input switching circuit includes a pulse width modulation integrated circuit a circuit for generating a first PWM potential and a second PWM potential; a first transformer including a first primary coil, a first secondary coil, and a second secondary coil, The first main coil is used for receiving the switching potential; a second transformer includes a second main coil and a third auxiliary coil, wherein the second main coil is used for receiving the first PWM voltage bit, and the third secondary coil is used to generate a first supply potential; a third transformer includes a third primary coil and a fourth secondary coil, wherein the third primary coil is used to receive the second pulse The width modulates the potential, and the fourth sub-coil is used for generating a second supply potential; an adjustable resonant circuit is coupled to the first sub-coil and the second sub-coil; an output stage circuit is coupled to to the adjustable resonant circuit, wherein the output stage circuit is used to generate an output potential and an output current; a first driver powered by the first supply potential; and a second driver powered by the second supply potential wherein the lowest resonant frequency of the adjustable resonant circuit is adjusted by the first driver and the second driver according to the output current.

In order to make the objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are given in the following, and are described in detail as follows in conjunction with the accompanying drawings.

Certain terms are used throughout the specification and claims to refer to particular elements. It should be understood by those skilled in the art that hardware manufacturers may refer to the same element by different nouns. This specification and the scope of the patent application do not use the difference in name as a way to distinguish elements, but use the difference in function of the elements as a criterion for distinguishing. The words "including" and "including" mentioned in the entire specification and the scope of the patent application are open-ended terms, so they should be interpreted as "including but not limited to". The word "substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. Furthermore, the term "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described as being coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connecting means. Second device.

FIG. 1 is a schematic diagram of a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a notebook computer, or an all-in-one computer. As shown in FIG. 1, the power supply 100 includes: an input switching circuit 110, a first transformer 120, a second transformer 130, a third transformer 140, an adjustable resonant circuit 150, an output stage circuit 160, A first driver 170 and a second driver 180 . It should be noted that, although not shown in FIG. 1, the power supply 100 may further include other components, such as a voltage regulator or/and a negative feedback circuit.

The input switching circuit 110 can generate a switching potential VW according to an input potential VIN. The input potential VIN can come from an external input power supply, wherein the input potential VIN can be a DC potential with any level. For example, the potential level of the DC potential can be between 380V and 400V, but it is not limited thereto. The input switching circuit 110 includes a PWM integrated circuit 112 for generating a first PWM potential VM1 and a second PWM potential VM2. For example, both the first PWM potential VM1 and the second PWM potential VM2 may have complementary logic levels. The first transformer 120 includes a first primary coil 121, a first secondary coil 122, and a second secondary coil 123, wherein the first primary coil 121 may be located on one side of the first transformer 120, and the first secondary coil 122 and The second secondary coils 123 can be located on the opposite side of the first transformer 120 . The first main coil 121 can be used to receive the switching potential VW, and both the first secondary coil 122 and the second secondary coil 123 can operate according to the switching potential VW. The second transformer 130 includes a second primary coil 131 and a third secondary coil 132 , wherein the second primary coil 131 can be located on one side of the second transformer 130 and the third secondary coil 132 can be located on the opposite side of the second transformer 130 The other side. The second primary coil 131 can be used to receive the first PWM potential VM1, and in response to the first PWM potential VM1, the third secondary coil 132 can be used to generate a first supply potential VCC1. The third transformer 140 includes a third primary coil 141 and a fourth secondary coil 142 , wherein the third primary coil 141 can be located on one side of the third transformer 140 and the fourth secondary coil 142 can be located on the opposite side of the third transformer 140 The other side. The third primary coil 141 can be used to receive the second PWM potential VM2, and in response to the second PWM potential VM2, the fourth secondary coil 142 can be used to generate a second supply potential VCC2. The adjustable resonant circuit 150 is coupled to the first secondary coil 122 and the second secondary coil 123 , and can be used to determine the resonant frequency of the power supply 100 . The output stage circuit 160 is coupled to the adjustable resonant circuit 150, wherein the output stage circuit 160 can be used to generate an output potential VOUT and an output current IOUT. For example, the output potential VOUT can be another DC potential, and its potential level can be between 18V and 20V, but it is not limited thereto. The first driver 170 may be powered by the first supply potential VCC1 from the third secondary coil 132 . For example, if the first supply potential VCC1 is at a high logic level, the first driver 170 will be enabled, and if the first supply potential VCC1 is at a low logic level, the first driver 170 will be disabled. The second driver 180 may be powered by the second supply potential VCC2 from the fourth secondary coil 142 . For example, if the second supply potential VCC2 is at a high logic level, the second driver 180 will be enabled, and if the second supply potential VCC2 is at a low logic level, the second driver 180 will be disabled. It must be noted that the lowest resonant frequency of the adjustable resonant circuit 150 is adjusted by the first driver 170 and the second driver 180 according to the output current IOUT. In some embodiments, if the output current IOUT is greater than a threshold value, the first driver 170 and the second driver 180 further reduce the minimum resonant frequency of the adjustable resonant circuit 150 . For example, the aforementioned threshold value may be approximately equal to 80% of the rated maximum value of the output current IOUT, but is not limited thereto. Under this design, the gain of the power supply 100 can be properly adjusted according to the lowest resonant frequency of the adjustable resonant circuit 150 , so even in the heavy duty mode, the power supply 100 can provide a sufficient gain value.

The following embodiments will introduce the detailed structure and operation of the power supply 100 . It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG. 2 is a schematic diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2 , the power supply 200 has an input node NIN and an output node NOUT, and includes: an input switching circuit 210 , a first transformer 220 , a second transformer 230 , and a third transformer 240 , an adjustable resonant circuit 250 , an output stage circuit 260 , a first driver 270 , and a second driver 280 . The input node NIN of the power supply 200 can receive an input potential VIN from an external input power source, and the output node NOUT of the power supply 200 can be used to output an output potential VOUT to an electronic device (not shown).

The input switching circuit 210 includes a pulse modulation integrated circuit 212, a first transistor M1, and a second transistor M2. The PWM integrated circuit 212 can generate a first PWM potential VM1 and a second PWM potential VM2. The first PWM potential VM1 and the second PWM potential VM2 can be maintained at a fixed potential when the power supply 200 is initialized, and can provide a periodic clock waveform. In some embodiments, the first PWM potential VM1 and the second PWM potential VM2 may have the same waveform but have a phase difference therebetween, so that the two are not at high logic levels at the same time. Each of the first transistor M1 and the second transistor M2 may be an N-type MOSFET. The control terminal of the first transistor M1 is used for receiving the first pulse width modulation potential VM1, the first terminal of the first transistor M1 is coupled to a first node N1 to output a switching potential VW, and the first The second terminal of the transistor M1 is coupled to the input node NIN. ), wherein the control terminal of the second transistor M2 is used to receive the second PWM potential VM2, the first terminal of the second transistor M2 is coupled to the ground 290, and the second terminal of the second transistor M2 The terminal is coupled to the first node N1. The earth 290 may refer to the earth, or any ground path coupled to the earth, which is not an internal component of the power supply 200 .

The first transformer 220 includes a first primary coil 221 , a first secondary coil 222 , and a second secondary coil 223 , wherein the first transformer 220 further has a built-in magnetizing inductor LM. The magnetizing inductor LM can be an inherent component that is incidentally produced when the first transformer 220 is manufactured, and is not an external independent component. Both the first main coil 221 and the magnetizing inductor LM can be located on the same side of the first transformer 220 , and the first secondary coil 222 and the second secondary coil 223 can be located on the opposite side of the first transformer 220 . The first end of the first main coil 221 is coupled to the first node N1 to receive the switching potential VW, and the second end of the first main coil 221 is coupled to the ground 290 . The first end of the magnetizing inductor LM is coupled to the first node N1 , and the second end of the magnetizing inductor LM is coupled to the ground 290 . The first end of the first sub-coil 222 is coupled to a second node N2, and the second end of the first sub-coil 222 is coupled to a ground potential VSS (eg, 0V). The first end of the second secondary coil 223 is coupled to the ground potential VSS, and the second end of the second secondary coil 223 is coupled to a third node N3.

The second transformer 230 includes a second primary coil 231 and a third secondary coil 232 , wherein the second primary coil 231 can be located on one side of the second transformer 230 and the third secondary coil 232 can be located on the opposite side of the second transformer 230 The other side. The first end of the second main coil 231 is used for receiving the first PWM potential VM1 , and the second end of the second main coil 231 is coupled to the ground 290 . The first end of the third sub-coil 232 is used for outputting a first supply potential VCC1, and the second end of the third sub-coil 232 is coupled to the ground potential VSS.

The third transformer 240 includes a third primary coil 241 and a fourth secondary coil 242 , wherein the third primary coil 241 can be located on one side of the third transformer 240 and the fourth secondary coil 242 can be located on the opposite side of the third transformer 240 The other side. The first end of the third main coil 241 is used for receiving the second PWM potential VM2 , and the second end of the third main coil 241 is coupled to the ground 290 . The first end of the fourth sub-coil 242 is used to output a second supply potential VCC2, and the second end of the fourth sub-coil 242 is coupled to the ground potential VSS.

The adjustable resonant circuit 250 includes a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a first capacitor C1, a second capacitor C2, and a third capacitor C3, a fourth capacitor C4, a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. For example, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 may each be an N-type MOSFET.

The first end of the first inductor L1 is coupled to the second node N2, and the second end of the first inductor L1 is coupled to a fourth node N4. The first end of the second inductor L2 is coupled to the ground potential VSS, and the second end of the second inductor L2 is coupled to a fifth node N5. The first terminal of the third inductor L3 is coupled to the ground potential VSS, and the second terminal of the third inductor L3 is coupled to a sixth node N6. In some embodiments, the first inductor L1 and the third inductor L3 are coupled to each other, and the two have the same inductance value. The first end of the fourth inductor L4 is coupled to the third node N3, and the second end of the fourth inductor L4 is coupled to a seventh node N7. In some embodiments, the second inductor L2 and the fourth inductor L4 are coupled to each other, and both have the same inductance value. It should be noted that the inductance value of the first inductor L1 can be greater than the inductance value of the second inductor L2, and the inductance value of the third inductor L3 can be greater than the inductance value of the fourth inductor L4. The first end of the first capacitor C1 is coupled to the fourth node N4, and the second end of the first capacitor C1 is coupled to the sixth node N6. The first end of the second capacitor C2 is coupled to the fifth node N5, and the second end of the second capacitor C2 is coupled to the seventh node N7.

The control terminal of the third transistor M3 is used to receive a first control potential VC1, the first terminal of the third transistor M3 is coupled to an eighth node N8, and the second terminal of the third transistor M3 is coupled to Connected to the fourth node N4. The control terminal of the fourth transistor M4 is used for receiving a second control potential VC2, the first terminal of the fourth transistor M4 is coupled to the eighth node N8, and the second terminal of the fourth transistor M4 is coupled to to the fifth node N5. The control terminal of the fifth transistor M5 is used for receiving a third control potential VC3, the first terminal of the fifth transistor M5 is coupled to a ninth node N9, and the second terminal of the fifth transistor M5 is coupled to Connect to the sixth node N6. The control terminal of the sixth transistor M6 is used for receiving a fourth control potential VC4, the first terminal of the sixth transistor M6 is coupled to the ninth node N9, and the second terminal of the sixth transistor M6 is coupled to to the seventh node N7. The first terminal of the third capacitor C3 is coupled to the eighth node N8, and the second terminal of the third capacitor C3 is coupled to a tenth node N10. The first terminal of the fourth capacitor C4 is coupled to the ninth node N9, and the second terminal of the fourth capacitor C4 is coupled to the eleventh node N11. In some embodiments, the third capacitor C3 and the fourth capacitor C4 have the same capacitance value.

The output stage circuit 260 includes a first diode D1, a second diode D2, a first capacitor C5, and a detection resistor RD. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the tenth node N10, and the cathode of the first diode D1 is coupled to the output node NOUT. The anode of the second diode D2 is coupled to the eleventh node N11, and the cathode of the second diode D2 is coupled to the output node NOUT. The first end of the fifth capacitor C5 is coupled to the output node NOUT, and the second end of the fifth capacitor C5 is coupled to a twelfth node N12. The first end of the detection resistor RD is coupled to the tenth node Two nodes N12, and the second terminal of the detection resistor RD is coupled to the ground potential VSS. It should be noted that an output current IOUT will flow through the detection resistor RD, so that a detection potential VD is formed at the twelfth node N12. According to Ohm's law, the detection potential VD is equal to the product of the current value of the output current IOUT and the resistance value of the detection resistor RD.

FIG. 3 is a schematic diagram showing the first driver 270 according to an embodiment of the present invention. In the embodiment of FIG. 3, the first driver 270 includes a first comparator 272 and a second comparator 274, each of which may be implemented by an operational amplifier. The first comparator 272 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the first comparator 272 is used for receiving a first reference potential VR1, and the negative input terminal of the first comparator 272 The terminal is used to receive the detection potential VD, and the output terminal of the first comparator 272 is used to output the first control potential VC1. For example, if the detection potential VD is higher than the first reference potential VR1, the first comparator 272 can output the first control potential VC1 with a low logic level; otherwise, if the detection potential VD is lower than or equal to the first reference potential VR1, the first comparator 272 can output the first control potential VC1 with a high logic level. The positive input terminal of the second comparator 274 is used for receiving a second reference potential VR2, the negative input terminal of the second comparator 274 is used for receiving the detection potential VD, and the output terminal of the second comparator 274 is used for The second control potential VC2 is output. For example, if the detection potential VD is higher than the second reference potential VR2, the second comparator 274 can output the second control potential VC2 with a low logic level; otherwise, if the detection potential VD is lower than or equal to the second reference potential VR2, the second comparator 274 can output the second control potential VC2 with a high logic level. In some embodiments, the first reference potential VR1 is higher than the second reference potential VR2. It must be noted that both the first comparator 272 and the second comparator 274 are powered by the first supply potential VCC1. If the first supply potential VCC1 is at a low logic level, the first control potential VC1 of the first comparator 272 and the second control potential VC2 of the second comparator 274 are both unchanged and maintained at a low logic level.

FIG. 4 is a schematic diagram showing the second driver 280 according to an embodiment of the present invention. In the embodiment of FIG. 4, the second driver 280 includes a third comparator 282 and a fourth comparator 284, each of which may be implemented by an operational amplifier. The positive input terminal of the third comparator 282 is used to receive the first reference potential VR1, the negative input terminal of the third comparator 282 is used to receive the detection potential VD, and the output terminal of the third comparator 282 is used to output The third control potential VC3. For example, if the detection potential VD is higher than the first reference potential VR1, the third comparator 282 can output the third control potential VC3 with a low logic level; otherwise, if the detection potential VD is lower than or equal to the first reference potential VR1, the third comparator 282 can output the third control potential VC3 with a high logic level. The positive input terminal of the fourth comparator 284 is used to receive the second reference potential VR2, the negative input terminal of the fourth comparator 284 is used to receive the detection potential VD, and the output terminal of the fourth comparator 284 is used to output The fourth control potential VC4. For example, if the detection potential VD is higher than the second reference potential VR2, the fourth comparator 284 can output the fourth control potential VC4 with a low logic level; otherwise, if the detection potential VD is lower than or equal to the second reference potential VR2, the fourth comparator 284 can output the fourth control potential VC4 with a high logic level. It must be noted that both the third comparator 282 and the fourth comparator 284 are powered by the second supply potential VCC2. If the second supply potential VCC2 is at a low logic level, the third control potential VC3 of the third comparator 282 and the fourth control potential VC4 of the fourth comparator 284 are both unchanged and maintained at a low logic level.

In some embodiments, the power supply 200 can alternately operate in a first mode and a second mode, and the operation principle of which can be described as follows.

In the first mode, the first PWM potential VM1 is at a high logic level to enable the first transistor M1, and the second PWM potential VM2 is at a low logic level to disable the second transistor M2. At this time, the first supply potential VCC1 is at a high logic level to enable the first driver 270 , and the second supply potential VCC2 is at a low logic level to disable the second driver 280 . According to the change of the output current IOUT, the power supply 200 in the first mode can provide various resonant frequencies and their associated gain values. If the output current IOUT is less than or equal to a threshold value (light load state), the detection potential VD will be lower than or equal to the second reference potential VR2, so that both the first control potential VC1 and the second control potential VC2 have a high logic level . Since both the third transistor M3 and the fourth transistor M4 are enabled, the lowest resonant frequency F1 corresponding to the adjustable resonant circuit 250 can be expressed as the following equation (1):

…(1) 其中「F1」代表最低諧振頻率，「L1」代表第一電感器L1之電感值，「L2」代表第一電感器L2之電感值，「L1||L2」代表第一電感器L1與第二電感器L2之並聯電感值(當「L1」遠大於「L2」時，「L1||L2」會很近似於「L2」)，而「C3」代表第三電容器C3之電容值。

…(1) where “F1” represents the lowest resonant frequency, “L1” represents the inductance value of the first inductor L1, “L2” represents the inductance value of the first inductor L2, and “L1||L2” represents the first inductor value The parallel inductance value of L1 and the second inductor L2 (when "L1" is much larger than "L2", "L1||L2" will be very similar to "L2"), and "C3" represents the capacitance value of the third capacitor C3 .

In the first mode, if the output current IOUT is greater than the aforementioned threshold (heavy load state), the detection potential VD may be between the second reference potential VR2 and the first reference potential VR1, so that the first control potential VC1 has a high value logic level and the second control potential VC2 has a low logic level. Since the third transistor M3 is enabled and the fourth transistor M4 is disabled, the lowest resonant frequency F2 corresponding to the adjustable resonant circuit 250 can be expressed as the following equation (2):

……………………………(2) 其中「F2」代表最低諧振頻率，「L1」代表第一電感器L1之電感值，而「C3」代表第三電容器C3之電容值。

…………………………(2) “F2” represents the lowest resonant frequency, “L1” represents the inductance value of the first inductor L1, and “C3” represents the capacitance value of the third capacitor C3.

In the second mode, the first PWM potential VM1 is at a low logic level to disable the first transistor M1, and the second PWM potential VM2 is at a high logic level to enable the second transistor M2. At this time, the first supply potential VCC1 is at a low logic level to disable the first driver 270 , and the second supply potential VCC2 is at a high logic level to enable the second driver 280 . According to the change of the output current IOUT, the power supply 200 in the second mode can provide various resonant frequencies and their associated gain values. If the output current IOUT is less than or equal to the aforementioned threshold (light-load state), the detection potential VD will be lower than or equal to the second reference potential VR2, so that both the third control potential VC3 and the fourth control potential VC4 have a high logic level . Since both the fifth transistor M5 and the sixth transistor M6 are enabled, the lowest resonant frequency F3 corresponding to the adjustable resonant circuit 250 can be expressed as the following equation (3):

…(3) 其中「F3」代表最低諧振頻率，「L3」代表第三電感器L3之電感值，「L4」代表第四電感器L4之電感值，「L3||L4」代表第三電感器L3與第四電感器L4之並聯電感值(當「L3」遠大於「L4」時，「L3||L4」會很近似於「L4」)，而「C4」代表第四電容器C4之電容值。

…(3) where “F3” represents the lowest resonant frequency, “L3” represents the inductance value of the third inductor L3, “L4” represents the inductance value of the fourth inductor L4, and “L3||L4” represents the third inductor value The parallel inductance value of L3 and the fourth inductor L4 (when "L3" is much larger than "L4", "L3||L4" will be very similar to "L4"), and "C4" represents the capacitance value of the fourth capacitor C4 .

In the second mode, if the output current IOUT is greater than the aforementioned threshold (heavy load state), the detection potential VD may be between the second reference potential VR2 and the first reference potential VR1, so that the third control potential VC3 has a high value logic level and the fourth control potential VC4 has a low logic level. Since the fifth transistor M5 is enabled and the sixth transistor M6 is disabled, the lowest resonant frequency F4 corresponding to the adjustable resonant circuit 250 can be expressed as the following equation (4):

……………………………(4) 其中「F4」代表最低諧振頻率，「L3」代表第三電感器L3之電感值，而「C4」代表第四電容器C4之電容值。

…………………………(4) “F4” represents the lowest resonant frequency, “L3” represents the inductance value of the third inductor L3, and “C4” represents the capacitance value of the fourth capacitor C4.

In general, the output states of the first driver 270 and the second driver 280 can be described in Table 1 below: The output current IOUT is less than or equal to the critical value (light load state) The output current IOUT is greater than the critical value (heavy load state) first mode second mode first mode second mode The first control potential VC1 high logic level low logic level high logic level low logic level The second control potential VC2 high logic level low logic level low logic level low logic level The third control potential VC3 low logic level high logic level low logic level high logic level The fourth control potential VC4 low logic level high logic level low logic level low logic level Table 1: Output status of the first driver and the second driver

In addition, it must be noted that the existence of the first capacitor C1 and the second capacitor C2 can prevent the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 from performing switching operations during the switching operation. A short circuit was accidentally formed. That is, the first capacitor C1 and the second capacitor C2 can be regarded as a safety protection circuit of the power supply 200 .

FIG. 5 is a graph showing the relationship between the resonant frequency of the adjustable resonant circuit 250 and the gain value of the power supply 200 according to an embodiment of the present invention. According to the measurement results in FIG. 5, when the lowest resonant frequency of the adjustable resonant circuit 250 decreases (for example, from “F1” to “F2” in the first mode, or from “F3” in the second mode To "F4"), the gain value of the power supply 200 will increase, so even in the heavy load mode, the power supply 200 can provide a sufficient gain value.

In some embodiments, the component parameters of the power supply 200 may be as follows. The rated maximum value of the output current IOUT may be approximately 16.9A. The aforementioned threshold value may be approximately equal to 80% of the rated maximum value of the output current IOUT, that is, about 13.52A. The capacitance value of the first capacitor C1 may be between 9nF and 11nF, preferably about 10nF. The capacitance value of the second capacitor C2 may be between 9nF and 11nF, preferably about 10nF. The capacitance value of the third capacitor C3 may be between 30nF and 50nF, preferably about 33nF or 47nF. The capacitance value of the fourth capacitor C4 may be between 30nF and 50nF, preferably about 33nF or 47nF. The capacitance value of the fifth capacitor C5 may be between 544 μF and 816 μF, preferably about 680 μF. The inductance value of the magnetizing inductor LM may be between 270 μH and 330 μH, preferably about 300 μH. The inductance value of the first inductor L1 may be approximately 5 times the inductance value of the second inductor L2. The inductance value of the first inductor L1 may be between 36 μH and 44 μH, preferably about 40 μH. The inductance value of the second inductor L2 may be between 7.2 μH and 8.8 μH, preferably about 8 μH. The inductance value of the third inductor L3 may be approximately 5 times the inductance value of the fourth inductor L4. The inductance value of the third inductor L3 may be between 36 μH and 44 μH, preferably about 40 μH. The inductance value of the fourth inductor L4 may be between 7.2 μH and 8.8 μH, preferably about 8 μH. The resistance value of the detection resistor RD may be between 9.9mΩ and 10.1mΩ, preferably about 10mΩ. The first reference potential VR1 may be higher than the second reference potential VR2 by at least 2V. The turns ratio of the first primary coil 221 to the first secondary coil 222 may be between 1 and 100, preferably about 20. The turns ratio of the first primary coil 221 and the second secondary coil 223 may be between 1 and 100, preferably about 20. The turns ratio of the second primary coil 231 to the third secondary coil 232 may be between 0.1 and 10, preferably about 1. The turns ratio of the third primary coil 241 to the fourth secondary coil 242 may be between 0.1 and 10, preferably about 1. The above parameter ranges are obtained according to multiple experimental results, which help to optimize the resonant frequency and gain of the power supply 200 .

The present invention provides a novel power supply having a variable minimum resonant frequency and a corresponding adjustable gain. According to the actual measurement results, the power supply using the above design can provide an appropriate and sufficient gain value in light load mode or heavy load mode, so it is very suitable for use in various devices.

It should be noted that the potential, current, resistance value, inductance value, capacitance value and other component parameters mentioned above are not limitations of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the states shown in FIGS. 1-5. The present invention may include only any one or more of the features of any one or more of the embodiments of Figures 1-5. In other words, not all the features shown in the figures need to be simultaneously implemented in the power supply of the present invention. Although the embodiments of the present invention use MOSFETs as an example, the present invention is not limited to this, and those skilled in the art can use other types of transistors, such as junction field effect transistors, or fins type field effect transistor, etc., without affecting the effect of the present invention.

Although the present invention is disclosed above with preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

100,200: Power Supply 110, 210: Input switching circuit 112, 212: Pulse Width Modulation Integrated Circuits 120,220: First Transformer 121,221: The first main coil 122, 222: The first secondary coil 123, 223: Second secondary coil 130,230: Second Transformer 131, 231: Second main coil 132,232: The third secondary coil 140, 240: Third Transformer 141,241: The third main coil 142, 242: Fourth secondary coil 150,250: Adjustable Resonant Circuit 160,260: Output stage circuit 170,270: First Drive 180,280: Second drive 272: first comparator 274: second comparator 282: Third comparator 284: Fourth comparator 290: Earth C1: first capacitor C2: Second capacitor C3: Third capacitor C4: Fourth capacitor C5: Fifth capacitor D1: first diode D2: Second diode F1, F2, F3, F4: lowest resonant frequency IOUT: output current LM: magnetizing inductor L1: first inductor L2: Second Inductor L3: Third Inductor L4: Fourth Inductor M1: first transistor M2: second transistor M3: The third transistor M4: Fourth transistor M5: Fifth transistor M6: sixth transistor N1: the first node N2: second node N3: The third node N4: Fourth Node N5: Fifth node N6: sixth node N7: seventh node N8: Eighth Node N9: ninth node N10: The tenth node N11: Eleventh node N12: Twelfth Node NIN: input node NOUT: output node RD: detection resistor VC1: The first control potential VC2: The second control potential VC3: The third control potential VC4: Fourth control potential VCC1: The first supply potential VCC2: The second supply potential VD: detection potential VIN: input potential VM1: The first PWM potential VM2: The second PWM potential VOUT: output potential VR1: first reference potential VR2: Second reference potential VSS: ground potential VW: switching potential

FIG. 1 is a schematic diagram of a power supply according to an embodiment of the present invention. FIG. 2 is a schematic diagram showing a power supply according to an embodiment of the present invention. FIG. 3 is a schematic diagram showing a first driver according to an embodiment of the present invention. FIG. 4 is a schematic diagram showing a second driver according to an embodiment of the present invention. FIG. 5 is a graph showing the relationship between the resonant frequency of the adjustable resonant circuit and the gain value of the power supply according to an embodiment of the present invention.

100: Power supply

110: Input switching circuit

112: Pulse width modulation integrated circuit

120: First Transformer

121: The first main coil

122: The first secondary coil

123: Second secondary coil

130: Second Transformer

131: The second main coil

132: The third secondary coil

140: Third Transformer

141: The third main coil

142: The fourth sub-coil

150: Adjustable Resonant Circuit

160: Output stage circuit

170: First Drive

180: Second Drive

IOUT: output current

VCC1: The first supply potential

VCC2: The second supply potential

VIN: input potential

VM1: The first PWM potential

VM2: The second PWM potential

VOUT: output potential

VW: switching potential

Claims (10)

A power supply with adjustable gain, comprising: an input switching circuit for generating a switching potential according to an input potential, wherein the input switching circuit comprises a pulse width modulation integrated circuit for generating a first pulse width modulating potential and a second pulse width modulating potential; a first transformer including a first main coil, a first sub-coil, and a second sub-coil, wherein the first main coil is used for receiving the switching potential; a second transformer including a second primary coil and a third secondary coil, wherein the second primary coil is used for receiving the first PWM potential, and the third secondary coil is used for for generating a first supply potential; a third transformer including a third main coil and a fourth sub-coil, wherein the third main coil is used for receiving the second PWM potential, and the fourth The auxiliary coil is used to generate a second supply potential; an adjustable resonant circuit is coupled to the first auxiliary coil and the second auxiliary coil; an output stage circuit is coupled to the adjustable resonant circuit, wherein the output The stage circuit is used to generate an output potential and an output current; a first driver is powered by the first supply potential; and a second driver is powered by the second supply potential; wherein the adjustable resonant circuit is The lowest resonant frequency is adjusted by the first driver and the second driver according to the output current. The power supply of claim 1, wherein if the output current is greater than a threshold value, the first driver and the second driver further reduce the available Adjust the minimum resonant frequency of the resonant circuit, and the critical value is approximately equal to 80% of the rated maximum value of the output current. The power supply of claim 1, wherein the input switching circuit further comprises: a first transistor having a control end, a first end, and a second end, wherein the control of the first transistor The terminal is used for receiving the first pulse width modulation potential, the first terminal of the first transistor is coupled to a first node to output the switching potential, and the second terminal of the first transistor is coupled to an input node to receive the input potential; and a second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used for receiving The second PWM potential, the first terminal of the second transistor is coupled to the ground, and the second terminal of the second transistor is coupled to the first node. The power supply of claim 3, wherein the first main coil has a first end and a second end, and the first end of the first main coil is coupled to the first node to receive the switching potential, the second end of the first main coil is coupled to the ground, the first transformer further builds a magnetizing inductor, the magnetizing inductor has a first end and a second end, the magnetizing inductor is The first end is coupled to the first node, the second end of the excitation inductor is coupled to the ground, the first sub-coil has a first end and a second end, the first sub-coil The first end is coupled to a second node, the second end of the first sub-coil is coupled to a ground potential, the second sub-coil has a first end and a second end, the first The first end of the secondary coil is coupled to the ground bit, and the second end of the second sub-coil is coupled to a third node. The power supply of claim 4, wherein the second main coil has a first end and a second end, and the first end of the second main coil is used for receiving the first PWM power The second end of the second main coil is coupled to the ground, the third sub coil has a first end and a second end, and the first end of the third sub coil is used to output the first end A supply potential, the second end of the third secondary coil is coupled to the ground potential, the third primary coil has a first end and a second end, the first end of the third primary coil is used for After receiving the second PWM potential, the second end of the third main coil is coupled to the ground, the fourth sub coil has a first end and a second end, and the fourth sub coil The first terminal is used for outputting the second supply potential, and the second terminal of the fourth sub-coil is coupled to the ground potential. The power supply of claim 4, wherein the adjustable resonant circuit comprises: a first inductor having a first end and a second end, wherein the first end of the first inductor is coupled to to the second node, and the second end of the first inductor is coupled to a fourth node; a second inductor has a first end and a second end, wherein the second end of the second inductor is The first terminal is coupled to the ground potential, and the second terminal of the second inductor is coupled to a fifth node; a third inductor has a first terminal and a second terminal, wherein The first end of the third inductor is coupled to the ground potential, and the second end of the third inductor is coupled to a sixth node; a fourth inductor having a first end and a second end, wherein the first end of the fourth inductor is coupled to the third node, and the second end of the fourth inductor is coupled connected to a seventh node; a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to the fourth node, and the first end of the first capacitor Two terminals are coupled to the sixth node; and a second capacitor has a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the fifth node, and the first The second ends of the two capacitors are coupled to the seventh node; wherein the first inductor and the third inductor are coupled to each other, and the second inductor and the fourth inductor are coupled to each other. The power supply of claim 6, wherein the adjustable resonant circuit further comprises: a third transistor having a control terminal, a first terminal, and a second terminal, wherein the third transistor has the The control terminal is used for receiving a first control potential, the first terminal of the third transistor is coupled to an eighth node, and the second terminal of the third transistor is coupled to the fourth node ; a fourth transistor having a control end, a first end, and a second end, wherein the control end of the fourth transistor is used to receive a second control potential, the fourth transistor the first terminal is coupled to the eighth node, and the second terminal of the fourth transistor is coupled to the fifth node; A fifth transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used for receiving a third control potential, and the first terminal of the fifth transistor One end is coupled to a ninth node, and the second end of the fifth transistor is coupled to the sixth node; a sixth transistor has a control end, a first end, and a first end Two terminals, wherein the control terminal of the sixth transistor is used for receiving a fourth control potential, the first terminal of the sixth transistor is coupled to the ninth node, and the The second terminal is coupled to the seventh node; a third capacitor has a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to the eighth node, and the first The second terminal of the three capacitors is coupled to a tenth node; and a fourth capacitor has a first terminal and a second terminal, wherein the first terminal of the fourth capacitor is coupled to the ninth node node, and the second end of the fourth capacitor is coupled to an eleventh node. The power supply of claim 7, wherein the output stage circuit comprises: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the tenth node , and the cathode of the first diode is coupled to an output node to output the output potential; a second diode has an anode and a cathode, wherein the anode of the second diode is coupled connected to the eleventh node, and the cathode of the second diode is coupled to the output node; a fifth capacitor having a first terminal and a second terminal, wherein the first terminal of the fifth capacitor is coupled to the output node, and the second terminal of the fifth capacitor is coupled to a first terminal twelve nodes; and a detection resistor having a first end and a second end, wherein the first end of the detection resistor is coupled to the twelfth node, and the detection resistor is The second terminal is coupled to the ground potential; wherein the output current flows through the detection resistor, so that a detection potential is formed at the twelfth node. The power supply of claim 8, wherein the first driver comprises: a first comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input of the first comparator The terminal is used for receiving a first reference potential, the negative input terminal of the first comparator is used for receiving the detection potential, and the output terminal of the first comparator is used for outputting the first control potential; and a second comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the second comparator is used to receive a second reference potential, and the second comparator The negative input terminal is used for receiving the detection potential, and the output terminal of the second comparator is used for outputting the second control potential; wherein the first reference potential is higher than the second reference potential. The power supply of claim 9, wherein the second driver comprises: a third comparator having a positive input terminal, a negative input terminal, and an output terminal, The positive input terminal of the third comparator is used to receive the first reference potential, the negative input terminal of the third comparator is used to receive the detection potential, and the output terminal of the third comparator is used to output the third control potential; and a fourth comparator has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the fourth comparator is used to receive the first Two reference potentials, the negative input terminal of the fourth comparator is used for receiving the detection potential, and the output terminal of the fourth comparator is used for outputting the fourth control potential.

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