TWI639074B - Energy regulation circuit and operation system utilizing the same - Google Patents

Abstract

An energy regulating circuit includes a first voltage regulator, a first energy storage device, a first switch, a second energy storage device, a second voltage regulator, and a controller. The first voltage regulator adjusts an input voltage to generate a regulated voltage. The first energy storage device is charged according to an input voltage or an adjustment voltage. The first switch is coupled to the first energy storage. The second energy storage is coupled to the first switch. When the first switch is turned on, the second energy storage is connected in parallel with the first energy storage. When the first switch is not conducting, the second voltage regulator generates an operating voltage according to the voltage of the first energy storage. When the first switch is turned on, the second voltage regulator generates an operating voltage according to the voltages of the first and second energy stores. The controller operates according to the operating voltage.

Description

Energy conditioning circuit and operating system

The present invention relates to an energy conditioning circuit, and more particularly to an energy conditioning circuit coupled between a host device and a peripheral device.

The conventional energy conditioning circuit adjusts the output voltage provided by a first external device and provides the adjusted result to a second external device. However, the conventional energy conditioning circuit cannot adjust the output voltage of the second external device, and then provides the adjusted result to the first external device.

The invention provides an operating system comprising a host device, a peripheral device, a transmission path and an energy adjustment circuit. The host device is configured to provide a host voltage or receive a charging voltage. The peripheral device is configured to receive a host voltage or provide a charging voltage. The transmission path is coupled between the host device and the peripheral device for transmitting the host voltage or the charging voltage. The energy adjustment circuit is coupled between the host device and the peripheral device, and includes a first voltage regulator, a first energy storage device, a first switch, a second energy storage device, a second voltage regulator, and a Controller. The first voltage regulator adjusts the charging voltage to generate a regulated voltage. The first energy storage device is charged according to a charging voltage or an adjustment voltage. First open The coupling is coupled to the first energy storage. The second energy storage is coupled to the first switch. When the first switch is turned on, the second energy storage is connected in parallel with the first energy storage. When the first switch is not conducting, the second voltage regulator generates an operating voltage according to the voltage of the first energy storage. When the first switch is turned on, the second voltage regulator generates an operating voltage according to the voltages of the first and second energy stores. The controller operates according to the operating voltage.

The invention further provides an energy adjustment circuit comprising a first voltage regulator, a first energy storage device, a first switch, a second energy storage device, a second voltage regulator and a controller. The first voltage regulator adjusts an input voltage to generate a regulated voltage. The first energy storage device is charged according to an input voltage or an adjustment voltage. The first switch is coupled to the first energy storage. The second energy storage is coupled to the first switch. When the first switch is turned on, the second energy storage is connected in parallel with the first energy storage. When the first switch is not conducting, the second voltage regulator generates an operating voltage according to the voltage of the first energy storage. When the first switch is turned on, the second voltage regulator generates an operating voltage according to the voltages of the first and second energy stores. The controller operates according to the operating voltage.

100, 700‧‧‧ operating system

110, 710‧‧‧ host device

120, 720‧‧‧ peripheral devices

130, 730‧‧‧ transmission path

140, 740‧‧‧ energy conditioning circuit

145, 745‧‧ ‧ controller

410‧‧‧ Slow start circuit

Ra, Rb‧‧‧ resistance

210‧‧‧Adjustment circuit

211~214, 311~314‧‧‧ adjuster

ND1, ND2, GND‧‧‧ nodes

ND3‧‧‧ input

ND4‧‧‧ output

Iref1~Iref4‧‧‧reference current

Ic‧‧‧Output current

R1~8‧‧‧Set resistor

VFB‧‧‧ feedback voltage

SC1~SC8, SC‧‧‧ control signals

VA‧‧‧Adjust voltage

VOP‧‧‧ operating voltage

VIN‧‧‧ input voltage

VCH‧‧‧Charging voltage

VHT‧‧‧ host voltage

Q11, Q12‧‧‧ transistor

SW1~SW6, Q1~Q4, Q31‧‧‧ switch

141, 143, 741, 743‧‧ ‧ voltage regulator

147, 200, 300, 400A, 400B, 500, 600, 747‧‧ ‧ processors

Cout, Cout1, Cout2‧‧‧ energy storage

Figure 1 is a schematic diagram of the operating system of the present invention.

Figure 2 is a possible embodiment of one of the processors of the present invention.

Figure 3 is another possible embodiment of the processor of the present invention.

4A, 4B are diagrams showing another possible embodiment of the processor of the present invention.

Figure 5 is another possible embodiment of the processor of the present invention.

Figure 6 is another possible embodiment of the processor of the present invention.

Figure 7 is another possible embodiment of the operating system of the present invention.

In order to make the objects, features and advantages of the present invention more comprehensible, the embodiments of the invention are described in detail below. The present specification provides various embodiments to illustrate the technical features of various embodiments of the present invention. The arrangement of the various elements in the embodiments is for illustrative purposes and is not intended to limit the invention. In addition, the overlapping portions of the drawings in the embodiments are for the purpose of simplifying the description, and do not mean the relationship between the different embodiments.

Figure 1 is a schematic diagram of the operating system of the present invention. As shown, the operating system 100 includes a host device 110, a peripheral device 120, a transmission path 130, and an energy conditioning circuit 140. The host device 110 outputs a host voltage VHT through the transmission path 130 or receives a charging voltage VCH and communicates with the energy adjustment circuit 140. In a possible embodiment, the host device 110 performs data transmission with the plurality of peripheral devices through the energy adjustment circuit 140. In this example, the host device 110 can also output the host voltage VHT to other peripheral devices through the energy adjustment circuit 140. The invention does not limit the type of host device 110. In a possible embodiment, the host device 110 is a computer or a smart phone.

The peripheral device 120 is coupled to the transmission path 130 and the energy adjustment circuit 140. In the present embodiment, the peripheral device 120 receives the host voltage VHT or the output charging voltage VCH through the transmission path 130. Additionally, peripheral device 120 is in communication with energy conditioning circuit 140. Although the energy conditioning circuit 140 of FIG. 1 is only coupled to a single peripheral device 120, it is not intended to limit the invention. In other embodiments, the energy conditioning circuit 140 may couple to a plurality of peripheral devices. The invention does not limit the type of peripheral device. In a possible embodiment, the peripheral device may include a storage device, A display device and/or charger.

The transmission path 130 is coupled between the host device 110 and the peripheral device 120, and has switches SW1 and SW2 for transmitting the charging voltage VCH and the host voltage VHT. The invention does not limit the types of switches SW1 and SW2. In a possible embodiment, switches SW1 and SW2 can be implemented by a transistor.

The energy adjustment circuit 140 communicates with the host device 110 and the peripheral device 120, respectively, and turns on at least one of the switches SW1 and SW2 according to the communication result. For example, when the peripheral device 120 is a charger, the energy adjustment circuit 140 first turns on the switch SW2 and communicates with the host device 110 to learn the charging voltage required by the host device 110, and commands the peripheral device 120 to output. The charging voltage required by the host device 110. After the peripheral device 120 outputs the charging voltage VCH required by the host device 110, the energy adjusting circuit 140 turns on the switch SW1 to supply the charging voltage VCH to the host device 110. When the peripheral device 120 is not a charger, the energy adjustment circuit 140 may turn on the switches SW1 and SW2 for supplying power to the peripheral device 120 or the conduction switch SW1 and the non-conduction switch SW2 for not supplying power to the peripheral device 120.

In the present embodiment, the energy adjustment circuit 140 includes voltage regulators 141, 143, a controller 145, and a processor 147. The voltage regulator 141 regulates an input voltage VIN for generating a regulated voltage VA. The invention does not limit the source of the input voltage VIN. When the host device 110 provides the host voltage VHT, the input voltage VIN is approximately equal to the host voltage VHT. When the peripheral device 120 provides the charging voltage VCH, the input voltage VIN is approximately equal to the charging voltage VCH. The voltage regulator 143 adjusts the regulation voltage VA to generate an operating voltage VOP. The present invention does not limit the circuit architecture of the voltage regulators 141 and 143. For example, a voltage regulator One of 141 and 143 may be a boost circuit, and the other of voltage regulators 141 and 143 may be a buck circuit.

In a possible embodiment, the voltage regulator 141 is a synchronous boost converter for boosting the input voltage VIN. For example, when the input voltage VIN is 5V, the regulated voltage VA generated by the voltage regulator 141 is 6.5V. When the input voltage VIN is 9V, 15V or 20V, the regulation voltage VA is 9V, 15V or 20V, respectively. In another possible embodiment, the voltage regulator 143 is a synchronous buck converter for regulating the regulated voltage VA. For example, when the regulation voltage VA is 6.5V, 9V, 15V or 20V, the operating voltage VOP is maintained at a fixed level, such as 5V.

The controller 145 starts communicating with the host device 110 and the peripheral device 120 in accordance with the operating voltage VOP. The controller 145 turns on at least one of the switches SW1 and SW2 and generates at least one control signal (not shown) according to the communication result. The processor 147 processes the regulated voltage VA according to the control signal to generate a processing result (such as VAR). In one embodiment, controller 145 is a Power Delivery Controller.

For example, when the controller 145 learns that the host device 110 outputs the host voltage VHT, the controller 145 enters a first mode. In the first mode, the controller 145 turns on the switch SW1 and turns on or off the switch SW2 according to the requirements of the peripheral device 120. At this time, the controller 145 does not trigger the processor 147. Therefore, the processor 147 does not process the regulation voltage VA. When the controller 145 knows that the peripheral device 120 provides the charging voltage VCH, the controller 145 enters a second mode. In the second mode, the controller 145 turns on the switch SW2 first, and commands the peripheral device 120 to output an appropriate charging voltage VCH according to the requirements of the host device 110. And other peripheral devices 120 lose After a suitable charging voltage is applied, the controller 145 turns on the switch SW1 again. At this time, in the second mode, the controller 145 generates at least one control signal (not shown) to the processor 147 according to the charging voltage VCH. At this time, the processor 147 processes the adjustment voltage VA according to the control signal to generate a boost voltage VAR. The voltage regulator 143 generates an operating voltage VOP based on the boosting voltage VAR.

Since the boosting voltage VAR is greater than the regulated voltage VA, when the peripheral device 120 is no longer coupled to the energy regulating circuit 140, the energy regulating circuit 140 can maintain the operation of other peripheral devices (not shown) until the host device 110 switches to a power supply device. And output the host voltage VHT.

In addition, when the host device 110 or the peripheral device 120 is just coupled to the energy adjustment circuit 140, the switches SW1 and SW2 may not be turned on. However, since the switches SW1 and SW2 have a parasitic diode, they can transfer the host voltage VHT or the charging voltage VCH to the energy conditioning circuit 140. After the energy adjustment circuit 140 receives the host voltage VHT or the charging voltage VCH, the switches SW1 and SW2 can be normally controlled.

Figure 2 is a possible embodiment of one of the processors of the present invention. As shown, the processor 200 includes resistors Ra, Rb, an energy storage device Cout, and an adjustment circuit 210. The resistor Ra is coupled between the nodes ND1 and ND2. The resistor Rb is coupled between the node ND2 and GND. The energy storage device Cout is coupled between the node ND1 and GND. The invention does not limit the type of energy storage Cout. In this embodiment, the energy storage device Cout is a capacitor. The energy W stored by the energy storage Cout is as follows:

W is the energy stored in the energy storage Cout, and C is the energy storage. The capacitance of Cout, V is the pressure difference across the energy storage Cout.

It is assumed that in the first mode (ie, when the host device 110 provides the host voltage VHT), the regulation voltage VA is 6.5V. In this example, the energy W1 stored in the energy storage Cout is as follows:

In the second mode (ie, when the peripheral device 120 provides the charging voltage VCH), the adjusting circuit 210 adjusts the feedback voltage VFB for raising the regulated voltage VA and generating the boosting voltage VAR. Assume that the boost voltage VAR is 15V. In this example, the energy W2 stored by the energy storage Cout is as follows:

As can be seen from the equations (2) and (3), in the second mode, the energy stored in the energy storage device Cout becomes large. Therefore, when the peripheral device 120 is no longer powered, the amount of power stored by the energy storage device Cout can maintain the operation of other peripheral devices.

The present invention does not limit the internal architecture of the adjustment circuit 210. Any circuit capable of adjusting the adjustment voltage VA can be used as the adjustment circuit 210. In the present embodiment, the adjustment circuit 210 has regulators 211 to 214. Regulators 211-214 are connected in parallel between node ND2 and GND. Since the internal structures of the regulators 211 to 214 are all the same, the operation principle of the regulator will be described below by taking the regulator 211 as an example. In other embodiments, the adjustment circuit 210 may have more or fewer regulators.

The regulator 211 has a switch Q1 and a set resistor R1. The switch Q1 is coupled to the node ND2. The invention does not limit the type of switch Q1. In the present embodiment, the switch Q1 is an N-type transistor, but is not intended to limit the present invention. In other embodiments, switch Q1 may be a P-type transistor. As shown, the gate of switch Q1 receives a control signal SC1, and its drain is coupled to node ND2, its source One end of the setting resistor R1 is coupled. The other end of the set resistor R1 is coupled to the node GND. When the switch Q1 is turned on, the resistor R1 is set in parallel with the resistor Rb. Therefore, the feedback voltage VFB increases and the regulation voltage VA also increases, wherein the increased regulation voltage VA is the boost voltage VAR.

In the present embodiment, the resistances of the set resistors R1 to R4 of the regulators 211 to 214 are not the same. Further, the switches Q1 to Q4 of the regulators 211 to 214 are controlled by the control signals SC1 to SC4, respectively, wherein the control signals SC1 to SC4 are generated by the controller 145. In a possible embodiment, the controller 145 generates the control signals SC1 SCSC4 according to the charging voltage VCH provided by the peripheral device 120.

For example, when the charging voltage VCH is equal to a first preset value (eg, 5V), the controller 145 only turns on the switch Q1. Therefore, the resistor R1 is set in parallel with the resistor Rb. At this time, the boost voltage VAR may be equal to a first voltage (eg, 15V). In another possible embodiment, when the charging voltage VCH is equal to a second preset value (such as 9V), the controller 145 only turns on the switch Q2. Therefore, the resistor R2 is set in parallel with the resistor Rb. At this time, the boost voltage VAR may be equal to a second voltage (eg, 18V). In some possible embodiments, when the charging voltage VCH is equal to a third preset value (such as 15V) or a fourth preset value (such as 20V), the controller 145 only turns on the switch Q3 or Q4. Therefore, the resistor R3 or R4 is set in parallel with the resistor Rb. At this time, the boost voltage VAR may be equal to a third voltage (such as 21V) or a fourth voltage (such as 24V).

Figure 3 is another possible embodiment of the processor of the present invention. Fig. 3 is similar to Fig. 2, except for the adjustment circuit 310 of Fig. 3. The adjustment circuit 310 receives the operating voltage VOP and couples the nodes ND2 and GND. In this embodiment, the adjustment circuit 310 has regulators 311-314 and a current mirror 315. The regulators 311 to 314 are connected in parallel with each other. Since the structures of the regulators 311 to 314 are similar, the following are only The regulator 311 is taken as an example. In other embodiments, the adjustment circuit 310 may have more or fewer regulators.

The regulator 311 has a switch SW3 and a set resistor R5. The switch SW3 receives the operating voltage VOP and is coupled to the set resistor R5. In a possible embodiment, the switch SW3 is a P-type transistor or an N-type transistor. The setting resistor R5 is coupled between the switch SW3 and the input terminal ND3 of the current mirror 315. In the present embodiment, the controller 145 generates a control signal SC5 according to the input voltage VIN for turning on or off the switch SW3. When the switch SW3 is turned on, a reference current Iref1 passes through the set resistor R5. In the present embodiment, the setting resistors R5 to R8 have different resistance values. Therefore, when the switches SW3 to SW6 are turned on, the reference currents Iref1 to Iref4 flowing through the resistors R5 to R8 are different.

The current mirror 315 has an input ND3 and an output ND4. The output terminal ND4 is coupled to the node ND2. In the present embodiment, the current mirror 315 includes transistors Q11 and Q12. When an input current flows through the input terminal ND3, the current mirror 315 replicates the input current for generating an output current, wherein the output current flows through the pre-output terminal ND4 and is equal to the input current. For example, when the reference current Iref1 flows through the input terminal ND3, the current mirror 315 generates an output current Ic. Therefore, the current Ia flowing through the resistor Ra increases, thereby increasing the regulation voltage VA for generating the boosting voltage VAR.

In the present embodiment, the controller 145 generates control signals SC5 to SC8 for turning on one of the switches SW3 to SW6 according to the charging voltage VCH. For example, when the charging voltage VCH is equal to a first preset value (eg, 5V), the controller 145 turns on the switch SW3. Therefore, the reference current Iref1 flows through the input terminal ND3. At this time, the boosting voltage VAR may be equal to a first set value. In another possible embodiment, When the charging voltage VCH is equal to a second predetermined value (eg, 9V), the controller 145 turns on the switch SW4. Therefore, the reference current Iref2 flows through the input terminal ND3. At this time, the boosting voltage VAR may be equal to a second set value. In some possible embodiments, when the charging voltage VCH is equal to a third preset value (such as 15V) or a fourth preset value (such as 20V), the controller 145 turns on the switch SW5 or SW6. Therefore, the reference current Iref3 or Iref4 flows through the input terminal ND3. At this time, the boosting voltage VAR may be equal to a third set value or a fourth set value. In a possible embodiment, the first to fourth set values are all different.

Figure 4A is another possible embodiment of the processor of the present invention. In the present embodiment, the processor 400A includes energy storage devices Cout1, Cout2 and a switch Q31. The energy storage device Cout1 is coupled between the node ND1 and GND. The switch Q31 is coupled between the energy storage devices Cout1 and Cout2. In this embodiment, the switch Q31 is a P-type transistor, the gate thereof receives a control signal SC, the source thereof is coupled to the energy storage device Cout1, and the drain is coupled to the energy storage device Cout2. In other embodiments, switch Q31 may be implemented by an N-type transistor. The energy storage device Cout2 is coupled between the switch Q31 and the node GND. In a possible embodiment, the energy stores Cout1 and Cout2 are capacitors.

In the first mode, the control signal SC is not triggered, and therefore, the switch Q31 is not turned on. At this time, only the energy storage device Cout1 stores energy. The energy W3 stored in the energy storage device Cout1 is as follows:

Therefore, the voltage regulator 143 of FIG. 1 generates the operating voltage VOP based on the energy W3 stored in the energy storage device Cout1, wherein the symbol V of the equation (4) is the voltage difference across the energy storage device Cout1.

In a second mode, the control signal SC is triggered, so the switch Q31 is turned on. The energy storage Cout2 is connected in parallel with the energy storage Cout1. Therefore, the energy storage device Cout1 and Cout2 together store energy. The energy W4 stored in the energy storage devices Cout1 and Cout2 is as follows:

The symbol V of equation (5) is the voltage difference across the energy stores Cout1 and Cout2. It can be seen from equations (5) and (4) that the energy W4 stored in the energy storage devices Cout1 and Cout2 is greater than the energy W3 stored in the energy storage device Cout1. Therefore, when the peripheral device 120 no longer supplies power to the energy regulating circuit 140, the voltage regulator 143 generates an operating voltage VOP according to the energy W4 stored in the energy storage devices Cout1 and Cout2 to maintain the operation of the controller 145, and also supply excess energy. Used by other peripheral devices. In a possible embodiment, the control signal SC is generated by the controller 145 of FIG.

Figure 4B is another possible embodiment of the processor of the present invention. Figure 4B is similar to Figure 4A, except that processor 400B of Figure 4B has a slow start circuit 410. The slow start circuit 410 is used to prevent an inrush current from entering the energy storage Cout2 at the instant when the switch Q31 is turned on. The slow start circuit 410 is coupled between the energy storage devices Cout1 and Cout2. When the switch Q31 is turned on, the current flowing into the energy storage device Cout2 gradually increases. The present invention does not limit the internal circuit architecture of the slow start circuit 410. Any circuit that can avoid surge current can be used as the slow start circuit 410.

Figure 5 is another possible embodiment of the processor of the present invention. The processor 500 integrates the processors 200 and 400A. As shown, the processor 500 includes resistors Ra, Rb, energy storage devices Cout1, Cout2, switch Q31, and an adjustment power Road 210. Since the resistors Ra and Rb in FIG. 5 are the same as the resistors Ra and Rb and the adjustment voltage 210 in FIG. 2, the adjustment circuit 210 will not be described again. In addition, the characteristics of the energy storage devices Cout1, Cout2 and the switch Q31 of Fig. 5 are the same as those of the energy storage devices Cout1, Cout2 and Q31 of Fig. 4A, and therefore will not be described again. In other embodiments, the slow start circuit 410 of FIG. 4B can also be applied to FIG.

In the first mode, the control signals SC and SC1 to SC4 are not triggered, and therefore, the switch Q31 and the regulators 211 to 214 are not turned on. At this time, the energy W5 stored in the energy storage device Cout1 is as follows:

In a second mode, the control signal SC is triggered, so the switch Q31 is turned on. The energy storage Cout2 is connected in parallel with the energy storage Cout1. At this time, if the control signal SC1 is triggered, the feedback voltage VFB can be increased, thereby generating the boost voltage VAR. At this time, the energy W6 stored in the energy storage devices Cout1 and Cout2 is as follows:

It can be seen from equations (6) and (7) that in the second mode, the energy W6 stored in the energy storage devices Cout1 and Cout2 is greater than the energy W5 stored in the energy storage device Cout1 in the first mode.

Figure 6 is another possible embodiment of the processor of the present invention. The processor 600 integrates the processors 300 and 400A. As shown, the processor 600 includes resistors Ra, Rb, energy stores Cout1, Cout2, a switch Q31, and an adjustment circuit 310. Since the characteristics of the resistors Ra and Rb in FIG. 6 and the adjustment circuit 310 and the characteristics of the resistors Ra and Rb in FIG. 3 are the same as those of the adjustment circuit 310, they will not be described again. In addition, the characteristics of the energy storage devices Cout1, Cout2 and switch Q31 of Fig. 6 and the 4A The energy storage devices Cout1, Cout2 and Q31 of the figure are the same, and therefore will not be described again. In other embodiments, the slow start circuit 410 of FIG. 4B can also be applied to FIG.

Figure 7 is another possible embodiment of the operating system of the present invention. Figure 7 is similar to Figure 1, except that the processor 747 of the operating system 700 of Figure 7 processes the input voltage VIN to produce a processing result VINR. In the present embodiment, controller 745 generates at least one control signal (not shown) to processor 747 based on input voltage VIN. The processor 747 generates an appropriate processing result VINR based on the control signal. The voltage regulator 741 generates a regulated voltage VA according to the processing result VINR. The voltage regulator 743 generates an operating voltage VOP to the controller 745 according to the regulated voltage VA.

In a possible embodiment, the manner in which the processor 747 processes the input voltage VIN and the processor 200, 300, 400A, 400B, 500, 600 of the 2, 3, 4A, 4B, 5, and 6 diagrams process the regulated voltage VA Similar, so I won't go into details. The operation principle of the host device 710, the peripheral device 720, the transmission path 730, the voltage regulators 741 and 743, the controller 745, and the processor 747 in FIG. 7 and the host device 110, the peripheral device 120, and the transmission path in FIG. 130, the voltage regulators 141, 143, the controller 145 and the processor 147 operate similarly, and therefore will not be described again.

When a charging device is coupled to the energy conditioning circuit, the energy conditioning circuit begins to store a large amount of energy. When the charging device is no longer coupled to the energy regulating circuit, since the host device takes a period of time to start supplying the host voltage, the energy regulating circuit maintains its own operation (including other peripheral devices in the connection) by the previously stored large energy. Wait for the host device to output the host voltage. therefore, Even if the energy conditioning circuit does not receive the charging voltage and the host voltage, the energy conditioning circuit can normally communicate with other high power loads (such as storage devices or display devices).

Unless otherwise defined, all terms (including technical and scientific terms) are used in the ordinary meaning Moreover, unless expressly stated, the definition of a vocabulary in a general dictionary should be interpreted as consistent with the meaning of an article in its related art, and should not be interpreted as an ideal state or an overly formal voice.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. . For example, the system, apparatus or method of the embodiments of the present invention may be implemented in a physical embodiment of a combination of hardware, software or hardware and software. Therefore, the scope of the invention is defined by the scope of the appended claims.

Claims (18)

An energy adjustment circuit includes: a first voltage regulator that regulates an input voltage to generate a regulated voltage; a first energy storage device that charges according to the input voltage or the regulated voltage; a first switch coupled Connected to the first energy storage device; a second energy storage device coupled to the first switch, wherein when the first switch is turned on, the second energy storage device is connected in parallel with the first energy storage device; a second voltage a regulator, when the first switch is not conducting, generating an operating voltage according to the voltage of the first energy storage device, and generating the operating voltage according to voltages of the first and second energy storage devices when the first switch is turned on And a controller that operates according to the operating voltage. The energy adjustment circuit of claim 1, wherein one of the first and second voltage regulators is a booster circuit, and the other of the first and second voltage regulators is a Buck circuit. The energy adjustment circuit of claim 1, further comprising: a slow start circuit coupled between the first and second energy storages, wherein when the first switch is turned on, flowing into the second The current in the energy storage is gradually increased. The energy adjustment circuit of claim 1, wherein when the input voltage is provided by a charger, the controller turns on the first switch, when the input voltage is not provided by the charger, The controller does not turn on the The first switch. The energy adjustment circuit of claim 4, further comprising: a first resistor coupled between a first node and a second node; and a second resistor coupled to the second node And a third node, wherein the first energy storage is coupled between the first and third nodes. The energy adjustment circuit of claim 5, further comprising: a second switch coupled to the second node; and a first set resistor coupled between the second switch and the third node When the second switch is turned on, the first set resistor is connected in parallel with the second resistor; a third switch is coupled to the second node; and a second set resistor is coupled to the third switch and the third Between the three nodes, wherein the second set resistor is connected in parallel with the second resistor when the third switch is turned on. The energy adjustment circuit of claim 6, wherein when the input voltage is equal to a first preset value, the controller turns on the second switch, when the input voltage is equal to a second preset value, The controller turns on the third switch. The energy adjustment circuit of claim 5, further comprising: a current mirror having an input end and an output end coupled to the second node, when a first reference current flows through the input At the end, the current mirror copies the first reference current to generate a first output current flowing through the output end, and when a second reference current flows through the input end, the current mirror copies the second reference current, Used to generate a second output current through the output a first setting resistor coupled to the input terminal; a second switch receiving the operating voltage and coupled to the first setting resistor, wherein when the second switch is turned on, the first reference current passes through the first a set resistor and the input end; a second set resistor coupled to the input end; and a third switch receiving the operating voltage and coupled to the second set resistor, wherein when the third switch is turned on, The second reference current passes through the second set resistor and the input terminal. The energy adjustment circuit of claim 8, wherein when the input voltage is equal to a first preset value, the controller turns on the second switch, when the input voltage is equal to a second preset value, The controller turns on the third switch. An operating system includes: a host device for providing a host voltage or receiving a charging voltage; a peripheral device for receiving the host voltage or providing the charging voltage; a transmission path coupled to the host device and the The peripheral device is configured to transmit the host voltage or the charging voltage; and an energy regulating circuit is coupled between the host device and the peripheral device, and includes: a first voltage regulator to adjust the charging voltage, Used to generate a regulated voltage; a first energy storage device that is charged according to the charging voltage or the regulated voltage; a first switch coupled to the first energy storage device; a second energy storage device coupled to the first switch, wherein the second energy storage device is connected in parallel with the first energy storage when the first switch is turned on And a second voltage regulator, when the first switch is not conducting, generating the operating voltage according to the voltage of the first energy storage, when the first switch is turned on, according to the first and second energy storage The voltage of the device generates the operating voltage; and a controller that operates according to the operating voltage. The operating system of claim 10, wherein one of the first and second voltage regulators is a booster circuit, and the other of the first and second voltage regulators is a drop Pressure circuit. The operating system of claim 10, further comprising: a slow start circuit coupled between the first and second energy storages, wherein the second energy flows when the first switch is turned on The current in the reservoir gradually increases. The operating system of claim 10, wherein when the charging voltage is provided by a charger, the controller turns on the first switch, and when the charging voltage is not provided by the charger, the control The first switch is not turned on. The operating system of claim 13, further comprising: a first resistor coupled between a first node and a second node; and a second resistor coupled to the second node Between a third node, wherein the first energy storage is coupled between the first and third nodes. The operating system of claim 14, further comprising: a second switch coupled to the second node; and a first set resistor coupled between the second switch and the third node, When the second switch is turned on, the first set resistor is connected in parallel with the second resistor; a third switch is coupled to the second node; and a second set resistor is coupled to the third switch and the third Between the nodes, wherein the second set resistor is connected in parallel with the second resistor when the third switch is turned on. The operating system of claim 15, wherein the controller turns on the second switch when the charging voltage is equal to a first preset value, when the charging voltage is equal to a second preset value, The controller turns on the third switch. The operating system of claim 14, further comprising: a current mirror having an input end and an output end coupled to the second node, when a first reference current flows through the input end The current mirror copies the first reference current to generate a first output current flowing through the output end, and when a second reference current flows through the input end, the current mirror copies the second reference current, a second output current is generated to flow through the output end; a first set resistor is coupled to the input end; a second switch receives the operating voltage and is coupled to the first set resistor, wherein the second switch When conducting, the first reference current passes through the first set resistor and the input end; a second set resistor coupled to the input end; and a third switch receiving the operating voltage and coupled to the second set resistor, wherein the second reference current passes through the second when the third switch is turned on Set the resistance to this input. The operating system of claim 17, wherein the controller turns on the second switch when the charging voltage is equal to a first preset value, when the charging voltage is equal to a second preset value, The controller turns on the third switch.