TWI578655B - Voltage balancing control system and method thereof - Google Patents

Description

Voltage balance control system and method thereof

The present invention relates to a voltage balance control system and method thereof, and more particularly to a voltage balance control system and a control method thereof that utilize a special zero-sequence voltage injection method to reduce distortion of an output current.

Generally, third-order neutral point clamp converters are often used as high-power applications, such as motor-driven converters. If compared with a second-order converter, the switching element of the third-order neutral-point clamp converter crosses the voltage, and is only half of the second-order converter under the same DC link voltage. In addition, the third-order neutral point clamp converter can output three levels of phase voltage and five levels of line-to-line voltage, thus effectively reducing the harmonic components of the output voltage and current.

The operational performance of the third-order neutral point clamp converter has a great relationship with the way of pulse width modulation. There are two major classifications in the common pulse width modulation technique: sine wave-triangle wave modulation method and space vector modulation method. The floating problem of the neutral point potential is one of the important topics of the third-order neutral point clamp converter. The voltage balance control method of the conventional neutral point clamp converter utilizes some unbalanced load or abnormal switching mode, and the voltage balance control method easily makes the neutral point voltage continuously change or drifts to be unaffected. control The level of the system, which in turn leads to a decrease in output performance, and even causes damage to the switching element due to overvoltage. It can be seen that there is a lack of a voltage balance control system and a control method thereof for uniformly controlling the charge and discharge of the capacitor and reducing the distortion of the output current, and the related art is seeking a solution.

Therefore, the present invention provides a voltage balance control system and method thereof, which utilizes zero-sequence voltage injection combined with charge energy difference control to stably and accurately adjust the voltage of a capacitor in a neutral-point clamp converter to a DC voltage. Half, in other words, the neutral point voltage can be accurately adjusted to half the DC voltage. Furthermore, in adjusting the voltage of the capacitor of the neutral point clamp converter, the compensation time is adjusted correspondingly to the change of the charging energy difference, and the charging energy difference can be freely preset. In addition, the voltage balance control system and the method thereof of the present invention can reduce harmonic distortion of the output current, that is, generate better current quality. In addition, the voltage balance control system and method thereof of the present invention are applicable to a fixed charge/discharge or linear charge and discharge control mode, and the present invention has better total harmonic distortion than the conventional maximum zero sequence voltage injection mode (Total Harmonic). Distortion, THD).

In accordance with one aspect of the present invention, a voltage balance control system is provided for controlling a plurality of voltage commands that balance a neutral point clamp converter. The voltage balance control system comprises a voltage command comparison module, a redundant vector balance module and a capacitor voltage balance control module. The voltage command comparison module receives a plurality of voltage commands and shifts part of the voltage commands. The voltage level is then compared to the magnitude of the voltage command to obtain the maximum voltage command and the minimum voltage command. This voltage command comparison module outputs the maximum voltage command and the minimum voltage command. In addition, the redundant vector balance module is electrically connected to the voltage command comparison module, and the redundant vector balance module receives and calculates the maximum voltage command and the minimum voltage command to generate a balanced zero sequence voltage. Furthermore, the capacitor voltage balance control module is electrically connected to the voltage command comparison module, and the capacitor voltage balance control module receives and calculates an indication current from the neutral point clamp converter, a first DC voltage, and a second The DC voltage is used to generate a zero sequence voltage. The balanced zero-sequence voltage and the zero-sequence voltage are simultaneously injected into the voltage commands of the neutral point clamp converter.

Thereby, the voltage balance control system of the present invention utilizes the zero sequence voltage injection combined with the control of the charging energy difference, and can stably and accurately adjust the voltage of the capacitor in the neutral point clamp converter to half of the DC voltage. In addition, the voltage balance control system of the present invention can reduce the distortion of the output current, that is, generate better current quality. In addition, the voltage balance control system of the present invention is suitable for a fixed charge/discharge or linear charge and discharge control mode, and the present invention has better total harmonic distortion than the conventional maximum zero sequence voltage injection mode.

According to an embodiment of the invention, the redundant vector balancing module may have an excess voltage balancing operation function including a balanced zero sequence voltage, a total DC voltage, a maximum voltage command, and a minimum voltage command. The total DC voltage is equal to the first DC voltage plus the second DC voltage. The balanced zero sequence voltage is expressed as V _0,bal , the total DC voltage is expressed as V _dc , the maximum voltage command is expressed as V _max , and the minimum voltage command is expressed as V _min . The excess voltage balance operation function conforms to the following formula:

According to an embodiment of the invention, the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage, a space vector region parameter, a charging energy difference, a total DC voltage, Indicates current and length of time. The zero sequence voltage is expressed as V ₀ , the space vector region parameter is represented as k _region , the charging energy difference is expressed as Δ Q , the total DC voltage is expressed as V _dc , the indicated current is expressed as i _x , and the time length is expressed as T _s , and the capacitor voltage is The balance control operation function conforms to the following formula: Where k _region is 1 or -1.

According to an embodiment of the invention, the capacitor voltage balance control operation function may include a capacitance value, an absolute voltage difference value, a first DC voltage, and a second DC voltage. The first DC voltage is expressed as V _dcu , the second DC voltage is expressed as V _dcd , the absolute value of the voltage difference is expressed as |Δ V |, and the capacitance value is expressed as C _dc . The capacitor voltage balance control operation function conforms to the following formula: Where sgn is a logical function.

According to an embodiment of the invention, the voltage balance control system may include a first adder, a limiter, and a plurality of second additions. Device. The first adder is electrically connected to the redundant vector balance module and the capacitor voltage balance control module, and the first adder adds the balanced zero sequence voltage and the zero sequence voltage to generate a total zero sequence voltage. In addition, the limiter is electrically connected to the first adder and receives the total zero sequence voltage, and the limiter limits the magnitude of the total zero sequence voltage and outputs a limited total zero sequence voltage. As for the second adder, the limiter is electrically connected, and each of the second adders adds one of the voltage commands and the total zero sequence voltage after the limit.

According to an embodiment of the invention, the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage, a space vector region parameter, a linear parameter, a first DC voltage, and a first Two DC voltage, total DC voltage, indicating current and length of time. The zero sequence voltage is expressed as V ₀ , the space vector region parameter is represented as k _region , the linear parameter is expressed as K _q , the first DC voltage is represented as V _dcu , the second DC voltage is expressed as V _dcd , and the total DC voltage is expressed as V _dc . The indicated current is expressed as i _x and the length of time is expressed as T _s . The capacitor voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1.

According to another aspect of the present invention, a voltage balance control method for controlling a plurality of voltage commands for balancing a neutral point clamp converter is provided. The voltage balance control method includes a comparison voltage command step, a step of generating a balanced zero sequence voltage, a step of generating a zero sequence voltage, and a step of injecting a zero sequence voltage. The comparison voltage command step uses the voltage command to compare the voltage level of the plurality of voltage commands of the module displacement portion, and compares the voltage life. The maximum voltage command and the minimum voltage command are obtained for the size of the command. The step of generating a balanced zero sequence voltage utilizes a redundant vector balancing module to calculate the maximum voltage command and the minimum voltage command to produce a balanced zero sequence voltage. In addition, the step of generating a zero sequence voltage uses the capacitor voltage balance control module to calculate the indicated current from the neutral point clamp converter, the first DC voltage, and the second DC voltage to generate a zero sequence voltage. The step of injecting the zero sequence voltage is to simultaneously inject the balanced zero sequence voltage and the zero sequence voltage into the voltage commands of the neutral point clamp converter.

Thereby, the voltage balance control method of the present invention utilizes the zero sequence voltage injection combined with the control of the charging energy difference, and can stably and accurately adjust the voltage of the capacitor in the neutral point clamp converter to half of the DC voltage. Furthermore, the distortion of the output current can be reduced by the injection of the first and zero sequence voltages. In addition, the voltage balance control system of the present invention can be used for a fixed charge/discharge or linear charge and discharge control mode, and the present invention has better total harmonic distortion than the conventional maximum zero sequence voltage injection mode.

According to an embodiment of the invention, the redundant vector balance module has an excess voltage balance operation function, and the redundant voltage balance operation function includes a balanced zero sequence voltage, a total DC voltage, a maximum voltage command, and a minimum voltage command. The total DC voltage is equal to the first DC voltage plus the second DC voltage. The balanced zero sequence voltage is expressed as V _0,bal , the total DC voltage is expressed as V _dc , the maximum voltage command is expressed as V _max , and the minimum voltage command is expressed as V _min . The excess voltage balance operation function conforms to the following formula:

According to an embodiment of the invention, the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage, a space vector region parameter, a total DC voltage, an indication current, and a charging energy. The difference and the length of time. The zero sequence voltage is represented as V ₀ , the space vector region parameter is represented as k _region , the charging energy difference is expressed as Δ Q , the total DC voltage is represented as V _dc , the indicated current is expressed as i _x , and the time length is expressed as T _s . The capacitor voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1.

According to an embodiment of the invention, the capacitor voltage balance control operation function may include a capacitance value, an absolute voltage difference value, a first DC voltage, and a second DC voltage. The first DC voltage is expressed as V _dcu , the second DC voltage is expressed as V _dcd , the absolute value of the voltage difference is expressed as |Δ V |, and the capacitance value is expressed as C _dc . The capacitor voltage balance control operation function conforms to the following formula: Where sgn is a logical function.

According to an embodiment of the invention, the step of injecting the zero sequence voltage may include: using a first adder and a limiter to calculate a balanced zero sequence voltage and a zero sequence voltage to output a limited total zero sequence voltage, and using a plurality of The two adders respectively add the voltage command and the total zero sequence voltage after the limit.

According to an embodiment of the invention, the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage, a space vector region parameter, a linear parameter, a first DC voltage, and a first Two DC voltage, total DC voltage, indicating current and length of time. The zero sequence voltage is expressed as V ₀ , the space vector region parameter is represented as k _region , the linear parameter is expressed as K _q , the first DC voltage is represented as V _dcu , the second DC voltage is expressed as V _dcd , and the total DC voltage is expressed as V _dc . The indicated current is expressed as i _x and the length of time is expressed as T _s . The capacitor voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1.

100, 100a‧‧‧Neutral Point Clamp Converter

110‧‧‧DC power supply

122, 124‧‧‧ capacitor

132‧‧‧First Neutral Point Clamp Conversion Unit

134‧‧‧Second neutral point clamp conversion unit

136‧‧‧ Third Neutral Point Clamp Conversion Unit

200‧‧‧Voltage balance control system

300‧‧‧Voltage Command Comparison Module

400‧‧‧Super Vector Balance Module

500‧‧‧Capacitor voltage balance control module

600‧‧‧First Adder

700‧‧‧Restrictor

800‧‧‧second adder

900‧‧‧Voltage balance control method

S1‧‧‧Compare voltage command steps

S2‧‧‧Generation of balanced zero sequence voltage steps

S3‧‧‧ generates zero sequence voltage steps

C _dc ‧‧‧capacitance value

O ‧‧‧Neutral point

i _n ‧‧‧Neutral current

i _a ‧‧‧first output current

i _b ‧‧‧second output current

i _c ‧‧‧third output current

Ap , an ‧‧‧ switching status

Bp , bn ‧‧‧switch status

+‧‧‧High level voltage output

0‧‧‧zero level voltage output

-‧‧‧Low-level voltage output

A, A1, B, C, D, E, F‧‧‧ areas

Θ‧‧‧ phase angle

Ut ‧‧‧Upper triangle

Lt ‧‧‧ lower triangle

V _max ‧‧‧max voltage command

S4‧‧‧Injection of zero sequence voltage step

, , ‧‧‧Voltage command

, , ‧‧‧Voltage command

, , ‧‧‧Voltage command

V _dc ‧‧‧ total DC voltage

V _dcu ‧‧‧first DC voltage

V _dcd ‧‧‧second DC voltage

v _a ‧‧‧first output voltage

v _b ‧‧‧second output voltage

v _c ‧‧‧ third output voltage

V _mid ‧‧‧ intermediate voltage command

V _min ‧‧‧minimum voltage command

, ‧‧‧Voltage command

T _xp , T _xn ‧‧‧ interval

, ‧‧‧interval

V ₀ ‧‧ ‧ zero sequence voltage

V _0,bal ‧‧‧balanced zero sequence voltage

i _x ‧‧‧ indicates current

R ‧‧‧resistance

FIG. 1 is a schematic diagram showing the circuit structure of a neutral point clamp converter according to an embodiment of the present invention.

FIG. 2 is a schematic diagram showing the circuit structure of a voltage balance control system according to an embodiment of the present invention.

Fig. 3 is a schematic diagram showing the space vector of the output voltage of the neutral point clamp converter of Fig. 1.

Fig. 4 is a schematic diagram showing the switching state of the output voltage of the area A1 in Fig. 3.

Fig. 5A is a schematic view showing the current corresponding to the switching state of the embodiment of Fig. 3.

FIG. 5B is a schematic diagram showing the current corresponding to the switching state of another embodiment of FIG. 3.

Figure 5C is a schematic diagram showing the current corresponding to the switching state of still another embodiment of Figure 3.

FIG. 5D is a schematic diagram showing the current corresponding to the switching state of still another embodiment of FIG. 3.

Fig. 6 is a diagram showing the definition of parameters corresponding to each area of Fig. 3.

Fig. 7 is a diagram showing the relationship between the voltage command and the redundant vector of the neutral point clamp converter of Fig. 1.

Figure 8 is a diagram showing the relationship between the voltage command and the redundant vector after the zero-sequence voltage injection in Figure 7.

FIG. 9 is a flow chart showing a voltage balance control method according to another embodiment of the present invention.

Figure 10A is a schematic diagram showing the circuit architecture of the neutral point clamp converter of Figure 1 during measurement.

Fig. 10B is a graph showing the measurement results of the Fig. 9A combined with the fixed charge and discharge mode.

Figure 10C shows the measurement results of Figure 9A in combination with the linear charge and discharge mode.

Hereinafter, a plurality of embodiments of the present invention will be described with reference to the drawings. For the sake of clarity, many practical details will be explained in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not necessary. In addition, some of the conventional structures and elements are illustrated in the drawings in a simplified schematic manner, and the repeated elements may be represented by the same reference numerals.

Please refer to Figure 1 and Figure 2 together. FIG. 1 is a schematic diagram showing the circuit structure of a neutral point clamp converter 100 according to an embodiment of the present invention. FIG. 2 is a schematic diagram showing the circuit structure of a voltage balance control system 200 according to an embodiment of the present invention. As shown, the neutral point clamp converter 100 is a third-order neutral point clamp converter, and the voltage balance control system 200 is electrically coupled to the neutral point clamp converter 100 for balanced neutral control. Three voltage commands for point clamp converter 100 , and Then, the neutral point voltage of the neutral point clamp converter 100 is stably and accurately adjusted to half of the total DC voltage V _dc . The circuit details and switching control of the neutral point clamp converter 100 and the voltage balance control system 200 will be described in detail below.

Referring to FIG. 1, the neutral point clamp converter 100 includes a DC power supply 110, capacitors 122, 124, a first neutral point clamp conversion unit 132, a second neutral point clamp conversion unit 134, and a third neutral. Point clamp conversion unit 136. The DC power source 110 provides a total DC voltage V _dc . The capacitor 122 and the capacitor 124 are connected in series with each other, and the capacitance values of the two capacitors 122 and 124 are both C _dc , the voltage across the capacitor 122 is the first DC voltage V _dcu , and the voltage across the capacitor 124 is the second DC voltage V _dcd . The total DC voltage V _dc is equal to the first DC voltage V _dcu plus the second DC voltage V _dcd , and the junction of the two capacitors 122, 124 is a neutral point O . The neutral point O has a neutral point voltage and a neutral point current i _n . Further, the first neutral point clamp conversion unit 132, the second neutral point clamp conversion unit 134, and the third neutral point clamp conversion unit 136 are connected in parallel and input a neutral point voltage. The first neutral point clamp conversion unit 132 outputs a first output voltage v _a and a first output current i _a ; the second neutral point clamp conversion unit 134 outputs a second output voltage v _b and a second output Current i _b ; the third neutral point clamp conversion unit 136 outputs a third output voltage v _c and a third output current i _c .

Please refer to FIG. 3 , which is a schematic diagram showing the space vector of the output voltage of the neutral point clamp converter 100 of FIG. 1 . Each node represents a space vector, where the six spatial vectors at the inner hexagonal endpoint are called redundant vectors, and each redundant vector contains two switching states ap , an , such as ap :(+00) and an :( 0--), these two switching states have the same output voltage. Each switching state has three level signals, which respectively represent the level signals of the first output voltage v _a , the second output voltage v _b and the third output voltage v _c . Where "+" represents the high level voltage output, "0" represents the zero level voltage output, and "-" represents the low level voltage output. In addition, the coordinate plane of the space vector can be divided into six regions. The first region is region A, and the phase angle θ ranges from greater than or equal to minus 30 degrees and less than plus 30 degrees. The second region is region B, and its phase angle θ ranges from 30 degrees or more to less than 90 degrees. The third region is region C, and its phase angle θ ranges from 90 degrees or more to less than 150 degrees. The fourth area is the area D, and the phase angle θ ranges from 150 degrees or more to less than 210 degrees. The fifth region is region E, and its phase angle θ ranges from 210 degrees or more to less than 270 degrees. The sixth region is region F, and its phase angle θ ranges from 270 degrees or more to less than 330 degrees.

Please refer to FIG. 4, which is a schematic diagram showing the switching state of the output voltage of the area A1 in FIG. The switching state is based on the voltage command , , It is obtained by comparison with the upper triangle line ut and the lower triangle line lt . Again, the voltage command , and Will generate a new voltage command according to the following equation (1) ~ equation (3) displacement , and . Further, the maximum voltage command is expressed as V _max , the intermediate voltage command is expressed as V _mid , and the minimum voltage command is expressed as V _min , which respectively conforms to the following equation (4) to equation (6). In other words, the maximum voltage command V _max and the minimum voltage command V _min are all voltage commands respectively. , and Move to the maximum and minimum values after the upper triangle line ut . For example: the voltage command in the original Figure 4 , and Voltage command Located on the upper triangle line ut , and the voltage command , Then located at the lower triangle line lt , that is, the voltage command , and It is spread over the upper triangle line ut and the lower triangle line lt . Then, all voltage commands , and Move to the upper triangle ut , that is, the voltage command and Move to the upper triangle ut separately to form a new voltage command and As for the voltage command Equal to the new voltage command . Finally, choose a new voltage command , and The maximum value is taken as the maximum voltage command V _max and the minimum value is taken as the minimum voltage command V _min . In addition, referring to Figures 4 and 7, it can be seen that the maximum voltage command V _max is equal to the voltage command. (also known as voltage command) ), the minimum voltage command V _min is equal to the voltage command . The maximum voltage command V _max and the minimum voltage command V _min are used as a basis for limiting the range of zero-sequence voltage injection to avoid over-modulation.

Please refer to FIG. 5A to FIG. 5D , and FIG. 5A is a schematic diagram showing the current corresponding to the switching state ap of FIG. 3 . Fig. 5B is a schematic diagram showing the current corresponding to the switching state an of Fig. 3. Fig. 5C is a schematic diagram showing the current corresponding to the switching state bp of Fig. 3. Fig. 5D is a schematic diagram showing the current corresponding to the switching state bn of Fig. 3. As shown, each redundant vector can be divided into two switching states ap , an or two switching states bp , bn . The switching state ap represents two "0" transitions and one "+"transition; the switching state an represents two "-" transitions and one "0"transition; the switching state bp represents two "+" transitions and one "0" transition. Conversion; switching state bn represents two "0" transitions and one "-" transition. The present invention controls the charging and discharging of the capacitor 122 or the capacitor 124 through these switching states and corresponding currents, so that the neutral point voltage of the neutral point clamp converter 100 can be accurately adjusted to half of the total DC voltage V _dc .

Please refer to FIG. 3 and FIG. 6 together. FIG. 6 is a diagram showing the parameter definition corresponding to each area of FIG. The region is divided into six, each region having a corresponding phase angle θ, a redundant vector, an indicating current i _{x ,} and a neutral point potential. Through the correspondence between the regions, the charge and discharge conditions of the two capacitors 122 and 124 and the trend of the neutral point potential can be known.

Please refer to FIG. 6, FIG. 7 and FIG. 8 together. FIG. 7 is a schematic diagram showing the relationship between the voltage commands V _max , V _mid , V _min and the redundant vector of the neutral point clamp converter 100 of FIG. 1 . Figure 8 shows the voltage command after the zero-sequence voltage V _{0 is} injected in Figure 7. , Schematic diagram of the relationship with redundant vectors. As shown in the figure, the maximum voltage command V _max , the intermediate voltage command V _{mid ,} and the minimum voltage command V _min are respectively obtained by using the above equations (4) to (6). According to the analysis of the maximum voltage command V _max , the minimum voltage command V _min and the upper triangular line ut , the interval T _xp of the switching state of the redundant vector corresponds to the minimum voltage command V _min , and the interval of the other switching state of the redundant vector T _xn corresponds to the maximum voltage command V _max , wherein the parameter x is a or b is determined according to the phase angle θ of the voltage command of FIG. 6 , and the interval T _xp plus the interval T _xn is equal to the redundant vector total interval T _s . In addition, the interval T _xp and the interval T _xn can be obtained from the equation (7) and the equation (8), respectively: The invention controls the adjustment of the redundant vector by means of zero-sequence voltage injection, and the residual vector total interval T _s maintains a fixed value regardless of whether the injected zero-sequence voltage is positive or negative. The original interval T _xp and the interval T _xn can be respectively calculated by the following equation (9) and the equation (10) after being injected through the zero sequence voltage. With spacing : among them , And V ₀ represents the zero sequence voltage of the injection. As for the adjustment result of the redundant vector, it is as shown in the following formula (11): among them . It can be seen from the above equations (9) to (11) that when the zero sequence voltage V ₀ is a positive value, the interval T _xp increases and the interval T _xn decreases; conversely, when the zero sequence voltage V ₀ is negative The interval T _xp decreases and the interval T _xn increases. Furthermore, in order to avoid over-modulation, the injected zero-sequence voltage V ₀ must be limited to the maximum zero-sequence injection voltage V _{0, max} , as shown in equation (12): The present invention uses the above-described concept of zero-sequence voltage V ₀ injection in conjunction with a module in the voltage balance control system 200 described below to control the level of the neutral point voltage, thereby reducing harmonic distortion of the output current.

Please refer to FIG. 2 and FIG. 4 together, wherein FIG. 2 is a circuit architecture for realizing zero sequence voltage V ₀ and balanced zero sequence voltage V _{0, bal} injection and redundant vector adjustment. As can be seen from FIG. 2, the voltage balance control system 200 includes a voltage command comparison module 300, a redundant vector balance module 400, a capacitor voltage balance control module 500, a first adder 600, a limiter 700, and three. Second adders 800.

Voltage command comparison module 300 receives three voltage commands from neutral point clamp converter 100 , and And shift the voltage level of the partial voltage command. This embodiment is a voltage command versus The voltage level is shifted from the lower triangle line lt to the upper triangle line ut , as shown in Fig. 4. Then, the voltage command comparison module 300 compares the undisplaced voltage commands. And the voltage command after displacement , The maximum voltage command V _max and the minimum voltage command V _min are obtained by the size of the three, and the operation process is based on the above equations (1) to (6). Finally, the voltage command comparison module 300 outputs a maximum voltage command and a minimum voltage command to the redundant vector balance module 400 and the capacitor voltage balance control module 500.

The redundant vector balance module 400 is electrically connected to the voltage command comparison module 300, and the redundant vector balance module 400 receives and calculates the maximum voltage command V _max and the minimum voltage command V _min to generate a balanced zero sequence voltage V _0,bal . In detail, the redundant vector balance module 400 has an excess voltage balance operation function including a balanced zero sequence voltage V _0,bal , a total DC voltage V _dc , a maximum voltage command V _{max ,} and a minimum voltage command. V _min , and the excess voltage balance operation function conforms to the following formula:

The capacitor voltage balance control module 500 is electrically connected to the voltage command comparison module 300, and the capacitor voltage balance control module 500 receives and calculates the indication current i _x from the neutral point clamp converter 100, the first DC voltage V _dcu, and The second DC voltage V _{dcd is used} to generate a zero sequence voltage V ₀ . In particular, the voltage balance control system 200 of the present invention is free to pre-define the charge energy difference Δ Q to adjust the voltage at the neutral point. This charge energy difference Δ Q represents the difference between the charge energy of the capacitor 122 and the charge energy of the capacitor 124. The charging energy of the capacitor 122 and the charging energy of the capacitor 124 can be expressed by the following equations (14) and (15), respectively: Where k _region is the space vector region parameter, with reference to Fig. 3 and Fig. 6, the space vector region parameter k _region conforms to the following formula: Since the zero sequence voltage V ₀ affects the interval T _xp and the interval T _xn , and the charging energy of the capacitor 122 and the capacitor 124 are related to the interval T _xp and the interval T _xn , respectively, the zero sequence voltage V ₀ also affects the capacitor 122 and The charging energy of the capacitor 124. Furthermore, substituting the equation (9) and the equation (10) into the equation (14) and the equation (15) can obtain a difference in charging energy Δ Q in accordance with the following equation: Where Q _c,up and Q _c,dn represent the charging energy of the capacitor 122 and the capacitor 124 _, respectively. Since the user can freely predefined charging energy difference △ Q size, it may be zero sequence voltage V ₀ charging the energy difference △ Q size expressed as the following equation (18): Where sgn is a logic function and |△ Q | represents the magnitude of the charge energy difference Δ Q . In addition, the formula (18) can also be expressed as the following formula (19): Where |Δ V | represents the absolute value of the voltage difference. In order to implement the above equations (18) and (19), the capacitor voltage balance control module 500 is provided with a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage V ₀ and a space vector region parameter k. _Region , first DC voltage V _dcu , second DC voltage V _dcd , charge energy difference magnitude | Δ Q |, total DC voltage V _dc , indicated current i _x , time length T _s , absolute voltage difference |Δ V | And a capacitance value C _dc , wherein the total DC voltage V _dc is equal to the first DC voltage V _dcu plus the second DC voltage V _dcd , and the capacitance voltage balance control operation function corresponds to the equation (18) and the equation (19). It can be seen from the above that before adjusting the voltage of the capacitance of the neutral point clamp converter, the charge energy difference value |Δ Q | or the voltage difference absolute value |Δ V | can be freely preset, and the different charge energy difference magnitude| △ Q | or the absolute value of the voltage difference | △ V | will produce a different compensation time. This control method can reduce the harmonic distortion of the output current and produce better current quality.

Vector excess above balance balance module 400 of the zero sequence voltage V _{0, bal} capacitor voltage balancing control module and the zero sequence voltage of 500 V ₀ will be simultaneously injected into respective voltage commands of a neutral point clamped converter , and . In detail, the first adder 600 is electrically connected to the redundant vector balance module 400 and the capacitor voltage balance control module 500, and the first adder 600 adds the balanced zero sequence voltage V _0,bal to the zero sequence voltage V _{0 .} A total zero sequence voltage is then generated. In addition, the limiter 700 is electrically connected to the first adder 600 and receives the total zero sequence voltage, and the limiter 700 limits the total zero sequence voltage and outputs a limited total zero sequence voltage, that is, the total zero sequence voltage. The size must conform to the condition of equation (12). Furthermore, the second adder 800 is electrically connected to the limiter 700, and each of the second adders 800 adds one of the voltage commands to the limited total zero-sequence voltage to complete the zero-sequence voltage injection operation, in other words, The two adder 800 conforms to the equation (20): Where m is equal to a, b or c .

The present invention provides two embodiments, the first embodiment being a fixed charging method corresponding to the above formula (18) and equation (19). The second embodiment is a linear charging method corresponding to the following equations (21) and (22): Where K _q is a linear parameter, which can also be freely preset by the user. The value of the linear parameter K _q corresponds to the difference between the charging energy difference Δ Q and the first DC voltage V _dcu and the second DC voltage V _dcd , so that the numerical value of the linear parameter K _q also affects the zero sequence voltage V ₀ The degree of injection, and the user can control the neutral point voltage adjustment through the value of the linear parameter K _q , thereby reducing the distortion of the output current.

Please refer to FIG. 1 , FIG. 2 and FIG. 9 together. FIG. 9 is a schematic flow chart of a voltage balance control method according to another embodiment of the present invention. As shown, this voltage balance control method 900 is used to balancely control a plurality of voltage commands of the neutral point clamp converter 100. The voltage balance control method 900 includes a comparison voltage command step S1, a balanced zero sequence voltage step S2, a zero sequence voltage step S3, and a zero sequence voltage step S4.

Comparing the voltage command line using the voltage command step S1 comparing the voltage level of the voltage command module of the displacement portion 300, and compare the size of the maximum voltage command obtained by the command voltage and the minimum voltage command V _max V _min. Further, the comparison voltage command step S1 is realized by the calculation method of the above equations (1) to (6).

Generating balance of zero-sequence voltage using a step S2 based vector equilibrium extra module 400 computes the maximum command voltage and the minimum voltage command V _max V _min, to produce a balance of zero-sequence voltage V _{0, bal.} In addition, the step S2 of generating the balanced zero sequence voltage is accomplished by the operation of the above equation (13).

The zero sequence voltage step S3 is performed by the capacitor voltage balance control module 500 to calculate the indication current i _x , the first DC voltage V _{dcu ,} and the second DC voltage V _dcd from the neutral point clamp converter 100 to generate a zero sequence voltage. V ₀ . Furthermore, the step S3 is generated by the operation of the above equation (18) or (19).

The step of injecting the zero sequence voltage step S4 is to simultaneously inject the balanced zero sequence voltage V _0,bal and the zero sequence voltage V ₀ into the voltage commands of the neutral point clamp converter 100. , and The zero sequence voltage injection is completed by the first adder 600, the limiter 700, and the second adder 800 being sequentially operated. The present invention utilizes the balanced zero-sequence voltage V _0,bal in the step S2 of generating the balanced zero-sequence voltage to match the magnitude of the charge energy difference |Δ Q |, the absolute value of the voltage difference |Δ V | or the linear parameter in the step S3 of generating the zero-sequence voltage. The adjustment control of K _q improves the distortion of the output current.

Please refer to Figures 10A~10C together. FIG. 10A is a schematic diagram showing the circuit structure of the neutral point clamp converter 100a in FIG. 1 during measurement. Fig. 10B is a graph showing the measurement results of the Fig. 9A combined with the fixed charge and discharge mode. Figure 10C shows the measurement results of Figure 9A in combination with the linear charge and discharge mode. As shown in the figure, the neutral point clamp converter 100a of FIG. 10A differs from the neutral point clamp converter 100 of FIG. 1 only in that a resistor R is connected to both ends of the capacitor 124, and the resistor R is used for Imbalance of analog circuits. The measurement environmental conditions of Fig. 10B and Fig. 10C include the absolute value of the voltage difference |Δ V | is greater than 1, the total DC voltage V _dc is 400V, the capacitance value C _dc is 4500 μF, the switching frequency is 10 kHz, and the filter inductance is 4 mH. . Further, △ section 10B of FIG ^{Q = 3.7 × 10 -5 C,} K of FIG. 10C of _q = 0.0833. From the results of the figure, the data of Table 1 can be obtained. From these data, it can be seen that the fixed charge and discharge and linear charge and discharge modes of the present invention have better total harmonic distortion (THD) than the conventional voltage balance control mode.

It can be seen from the above embodiments that the present invention has the following advantages: First, the zero-sequence voltage injection method combined with the charging energy difference value or the absolute value of the voltage difference can stably and accurately adjust the neutral point clamp converter. The voltage of the capacitor is half of the DC voltage. Second, in adjusting the voltage of the capacitor of the neutral point clamp converter, the compensation time is adjusted correspondingly to the change of the charging energy difference, and the charging energy difference can be freely preset. Third, the voltage balance control system and method thereof of the present invention can reduce the distortion of the output current and produce better current quality. Fourth, the voltage balance control system and method thereof of the present invention can be used for a fixed charge/discharge or linear charge and discharge control mode, and the present invention has better total harmonic distortion than the conventional maximum zero sequence voltage injection mode.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

200‧‧‧Voltage balance control system

300‧‧‧Voltage Command Comparison Module

V _max ‧‧‧max voltage command

V _min ‧‧‧minimum voltage command

400‧‧‧Super Vector Balance Module

500‧‧‧Capacitor voltage balance control module

600‧‧‧First Adder

700‧‧‧Restrictor

800‧‧‧second adder

, , ‧‧‧Voltage command

, , ‧‧‧Voltage command

V ₀ ‧‧ ‧ zero sequence voltage

V _0,bal ‧‧‧balanced zero sequence voltage

V _dcu ‧‧‧first DC voltage

V _dcd ‧‧‧second DC voltage

i _x ‧‧‧ indicates current

Claims (12)

A voltage balance control system for controlling a complex voltage command of a balanced-neutral point clamp converter, the voltage balance control system comprising: a voltage command comparison module, receiving the voltage commands and displacing part of the voltage commands Comparing the voltage levels and comparing the magnitudes of the voltage commands to obtain a maximum voltage command and a minimum voltage command, the voltage command comparison module outputs the maximum voltage command and the minimum voltage command; a redundant vector balance module, electrical Connecting the voltage command comparison module, the redundant vector balance module receives and calculates the maximum voltage command and the minimum voltage command to generate a balanced zero sequence voltage; and a capacitor voltage balance control module, electrically connecting the voltage command a module, the capacitor voltage balance control module receives and calculates an indication current from the neutral point clamp converter, a first DC voltage, and a second DC voltage to generate a zero sequence voltage; wherein the balance zero sequence The voltage is injected into the voltage command of the neutral point clamp converter simultaneously with the zero sequence voltage. The voltage balance control system of claim 1, wherein the redundant vector balance module has an excess voltage balance operation function, the redundant voltage balance operation function including the balanced zero sequence voltage, a total DC voltage, a maximum voltage command and the minimum voltage command, the total DC voltage being equal to the first DC voltage plus the second DC voltage, the balanced zero sequence voltage being represented as V _0,bal , the total DC voltage being represented as V _dc , the maximum voltage The command is expressed as V _max , and the minimum voltage command is expressed as V _min , and the excess voltage balance operation function conforms to the following formula: The voltage balance control system of claim 1, wherein the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage and a space vector region parameter. a total DC voltage, the indicated current, a charging energy difference, and a length of time, the zero sequence voltage is represented as V ₀ , the space vector region parameter is represented as k _region , and the total DC voltage is represented as V _dc , the indication The current is expressed as i _x , and the difference in charging energy is expressed as Δ Q , and the length of time is expressed as T _s , and the capacitance voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1. The voltage balance control system of claim 3, wherein the capacitor voltage balance control operation function further comprises a capacitance value, an absolute voltage difference value, the first DC voltage, and the second DC voltage, the capacitance value. Expressed as C _dc , the absolute value of the voltage difference is expressed as |Δ V |, the first DC voltage is represented as V _dcu , and the second DC voltage is expressed as V _dcd , and the capacitance voltage balance control operation function conforms to the following formula: Where sgn is a logical function. The voltage balance control system of claim 1, further comprising: a first adder electrically connecting the redundant vector balance module and the capacitor voltage balance control module, wherein the first adder adds the Balancing the zero sequence voltage with the zero sequence voltage and generating a total zero sequence voltage; a limiter electrically connecting the first adder and receiving the total zero sequence voltage, the limiter limiting the total zero sequence voltage and outputting a limited total zero sequence voltage; and a plurality of second adders electrically coupled to the limiter, each of the second adders adding one of the voltage commands to the limited total zero sequence voltage. The voltage balance control system of claim 1, wherein the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage and a space vector region parameter. a linear parameter, the first DC voltage, the second DC voltage, a total DC voltage, the indication current, and a length of time, the zero sequence voltage is represented as V ₀ , and the space vector region parameter is represented as k _region , The linear parameter is denoted as K _q , the first DC voltage is denoted as V _dcu , the second DC voltage is denoted as V _dcd , the total DC voltage is expressed as V _dc , and the indicated current is expressed as i _x , and the time length is expressed as T _s , the capacitor voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1. A voltage balance control method for controlling a complex voltage command of a balanced-neutral point clamp converter, the voltage balance control method comprising the following steps: a comparison voltage command step, using a voltage command to compare the module displacement portions Voltage command voltage level and comparing the magnitudes of the voltage commands to obtain a maximum voltage command and a minimum voltage command; a step of generating a balanced zero sequence voltage, using a redundant vector balancing module to calculate the maximum voltage command and the The minimum voltage command generates a balanced zero sequence voltage; a step of generating a zero sequence voltage is performed by using a capacitor voltage balance control module to calculate a current from the neutral point clamp converter, a first DC voltage, and a first The two DC voltages are used to generate a zero sequence voltage; and a step of injecting the zero sequence voltage is performed by simultaneously injecting the balanced zero sequence voltage and the zero sequence voltage into the voltage commands of the neutral point clamp converter. The voltage balance control method according to claim 7, wherein the redundant vector balance module has an excess voltage balance operation function, and the redundant voltage balance operation function includes the balanced zero sequence voltage and a total DC voltage. a maximum voltage command and the minimum voltage command, the total DC voltage being equal to the first DC voltage plus the second DC voltage, the balanced zero sequence voltage being represented as V _0,bal , the total DC voltage being represented as V _dc , the maximum voltage The command is expressed as V _max , and the minimum voltage command is expressed as V _min , and the excess voltage balance operation function conforms to the following formula: The voltage balance control method according to claim 7, wherein the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage and a space vector region parameter. a total DC voltage, the indicated current, a charging energy difference, and a length of time, the zero sequence voltage is represented as V ₀ , the space vector region parameter is represented as k _region , and the total DC voltage is represented as V _dc , the indication The current is expressed as i _x , and the difference in charging energy is expressed as Δ Q , and the length of time is expressed as T _s , and the capacitance voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1. The voltage balance control method of claim 9, wherein the capacitor voltage balance control operation function further comprises a capacitance value, an absolute voltage difference value, the first DC voltage, and the second DC voltage, the capacitance value Expressed as C _dc , the absolute value of the voltage difference is expressed as |Δ V |, the first DC voltage is represented as V _dcu , and the second DC voltage is expressed as V _dcd , and the capacitance voltage balance control operation function conforms to the following formula: Where sgn is a logical function. The voltage balance control method of claim 7, wherein the step of injecting the zero sequence voltage further comprises: Using a first adder and a limiter to calculate the balanced zero-sequence voltage and the zero-sequence voltage to output a limited total zero-sequence voltage, and using the plurality of second adders to respectively add the voltage commands and the total after the limit Zero sequence voltage. The voltage balance control method according to claim 7, wherein the capacitor voltage balance control module has a capacitor voltage balance control operation function, and the capacitor voltage balance control operation function includes a zero sequence voltage and a space vector region parameter. a linear parameter, the first DC voltage, the second DC voltage, a total DC voltage, the indication current, and a length of time, the zero sequence voltage is represented as V ₀ , and the space vector region parameter is represented as k _region , The linear parameter is denoted as K _q , the first DC voltage is denoted as V _dcu , the second DC voltage is denoted as V _dcd , the total DC voltage is expressed as V _dc , and the indicated current is expressed as i _x , and the time length is expressed as T _s , the capacitor voltage balance control operation function conforms to the following formula: Where k _region is 1 or -1.