TWI499186B - Stacked high step-up converter - Google Patents
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Description
本發明是有關於一種電壓增壓轉換器，特別是指一種具有耦合電感並將漏電感能量輸出以增加轉換效率的具有高電壓增益之疊加式高增壓轉換器。The present invention relates to a voltage boost converter, and more particularly to a supercharged high boost converter having a high voltage gain having a coupled inductor and outputting leakage inductance energy to increase conversion efficiency.
在電池供電系統、不斷電系統、太陽能供電系統等都需要電壓增壓轉換器，然而，現有的轉換器不易達成高升壓比。為了使單級的升壓型轉換器能達到更高的升壓比，目前常用的是邱克轉換器，主要是以電容作為能量轉移中繼站，但是電容對其壽命之影響很大，不適合用於大電流大功率場合。若是使用耦合電感會產生漏電感的現象，無法有效利用漏電感能量。Voltage boost converters are required in battery-powered systems, uninterruptible power systems, solar power systems, etc. However, existing converters are not susceptible to high boost ratios. In order to achieve a higher boost ratio for a single-stage boost converter, the commonly used Qiuk converter is mainly a capacitor as an energy transfer relay station, but the capacitance has a great influence on its lifetime and is not suitable for use. High current and high power applications. If a coupled inductor is used, leakage inductance will occur, and the leakage inductance energy cannot be effectively utilized.
申請人為克服現有缺失，於本國申請號第102110071號專利申請案已提出一種具有耦合電感並將漏電感能量輸出以增加轉換效率的具有高電壓增益之升壓型轉換器，其電壓轉換效率為，符合高電壓增益之需求。然而，申請人為了精益求精，擬提出另一種不同電壓轉換效率的高增壓轉換器。In order to overcome the existing deficiencies, the applicant has proposed a boost converter having a high voltage gain with a coupled inductor and a leakage inductance energy output to increase the conversion efficiency in the patent application No. 102110071, the voltage conversion efficiency of which is , in line with the needs of high voltage gain. However, in order to strive for excellence, the applicant intends to propose another high-pressure converter with different voltage conversion efficiency.
因此，本發明之目的，即在提供一種疊加式高增壓轉換器。Accordingly, it is an object of the present invention to provide a superimposed high boost converter.
於是，本發明疊加式高增壓轉換器包含一輸入端及一輸出端，並包含一升壓電路及一箝制電路；該升壓電路具有一第一開關，電性連接該輸入端及該輸出端之間，該箝制電路包括一第二開關及一箝制電容；其特徵在於：該升壓電路還包括一耦合繞組及複數轉換單元。Therefore, the superimposed high-boost converter of the present invention comprises an input terminal and an output terminal, and includes a booster circuit and a clamp circuit; the booster circuit has a first switch electrically connected to the input terminal and the output The clamping circuit includes a second switch and a clamping capacitor. The boosting circuit further includes a coupling winding and a complex conversion unit.
該耦合繞組具有一耦接該輸入端的打點端及一耦接該第一開關及該第二開關之間的非打點端；各該轉換單元具有一繞組、一轉移二極體及一升壓電容，各該繞組具有一耦接各該升壓電容的一端的打點端及一耦接各該轉移二極體的陰極的非打點端，且該等繞組係以各該繞組的打點端耦接另一繞組的非打點端的方式彼此疊接。The coupling winding has a dot end coupled to the input end and a non-draining end coupled between the first switch and the second switch; each of the conversion units has a winding, a transfer diode and a boost capacitor Each of the windings has a dot end coupled to one end of each of the boosting capacitors and a non-draining end coupled to a cathode of each of the transfer diodes, and the windings are coupled to the dot ends of the windings The non-tapped ends of one winding are stacked one on another.
較佳的，該等轉換單元包括一第一轉換單元及一第二轉換單元。Preferably, the conversion units comprise a first conversion unit and a second conversion unit.
該第一轉換單元具有一第一繞組、一第一轉移二極體及一第一升壓電容，該第一繞組具有一耦接該第一升壓電容的一端的打點端及一耦接該第一轉移二極體的陰極的非打點端，該第一升壓電容的另一端耦接該耦合繞組的非打點端，該第一轉移二極體的陽極耦接該耦合繞組的打點端；該第二轉換單元具有一第二繞組、一第二轉移二極體及一第二升壓電容，該第二繞組具有一耦接該第二升壓電容的一端的打點端及一耦接該第二轉移二極體的陰極 的非打點端，該第二升壓電容的另一端耦接該第一繞組的非打點端，該第二轉移二極體的陽極耦接該第一繞組的打點端。The first conversion unit has a first winding, a first transfer diode, and a first boost capacitor. The first winding has a dot end coupled to one end of the first boost capacitor and a coupling end a non-draining end of the cathode of the first transfer diode, the other end of the first boosting capacitor is coupled to the non-tapping end of the coupling winding, and an anode of the first transfer diode is coupled to the striking end of the coupling winding; The second conversion unit has a second winding, a second switching diode, and a second boosting capacitor. The second winding has a dot end coupled to one end of the second boosting capacitor and a coupling end. Cathode of the second transfer diode The other end of the second boosting capacitor is coupled to the non-tapping end of the first winding, and the anode of the second diverting diode is coupled to the striking end of the first winding.
較佳的，所述的疊加式高增壓轉換器還包括一輸出電路，該輸出電路具有一輸出二極體及一輸出電容，該輸出二極體的陽極耦接該第二繞組的非打點端，該輸出二極體的陰極耦接該輸出端，該輸出電容的一端耦接該輸出端及另一端接地。Preferably, the superimposed high-boost converter further includes an output circuit having an output diode and an output capacitor, and an anode of the output diode is coupled to the non-doped portion of the second winding The cathode of the output diode is coupled to the output end, and one end of the output capacitor is coupled to the output end and the other end is grounded.
本發明疊加式高增壓轉換器之功效在於升壓電路的耦合繞組及多個轉換單元可將漏電感能量輸出並提升轉換效率而可以獲得高電壓增益。The effect of the superimposed high-boost converter of the present invention is that the coupled winding of the boosting circuit and the plurality of converting units can output the leakage inductance energy and improve the conversion efficiency to obtain a high voltage gain.
100‧‧‧疊加式高增壓轉換器100‧‧‧Stacked high boost converter
101‧‧‧輸入端101‧‧‧ input
111‧‧‧輸出端111‧‧‧ Output
1‧‧‧升壓電路1‧‧‧Boost circuit
11‧‧‧第一轉換單元11‧‧‧First conversion unit
12‧‧‧第二轉換單元12‧‧‧Second conversion unit
2‧‧‧箝制電路2‧‧‧Clamping circuit
3‧‧‧輸出電路3‧‧‧Output circuit
51‧‧‧第一開關51‧‧‧First switch
52‧‧‧第二開關52‧‧‧second switch
C1 ‧‧‧第一升壓電容C 1 ‧‧‧First boost capacitor
C2 ‧‧‧第二升壓電容C 2 ‧‧‧second boost capacitor
Cb ‧‧‧箝制電容C b ‧‧‧Clamping capacitor
Co ‧‧‧輸出電容C o ‧‧‧output capacitor
D1 ‧‧‧第一轉移二極體D 1 ‧‧‧First transfer diode
D2 ‧‧‧第二轉移二極體D 2 ‧‧‧Second transfer diode
Do ‧‧‧輸出二極體D o ‧‧‧ output diode
Db1 、Db2 ‧‧‧本體二極體D b1 , D b2 ‧‧‧ body diode
N0 ‧‧‧耦合繞組N 0 ‧‧‧Coupled winding
N1 ‧‧‧第一繞組N 1 ‧‧‧first winding
N2 ‧‧‧第二繞組N 2 ‧‧‧second winding
Q1 ‧‧‧第一場效電晶體Q 1 ‧‧‧First effect transistor
Q2 ‧‧‧第二場效電晶體Q 2 ‧‧‧Second effect transistor
本發明之其他的特徵及功效，將於參照圖式的實施方式中清楚地呈現，其中：圖1是一電路圖，說明本發明的疊加式高增壓轉換器之較佳實施例；圖2至圖7是一電路圖，說明各元件分別在第一狀態至第六狀態的電流方向及產生的電流/電壓；圖8至圖16是一波形圖，說明本發明的具有高電壓增益之升壓型轉換器之各種元件在不同輸入電壓條件下的電壓/電流的詳細波形；及圖17是一曲線圖，說明本發明的具有高電壓增益之升壓型轉換器在不同輸入電壓條件下的不同負載電流之轉換效率。Other features and advantages of the present invention will be apparent from the embodiments of the present invention, wherein: FIG. 1 is a circuit diagram illustrating a preferred embodiment of the superimposed high boost converter of the present invention; 7 is a circuit diagram showing current directions and generated currents/voltages of the respective elements in the first state to the sixth state, respectively; FIG. 8 to FIG. 16 are waveform diagrams illustrating the boost type having high voltage gain of the present invention. Detailed waveform of voltage/current of various components of the converter under different input voltage conditions; and FIG. 17 is a graph illustrating different loads of the boost converter with high voltage gain of the present invention under different input voltage conditions Current conversion efficiency.
參閱圖1，本發明之較佳實施例中，疊加式高增壓轉換器100包含一輸入端101及一輸出端111，並包含一升壓電路1、一箝制電路2及一輸出電路3；升壓電路1電性連接輸入端101及輸出端111之間，具有一第一開關51、一耦合繞組N0 及複數轉換單元11、12，該箝制電路2包括一第二開關52及一箝制電容Cb 。Referring to Figure 1, in a preferred embodiment of the present invention, the superimposed high-pressure converter 100 includes an input terminal 101 and an output terminal 111, and includes a booster circuit 1, a clamp circuit 2 and an output circuit 3; The boosting circuit 1 is electrically connected between the input terminal 101 and the output terminal 111, and has a first switch 51, a coupling winding N 0 and a plurality of converting units 11 and 12. The clamping circuit 2 includes a second switch 52 and a clamping device. Capacitor C b .
第一開關51具有一第一場效電晶體Q1 及一本體二極體Db1 ，其中，第一場效電晶體Q1 的汲極及源極之間連接該本體二極體Db1 ，第一場效電晶體Q1 的閘極受脈波驅動訊號控制在導通/不導通狀態；第二開關52具有一第二場效電晶體Q2 及一本體二極體Db2 ，第二場效電晶體Q2 的汲極端及源極端之間連接該本體二極體Db2 ，第二場效電晶體Q2 的閘極受脈波驅動訊號控制在導通/不導通狀態。。The first switch 51 has a first field effect transistor Q 1 and a body diode D b1 , wherein the body diode D 1 is connected between the drain and the source of the first field effect transistor Q 1 . The gate of the first field effect transistor Q 1 is controlled in a conducting/non-conducting state by the pulse wave driving signal; the second switch 52 has a second field effect transistor Q 2 and a body diode D b2 , the second field connected to the body diode D b2 between the drain terminal and the source terminal of the FET 2 Q, Q of the second field effect transistor the gate electrode 2 is driven by the pulse signal controlling the conduction / non-conduction state. .
耦合繞組N0 具有一耦接輸入端101的打點端及一耦接第一開關51及第二開關52之間的非打點端；各轉換單元具有一繞組N1 、N2 、一轉移二極體D1 、D2 及一升壓電容C1 、C2 ，各繞組N1 、N2 具有一耦接各升壓電容C1 、C2 的一端的打點端及一耦接各轉移二極體D1 、D2 的陰極的非打點端，且該等繞組N1 、N2 係以各繞組N1 、N2 的打點端耦接另一繞組N0 、N1 的非打點端的方式彼此疊接。The coupling winding N 0 has a striking end coupled to the input end 101 and a non-tapping end coupled between the first switch 51 and the second switch 52; each converting unit has a winding N 1 , N 2 , and a transfer dipole The body D 1 , D 2 and a boosting capacitor C 1 , C 2 , each winding N 1 , N 2 has a striking end coupled to one end of each of the boosting capacitors C 1 , C 2 and a coupling dipole body D 1, D 2 of a non-dot end of the cathode, and such winding N 1, N 2 line to the windings N 1, N 2 RBI terminal coupled to another winding N 0, N 1 of the non-dot end of one another Laminated.
本較佳實施例中，該等轉換單元包括一第一轉換單元11及一第二轉換單元12。但需特別說明的是，其他實施例中，轉換單元的數量可以更多，只要是轉換單元以 各繞組的打點端耦接另一繞組的非打點端，配合轉移二極體、升壓電容是交錯疊接的方式，亦屬於本發明的範疇。In the preferred embodiment, the conversion units include a first conversion unit 11 and a second conversion unit 12. However, it should be particularly noted that in other embodiments, the number of conversion units may be more, as long as it is a conversion unit. It is also within the scope of the present invention that the dot end of each winding is coupled to the non-tapping end of the other winding, and the transfer diode and the boosting capacitor are interleaved.
第一轉換單元11具有一第一繞組N1 、一第一轉移二極體D1 及一第一升壓電容C1 ，第一繞組N1 具有一耦接第一升壓電容C1 的一端的打點端及一耦接第一轉移二極體D1 的陰極的非打點端，第一升壓電容C1 的另一端耦接耦合繞組N0 的非打點端，第一轉移二極體D1 的陽極耦接耦合繞組N0 的打點端。The first conversion unit 11 has a first winding N 1 , a first transfer diode D 1 and a first boost capacitor C 1 . The first winding N 1 has an end coupled to the first boost capacitor C 1 . The other end of the first boosting capacitor C 1 is coupled to the non-tapping end of the coupling winding N 0 , and the first switching diode D is connected to the non-injecting end of the cathode of the first transfer diode D 1 . The anode of 1 is coupled to the dot end of the coupling winding N 0 .
第二轉換單元12具有一第二繞組N2 、一第二轉移二極體D2 及一第二升壓電容C2 ，第二繞組N2 具有一耦接第二升壓電容C2 的一端的打點端及一耦接第二轉移二極體D2 的陰極的非打點端，第二升壓電容C2 的另一端耦接第一繞組N1 的非打點端，第二轉移二極體D2 的陽極耦接第一繞組N1 的打點端。The second conversion unit 12 has a second winding N 2 , a second transfer diode D 2 and a second boost capacitor C 2 , and the second winding N 2 has an end coupled to the second boost capacitor C 2 . The other end of the second boosting capacitor C 2 is coupled to the non-tapping end of the first winding N 1 , and the second diverting diode is connected to the non-draining end of the cathode of the second transfer diode D 2 . The anode of D 2 is coupled to the dot end of the first winding N 1 .
輸出電路3具有一輸出二極體Do 及一輸出電容Co ，輸出二極體Do 的陽極耦接第二繞組N2 的非打點端，輸出二極體Do 的陰極耦接輸出端111，輸出電容Co 的一端耦接輸出端111及另一端接地。The output circuit 3 has an output diode D o and an output capacitor C o , the anode of the output diode D o is coupled to the non-tapped end of the second winding N 2 , and the cathode of the output diode D o is coupled to the output end 111. One end of the output capacitor C o is coupled to the output end 111 and the other end is grounded.
以下配合圖1，分別以圖2至圖7說明發明疊加式高增壓轉換器100操作於連續導通模式在一個工作週期中的六種狀態。In the following, with reference to Fig. 1, the six states in which the superposition type supercharger converter 100 operates in the continuous conduction mode in one duty cycle will be described with reference to Figs. 2 to 7, respectively.
參閱圖2，第一狀態(T0 ~T1 )下，第一場效電晶體Q1 導通，但第二場效電晶體Q2 不導通；在此狀態下，第一轉移二極體D1 順偏(forward biased)，耦合繞組N0 對第一 升壓電容C1 充電，第一升壓電容C1 的電壓VC1 如公式1。同時，耦合繞組N0 被磁化使得電流iN1 增加，輸出電容Co 能量供應給負載，因為繞組洩漏能量，第一升壓電容C1 的電壓VC1 逐漸增加。Referring to FIG. 2, in the first state (T 0 ~ T 1 ), the first field effect transistor Q 1 is turned on, but the second field effect transistor Q 2 is not turned on; in this state, the first transfer diode D is a forward bias (forward biased), the first coupling winding N 0 charging the boost capacitor C 1, the capacitor boosting a first voltage V 1 is C1 to C as shown in equation 1. At the same time, the coupling winding N 0 is magnetized such that the current i N1 is increased, and the output capacitance C o energy is supplied to the load, and the voltage V C1 of the first boosting capacitor C 1 is gradually increased because of the winding leakage energy.
參閱圖3，第二狀態(T1 ~T2 )下，第一場效電晶體Q1 仍然維持導通且第二場效電晶體Q2 仍然維持不導通；在此狀態下，第一轉移二極體D1 順偏，耦合繞組N0 對第一升壓電容C1 充電，升壓電容C1 的電壓VC1 如公式1，同時，第二轉移二極體D2 順偏，第一繞組N1 對於第二升壓電容C2 充電，第二升壓電容C2 的電壓VC2 如公式2。同時，耦合繞組N0 被磁化使得電流iN1 增加，輸出電容Co 能量供應給負載，因為繞組洩漏能量，第一升壓電容C1 的電壓VC1 及第二升壓電容C2 的電壓VC2 逐漸增加。Referring to FIG. 3, in the second state (T 1 ~ T 2 ), the first field effect transistor Q 1 remains conductive and the second field effect transistor Q 2 remains non-conductive; in this state, the first transfer two The pole body D 1 is biased, the coupling winding N 0 charges the first boosting capacitor C 1 , the voltage V C1 of the boosting capacitor C 1 is as shown in formula 1, and the second shifting diode D 2 is biased, the first winding N 1 for charging a second boost capacitor C 2, C a second boosting capacitor C2 of the voltage V 2 as shown in equation 2. At the same time, the coupling winding N 0 is magnetized so that the current i N1 is increased, and the output capacitor C o energy is supplied to the load because the winding leakage energy, the voltage V C1 of the first boosting capacitor C 1 and the voltage V of the second boosting capacitor C 2 C2 is gradually increasing.
參閱圖4，第三狀態(T2 ~T3 )下，第一場效電晶體Q1 仍然維持導通且第二場效電晶體Q2 仍然維持不導通；在此狀態下，第一轉移二極體D1 逆偏，第一升壓電容C1 的電壓VC1 接近公式1。第一繞組N1 停止對第一升壓電容C1 充電，但第二繞組N2 持續對第二升壓電容C2 充電，輸出電容Co 能量供應給負載。Referring to FIG. 4, in the third state (T 2 ~T 3 ), the first field effect transistor Q 1 remains conductive and the second field effect transistor Q 2 remains non-conductive; in this state, the first transfer two The polar body D 1 is reverse biased, and the voltage V C1 of the first boosting capacitor C 1 is close to the formula 1. The first winding N 1 stops charging the first boost capacitor C 1 , but the second winding N 2 continues to charge the second boost capacitor C 2 , and the output capacitor C o is supplied to the load.
以上在第一場效電晶體Q1 導通且第二場效電晶體Q2 不導通的狀態下，箝制電容Cb 的電壓VCb 如公式3所示。In the above state in which the first field effect transistor Q 1 is turned on and the second field effect transistor Q 2 is not turned on, the voltage V Cb of the clamp capacitor C b is as shown in Equation 3.
參閱圖5，第四狀態(T3 ~T4 )下，第一場效電晶體Q1 為不導通及第二場效電晶體Q2 為導通；在此狀態下，能量儲存於耦合繞組N0 ，包含磁化及洩漏的電感被釋放給箝制電容Cb ，第二繞組N2 持續對第二升壓電容C2 充電，輸出電容Co 能量供應給負載。Referring to FIG. 5, in the fourth state (T 3 ~ T 4 ), the first field effect transistor Q 1 is non-conducting and the second field effect transistor Q 2 is conducting; in this state, energy is stored in the coupling winding N 0, and the leakage inductance comprising a magnetic clamp is released to the capacitance C b, the second winding N 2 of the second continuous charging boost capacitor C 2, the output capacitor C o the energy supplied to the load.
參閱圖6，第五狀態(T4 ~T5 )下，第一場效電晶體Q1 不導通及第二場效電晶體Q2 導通；在此狀態下，輸入電壓Vin 和儲存在耦合繞組N0 、第一升壓電容C1 、第二升壓電容C2 、第一繞組N1 、第二繞組N2 的能量經輸出二極體Do 轉移至負載。此外，電流iN1 傳輸至箝制電容Cb ，值得注意的是在耦合繞組N0 及箝制電容Cb 之間存在波形震盪。Referring to FIG. 6, in the fifth state (T 4 ~ T 5 ), the first field effect transistor Q 1 is not turned on and the second field effect transistor Q 2 is turned on; in this state, the input voltage V in is stored and coupled. The energy of the winding N 0 , the first boosting capacitor C 1 , the second boosting capacitor C 2 , the first winding N 1 , and the second winding N 2 is transferred to the load via the output diode D o . In addition, the current i N1 is transmitted to the clamp capacitor C b , and it is worth noting that there is a waveform oscillation between the coupled winding N 0 and the clamp capacitor C b .
參閱圖7，第六狀態(T5 ~T6 )下，第一場效電晶體Q1 仍不導通及第二場效電晶體Q2 仍導通；在此狀態下，輸入電壓Vin 和儲存在耦合繞組N0 、第一升壓電容C1 、第二升壓電容C2 、第一繞組N1 、第二繞組N2 的能量經輸出二極體Do 轉移至負載，同時，箝制電容Cb 的電流為0。此狀態結束後，重複下一個工作週期。Referring to FIG. 7, in the sixth state (T 5 ~ T 6 ), the first field effect transistor Q 1 is still not turned on and the second field effect transistor Q 2 is still turned on; in this state, the input voltage V in and the storage The energy of the coupling winding N 0 , the first boosting capacitor C 1 , the second boosting capacitor C 2 , the first winding N 1 , and the second winding N 2 is transferred to the load through the output diode D o , and at the same time, the capacitor is clamped The current of C b is zero. After this state is over, repeat the next work cycle.
以上在第一場效電晶體Q1 不導通且第二場效電晶體Q2 導通的狀態下，箝制電容Cb 的電壓vCb 如公式3所示。In the above state in which the first field effect transistor Q 1 is not turned on and the second field effect transistor Q 2 is turned on, the voltage v Cb of the clamp capacitor C b is as shown in Equation 3.
依據前述公式，可改寫如下。According to the foregoing formula, it can be rewritten as follows.
耦合繞組N0 、第一繞組N1 、第二繞組N2 以匝數比1：2：2帶入公式7，結果如公式8。The coupling winding N 0 , the first winding N 1 , and the second winding N 2 are brought into Equation 7 with a turns ratio of 1:2:2, and the result is as Equation 8.
因此，電壓轉換效能如公式9所示。Therefore, the voltage conversion efficiency is as shown in Equation 9.
本較佳實施例中，疊加式高增壓轉換器100的元件規格為：(i)輸入電壓16伏特至24伏特；(ii)輸出電壓190伏特；(iii)輸出電流0.8安培；(iv)最小輸出電流0.2安培；(v)開關頻率為80kHz；(vi)第一升壓電容C1 及第二升壓電容C2 選用4.7μF/100伏特(TDK MLLC)電容；(vii) 輸出電容C0 採用100μF/250伏特(Chemicon electrolytic)電容；(viii)箝制電容Cb 採用330μF/63伏特(Rubycon electrolytic)電容；(ix)第一轉移二極體D1 及第二轉移二極體D2 選用MUR820A；(x)輸出二極體Do 選用DPG10I300PA；(xi)第一場效電晶體Q1 選用IRF3710ZS及第二場效電晶體Q2 選用IRF540；(xii)產生脈波驅動訊號的閘極驅動器(圖未示)是選用HIP2101；(xiii)匝數12圈的耦合繞組N0 的自感為19.3μH，匝數24圈的第一繞組N1 、第二繞組N2 的自感為80μH；及(xiv)FPGA控制晶片是選用EP1C3T100。In the preferred embodiment, the component specifications of the stacked high boost converter 100 are: (i) an input voltage of 16 volts to 24 volts; (ii) an output voltage of 190 volts; (iii) an output current of 0.8 amps; (iv) The minimum output current is 0.2 amps; (v) the switching frequency is 80 kHz; (vi) the first boost capacitor C 1 and the second boost capacitor C 2 select 4.7 μF/100 volt (TDK MLLC) capacitor; (vii) output capacitor C 0 uses a 100 μF/250 volt (Chemicon electrolytic) capacitor; (viii) a clamp capacitor C b uses a 330 μF/63 volt (Rubycon electrolytic) capacitor; (ix) a first transfer diode D 1 and a second transfer diode D 2 Use MUR820A; (x) output diode D o select DPG10I300PA; (xi) first field effect transistor Q 1 select IRF3710ZS and second field effect transistor Q 2 use IRF540; (xii) generate pulse drive signal gate The pole driver (not shown) is HIP2101; (xiii) the coupling winding N 0 of 12 turns has a self-inductance of 19.3 μH, and the self-inductance of the first winding N 1 and the second winding N 2 of 24 turns is The 80μH; and (xiv) FPGA control chip is EP1C3T100.
參閱圖8至10，為依據前述規格所量測負載電流為100%，各圖分別表示輸入電壓Vin 為16伏、20伏及24伏的第一場效電晶體Q1 的脈波驅動訊號之電壓vgs1 、第一升壓電容C1 的電壓vC1 、第二升壓電容C2 的電壓vC2 及箝制電容Cb 的電壓vCb 的波形。Referring to Figures 8 to 10, the load current is 100% measured according to the foregoing specifications, and each figure represents the pulse drive signal of the first field effect transistor Q 1 having an input voltage V in of 16 volts, 20 volts, and 24 volts, respectively. the voltage V GS1, the first voltage boost capacitor C v C1 1, the second voltage boost capacitor C v 2 C2 of capacitance C b and the clamp voltage waveform v Cb.
參閱圖11至13，依據前述規格所量測負載電流為100%，各圖分別表示輸入電壓Vin 為16伏、20伏及24伏的第一場效電晶體Q1 的脈波驅動訊號之電壓vgs1 、第一轉移二極體D1 的電壓vD1 、第二轉移二極體D2 的電壓vD2 及輸出二極體Do 的電壓vDo 的波形。Referring to Figures 11 to 13, the load current measured according to the above specifications is 100%, and each figure represents the pulse drive signal of the first field effect transistor Q 1 having an input voltage V in of 16 volts, 20 volts and 24 volts, respectively. voltage V GS1, the first transfer voltage of diode D v D1 1, the second transfer diode D and the voltage v D2 2 output diode D v Do O voltage waveform.
參閱圖14至16，依據前述規格所量測負載電流為100%，各圖分別表示輸入電壓Vin 為16伏、20伏及24伏的第一場效電晶體Q1 的脈波驅動訊號之電壓vgs1 、耦合繞組N0 的電流iN1 、第一繞組N1 的電流iN2 及第二繞組N2 的電流iN3 的波形。Referring to Figures 14 to 16, the load current measured according to the foregoing specifications is 100%, and each figure represents the pulse drive signal of the first field effect transistor Q 1 having an input voltage V in of 16 volts, 20 volts, and 24 volts, respectively. voltage V GS1, N coupling winding current i N1 0, the current i N. 1 first winding and a second winding N2 of a current of N 2 i waveform N3.
參閱圖17，額定負載電流的轉換效率在輕載狀態下的轉換效率可達95.6%，另外，在不同輸入電壓Vin 及輸出電流的情況下，其變化對於元件的影響輕微，適用於各種工業產品。Referring to Figure 17, the conversion efficiency of the rated load current can reach 95.6% under light load conditions. In addition, the variation of the input voltage V in and the output current has a slight influence on the components, which is suitable for various industries. product.
綜上所述，本發明的疊加式高增壓轉換器100之功效在於：升壓電路1的耦合繞組N0 及多個轉換單元11、12配合箝制電路2可將漏電感能量輸出並提升轉換效率而可以獲得高電壓增益，故確實能達成本發明之目的。In summary, the function of the superimposed high-pressure converter 100 of the present invention is that the coupling winding N 0 of the boosting circuit 1 and the plurality of converting units 11 and 12 cooperate with the clamping circuit 2 to output and improve the leakage inductance energy. The high voltage gain can be obtained with efficiency, so the object of the present invention can be achieved.
惟以上所述者，僅為本發明之較佳實施例而已，當不能以此限定本發明實施之範圍，即大凡依本發明申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾，皆仍屬本發明專利涵蓋之範圍內。The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the patent application scope and patent specification content of the present invention, All remain within the scope of the invention patent.
100‧‧‧疊加式高增壓轉換器100‧‧‧Stacked high boost converter
101‧‧‧輸入端101‧‧‧ input
111‧‧‧輸出端111‧‧‧ Output
1‧‧‧升壓電路1‧‧‧Boost circuit
11‧‧‧第一轉換單元11‧‧‧First conversion unit
12‧‧‧第二轉換單元12‧‧‧Second conversion unit
2‧‧‧箝制電路2‧‧‧Clamping circuit
3‧‧‧輸出電路3‧‧‧Output circuit
51‧‧‧第一開關51‧‧‧First switch
52‧‧‧第二開關52‧‧‧second switch
C1 ‧‧‧第一升壓電容C 1 ‧‧‧First boost capacitor
C2 ‧‧‧第二升壓電容C 2 ‧‧‧second boost capacitor
Cb ‧‧‧箝制電容C b ‧‧‧Clamping capacitor
Co ‧‧‧輸出電容C o ‧‧‧output capacitor
D1 ‧‧‧第一轉移二極體D 1 ‧‧‧First transfer diode
D2 ‧‧‧第二轉移二極體D 2 ‧‧‧Second transfer diode
Do ‧‧‧輸出二極體D o ‧‧‧ output diode
Db1 、Db2 ‧‧‧本體二極體D b1 , D b2 ‧‧‧ body diode
N0 ‧‧‧耦合繞組N 0 ‧‧‧Coupled winding
N1 ‧‧‧第一繞組N 1 ‧‧‧first winding
N2 ‧‧‧第二繞組N 2 ‧‧‧second winding
Q1 ‧‧‧第一場效電晶體Q 1 ‧‧‧First effect transistor
Q2 ‧‧‧第二場效電晶體Q 2 ‧‧‧Second effect transistor
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7333349B2 (en) * | 2004-03-31 | 2008-02-19 | University Of New Brunswick | Single-stage buck-boost inverter |
| TWI360284B (en) * | 2008-10-07 | 2012-03-11 | Univ Hungkuang | |
| TWI376085B (en) * | 2008-12-17 | 2012-11-01 | Univ Nat Taipei Technology |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7333349B2 (en) * | 2004-03-31 | 2008-02-19 | University Of New Brunswick | Single-stage buck-boost inverter |
| TWI360284B (en) * | 2008-10-07 | 2012-03-11 | Univ Hungkuang | |
| TWI376085B (en) * | 2008-12-17 | 2012-11-01 | Univ Nat Taipei Technology |
Non-Patent Citations (1)
| Title |
|---|
| S. K. Changchien, T. J. Liang, J. F. Chen, and L. S. Yang,"Novel High Step-Up DC–DC Converter for Fuel Cell Energy Conversion System," IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 6, JUNE 2010. Y. P. Hsieh, T. F. Chen, T. J. Liang , and L. S. Yang," A Novel High Step-Up DC–DC Converter for a Microgrid System," IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4, APRIL 2011. * |
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