TWI403877B - A power module and a power supply with the power module - Google Patents
A power module and a power supply with the power module Download PDFInfo
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Description
本發明係關於一種功率模組,尤指一種具有工作時間損耗電路之功率模組。The invention relates to a power module, in particular to a power module with a working time loss circuit.
請參閱第一圖,第一圖係為習知技術之功率模組示意圖。習知技術之功率模組100係包括一個相對責任週期(duty cycle)控制單元11,相對責任週期控制單元11係用以自外部電源接收輸入電能Vin後,透過調整相對責任週期而輸出一個輸出電能,而目前市面上的相對責任週期控制單元11於使用時皆具有一個下限相對責任週期,換以言之即是輸出電能係具有一個最小值,當相對責任週期控制單元11將相對責任週期調整至下限相對責任週期時,功率模組100即輸出一個原始最小輸出電能Va。Please refer to the first figure. The first figure is a schematic diagram of a power module of the prior art. The power module 100 of the prior art includes a relative duty cycle control unit 11 for receiving an output power from the external power source after receiving the input power Vin. The current relative duty cycle control unit 11 has a lower limit relative duty cycle in use, in other words, the output power system has a minimum value, and the relative duty cycle control unit 11 adjusts the relative duty cycle to When the lower limit is relative to the duty cycle, the power module 100 outputs an original minimum output electrical energy Va.
而在許多領域當中常常需要使用到高電壓,一般的作法則是串聯多個功率模組100來達成,舉例而言,當一個電源供應器串聯了三個功率模組100時,則可以於輸出端獲得三個功率模組100之輸出電能之累加值,然而,當工作需要使用到低電壓時,由於每一個功率模組100中之責任週期控制單元11都具有下限相對責任週期,因此整個電源供應器所能提供的最小輸出電能則為三倍的原始最小輸出電能Va。In many fields, high voltage is often required. The general method is to connect multiple power modules 100 in series. For example, when one power supply is connected in series with three power modules 100, it can be output. The terminal obtains the accumulated value of the output power of the three power modules 100. However, when the operation requires the use of a low voltage, since the duty cycle control unit 11 in each power module 100 has a lower limit relative duty cycle, the entire power supply The minimum output power that the supplier can provide is three times the original minimum output power Va.
為了解決最小輸出電能過高的問題,習知技術係利用降頻的方式來降低每一功率模組100的原始最小輸出電能Va,然而在電子產品中,防電磁干擾(Electromagnetic Interference;EMI)多半是針對部份頻率的雜訊而設計,因此於電源供應器降頻的同時就會導致防電磁干擾的效果降低,進而影響電子產品的效能。In order to solve the problem of excessive output power consumption, the conventional technology uses the frequency reduction method to reduce the original minimum output power Va of each power module 100. However, in electronic products, the electromagnetic interference (EMI) is mostly used. It is designed for some frequencies of noise, so the frequency reduction of the power supply will lead to a reduction in the effectiveness of anti-electromagnetic interference, which in turn affects the performance of electronic products.
緣此,本發明之主要目的係提供一種具有工作時間損耗電路之功率模組,以延遲原始最小輸出電能之起始工作時間,進而使功率模組能夠輸出一個小於原始最小輸出電能之最小輸出電能。Accordingly, the main object of the present invention is to provide a power module having a working time loss circuit to delay the initial working time of the original minimum output power, thereby enabling the power module to output a minimum output power smaller than the original minimum output power. .
一種功率模組係用以自外部電源接收一輸入電能,並據以傳送最小輸出電能,此功率模組係包含相對責任週期控制單元與工作時間損耗電路;相對責任週期控制單元係用以接收輸入電能,並將相對責任週期設定至一下限相對責任週期,藉以在運作週期中之一起始工作時間,開始以高電位輸出原始最小輸出電能;工作時間損耗電路係電性連結於相對責任週期控制單元以接收原始最小輸出電能,並延遲起始工作時間,藉以利用一小於下限相對責任週期之殘餘相對責任週期,輸出最小輸出電能。A power module is configured to receive an input power from an external power source and to transmit a minimum output power, the power module includes a relative duty cycle control unit and a working time loss circuit; and a relative duty cycle control unit is configured to receive the input The electric energy, and the relative duty cycle is set to a lower limit relative duty cycle, so that at the initial working time of one of the operating cycles, the original minimum output electric energy is outputted at a high potential; the working time loss circuit is electrically connected to the relative duty cycle control unit. The minimum output power is received by receiving the original minimum output power and delaying the initial working time, thereby utilizing a residual relative duty cycle that is less than the lower limit relative duty cycle.
於本發明之一較佳實施例中,該工作時間損耗電路係具有用以接收原始最小輸出電能之輸入端,以及用以輸出最小輸出電能之輸出端,並包括二極體、電阻與電容;二極體係具有陽極與陰極,陽極係電性連結於輸出端,陰極係電性連結於輸入端;電阻係電性連結於輸出端與輸入端之間,並與二極體呈並聯;電容係電性連結於輸出端與接地端。In a preferred embodiment of the present invention, the working time loss circuit has an input end for receiving the original minimum output power, and an output end for outputting the minimum output power, and includes a diode, a resistor and a capacitor; The two-pole system has an anode and a cathode, the anode is electrically connected to the output end, the cathode is electrically connected to the input end, and the resistor is electrically connected between the output end and the input end, and is connected in parallel with the diode; Electrically connected to the output terminal and the ground terminal.
相較於習知之功率模組,本發明利用一個工作時間損耗電路,藉以延遲原始最小輸出電能之起始工作時間,因此可利用小於下限相對責任週期之殘餘相對責任週期,輸出小於原始最小輸出電能之最小輸出電能,換以言之,當電源供應器串聯多個本發明之功率模組時,即可使輸出電能之最小值小於每一功率模組之原始最小輸出電能之累加值,並得以將電源供應器應用於低電壓輸出之用途中。Compared with the conventional power module, the present invention utilizes a working time loss circuit to delay the initial working time of the original minimum output power, so that the residual relative duty cycle less than the lower limit relative duty cycle can be utilized, and the output is smaller than the original minimum output power. The minimum output power, in other words, when the power supply is connected in series with the power modules of the present invention, the minimum value of the output power can be less than the accumulated value of the original minimum output power of each power module, and Apply the power supply to low voltage output applications.
本發明所採用的具體實施例,將藉由以下之實施例及圖式作進一步之說明。The specific embodiments of the present invention will be further described by the following examples and drawings.
本發明係關於一種功率模組,尤指一種具有工作時間損耗電路之功率模組。以下茲列舉一較佳實施例以說明本發明,然熟習此項技藝者皆知此僅為舉例,而並非用以限定發明本身。有關此較佳實施例之內容詳述如下。The invention relates to a power module, in particular to a power module with a working time loss circuit. The invention is illustrated by the following description of the preferred embodiments of the invention. The contents of this preferred embodiment are detailed below.
請參閱第二圖、第三圖與第四圖,第二圖係為本發明之功率模組之功能方塊示意圖,第三圖係為工作時間損耗電路接收原始最小輸出電能並輸出最小輸出電能之第一示意圖,第四圖係為工作時間損耗電路接收原始最小輸出電能並輸出最小輸出電能之第二示意圖。本發明之功率模組200係用以自外部電源接收一輸入電能Vin,並據以傳送最小輸出電能Voa,min,此功率模組200係包括相對責任週期控制單元21與工作時間損耗電路22。Please refer to the second, third and fourth figures. The second figure is a functional block diagram of the power module of the present invention. The third figure is the working time loss circuit receiving the original minimum output power and outputting the minimum output power. The first schematic diagram, the fourth diagram is a second schematic diagram of the working time loss circuit receiving the original minimum output power and outputting the minimum output power. The power module 200 of the present invention is configured to receive an input power Vin from an external power source and to transmit a minimum output power Voa, min. The power module 200 includes a relative duty cycle control unit 21 and a working time loss circuit 22.
相對責任週期控制單元21係用以接收輸入電能Vin,並將相對責任週期設定至一下限相對責任週期,藉以在運作週期中之一起始工作時間,開始以高電位輸出原始最小輸出電能Va;以第三圖為例,每一運作週期之時間為Ta,而當相對責任週期控制單元21將相對責任週期設定至一下限相對責任週期時,若一個運作週期內高電位之時間總和為Tb,則下限相對責任週期即為Tb/Ta。The relative duty cycle control unit 21 is configured to receive the input power Vin and set the relative duty cycle to a lower limit relative duty cycle, thereby starting to output the original minimum output power Va at a high potential at one of the operating hours of the operating cycle; In the third figure, for example, the time of each operation cycle is Ta, and when the relative responsibility cycle control unit 21 sets the relative duty cycle to a lower limit relative responsibility cycle, if the total time of the high potential in one operation cycle is Tb, then The lower limit relative liability cycle is Tb/Ta.
工作時間損耗電路22係電性連結於相對責任週期控制單元21以接收原始最小輸出電能Va,並延遲起始工作時間,藉以利用一小於下限相對責任週期之殘餘相對責任週期,輸出最小輸出電能Voa,min;以第三圖為例,原始最小輸出電能Va之起始工作時間原本係為時間0與時間Ta,若工作時間損耗電路22將起始工作時間延遲Tc,則最小輸出電能Voa,min之起始工作時間則為時間Tc與時間Ta+Tc,且最小輸出電能Voa,min則是以小於下限相對責任週期Tb/Ta之殘餘相對責任週期(Tb-Tc)/Ta輸出。The working time loss circuit 22 is electrically coupled to the relative duty cycle control unit 21 to receive the original minimum output power Va and delay the initial working time, thereby outputting the minimum output power Voa using a residual relative duty cycle that is less than the lower limit relative duty cycle. Taking the third figure as an example, the initial working time of the original minimum output electric energy Va is originally time 0 and time Ta. If the working time loss circuit 22 delays the initial working time by Tc, the minimum output electric energy Voa, min The initial working time is time Tc and time Ta+Tc, and the minimum output electric energy Voa,min is output at a residual relative duty cycle (Tb-Tc)/Ta which is less than the lower limit relative duty cycle Tb/Ta.
更進一步來說,以第四圖為例,當工作時間損耗電路22將原始最小輸出電能Va之起始工作時間延遲超過Tb時,則最小輸出電能Voa,min之殘餘相對責任週期則為0,換以言之,最小輸出電能Voa,min之電壓值即為0。Further, taking the fourth figure as an example, when the working time loss circuit 22 delays the initial working time of the original minimum output electric energy Va by more than Tb, the residual relative duty cycle of the minimum output electric energy Voa, min is 0. In other words, the voltage value of the minimum output power Voa, min is zero.
為了達成本發明之功率模組,工作時間損耗電路可以有多種實施方式,此處僅以一較佳實施例作為解釋,請參閱第五圖,第五圖係為工作時間損耗電路之第一實施例結構圖。於本較佳實施例中,工作時間損耗電路22可以具有用以接收原始最小輸出電能Va之輸入端,以及用以輸出最小輸出電能Voa,min之輸出端,並包括二極體D、電阻R與電容C;二極體D係具有陽極與陰極,陽極係電性連結於輸出端,陰極係電性連結於輸入端;電阻R係電性連結於輸出端與輸入端之間,並與二極體D呈並聯;電容C則電性連結於輸出端與接地端;因此當原始最小輸出電能Va自工作時間損耗電路22之輸入端輸入後,電容C則開始累積電能,並於時間到達Tc以及Ta+Tc時累積電壓超過高電位之基準電壓V’,而當原始最小輸出電能Va於時間Tb處於低電位時,二極體D則導通並使電容C進行放電而使最小輸出電能Voa,min同樣於時間Tb時處於低電位,如此一來即可將原始最小輸出電能Va之起始工作時間延遲Tc,並以小於下限相對責任週期Tb/Ta之殘餘相對責任週期(Tb-Tc)/Ta輸出最小輸出電能Voa,min。In order to achieve the power module of the present invention, the working time loss circuit can have various embodiments. Here, only a preferred embodiment is explained. Please refer to the fifth figure, and the fifth figure is the first implementation of the working time loss circuit. Example structure diagram. In the preferred embodiment, the working time loss circuit 22 may have an input for receiving the original minimum output power Va, and an output for outputting the minimum output power Voa, min, and includes a diode D and a resistor R. And the capacitor C; the diode D has an anode and a cathode, the anode is electrically connected to the output end, the cathode is electrically connected to the input end, and the resistor R is electrically connected between the output end and the input end, and The pole body D is connected in parallel; the capacitor C is electrically connected to the output end and the ground end; therefore, when the original minimum output electric energy Va is input from the input end of the working time loss circuit 22, the capacitor C starts to accumulate electric energy and reaches Tc at time. And when Ta+Tc, the accumulated voltage exceeds the high potential reference voltage V', and when the original minimum output electric energy Va is at the low potential at time Tb, the diode D is turned on and the capacitor C is discharged to make the minimum output electric energy Voa, Min is also at a low potential at time Tb, so that the initial working time of the original minimum output electric energy Va is delayed by Tc, and the residual relative duty cycle (Tb-Tc) is less than the lower limit relative duty cycle Tb/Ta/ Ta lose The minimum power output Voa, min.
綜合以上所述,請參閱第六圖,第六圖係為串聯多個本發明之功率模組之電源供應器示意圖。當電源供應器300串聯了三個功率模組200a、200b與200c時,若相對責任週期控制單元21a、21b與21c皆將相對責任週期設定至一下限相對責任週期,則三個功率模組200a、200b與200c可以分別輸出最小輸出電能Voa,min、Vob,min與Voc,min,且電源供應器300之最小累積輸出電能Vo,min即等於最小輸出電能Voa,min、Vob,min與Voc,min之總和;其中,最小輸出電能Voa,min、Vob,min與Voc,min之最小值為0,端視工作時間損耗電路22a、22b與22c之設計而定,以第五圖之範例而言則是視電阻R之電阻值與電容C之電容質而定。In summary, referring to the sixth figure, the sixth figure is a schematic diagram of a power supply of a plurality of power modules of the present invention connected in series. When the power supply unit 300 is connected in series with the three power modules 200a, 200b, and 200c, if the relative duty cycle control units 21a, 21b, and 21c set the relative duty cycle to a lower limit relative duty cycle, the three power modules 200a 200b and 200c may respectively output minimum output electric energy Voa, min, Vob, min and Voc, min, and the minimum cumulative output electric energy Vo, min of the power supply 300 is equal to the minimum output electric energy Voa, min, Vob, min and Voc, The sum of min; wherein the minimum output power Voa, min, Vob, min and Voc, min have a minimum value of 0, depending on the design of the working time loss circuits 22a, 22b and 22c, in the example of the fifth figure It is determined by the resistance of the apparent resistance R and the capacitance of the capacitor C.
可以清楚發現,相較於習知之功率模組100,本發明利用一個工作時間損耗電路22,藉以延遲原始最小輸出電能Va之起始工作時間,因此可利用小於下限相對責任週期之殘餘相對責任週期,輸出小於原始最小輸出電能Va之最小輸出電能Voa,min,換以言之,當電源供應器300串聯多個本發明之功率模組200a、200b與200c時,即可使最小累積輸出電能Vo,min之最小值小於每一功率模組200a、200b與200c之原始最小輸出電能之累加值,並得以將電源供應器300應用於低電壓輸出之用途中。It can be clearly seen that, compared to the conventional power module 100, the present invention utilizes a working time loss circuit 22 to delay the initial working time of the original minimum output power Va, so that a residual relative duty cycle less than the lower limit relative duty cycle can be utilized. The output is smaller than the minimum output electric energy Voa, min of the original minimum output electric energy Va. In other words, when the power supply 300 is connected in series with the plurality of power modules 200a, 200b and 200c of the present invention, the minimum cumulative output electric energy Vo can be made. The minimum value of min is less than the accumulated value of the original minimum output power of each of the power modules 200a, 200b, and 200c, and the power supply 300 can be applied to the application of the low voltage output.
藉由以上較佳具體實施例之詳述,係希望能更加清楚描述本發明之特徵與精神,而並非以上述所揭露的較佳具體實施例來對本發明之範疇加以限制。相反地,其目的是希望能涵蓋各種改變及具相等性的安排於本發明所欲申請之專利範圍的範疇內。The features and spirit of the present invention will be more apparent from the detailed description of the preferred embodiments. On the contrary, the intention is to cover various modifications and equivalents within the scope of the invention as claimed.
100...功率模組100. . . Power module
11...責任週期控制單元11. . . Accountability cycle control unit
200、200a、200b、200c...功率模組200, 200a, 200b, 200c. . . Power module
21、21a、21b、21c...相對責任週期控制單元21, 21a, 21b, 21c. . . Relative responsibility cycle control unit
22、22a、22b、22c...工作時間損耗電路22, 22a, 22b, 22c. . . Working time loss circuit
Vin...輸入電能Vin. . . Input power
Va...原始最小輸出電能Va. . . Original minimum output power
Voa,min、Vob,min、Voc,min...最小輸出電能Voa, min, Vob, min, Voc, min. . . Minimum output power
Vo,min...最小累積輸出電能Vo,min. . . Minimum cumulative output power
D...二極體D. . . Dipole
R...電阻R. . . resistance
C...電容C. . . capacitance
第一圖係為習知技術之功率模組示意圖;The first figure is a schematic diagram of a power module of the prior art;
第二圖係為本發明之功率模組之功能方塊示意圖;The second figure is a functional block diagram of the power module of the present invention;
第三圖係為工作時間損耗電路接收原始最小輸出電能並輸出最小輸出電能之第一示意圖;The third figure is a first schematic diagram of the working time loss circuit receiving the original minimum output power and outputting the minimum output power;
第四圖係為工作時間損耗電路接收原始最小輸出電能並輸出最小輸出電能之第二示意圖;The fourth figure is a second schematic diagram of the working time loss circuit receiving the original minimum output power and outputting the minimum output power;
第五圖係為工作時間損耗電路之第一實施例結構圖;以及The fifth figure is a structural diagram of the first embodiment of the working time loss circuit;
第六圖係為串聯多個本發明之功率模組之電源供應器示意圖。The sixth figure is a schematic diagram of a power supply of a plurality of power modules of the present invention connected in series.
200...功率模組200. . . Power module
21...相對責任週期控制單元twenty one. . . Relative responsibility cycle control unit
22...工作時間損耗電路twenty two. . . Working time loss circuit
Vin...輸入電能Vin. . . Input power
Va...原始最小輸出電能Va. . . Original minimum output power
Voa,min...最小輸出電能Voa,min. . . Minimum output power
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