TW201703414A - Direct current power converter - Google Patents

Abstract

The present invention discloses a direct current (DC) power converter. The DC power converter receives an input voltage and outputs an output voltage, and includes a voltage multiplier module, a first power switch, a second power switch, a first output diode, a second output diode, a third output capacitance and a zero voltage transition auxiliary circuit. The present invention has the following features: it is not necessary to operate at a high conduction ratio when operating at higher voltage gain; the main switch can be switched at zero voltage, it can reduce the switching loss; the reverse recovery problem of diode can be improved to reduce the loss; voltage stress of the main switch is less than the output voltage, so as to reduce the conduction loss; operating interleaved, so as to let input current ripple could be offset each other, it can reduce the current ripple.

Description

DC power converter

The present invention relates to a DC power converter, and more particularly to an interleaved High-Step-Up Zero Voltage Transition DC power converter.

As global energy supply and demand and environmental warming are facing severe challenges, countries around the world have adopted energy conservation and carbon conservation, development of new energy sources, efficient energy applications, and adjustment of energy use as guidelines for energy policy. Therefore, the development of renewable energy or green energy is the key direction of all countries, including solar energy, wind energy, hydropower, geothermal energy, tidal energy, biomass energy and fuel cells. Among these renewable energy sources, the technological development of solar power generation systems and fuel cell power generation systems is becoming more and more mature, often playing an important role in distributed generation systems.

For the safety and reliability of residential applications, the output voltage generated by solar modules and fuel cells is low voltage. In order to meet the requirements of grid-connected power generation systems, this low voltage must be utilized with high boost ratio. The DC/DC power converter is boosted to a high DC voltage. For example, for a single-phase 110/220Vac grid system, this high DC voltage is often 200/380Vdc for DC-AC conversion of full-bridge inverters. Therefore, high boost ratio DC-DC power converters are one of the common research topics in the field of power electronics.

In a high boost ratio DC-DC power converter, an interleaved boost type power converter 1 has been developed in the prior art in order to reduce input current ripple and high power applications, as shown in FIG. Wherein, when operating in a Continuous Conduction Mode (CCM), the output voltage gain M is:

Therefore, the voltage gain M is completely dependent on the value of the duty ratio (commonly referred to as duty ratio, duty ratio or duty ratio, hereinafter referred to as conduction ratio) D. If a higher boost ratio is to be obtained, it must be operated at a very large conduction ratio (the larger D is, the larger M is). In practice, the voltage gain M is limited due to the presence of parasitic components, such as the equivalent series resistance of the inductor; in addition, the boost-type power converter operating at the maximum turn-on ratio also derives the following problems: The turn-on ratio is prone to the problem of large current chopping; 2. The reverse recovery loss of the output diode is quite large; 3. In the application of a typical Pulse Width Modulation (PWM) control IC, the turn-on ratio If D is greater than 0.9, it is more difficult to achieve. Therefore, the development of the DC-DC power converter topology has high boost characteristics, but it does not have to operate at a large turn-on ratio, and can improve the reverse recovery of the diode, etc., and is a subject worthy of study. In addition, the power switch of the interleaved step-up power converter is hard switching, and hard switching causes switching loss, resulting in failure to achieve higher efficiency. Because environmental awareness is so high, energy conservation and carbon reduction are important policies of all countries. Therefore, it is a constant trend to design high-efficiency DC-DC power converter topologies to meet the increasingly stringent power conversion efficiency specifications. Furthermore, the switching voltage stress of the interleaved boost type power converter is a high voltage output voltage, and a high withstand voltage transistor (for example, a MOSFET) generally has a high on-resistance characteristic, resulting in a high conduction loss. Therefore, under the consideration of switching cost, on-resistance, withstand voltage limitation and conversion efficiency, in the application of high-boost DC-DC power converter, it is another worthwhile to develop a DC power converter with low voltage stress. Theme of.

The object of the present invention is to provide a DC power converter, which has the following characteristics: 1. It is suitable for a high boost ratio, but does not have to operate at a maximum turn-on ratio; 2. The power switch has a much lower than output voltage. Low voltage stress; 3. Low input current chopping for high power applications; 4. Power switching with zero voltage switching (ZVS) soft switching performance to match the increasingly important renewable energy sources In the network power system, the practical requirements of high-boost DC power conversion.

To achieve the above objective, the present invention provides a DC power converter that receives an input voltage and outputs an output voltage. The DC power converter includes: a voltage multiplying module, a first power switch, and a second power switch, a first output diode and a second output diode Body, a third output capacitor and a zero voltage transfer auxiliary circuit. The voltage multiplying module includes a first coupled inductor, a second coupled inductor, a first output capacitor, a second output capacitor, a first rectifying diode, and a second rectifying diode. The first coupled inductor includes a first primary side inductor and a first secondary side inductor, the second coupled inductor includes a second primary side inductor and a second secondary side inductor, and the first end of the first primary side inductor is connected to the second primary side inductor The first end receives the input voltage, the first end of the first output capacitor is connected to the first end of the first rectifying diode, and the output voltage is provided, and the second end of the first output capacitor is connected to the second output capacitor One end is connected to the first end of the first secondary side inductor, the second end of the first secondary side inductor is connected to the first end of the second secondary side inductor, and the first end of the second rectifying diode is connected for the second time. The second end of the stage side inductor is connected to the second end of the first rectifying diode, and the second end is connected to the second end of the second output capacitor. The first end of the first power switch is connected to the second end of the first primary side inductor, the second end is connected to a ground end, and the first end of the second power switch is connected to the second end of the second primary side inductor, and the second end thereof Connect the ground terminal to the terminal. The first end of the first output diode is connected to the second end of the first primary side inductor and the first end of the first power switch, and the second end is connected to the second end of the second output capacitor, the second output diode The first end is connected to the second end of the second primary side inductor and the first end of the second power switch, and the second end is connected to the second end of the first output diode. The first end of the third output capacitor is connected to the second end of the first output diode and the second output diode, and the second end is connected to the ground. The zero voltage transfer auxiliary circuit includes a first auxiliary diode, a second auxiliary diode, a third auxiliary diode, a first auxiliary inductor, a second auxiliary inductor and an auxiliary switch, and the first auxiliary two The first end of the pole body is connected to the second end of the first primary side inductor and the first end of the first power switch, the second end of which is connected to the first end of the first auxiliary inductor, and the first end of the second auxiliary diode a second end connected to the second primary side inductor and a first end of the second power switch, the second end of which is connected to the first end of the second auxiliary inductor, and the second end of the first auxiliary inductor is connected to the second end of the second auxiliary inductor The first end of the third auxiliary diode and the first end of the auxiliary switch, and the second end of the third auxiliary diode are respectively connected to the second ends of the first output diode and the second output diode, The second end of the auxiliary switch is connected to the ground.

As described above, the DC power converter of the present invention is an interleaved high-boost zero-voltage transfer converter, and its characteristics and advantages are summarized as follows: First, the design freedom of increasing the voltage gain due to the voltage multiplying module Therefore, it is not necessary to operate at a very large conduction ratio when the high voltage gain is achieved. Second, due to the addition of Zero Voltage Transition (ZVT) The zero voltage transfer auxiliary circuit enables both main switches to achieve the ZVS soft cut performance, so the switching loss of the main switch can be reduced. Third, since the output current of the output diode has dropped to zero before being turned off (OFF), the reverse recovery problem and loss of the diode are improved. In addition, the leakage inductance energy of the coupled inductor can be transmitted to the output side for reuse without causing a voltage surge problem. Fourth, since the voltage stress of the two main switches of the DC power converter is much lower than the output voltage, a low-rated piezoelectric crystal with a small on-resistance can be used, so that the conduction loss can be reduced. Fifth, because of the interleaved operation, the input current chopping can cancel each other and reduce the input current chopping size, which is beneficial to reducing the number of electrolytic capacitors at the power source end and reducing the circuit cost.

1‧‧‧Interleaved Boost Power Converter

2‧‧‧DC power converter

21‧‧‧Voltage multiplier module

22‧‧‧ Zero voltage transfer auxiliary circuit

C ₁ ~ C ₃ , C _S1 , C _S2 ‧‧‧ capacitor

D ₁ ~ D ₄ , D _a1 ~ D _a3 ‧‧‧ diode

i _D1 ~ i _D4 , i _Da3 , i _in , i _La1 , i _La2 , i _Lk1 , i _Lk2 , i _Lm1 , i _Lm2 , i _o ‧‧‧ current

L ₁ , L ₂ ‧‧‧Inductors

L _a1 , L _a2 ‧‧‧Auxiliary inductance

L _k1 , L _k2 ‧‧‧ leakage inductance

L _m1 , L _m2 ‧‧‧ magnetizing inductance

N _p1 , N _p2 ‧‧‧ primary side inductance

N _s1 , N _s2 ‧‧‧ secondary side inductance

n ‧‧‧ turns ratio

R _o ‧‧‧resistance

S ₁ , S ₂ ‧‧‧ power switch

S _a ‧‧‧Auxiliary switch

t , t ₀ ~ t ₁₆ ‧‧‧ time

T1 , T2 ‧‧‧ transformer

V _C1 ~ V _C3 , ν _D1 , ν _D2 , ν _ds1 , ν _ds2 , ν _gs1 , ν _gs2 , ν _gsa , ν _L1 ~ ν _L2 , ν _La1 ~ ν _La2 , ν _Lm1 ~ ν _Lm2 , ν _NP1 ~ ν _NP2 , ν _Ns1 ~ ν _Ns2 ‧‧‧ voltage

V _in ‧‧‧ input voltage

V _o ‧‧‧output voltage

FIG. 1 is a circuit diagram of a conventional interleaved step-up power converter.

2 is a circuit diagram of a DC power converter according to a preferred embodiment of the present invention.

FIG. 3 is an equivalent circuit diagram of the DC power converter of FIG. 2. FIG.

4 is a schematic diagram showing signal waveforms of a DC power converter according to a preferred embodiment of the present invention.

5A to 6H are schematic diagrams showing different stages of operation of the DC power converter, respectively.

FIG. 7 is a schematic diagram showing a voltage gain, a turn-on ratio, and a turns ratio of a DC power converter according to a preferred embodiment of the present invention.

FIG. 8A is a schematic diagram of a simulation of a DC power converter according to a preferred embodiment of the present invention.

FIG. 8B is a schematic diagram showing simulations of driving signals, input voltages, and output voltage waveforms of a power switch and an auxiliary switch in a DC power converter according to a preferred embodiment of the present invention.

FIG. 8C is a schematic diagram of driving signals and switching voltages of a power switch and an auxiliary switch in a DC power converter according to a preferred embodiment of the present invention.

FIG. 8D is a schematic diagram showing the waveform simulation of the driving signal and the voltage across the power switch of the DC power converter at the full load according to the preferred embodiment of the present invention.

FIG. 8E is a schematic diagram showing the waveform simulation of the coupled inductor current and the total input current during a half load of the DC power converter according to the preferred embodiment of the present invention.

FIG. 8F is a coupled inductor current of a DC power converter at full load according to a preferred embodiment of the present invention; FIG. And a schematic diagram of the waveform simulation of the total input current.

FIG. 8G is a schematic diagram showing the simulation of the magnetizing inductor current waveform in the DC power converter of the preferred embodiment of the present invention.

FIG. 8H is a schematic diagram showing the simulation of the current and voltage waveforms of the output diode in the DC power converter of the preferred embodiment of the present invention.

FIG. 8I is a schematic diagram of voltage waveform simulation of an output capacitor in a DC power converter according to a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a DC power converter according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings, wherein like elements will be described with the same reference numerals.

Please refer to FIG. 2, which is a circuit diagram of a DC power converter 2 according to a preferred embodiment of the present invention. The DC power converter 2 of the present embodiment can be applied to a regenerative power generation grid-connected system, and can achieve a high boost ratio, but does not have to operate at a maximum turn-on ratio, and the power switch has a zero-voltage switching (ZVS) soft-cut performance. Reduces switching losses for high boost, high efficiency and high power applications. The DC power converter 2 can receive an input voltage V _in and output an output voltage V _o to a load (represented by a resistor R _o ). Here, the input voltage V _in and the output voltage V _o are respectively direct current. The component composition of the DC power converter 2 and its connection method will be described below.

The DC power converter 2 includes a voltage multiplying module 21, a first power switch S ₁ and a second power switch S ₂ , a first output diode D ₁ and a second output diode D ₂ , a third output capacitor (expressed in C ₁₎ and a zero voltage transition auxiliary circuit 22.

The voltage multiplying module 21 includes a first coupled inductor, a second coupled inductor, a first output capacitor (denoted by C ₃ ), a second output capacitor C ₂ , and a first rectifying diode (represented by D ₃ And a second rectifying diode (indicated by D ₄ ). The first coupled inductor includes a first primary side inductor N _p1 and a first secondary side inductor N _s1 , and the second coupled inductor includes a second primary side inductor N _p2 and a second secondary side inductor N _{s2 .} . In addition, the zero voltage transfer auxiliary circuit 22 has a first auxiliary diode D _a1 , a second auxiliary diode D _a2 , a third auxiliary diode D _a3 , a first auxiliary inductor L _a1 , and a second Auxiliary inductor L _a2 and an auxiliary switch S _a .

The first end of the first primary side inductor N _p1 is coupled to the first end of the second primary side inductor N _p2 and receives the input voltage V _in . The first end of the first output capacitor C ₃ is connected to the first end of the first rectifying diode D ₃ and provides the output voltage V _o to the resistor R _o , and the second end of the first output capacitor C ₃ is connected to the second output The first end of the capacitor C ₂ is coupled to the first end of the first secondary side inductor N _s1 , the second end of the first secondary side inductor N _s1 is coupled to the first end of the second secondary side inductor N _s2 , and the second The first end of the rectifying diode D ₄ is connected to the second end of the second secondary side inductor N _{s2 and} the second end of the first rectifying diode D ₃ , and the second end thereof is connected to the second output capacitor C ₂ Two ends. The first end of the first primary side inductor N _p1 , the second end of the first secondary side inductor N _s1 , the first end of the second primary side inductor N _p2 , and the first end of the second secondary side inductor N _s2 The terminals are respectively polarity end, and the second end of the first primary side inductor N _p1 , the first end of the first secondary side inductor N _s1 , the second end of the second primary side inductor N _p2 and the second secondary side The second ends of the inductors N _s2 are respectively non-polar point ends.

The first end of the first power switch S ₁ is connected to the second end of the first primary side inductor N _p1 , the second end of which is connected to a ground end, and the first end of the second power switch S ₂ is connected to the second primary side inductor N The second end of _{p2 has} a second end connected to the ground. The first power switch S ₁ and the second power switch S ₂ are respectively an N-type power transistor, and the first ends of the first power switch S ₁ and the second power switch S ₂ are respectively a drain, the first power The second ends of the switch S ₁ and the second power switch S ₂ are respectively sources, and the third ends of the first power switch S ₁ and the second power switch S ₂ are respectively gates (control terminals).

In addition, the first end of the first output diode D ₁ is connected to the second end of the first primary side inductor N _{p1 and} the first end of the first power switch S ₁ , and the second end thereof is connected to the second output capacitor C ₂ Second end. The first end of the second output diode D ₂ is connected to the second end of the second primary side inductor N _{p2 and} the first end of the second power switch S ₂ , and the second end thereof is connected to the first output diode D ₁ Second end. The second end of the first rectifying diode D ₃ , the second end of the second rectifying diode D ₄ , the first end of the first output diode D ₁ and the second output diode D ₂ respectively An anode, a first end of the first rectifying diode D _{3 ,} a first end of the second rectifying diode D _{4 ,} a second of the first output diode D ₁ and the second output diode D ₂ The ends are respectively cathodes.

The first end of the third output capacitor C ₁ is connected to the second end of the first output diode D _{1 and} the second end of the second output capacitor C ₂ , and the second end thereof is connected to the ground. In addition, the first end of the first auxiliary diode D _a1 is connected to the second end of the first primary side inductor N _{p1 and} the first end of the first power switch S ₁ , and the second end thereof is connected to the first auxiliary inductor L _a1 First end. The first end of the second auxiliary diode D _a2 is connected to the second end of the second primary side inductor N _{p2 and} the first end of the second power switch S ₂ , and the second end thereof is connected to the first end of the second auxiliary inductor L _a2 end. Further, the first auxiliary inductor connecting the second end of the second auxiliary inductor L L _A1 terminal _a2 of the second, the third auxiliary diode D of the first terminal _a3 and the first end of the auxiliary switches S _a, and the third auxiliary The second end of the diode D _a3 is respectively connected to the first end of the first output diode D ₁ , the second end of the second output diode D _{2 and} the first end of the third output capacitor C ₁ , and the auxiliary switch S _a The second end is connected to the ground terminal. The inductance values of the first auxiliary inductor L _a1 and the second auxiliary inductor L _a2 are equal. In addition, the auxiliary switch S _a is also an N-type power transistor, the first end of which is a drain, the second end of which is a source, and the third end of which is a gate (control end). In addition, the first terminals of the first auxiliary diode D _a1 , the second auxiliary diode D _a2 and the third auxiliary diode D _a3 are respectively an anode, and the first auxiliary diode D _a1 and the second auxiliary two The second ends of the polar body D _a2 and the third auxiliary diode D _a3 are respectively cathodes.

Please refer to FIG. 3 , which is an equivalent circuit diagram of the DC power converter 2 of FIG. 2 . In the equivalent circuit, the first coupled inductor further includes a first magnetizing inductance L _m1 and a first leakage inductance L _k1 , and the second coupled inductor further includes a second magnetizing inductance L _m2 and a second leakage inductance L _k2 .

The first end of the first magnetizing inductance L _m1 is connected to the first end of the first primary side inductor N _p1 , and the second end is connected to the second end of the first primary side inductor N _{p1 and} the first end of the first leakage inductance L _k1 The first end of the second magnetizing inductance L _m2 is connected to the first end of the second primary side inductor N _p2 , and the second end thereof is connected to the second end of the second primary side inductor N _{p2 and} the second end of the second leakage inductance L _k2 One end. In addition, the first end of the first output diode D ₁ , the first end of the first auxiliary diode D _{a1 and} the first end of the first power switch S ₁ are connected by the first leakage inductance L _k1 . a second end of the primary side inductor N _p1 , and the first end of the second output diode D ₂ , the first end of the second auxiliary diode D _{a2 and} the first end of the second power switch S ₂ are The second leakage inductance L _{k2 is} connected to the second end of the second primary side inductance N _p2 .

In this embodiment, the first primary side inductor N _p1 and the first secondary side inductor N _s1 may constitute a first ideal transformer, and the second primary side inductor N _p2 and the second secondary side inductor N _s2 may constitute a first ideal transformer. The second ideal transformer, and the first ideal transformer and the second ideal transformer have the same turns ratio (the turns ratio is n ). In other words, the turns ratio of the first primary side inductance N _p1 to the first secondary side inductance N _s1 of the present embodiment is equal to the turns ratio of the second primary side inductance N _p2 and the second secondary side inductance N _s2 .

Hereinafter, please refer to FIG. 4 and FIG. 5A to FIG. 6H to illustrate FIG. 3 . The operation of the DC power converter 2 is performed. 4 is a schematic diagram of signal waveforms of a DC power converter 2 according to a preferred embodiment of the present invention, and FIGS. 5A to 6H are schematic diagrams showing different stages of operation of the DC power converter 2, respectively.

The DC power converter 2 operates in a continuous conduction mode (CCM) with an on ratio greater than 0.5, and the first power switch S ₁ and the first power switch S ₂ operate in an interleaved manner with a 180° difference in operating phase. At steady state, the DC power converter 2 can be divided into 16 operating phases in one switching cycle according to the power switch and the on/off state of the diode. The steady state waveform of the main components is as shown in FIG. Show. Due to the symmetry of the circuit, only the first eight stages are analyzed for circuit operation. The equivalent circuits of the first eight stages can be referred to FIG. 5A to FIG. 5H.

However, the following assumptions are made before starting the analysis: 1. All power switches and diode turn-on voltage drops are zero. 2. The capacitances of the capacitors C ₁ , C ₂ , and C ₃ are sufficiently large, and the capacitor voltages V _{C 1} , V _{C 2 ,} and V _{C 3} can be regarded as constant voltages. Therefore, the output voltage V _o can be regarded as a constant. 3. The turns ratio of the two ideal transformers is equal (ie, N _{s 1} / N _{p 1} = N _{s 2} / N _{p 2} = n ), and the magnetization inductance values are equal ( L _{m 1} = L _{m 2} ), and the leakage inductance value It is also equal ( L _{k 1} = L _{k 2} ) and the magnetizing inductance is much larger than the leakage inductance. 4. The magnetizing inductor currents of the two coupled inductors operate in continuous conduction mode (CCM).

The first stage [ t ₀ ~ t ₁ ] ( S ₁ : ON, S ₂ : ON, S _a : OFF, D ₁ : OFF, D ₂ : OFF, D ₃ : OFF, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} :OFF, D _{a 3} :OFF): As shown in FIG. 5A, the first phase starts at t = t ₀ , the first power switch S ₁ (or main switch, power switch) and the second power Switch S ₂ (or main switch, power switch) is ON. All diodes ( D ₁ , D ₂ , D ₃ , D ₄ , D _{a 1} , D _{a 2} , D _{a 3} ) are reverse biased and in the OFF state, the primary side windings of both coupled inductors are across the voltage. The input voltage V _in , that is, the voltage across the first magnetizing inductance L _{m 1} and the first leakage inductance L _{k 1} , the second magnetizing inductance L _{m 2} and the second leakage inductance L _{k 2} are V _in respectively, and the inductance flows through The current rises linearly and the slopes are:

When t = t ₁ , when the second power switch S _{2 is} switched OFF, this phase ends.

Second stage [ t ₁ ~ t ₂ ]: ( S ₁ : ON, S ₂ : OFF, S _a : OFF, D ₁ : OFF, D ₂ : OFF, D ₃ : OFF, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} : OFF, D _{a 3} : OFF): As shown in FIG. 5B, the second phase starts at t = t ₁ and the second power switch S _{2 is} switched OFF. Leakage inductance current i _{Lk 2} for the second power switch S _{S 2} of the parasitic capacitance C _{2 is} charged, the voltage across the second power switch S ₂ v ₂ is increased _DS. At this time, the total voltage on the secondary side of the coupled inductor is: ν _{Ns 1} - ν _{Ns 2} nV _in - n ( V _in - ν _{ds 2} )= nν _{ds 2} .

When t = t _2, the voltage across the second power switch S equal to the third output capacitor voltage V C _{C 1 2 1,} i.e., ν _{ds 2} = V _{C 1,} the output of the second diode D ₂ and the first The rectifying diode D ₃ is turned from OFF to ON, and this phase ends. Since the capacitance of C _{S 2} is small, the time of the second phase is very short. From this stage, the voltage stress of the second power switch S ₂ is V _{C 1} .

The third stage [ t ₂ ~ t ₃ ] ( S ₁ : ON, S ₂ : OFF, S _a : OFF, D ₁ : OFF, D ₂ : ON, D ₃ : ON, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} :OFF, D _{a 3} :OFF): as shown in FIG. 5C, the third phase starts at t = t ₂ , and the second output diode D ₂ and the first rectifying diode D _{3 are in} a state of transition It is ON. The second coupled inductor crosses the negative voltage ( V _in - V _{C 1} ), the current i _{Lk 2 of the} second leakage inductor L _k2 decreases, and the current i _{Lk 2} charges the third output capacitor C ₁ via the second output diode D ₂ . The energy stored in the second magnetizing inductance L _{m 2} is transferred to the secondary side by the coupled inductor to charge the first output capacitor C ₃ . On the other hand, since the secondary side current is reflected to the primary side of the first ideal transformer of the first coupled inductor, the current i _{Lk 1} of the first leakage inductance L _k1 of the first coupled inductor = i _{Lm 1} + ni _{D 3} , And the current i _{Lk 1 is} accelerated.

When t = t ₃ , when the current i _{Lk 2 of the} second leakage inductance L _{k2 falls} to zero, the second output diode D ₂ turns OFF, and this phase ends. At this time, the current i _{Lm 2 of the} second magnetizing inductance L _m2 is equal to the current flowing through the primary side of the ideal transformer. It can be seen from this stage that the second output diode D ₂ is turned from ON to OFF in a zero current switching manner, so that the problem of the reverse recovery loss of the diode can be greatly improved.

The fourth stage [ t ₃ ~ t ₄ ] ( S ₁ : ON, S ₂ : OFF, S _a : OFF, D ₁ : OFF, D ₂ : OFF, D ₃ : ON, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} : OFF, D _{a 3} : OFF): As shown in FIG. 5D, the fourth phase starts at t = t ₃ and the second output diode D ₂ turns OFF. The second inductor L _m2 magnetizing current i _{Lm 2} totally reflected by the primary side to the secondary side, a first rectifying diode of the current i _{D D 3 3} = i _{Lm 2} / n, and charging the output capacitor C _3. Since the second output diode D ₂ is OFF, the voltage across the second power switch S ₂ , ν _{ds 2 , is} no longer clamped by the voltage V _{C 1} . When t = t ₄ , when the auxiliary switch S _a (or power switch S _a ) is switched ON, this phase ends.

The fifth stage [ t ₄ ~ t ₅ ] ( S ₁ : ON, S ₂ : OFF, S _a : ON, D ₁ : OFF, D ₂ : OFF, D ₃ : ON, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} :ON, D _{a 3} :OFF): As shown in FIG. 5E, the fifth stage starts at t = t ₄ , the auxiliary switch S _{a is} switched ON, and the second auxiliary diode D _{a 2 is} rotated. When ON, the second auxiliary inductance L _{a 2} , the parasitic capacitance C _{s 2} , and the second leakage inductance L _{k 2} resonate. At this time, the second auxiliary voltage across the inductance L _{a 2} is ν _{ds 2,} which current i _{La 2} rise, when i _{La 2>} i _{Lk 2,} the voltage across the second power switch S ₂ is ν _{ds 2} starts to decrease. When t = t ₅ , the voltage ν _{ds 2} drops to zero, and the body diode of the second power switch S ₂ is turned on, and this phase ends.

The sixth stage [ t ₅ ~ t ₆ ] ( S ₁ : ON, S ₂ : OFF, S _a : ON, D ₁ : OFF, D ₂ : OFF, D ₃ : ON, D ₄ : OFF, D _{a 1} : _{OFF, D a 2: oN,} D a 3: OFF): As illustrated, the sixth stage begins at t = t ₅ 5F, a second power switch S ₂ of the body diode is turned on, a second power switch S ₂ The zero voltage switching (ZVS) condition is established. Here, the voltage ν _{La 2} =0 of the second auxiliary inductance L _a2 , and the current i _{La 2 is} maintained at a constant value. When t = t ₆ , when the second power switch S _{2 is} switched ON, this phase ends.

The seventh stage [ t ₆ ~ t ₇ ] ( S ₁ : ON, S ₂ : ON, S _a : ON, D ₁ : OFF, D ₂ : OFF, D ₃ : OFF, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} : ON, D _{a 3} : OFF): As shown in FIG. 5G, the seventh phase starts at t = t ₆ , and the second power switch S _{2 is} switched ON to achieve zero voltage switching (ZVS). Since the second power switch S ₂ is zero voltage when it is switched from OFF to ON, the switching loss when OFF is turned ON is zero. Further, since the voltage ν _{La 2} =0 of the second auxiliary inductance L _a2 , the current i _{La 2} maintains a constant value. When t = t ₇ , when the auxiliary switch S _{a is} switched OFF, this phase ends.

The eighth stage [ t ₇ ~ t ₈ ] ( S ₁ : ON, S ₂ : ON, S _a : OFF, D ₁ : OFF, D ₂ : OFF, D ₃ : OFF, D ₄ : OFF, D _{a 1} : OFF, D _{a 2} :ON, D _{a 3} :ON): As shown in FIG. 5G, the eighth stage starts at t = t ₇ , the auxiliary switch S _{a is} switched OFF, and the third auxiliary diode D _{a 3 is} rotated. When ON, the voltage of the second auxiliary inductance L _a2 is ν _{La 2} =− V _{C 1} , and the current i _{La 2} decreases linearly. At this time, the second auxiliary inductance L _{a 2} transfers the stored energy to the third output capacitor C. ₁ . When t = t ₈ , the current i _{La 2 of the} second auxiliary inductance L _a2 drops to zero, at which time the energy stored by the second auxiliary inductance L _{a 2} is completely released, and the second auxiliary diode D _{a 2} and the third When the auxiliary diode D _{a 3 is} turned OFF, this phase ends.

Then, entering the 8 stages of the second half switching period, the energy stored in the first magnetizing inductance L _{m 1} can be transmitted to the secondary side through the coupled inductor to charge the second output capacitor C ₂ , and the auxiliary switching switch can be controlled by S _a causes the first power switch S _{1 to} achieve zero voltage switching (ZVS). Due to the symmetry of the circuit, the last eight stages of the circuit can be referred to FIG. 6A to FIG. 6H, and the motion analysis is similar to the first eight stages. Those skilled in the art can refer to the first eight stages of analysis and cooperate with the corresponding diagrams. The process of its operation will not be repeated here.

In particular, in the signal waveform diagram of FIG. 4, the time segments of the fifth, sixth, seventh, and eighth stages in the time series waveform are actually very small, and in order to clearly show the change of the waveform, in FIG. Zoom in and present.

In the present embodiment, the DC power converter 2, a main switch S ₁ is reached and S _{2 are} both ZVS performance, while having no auxiliary switch S _a ZVS performance, but prior to the auxiliary switch S _a is switched ON, since the first auxiliary inductor L _{a 1} or a second auxiliary inductor L _{a 2} initial current is zero, so the auxiliary switch S _a zero current switching can be achieved is ON, so that the switching loss is small. In addition, in the interleaved high-boost converter with zero voltage switching in the prior art, the DC power converter 2 of the present embodiment has a total of three power switches ( S ₁ , S ₂ , S _a ), which is superior to the Xi Knowing the four power switches of the technology, the DC power converter 2 also has the advantage of less power switching.

The following is a steady-state characteristic analysis of the DC power converter 2: in order to simplify the analysis, the transient characteristics of the switch and the diode turn-on voltage drop and the extremely short time are ignored. The leakage inductances L _{k 1} and L _{k 2 are} also ignored. In addition, the capacitance values of the capacitors C ₁ , C ₂ and C ₃ are also large enough, and the voltage chopping is ignored so that the capacitor voltage is constant.

Since the voltage of the third output capacitor C ₁ can be regarded as the output voltage of the boost converter of the prior art, the voltage V _{c 1} can be derived.

The output capacitance voltages V _{C 2} and V _{C 3 of the} first coupled inductor and the secondary side of the second coupled inductor can be derived by deriving the reflected voltage of the primary side voltage of the coupled inductor. When the first power switch S ₁ is OFF, the second power switch S ₂ is ON, and the second rectifying diode D ₄ is ON (the twelfth stage), the voltage V _{C 2} is ( D is the first power switch) S ₁ or the second power switch S ₂ conduction ratio):

In addition, when the first power switch S ₁ is ON, the second power switch S ₂ is OFF, and the first rectifying diode D ₃ is ON (fourth stage), the voltage V _{C 3} is

Therefore, the total output voltage V _o is:

Therefore, the voltage gain of the DC power converter 2 of the present embodiment is:

Seen from the above formula, having a turns ratio n voltage gain conduction ratio (or duty ratio, the duty ratio, duty) D two design freedom. Therefore, the DC power converter 2 can achieve a high step-up ratio by appropriately designing the turns ratio n and does not have to operate at a very large conduction ratio D. Here, the voltage gain curve corresponding to the turns ratio n and the turn-on ratio D can be referred to FIG. It can be seen from Fig. 7 that when the conduction ratio D = 0.7, n = 1, the voltage gain is 10 times; in addition, when D = 0.7, n = 4, the voltage gain is 30 times.

The following is a voltage stress analysis of the switching elements of the DC power converter 2. The voltage stress of the power switches S ₁ , S ₂ is:

Since the power switching stress of the interleaved boost converter of the prior art is equal to the output voltage V _o , the voltage stress of the power switches S ₁ , S ₂ of the DC power converter 2 of the present embodiment is smaller than the prior art, only It is 1/(2 n +1) times, so a transistor with a low rated withstand voltage and a low on-resistance (such as a MOSFET) can be used, so that the loss of the switch conduction can be reduced.

Hereinafter, an embodiment of the DC power converter 2 will be described. Among them, based on the above circuit operation analysis results, and simulation using IsSpice software to verify the characteristics of the DC power converter 2. The specifications of the DC power converter 2 of the present embodiment are: input voltage V _in = 24V, output voltage V _o = 200V, maximum output power 400W, switching frequency 50 kHz, n =1, thereby verifying the converter Features, the analog circuit (and component specifications) can be seen as shown in Figure 8A (the number shown in Figure 8A shows the number 1~21 is the representative end point or contact, and the above-mentioned interleaved step-up power converter 1, DC power conversion The device 2 is independent of the voltage multiplying module 21).

First, the steady-state characteristic verification: 8B, which is the present embodiment the power switch of Example S _1, S ₂ and the auxiliary switch S _a drive signal, the input analog voltage and the output voltage waveform of FIG. As can be seen from Fig. 8B, at a full load of 400 W, V _in = 24 V, V _o = 200 V, the turn-on ratio D is about 0.65, which is in accordance with the above formula for voltage gain.

Next, the switching voltage stress is verified: as shown in FIG. 8C, which is _a schematic diagram of the driving signal and the switching voltage across the power switches S ₁ , S ₂ and the auxiliary switch Sa. As can be seen from FIG. 8C, when the OFF S ₁ and S ₂ are OFF, the voltage across the switches S ₁ and S ₂ is about 67 V at most, which is only one third of the output voltage V _o , which is consistent with the above-mentioned related power switch S _{1 .} The S ₂ voltage stress analysis formula, so the power switches S ₁ , S _{2 of} the converter have the advantage of low voltage stress.

In addition, it is verified whether the two power switches S ₁ and S ₂ can achieve the ZVS operation: as shown in FIG. 8D , when the DC power converter 2 is fully loaded with 400 W, the driving signals of the power switches S ₁ and S ₂ and the cross thereof are A schematic diagram of the waveform simulation of the pressures ν _ds1 and ν _ds2 . Among them, it can be seen from the waveform of the switching instant (the rectangular dotted line area) that the cross-voltages ν _ds1 and ν _ds2 have been reduced to zero before the switches S ₁ and S ₂ are turned from the OFF state to the ON state, so that the ZVS operation can be achieved. In addition, when the load is half load: 200 W, the driving signals of the switches S ₁ , S ₂ and their cross-voltages ν _ds1 , ν _ds2 waveforms can be as shown in FIG. 8E. It can also be seen from FIG. 8E that when the load is 200 W, the power switches S ₁ , S ₂ can still achieve the ZVS operation.

Then, verify the performance of the low input chopping current and the CCM operation: as shown in Fig. 8F, which is the waveform simulation of the coupled inductor currents i _Lk1 , i _Lk2 and the total input current i _in when the DC power converter 2 is fully loaded at 400W. schematic diagram. As can be seen from Fig. 8F, the chopping currents of the currents i _Lk1 and i _Lk2 are about 19A, and the chopping current of the total input current i _in is only about 1A. Therefore, the conversion type uses an interleaved operation to reduce the input chopping current. The role. In addition, it can be verified from the magnetizing inductor currents i _Lm1 , i _Lm2 waveforms of FIG. 8G that the converter is operated in continuous conduction mode (CCM).

In addition, the diode reverse recovery current problem is verified again: as shown in FIG. 8H, it is a schematic diagram of the current and voltage waveforms of the output diodes D ₁ and D ₂ . As can be seen from FIG. 8H, the output diodes D ₁ and D ₂ have almost no reverse recovery current, so the converter can also reduce the reverse recovery loss and prevent noise interference (such as EMI). In addition, as can also be seen from FIG. 8H, the voltage stress of the output diodes D ₁ and D ₂ is approximately 67 V , which is also only one third of the output voltage V _o .

Finally, verify the voltage of the output capacitor: as shown in Figure 8I, which is a schematic diagram of the voltage waveforms of the output capacitors C ₁ , C ₂ , and C ₃ . As can be seen from Fig. 8G, the voltages V _C1 , V _C2 , and V _{C3 of the} output capacitors C ₁ , C ₂ , and C ₃ are all equal to 67V, which is consistent with the above-mentioned formula derivation results for V _C1 , V _C2 , and V _C3 .

In summary, the DC power converter of the present invention is an interleaved high-boost zero-voltage transfer converter, and its characteristics and advantages are summarized as follows: First, the design freedom of increasing the voltage gain due to the voltage multiplying module Therefore, it is not necessary to operate at a very large conduction ratio when the high voltage gain is achieved. Second, due to the zero voltage transfer auxiliary circuit added to the zero voltage transfer (ZVT), both main switches can achieve the ZVS soft cutting performance, so the switching loss of the main switch can be reduced. Third, since the current flowing through the output diode has been reduced to zero before being turned off, the reverse recovery problem and loss of the diode are improved. In addition, the leakage inductance energy of the coupled inductor can be transmitted to the output side for reuse without causing a voltage surge problem. Fourth, since the voltage stress of the two main switches of the DC power converter is much lower than the output voltage, a low-rated piezoelectric crystal with a small on-resistance can be used, so that the conduction loss can be reduced. Fifth, because of the interleaved operation, the input current chopping can cancel each other and reduce the input current chopping size, which is beneficial to reducing the number of electrolytic capacitors at the power source end and reducing the circuit cost.

The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

2‧‧‧DC power converter

21‧‧‧Voltage multiplier module

22‧‧‧ Zero voltage transfer auxiliary circuit

C ₁ ~ C ₃ , C _S1 , C _S2 ‧‧‧ capacitor

D ₁ ~ D ₄ , D _a1 ~ D _a3 ‧‧‧ diode

L _a1 , L _a2 ‧‧‧Auxiliary inductance

N _p1 , N _p2 ‧‧‧ primary side inductance

N _s1 , N _s2 ‧‧‧ secondary side inductance

R _o ‧‧‧resistance

S ₁ , S ₂ ‧‧‧ power switch

S _a ‧‧‧Auxiliary switch

V _C1 ~ V _C3 ‧‧‧ voltage

V _in ‧‧‧ input voltage

V _o ‧‧‧output voltage

Claims (9)

A DC power converter receives an input voltage and outputs an output voltage. The DC power converter includes: a voltage multiplication module including a first coupled inductor, a second coupled inductor, a first output capacitor, and a a second output capacitor, a first rectifying diode and a second rectifying diode, the first coupling inductor comprising a first primary side inductor and a first secondary side inductor, the second coupled inductor comprising a first a first primary side inductor and a second secondary side inductor, the first end of the first primary side inductor being coupled to the first end of the second primary side inductor, and receiving the input voltage, the first end of the first output capacitor Connecting the first end of the first rectifying diode and providing the output voltage, the second end of the first output capacitor is connected to the first end of the second output capacitor and the first end of the first secondary side inductor a second end of the second secondary side inductor is connected to the first end of the second secondary side inductor, and a first end of the second rectifying diode is connected to the second end of the second secondary side inductor a second end of the first rectifying diode, the second end of which a second end of the second output capacitor; a first power switch and a second power switch, the first end of the first power switch is connected to the second end of the first primary side inductor, and the second end is connected to a ground The first end of the second power switch is connected to the second end of the second primary side inductor, and the second end is connected to the ground end; a first output diode and a second output diode, the first end a first end of the output diode is connected to the second end of the first primary side inductor and a first end of the first power switch, and a second end is connected to the second end of the second output capacitor, the second output The first end of the diode is connected to the second end of the second primary side inductor and the first end of the second power switch, and the second end is connected to the second end of the first output diode; a third output a first output end of the third output capacitor is connected to the second end of the first output diode and the second output diode, the second end of which is connected to the ground end; and a zero voltage transfer auxiliary circuit, including a first auxiliary diode, a second auxiliary diode, a third auxiliary diode, and a first auxiliary diode An auxiliary inductor, a second auxiliary inductor, and an auxiliary switch, the first end of the first auxiliary diode is connected to the second end of the first primary side inductor and the first end of the first power switch, and the second Connecting a first end of the first auxiliary inductor, the first end of the second auxiliary diode is connected to the second end of the second primary side inductor and the second end a first end of the power switch is connected to the first end of the second auxiliary inductor, and a second end of the first auxiliary inductor is connected to the second end of the second auxiliary inductor and the third auxiliary diode The first end is connected to the first end of the auxiliary switch, and the second end of the third auxiliary diode is respectively connected to the second end of the first output diode and the second output diode, and the second end of the auxiliary switch The two ends are connected to the ground. The DC power converter of claim 1, wherein the first coupled inductor further includes a first magnetizing inductor and a first draining inductor, and the second coupled inductor further includes a second magnetizing inductor and a first a first leakage inductance, a first end of the first magnetization inductor is connected to the first end of the first primary side inductor, and a second end is connected to the second end of the first primary side inductor and the first end of the first leakage inductance a first end of the first output diode, a first end of the first auxiliary diode, and a first end of the first power switch connected to the first primary side inductor by the first leakage inductance a second end, the first end of the second magnetizing inductor is connected to the first end of the second primary side inductor, and the second end is connected to the second end of the second primary side inductor and the first end of the second leakage inductance, The first end of the second output diode, the first end of the second auxiliary diode, and the first end of the second power switch are connected to the second of the second primary side inductor by the second leakage inductance end. The DC power converter of claim 2, wherein the first primary side inductance and the first secondary side inductance form a first ideal transformer, the second primary side inductance and the second secondary side The inductor constitutes a second ideal transformer, and the first ideal transformer has the same turns ratio as the second ideal transformer. The DC power converter of claim 3, wherein the DC power converter has a voltage gain of (2n+1) / (1-D), wherein n is the first ideal transformer or the second ideal The turns ratio of the transformer, D being the duty cycle of the first power switch or the second power switch. The DC power converter of claim 1, wherein the first end of the first primary side inductor, the second end of the first secondary side inductor, and the first end of the second primary side inductor are The first ends of the second secondary side inductor are respectively polarity end points. The DC power converter of claim 1, wherein the first power switch, the second power switch and the auxiliary switch are respectively an N-type power transistor, and the first power switch, the second The first end of the power switch and the auxiliary switch are respectively a drain, and the first end of the first power switch and the second power switch are respectively a source. The DC power converter of claim 1, wherein the second end of the first rectifying diode, the second end of the second rectifying diode, the first output diode, and the first The first ends of the two output diodes are respectively an anode, the first end of the first rectifying diode, the first end of the second rectifying diode, the first output diode and the second output two The second ends of the polar bodies are respectively cathodes. The DC power converter of claim 1, wherein the first power switch and the second power switch are switched from zero voltage to a turn-on state. The DC power converter described in claim 1 is applied to a regenerative power generation grid-connected system.