SU1659888A1 - Demodulator - Google Patents

Abstract

The invention relates to a pulse technique and can be used in information conversion systems and in measurement systems of industrial electrical network parameters, vibrations, etc. The purpose of the invention is to improve the demodulation accuracy. The demodulator contains an amplifier 1 and a block 8 for dividing the signals. The introduction of a relay element 2, a frequency multiplier 3, a pulse generator 4 connected in series to a pulse counter 5, a permanent storage device 6 and a digital-to-analog converter 7 to the demodulator made it possible to increase the demodulation accuracy by reducing the error from changes in the carrier frequency of the amplitude-modulated input signal. 2 Il.

Description

FIG. one

The invention relates to the field of impulse technology and can be used in information conversion systems and in measuring systems of parameters of industrial power grids, vibrations and

others

The aim of the invention is to improve the demodulation accuracy by reducing the errors from changes in the carrier frequency of an amplitude-modulated input signal.

FIG. 1 shows the functional scheme of the demodulator; in fig. 2 time diagrams of his work.

The demodulator contains an amplifier 1, a relay element 2, a frequency multiplier 3, a pulse shaper 4, a pulse counter 5, a persistent memory 6, a DAC 7 and a signal dividing unit 8, the input bus is connected to the input of amplifier 1, the output of which is connected to the dividend input block 8 dividing the signals and the input of the relay element 2, the output of which is connected to the combined inputs of the multiplier 3 frequencies and the driver 4 pulses, the outputs of which are connected respectively to the clock input and the input of setting the counter of pulses to zero to zero orogo via series connected a read only memory used and DAC 7 connected to the input divider unit dividing signals ,, 8 whose output is connected to an output device bus.

FIG. 2 shows the time diagrams of the demodulator operation, where the output signals of the device elements are indicated by U with indices corresponding to the numbers of the elements in the demodulator circuit.

The demodulator works as follows.

Input signal

Ute. (Il5ini i, (1)

where a; (t) is the envelope of the amplitude-modulated input signal;

 carrier frequency

enters the input of amplifier 1, the output of which at the same time generates a voltage

and, -K, “, () 511g1y g; (2).

where ki is the transmission coefficient of amplifier 1. The tp signal from the output of amplifier 1 is fed to the input of the relay element 2, which forms a sequence of pulses

iUe with (3) Oh with VKO, l

where Ue is the voltage corresponding to level 1.

If the frequency of the signal M (t) is much less than the frequency a) of the carrier, then the voltage Uz is a sequence of square-wave pulses with a duty cycle of 2, i.e. meander:

(Ue When,

WITH npnT / 2 t T,

where t

2n ft)

- carrier period.

five

0

five

0

five

0

five

The signal U2 is fed to the input of the multiplier 3 frequency, which generates short pulses with a frequency fz Uf n2tg / T. where n is a large number

,

The shaper 4 reset pulses, at the input of which rectangular pulses LJ2 act, at times corresponding to the positive edges of the pulses U2, generate short reset pulses U4, which arrive at the R input of counter 5 and set it at the beginning of each period to the initial zero state, corresponding entries in it zeros in all bits.

Binary counter 5 performs the role of a digital integrator with a reset at the beginning of each period. Its clock C input receives pulses from the output of multiplier 3 frequencies, as a result of which the number N 5 recorded in counter 5 in binary code increases linearly. In the permanent storage device 6, the function code F (ae) sinZ is stored. When a code corresponding to a linearly varying voltage is applied at the input of the permanent storage device 6, a digital signal is generated at the output of the binary counter 5. This signal from the output of the persistent storage device 6 is fed to the input of the DAC 7, the output of which forms the quasi-harmonic signal Uy Ue sin on. At the same time, the signal U is strictly synchronized with the input signal UBx and its frequency is equal to the frequency of the measured voltage UBX.

The signal splitter unit 8 performs the division of the amplified input signal Ui kiUex by the output signal of the D / A converter 7 U. A voltage is generated at its output

U7 k, e (t) s; ncot

ViT-n sincot k (tb

Where

U, k Jilk Ue

transmission coefficient.

From expression (4) it follows that the output signal of the demodulator with an accuracy of constant factor k is equal to the modulating voltage X (t). Since the output of the persistent storage device 7 is strictly synchronized with the input signal and has the same frequency as the carrier, it follows that the accuracy of the demodulator does not depend on changes in the frequency of a) the carrier.

Thus, the use of a relay element, a frequency multiplier, a reset pulse generator, a binary counter, a persistent storage device and a digital-analog converter converter in a known demodulator makes it possible to increase its accuracy by reducing the error due to changes in the frequency of the amplitude-modulated signal in auto-oscillatory systems.

The use of the proposed demodulator in various devices of electrical measuring equipment will improve their technical characteristics.

Claims (1)

Invention Formula The demodulator containing the amplifier, the input of which is connected to the input bus, and the output - to the input of the divisible signal dividing unit, the output of which is connected to the output bus, characterized in that in order to increase the demodulation accuracy, a relay element, a frequency multiplier, a pulse shaper and a pulse counter connected in series, a constant a storage device and a digital-analogue converter, the output of which is connected to the input of a divider of the signal dividing unit, while the output of the amplifier is connected to the input of the relay element, the output which is connected to the inputs of the frequency multiplier and pulse generator, the outputs of which are connected respectively to the clock input and the input of the installation in O of the pulse counter. Ut B About sh and" ABOUT 5 o C O at K A A A A A I / V v V v