RU2558749C1 - Power conversion device - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: electrical power conversion device includes a conversion circuit with several pairs of bidirectionally switched switching elements connected to the corresponding phases for conversion of alternating-current power to alternating-current electrical power. The first switching time is calculated, during which one of the switching elements of the circuit of the upper arm of one phase is switched on; the other switching elements of the circuit of the upper arm of the other phase are switched off. At least one switching element of the circuit of the lower arm of other phases is switched on, and the other switching elements of the circuit of the lower arm in one phase are switched off using voltages determined by means of a voltage determining device and an output value of a control command. The second switching time is calculated, during which several pairs of switching elements of one phase are switched on, and several pairs of switching elements of the other phases are switched off. The second switching time is such that during one period of alternating-current electrical power output from the conversion circuit and contained in the first half-period of one period is equal to the second switching time contained in the second half-period of one period.

EFFECT: preventing failure of switching in a power conversion device.

6 cl, 16 dwg

Description

FIELD OF TECHNOLOGY

[0001] The present invention relates to an electric power conversion device.

BACKGROUND

[0002] A control device for controlling an electric power converter is known, which comprises: a PWM rectifier (PWM rectifier), which performs the conversion of alternating current to direct current; and an inverter connected to the PWM rectifier to invert direct current to alternating current, the control device including: on-off phase modulation means for generating an output voltage control command to perform on-off phase modulation for the inverter; first compensation amount calculating means for calculating a compensation amount correcting the output voltage control command to compensate for an output voltage error generated when on-off phase modulation for the inverter is performed; means for generating PWM patterns of the inverter for generating PWM pulses for the semiconductor switching elements of the PWM rectifier based on an input current control command; switching determination means for determining the presence or absence of switching of the PWM rectifier; means for determining the absolute magnitude of the voltage to determine the voltage of the maximum phase, the voltage of the middle phase and the voltage of the minimum phase from the input voltage of each phase; and means for determining the polarity for determining the polarity of the load current, wherein the first means for calculating the amount of compensation calculates the amount of compensation correcting the output voltage control command using the output of the means for determining the absolute value of the voltage, the output of the means for determining the polarity, the output of the means for determining the switching, the inverter switching frequency, and dead time.

[0003] However, a problem arises in that the known control device for the electric power conversion device compensates only for the voltage error generated according to the switching, but cannot prevent the switching failure itself.

PRE-PUBLISHED DOCUMENTS

[0004] Patent Document 1. First Publication of Patent Application (Japan) (tokkai) No. 2006-20384.

SUMMARY OF THE INVENTION

[0005] An object of the present invention is to provide an electric power conversion device that can prevent switching failure.

[0006] The above problem can be solved by the present invention in such a way that a switching time calculation section and a control signal generating section are provided, configured to generate control signals for the switching elements based on the first switching time and the second switching time, wherein the switching time calculation section calculates the first switching time, which is the time during which one of the switching elements of the upper arm circuit and from several pairs of switching elements contained in one phase from the respective phases, other switching elements of the upper arm circuit from several pairs of switching elements contained in other phases are turned on, at least one switching element of the lower arm circuit of several pairs of switching elements contained in other phases are turned on, and other switching elements of the lower arm circuit of several pairs of switching elements contained in one phase are turned off, using using certain voltages determined by means of determining the voltage and the output value of the control command, and calculates a second switching time during which several pairs of switching elements contained in one phase from the corresponding phases are turned on, and several pairs of switching elements contained in other phases from the corresponding phases are turned off, using the carrier and the first switching time, and in this case, in one period of the electric power of the alternating current, th from the conversion circuit, the second switching time contained in the first half-cycle period is set to a second switching time contained in the second half-cycle period.

[0007] According to the present invention, the second switching time is equally allocated to the first half cycle and the second half cycle. Thus, overlapping switching operations between the first time for the second switching time and the last time for the second switching time may not be allowed. Therefore, the occurrence of a switching failure can be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIG. 1 is a block diagram of a charging system including an electric power conversion device in a preferred embodiment according to the present invention.

FIG. 2 is a block diagram of a charging system in a first comparative example.

FIG. 3 is a block diagram of a charging system in a second comparative example.

FIG. 4 is a block diagram of a controller controlling an electric power conversion device shown in FIG. one.

FIG. 5 is a graph representing a switching sequence of an R-phase switching element shown in FIG. one.

FIG. 6 is a diagram representing the relationship between the base vector and the voltage vector in the spatial vector modulation section shown in FIG. four.

FIG. 7 (a) is a diagram that is an addition of a combination of switching to the vector diagram of FIG. 6 and FIG. 7 (b) is a circuit diagram of an AC power source 1 and a matrix converter 4 in the charging system shown in FIG. one.

FIG. 8 is a conceptual diagram of a switching pattern table of FIG. four.

FIG. 9 (1) -9 (6) are diagrams for explaining transitions of switching elements in FIG. one.

FIG. 10 is a graph representing the relationship between the carrier and output time in the controller of FIG. four.

FIG. 11 is a graph representing a waveform of an output voltage of a matrix converter in FIG. one.

FIG. 12 is a graph representing another waveform of the output voltage of the matrix converter of FIG. one.

FIG. 13 is a graph representing a relationship between a carrier and a control command value and an output voltage waveform in an inverter device in a third comparative example.

FIG. 14 is a graph representing the relationship between the carrier and the output time and the waveform of the output voltage in the controller shown in FIG. four.

FIG. 15 is a graph representing a relationship between a carrier and an output time and an output voltage waveform in an electric power conversion device in a modification of a preferred embodiment according to the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0009] Hereinafter, a preferred embodiment according to the present invention based on the drawings is described.

FIRST PREFERRED EMBODIMENT

FIG. 1 is a block diagram of a battery system including an electric power conversion device associated with a preferred embodiment according to the present invention.

Hereinafter, as an example, a case is explained in which an electric power conversion device in this embodiment is applied to a charging system, but this embodiment can be applied to a vehicle or the like including an electric motor, and to a control device controlling an electric motor, etc.

[0010] The charging system in this embodiment includes: an AC power source 1; input filter 2; voltage sensors 31-33; matrix converter 4; high frequency transformer circuit 5; output filter 6; and battery 7.

[0011] The AC power source 1 is a three-phase AC power source and provides an electric power source for the charging system. The input filter 2 is a filter for rectifying the AC electric power input from the AC power source 1, and is constructed by means of LC circuits having coils 21, 22, 23 and capacitors 24, 25, 26. Coils 21, 22, 23 are connected between the corresponding phases of the AC power source 1 and the matrix converter 4. Capacitors 24, 25, 26 are connected between the coils 21, 22, 23 and connected between the respective phases.

[0012] Voltage sensors 31, 32, 33 are connected between the AC power source 1 and the matrix converter 4 to determine the input voltage (V _r , V _s , V _t ) of each phase from the AC power source 1 to the matrix converter 4, and outputs certain voltages to the controller 10, as described below. The voltage sensor 31 is connected to the midpoint of the R-phase of the matrix converter 4, the voltage sensor 32 is connected to the midpoint of the S-phase of the matrix converter 4, and the voltage sensor 33 is connected to the midpoint of the T-phase of matrix converter 4.

[0013] The matrix converter 4 comprises a plurality of switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn bi-directionally switched, converts the alternating current electric power inputted from the alternating current electric power source 1 to high-frequency electric power alternating current and outputs the high-frequency electric power of alternating current into the circuit 5 of the high-frequency transformer. The matrix converter 4 is connected between the input filter 2 and the high-frequency transformer circuit 5. A switching element S _rp to provide a bi-directionally switched element includes: a transistor Tr _rp1 , for example, a MOSFET transistor or an IGBT transistor; transistor Tr _rp2 , for example, a MOSFET transistor or an IGBT transistor; diode D _rP1 ; and diode D _rP2 . The transistor Tr _rp1 and the transistor Tr _rp2 are connected in series to each other in mutually opposite directions, and the diode D _rP1 and the diode D _rP2 are connected in series to each other in mutually opposite directions, the transistor T _rp1 and the diode D _{rP1 are} connected in parallel to each other in mutually opposite directions , the transistor Tr _rp2 and the diode D _{rP2 are} connected in parallel to each other in mutually opposite directions. Similarly, other switching elements S _rn , S _sp , S _sn , S _tp , S _{tn are} constructed by means of a bridge circuit from transistors Tr _rn1 , Tr _rn2 and diodes D _rn1 , D _rn2 , a bridge circuit from transistors Tr _sp1 , Tr _sp2 and diodes D _sp1 , D _sp2 , the bridge circuit from the transistors Tr _sn1 , Tr _sn2 and the diodes D _sn1 , D _sn2 , the bridge circuit from the transistors Tr _tp1 , Tr _tp2 and the diodes D _tp1 , D _tp2 and the bridge circuit from the transistors Tr _tn1 , Tr _tn2 and diodes D _tn1 , D _tn2 .

[0014] In other words, three of the pair of circuits in which two switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn are connected in series are connected in parallel to the primary side of the transformer 51. Then, the bridge circuit in of which three lines connected between the respective pairs of switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn , are electrically connected to the three sections of the output phase of the AC power source 1, constitutes a three-phase to single-phase matrix converter 4.

[0015] The high-frequency transformer circuit 5 includes a transformer 51 and a rectifier bridge circuit 52 and is connected between the matrix converter 4 and the output filter 6. The high-frequency transformer circuit 5 converts the high-frequency AC electric power inputted from the matrix converter 4 into DC electric power and supplies electric power of direct current to the battery 7 through the output filter 6. The transformer 51 increases the voltage of high-frequency alternating current, introduced output from the matrix converter 4, and outputs this increased alternating current to the rectifier bridge circuit 52. It should be noted that since the AC electric power output from the matrix converter 4 is high frequency, a small transformer can be used as a transformer 51. The rectifier bridge circuit 52 is a circuit in which a plurality of diodes are connected in a bridge configuration, and serves to convert alternating current of the secondary side of the transform torus 51 in direct current.

[0016] The output filter 6 is constructed by means of an LC circuit from a coil 61 and a capacitor 62 and is connected between the high frequency transformer circuit 5 and the battery 7. The output filter 6 rectifies the direct current electric power output from the high frequency transformer circuit 5 and supplies the direct current electric power into the battery 7. The battery 7 is a secondary cell charged by the charging system in this embodiment, and is constructed, for example, by recharging a lithium-ion of the battery. The battery 7, for example, is mounted in a vehicle and provides a dynamic source (power) of the vehicle.

[0017] Thus, the charging system in this embodiment converts the alternating current from the alternating current power source 1 to the high-frequency alternating current, increases the high-frequency alternating current through the high-frequency transformer circuit 5, converts the increased alternating current to direct current, and supplies the increased direct current electric power and high voltage to the battery 7.

[0018] Features of the charging system shown in FIG. 1 using an electric power conversion device in this embodiment are explained in comparison with comparative example 1 and another comparative example 2 described below. FIG. 2 shows a block diagram of a charging system associated with comparative example 1, and FIG. 3 shows a block diagram of a charging system associated with comparative example 2.

As a charging system different from the preferred embodiment according to the present invention, such a system is known as shown in FIG. 2, in which the alternating current electric power supplied from the alternating current power source 1 is passed through a transformer 101 and converted into direct current electric power through a rectifier 102 (comparative example 1).

In addition, as another charging system different from the charging system in this embodiment, a system is known as shown in FIG. 3, in which the alternating current from the AC power source 1 is converted to direct current through a PWM rectifier 201, the direct current is inverted to alternating current through the primary side inverter circuit 203 of the high-frequency transformer circuit 20, the converted alternating current is boosted by the transformer 204, the increased alternating current is converted to direct current through a rectifier bridge circuit 205 of the high-frequency transformer circuit 202, and direct current is supplied to the battery 7 (comparative example 2).

[0019] In the case of comparative example 1, the circuit structure is simple, but the transformer 101 becomes large. In addition, there is a problem in that it becomes necessary to connect a large-capacity electrolytic capacitor between the rectifier 102 and the overvoltage breaker 103.

In the case of comparative example 2, although a small transformer can be used as transformer 204, the losses become large because the number of conversions is large. In addition, there is a problem in that it is necessary to connect a large-capacity electrolytic capacitor between the PWM rectifier 201 and the high-frequency transformer 202.

[0020] In this embodiment, since, as described above, using the matrix converter 4 makes it possible to reduce losses caused by the conversion of electric power, it makes it possible to make a large-capacity electrolytic capacitor on the primary side of the transformer 51 and allows to achieve the small size of the transformer 51.

[0021] Next, a controller 10 controlling a matrix converter 4 included in an electric power conversion device in this embodiment is explained, in FIG. 4. FIG. 4 shows a block diagram of a controller 10. The controller 10 turns on and off the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn and controls the matrix converter 4 via PWM control. The controller 10 includes: a coordinate conversion section 11; section 12 modulation of spatial vectors; section 13 calculating the output time of zero vectors; table 14 switching patterns; and a switching signal generation section 15.

[0022] The coordinate conversion section 11 compares certain voltages detected by voltage sensors 31, 32, 33, finds out the relationship of the absolute values between them, performs a three-phase to two-phase conversion for certain voltages (V _r , V _s , V _t ) in a fixed system coordinate, which must be converted into voltage (v _α , v _β ) in the static coordinate system, and outputs the voltage (v _α , v _β ) in section 12 of the modulation of spatial vectors. The spatial vector modulation section 12 replaces the three-phase voltage waveforms with a vector using spatial vector modulation. Thus, the times (T ₁ , T ₂ ) of the output of the voltage vectors are calculated using the phase angle (θ) of the stresses (v _α , v _β ).

[0023] The null vector output time calculating section 13 calculates the null vector output time (T _z ) using a carrier signal such as a triangular wave and the time calculated by the spatial vector modulation section 12. The frequency of the carrier signal is set above the frequency of the electrical power of the alternating current of the AC power source 1. The switching pattern table 14 stores a switching pattern preset with the ability to switch the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn corresponding to the phase angle (θ) in the form of a table.

[0024] The switching signal generating section 15 extracts the switching pattern corresponding to the phase angle (θ) by referring to the switching pattern table 14 and outputs control signals (D _rp , D _rn , D _sp , D _sn , D _tp , D _tn ), to enable or disable switching elements (S _rp , S _rn , S _sp , S _sn , S _tp , S _tn ) using the extracted switching pattern, times (T ₁ , T ₂ ) of the output of the voltage vector and time (T _z ) of the output of the zero vector into the excitation circuit (not shown) included in the matrix converter 4. Switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} controlled by pulse signals. Thus, turning on and off the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn included in the matrix converter 4 is switched so as to turn on and off by controlling the controller 10, and the electric power is converted.

[0025] The following describes switching control of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn using FIG. 5.

FIG. 5 shows a graph representing a switching sequence for switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn .

In FIG. 5, high indicates on, and low indicates off. The voltage switching system (method) is used to switch the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn . The controller 10 monitors the relationship of the absolute values of the input voltages from certain voltages (V _r , V _s , V _t ) in order to perform switching. Suppose that the state Tr _rp1 , Tr _rp2 , Tr _sp1 , Tr _sp2 transitions from the initial state in sequences i, ii, iii, and iv.

[0026] Hereinafter, a specific example of a voltage switching system (method) is described.

For simplicity of explanation, only switching control for the upper arm circuit of matrix converter 4 is described below.

Assume that the transistors Tr _rp1 , Tr _rp2 included in the switching element S _rp are in the on state, and the transistors Tr _sp1 , Tr _sp2 included in the switching element S _sp are in the off state. Next, a case is explained in which in a state in which the voltage of the switching element S _{rp is} higher than the voltage of the switching element S _sp , switching is performed from the switching element S _rp to the voltage in the switching element S _sp .

[0027] First, when the state transitions from the initial state to state (i), the transistor Tr _{sp1 is} turned on, when the state transitions from state (i) to state (ii), the transistor Tr _rp1 turns off when the state transitions from state (ii) to state (iii), the transistor Tr _{sp2 is} turned on, and when the state transitions from state (iii) to state (iv), the transistor Tr _{rp2 is turned} off. This causes the switching elements to switch, so that the AC power source 1 is not short-circuited. Thus, switching disturbance is excluded.

[0028] Next, control in the controller 10 is described using FIG. 1, 4 and 6-12.

[0029] When the voltage (v _α , v _β ) in the static coordinates of the coordinate system transformed and calculated by the coordinate transformation section 11 is input to the spatial vector modulation section 12, the spatial vector modulation section 12 calculates the phase angle (θ) of the voltage (v _α , v _β ) from the introduced voltage (v _α , v _β ). It should be noted that the voltage (v _α , v _β ) and the phase angle (θ) are represented by a vector, as shown in FIG. 6. FIG. 6 shows a vector diagram in which certain voltages (V _r , V _s , V _t ) are converted into a two-phase coordinate system αβ, and input voltages are observed as voltage vectors in a static coordinate system. V _a in FIG. 6 represents the base vector and corresponds to the output value of the control command having a phase angle (θ) of the input voltage in the coordinate system αβ. The base vector rotates with the center point shown in FIG. 6, as a center in accordance with the relationship of the absolute values between the input voltages of the respective phases.

[0030] In this embodiment, in a static coordinate system, the coordinates are divided 60 degrees into six areas from the α-axis in a counterclockwise direction. Axes V ₁ -V ₆ are distinguished by the boundary lines of the respective regions. The region between V ₁ and V _{2 is} allowed as “region 1”, the region between V ₂ and V _{3 is} allowed as “region 2”, the region between V ₃ and V _{4 is} allowed as “region 3”, the region between V ₄ and V _{5 is} allowed as "region 4", the region between V ₅ and V _{6 is} allowed as "region 5" and the region between V ₆ and V _{1 is} allowed as "region 6". In addition, V ₇ -V ₉ are allocated to the origin.

Then, the vectors V ₁ -V ₉ are the voltage vectors deduced from the matrix converter 4. The vectors V ₁ -V ₆ having absolute values as vectors (non-zero) represent that non-zero voltages are output from the matrix converter 4. In other words, vectors V ₁ -V ₆ correspond to non-zero voltage vectors (hereinafter referred to as "voltage vectors"). On the other hand, vectors V ₇ -V ₉ represent zero voltage (zero voltage) vectors (hereinafter referred to as "zero vectors").

[0031] In addition, in this embodiment, the voltage vectors V ₁ -V ₉ are set according to mutually different switching patterns S _rp , S _rn , S _sp , S _sn , S _tp , S _tn , and switching patterns in order to control The switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} determined depending on which region the input voltages belong to. It should be noted that the relationship between the voltage vectors V ₁ -V ₉ and the switching pattern is described below.

[0032] Then, the spatial vector modulation section 12 determines which region the input voltage belongs to at the time of determination from the phase angle (θ) of the basis vector v _a . In the example shown in FIG. 6, since the base vector v _a is in region 1, the spatial vector modulation section 12 determines that the input voltage belongs to region 1 from the phase angle (θ) of the voltage (v _α , v _β ). In addition, for example, if the relationship between the absolute values of the input voltages (V _r , V _s , V _t ) of the corresponding phases changes, and the phase angle (θ) of the stress coordinates (v _α , v _β ) along the αβ axis, converted according to the section 11 coordinate transformation, indicates 90 degrees, the spatial vector modulation section 12 identifies a region 2 including a phase angle of 90 degrees.

[0033] The modulation section 12 calculates the vectors of spatial voltage vector output time of the vector component of the base region of the axis (V _a), when the region is identified.

In the case of the example shown in FIG. 6, the base vector (V _a ) belongs to region 1. The spatial vector modulation section 12 computes the component (V _a1 ) along the V ₁ axis and the component (V _a2 ) along the V ₂ axis using the V ₁ axis and V ₂ axis, which are the axes areas 1. Then, the absolute value (V _a1 ) of the component along the V ₁ axis is the output time of the switching pattern corresponding to V ₁ , and the absolute value (V _a2 ) of the component along the V ₂ axis is the output time of the switching pattern corresponding to V ₂ . It should be noted here that the output times of the voltage vectors V ₁ -V ₆ are allowed as T ₁ , T ₂ , and the output times of the zero vectors (V ₇ -V ₉ ) are allowed as T _z . As described below, in this embodiment, two voltage vectors are output during the half-cycle of the first half of the carrier. Therefore, the output time of the first voltage vector from two voltage vectors is allowed as T ₁ , and the output time of the second voltage vector is allowed as T ₂ .

[0034] Each output time (T ₁ , T ₂ , T _z ) is represented by a normalized time corresponding to a carrier period.

As described below, in this embodiment, in order to provide a time (T _z ) for outputting the zero vectors (V ₇ -V ₉ ) per half carrier period, a limitation is imposed on the output times (T ₁ , T ₂ , T _z ). The spatial vector modulation section 12 calculates the output times (T ₁ , T ₂ ) so that each of the output times (T ₁ , T ₂ ) during which the corresponding one of the two voltage vectors is output is equal to or lower than the predetermined minimum limit value. It should be noted that the predefined minimum limit value corresponds to the time during which the output time (T _z ) is provided, and is set equal to the time that is less than the time corresponding to the half-period of the carrier.

[0035] Region 1 is the region between the phase angle of 0-60 degrees. For example, if the phase angle of a reference vector (v _a) falls between 0 and 30 degrees, the absolute value (V _a1) component along the axis V ₁ exceeds the absolute value of (V _a2) component V ₂ axis. Therefore, the time (T ₁ ) of the output of the switching pattern V ₁ exceeds the time (T ₂ ) of the output of the switching pattern V ₂ . Region 4 is the region between a 180 degree phase angle and a 240 degree phase angle. For example, the phase angle of the basis vector (v _a ) varies from 210 to 240 degrees, the absolute value (Va5) of the component along the V ₅ axis exceeds the absolute value (Va4) of the component along the V ₄ axis. Therefore, the time (T ₂ ) of the output of the switching pattern V ₅ exceeds the time (T ₁ ) of the output of the switching pattern V ₄ .

Thus, the spatial vector modulation section 12 calculates the phase angle (θ) using v _α , v _β corresponding to the determined voltages of the corresponding phases, calculates the times (T ₁ , T ₂ ) of the output of the voltage vectors from the base vector V _a having the calculated phase angle (θ) as a directional component, and outputs the calculated output times (T ₁ , T ₂ ) to section 13 for calculating the output time of the zero vectors.

[0036] The null vector output time calculation section 13 subtracts the total time from the output time (T ₁ ) and the output time (T ₂ ) from a predetermined half period of the carrier period to calculate the time of the zero vector (T _z ). Since the spatial vector modulation section 12 calculates the output time (T ₁ ) and the output time (T ₂ ) such that the above total time is equal to or lower than the predetermined minimum time limit, the zero vector output time calculation section 13 can calculate the zero vector time (T _z ). In this embodiment, in order to provide alternating current for the output electric power of the matrix converter 4, a time at which a non-zero voltage is output and a time at which a zero voltage is output are periodically provided.

Since the carrier period corresponds to the output voltage period, the zero-vector output time (T _z ) is the subtraction of the output time (T ₁ ) and the output time (T ₂ ) from the time corresponding to the half-period of the carrier. Section 13 calculating the output time of the zero vectors outputs the time (T _z ) of the zero vector and the times (T ₁ , T ₂ ) of the voltage vectors in section 15 of the formation of switching signals.

[0037] The switching signal generating section 15 generates switching signals to drive the switching elements S _rp , S _rn , S _sp , _{Sn sn} , S _tp , S _tn using the switching pattern stored in the switching pattern table 14, the time of the zero vector ( T _z ) and times (T ₁ , T ₂ ) of the voltage vectors.

[0038] Before the control contents of the switching pattern table 14 and the switching signal generating section 15 are described in detail, the relationship between the vectors (V ₁ -V ₉ ) and the phase angle (θ) and the switching pattern using FIG. 7 (a) and 7 (b).

FIG. 7 (a) is an explanatory view of the vector diagram of FIG. 6 to which a switching pattern is added. FIG. 7 (b) shows a simplified circuit diagram of an AC power source 1 and an array converter 4 from the charging system of FIG. 1. It should be noted that the “1” shown in FIG. 7 (a) indicates an on state, and “0” indicates an off state.

[0039] As shown in FIG. 7 (a) and 7 (b), the vectors (V ₁ -V ₉ ) correspond to the switching pattern of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn . In the voltage vector (V ₁ ), the switching elements S _rp , S _tn are turned on, and the other switching elements S _rn , S _sp , S _sn , S _{tp are} turned off. In the voltage vector (V ₂ ), the switching elements S _sp , S _tn are turned on, and the other switching elements S _rp , S _rn , S _sn , S _{tp are} turned off. In the vector (V ₃ ), the voltage switching elements S _rn , S _sp are turned on, and the other switching elements S _rp , S _sp , S _tp , S _{tn are} turned off.

In the vector (V ₄ ), the voltage switching elements S _rn , S _tp are turned on, and the other switching elements S _rp , S _sp , S _sn , S _{tn are} turned off. In the vector (V ₅ ), the voltage switching elements S _sn , S _tp are turned on, and the other switching elements S _rp , S _rn , S _sp , S _tp , S _{tn are} turned off. In the vector (V ₆ ), the voltage switching elements S _rp , S _sn are turned on, and the other switching elements S _rn , S _sp , S _tp , S _{tn are} turned off.

In other words, in the voltage vectors (V ₁ -V ₆ ), one of the switching elements S _rp , S _sp , S _tp of the upper arm circuit contained in one phase of the corresponding phases is turned on, and the other switching elements S _rp , S _sp , S _tp upper arm circuits contained in other phases turn off at least one of the switching elements S _rn , S _sn , S _tn lower arm circuits contained in other phases are turned on, and other switching elements S _rn , S _sn , S _tn, the lower arm circuits contained in one phase are turned off.

[0040] Then, if the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} controlled by a switching pattern corresponding to the voltage vectors (V ₁ -V ₆ ), a non-zero voltage is output to the output side of the matrix converter 4. In addition, since two vectors that provide the boundaries of two adjacent regions are used in accordance with the regions, waveforms of different voltage levels can be output from the matrix converter 4.

[0041] In addition, in the vector diagrams shown in FIG. 6, 7 (a) and 7 (b), the switching pattern is allocated to the zero vectors (V ₇ -V ₉ ) shown at the origin of FIG. 7 (a). The vector (V ₇₎ switching elements S _rp, S _rn included, and other switching elements _{S sp, S sn, S tp} , S tn are turned off. In the vector (V ₈ ), the switching elements S _sp , S _sn are turned on, and the other switching elements S _rp , S _rn , S _tp , S _tn are turned off. In the vector (V ₉ ), the switching elements S _tp , S _tn are turned on, and the other switching elements S _rp , S _rn , S _sp , S _sn are turned off.

In other words, in the zero vectors (V ₇ -V ₉ ), the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn contained in one phase from the corresponding phases are turned on, and the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn contained in other phases are turned off.

[0042] If the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} controlled by a switching pattern corresponding to zero vectors (V ₇ -V ₉ ), the output of the matrix converter 4 indicates zero.

[0043] As described above, one of the areas is identified according to the phase angle (θ). Then, the output voltage vectors (V ₁ -V ₆ ) and the output time (T ₁ , T ₂ ) are determined. In addition, section 13 calculating the output time of zero vectors calculates zero vectors (V ₇ -V ₉ ) and their time (T _z ) output. Since the matrix converter 4 is set to output AC electric power as a target, reversing and controlling the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn in the second half of the carrier period to control switching in the first half of the carrier period so that an output electric power having a reverse polarity with respect to the first half of the carrier period can be obtained.

Then, in this embodiment, the switching pattern table 14 stores the switching pattern, which is set according to the areas of FIG. 6. In addition, the switching signal generation section 15 calculates the corresponding vector output times (V ₁ -V ₉ ) for the carrier period from the time vectors (T ₁ , T ₂ ) of outputting the voltage vectors and the time (T _z ) of outputting the zero vectors and generates switching signals.

[0044] The following describes a table stored in a switching pattern table 14 using FIG. 8. FIG. 8 is a conceptual diagram representing a table stored in a switching pattern table 14.

In FIG. 8, regions 1-6 correspond to regions 1-6 shown in FIG. 6. V ₁ -V ₉ correspond to the vectors (V ₁ -V ₉ ). In FIG. 8, S _rp , S _rn , S _sp , S _sn , S _tp , S _tn correspond to the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn . In addition, for states (1) to (6) in FIG. 8, since one carrier period is divided into six, when matching the output times (T ₁ , T ₂ , T _z ), states (1) - (6) are retrieved in time series from a section of the apex point on the carrier curve.

[0045] In order to output the alternating current from the matrix converter 4, the matrix pattern table 14 sets the switching pattern so that two voltage vectors and one zero vector are sequentially output in the first (previous) half period of the carrier period, and two voltage vectors and one zero vector are sequentially are displayed in the second (subsequent) half-period of the carrier period.

[0046] For example, if the base vector (v _a ) belongs to region 1, the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} controlled in the sequence of the voltage vector (V ₁ ), vector (V ₂ ) voltage, zero vector (V ₈ ), vector (V ₅ ) voltage, vector (V ₄ ) voltage and zero vector (V ₇ ) per each carrier period. The control transition of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn in region 1 is shown in FIG. 9. FIG. 9 shows a circuit diagram to which a circuit diagram of an AC power source 1 and a matrix converter 4 is simplified.

The on or off state of the respective switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn in the respective states (1) to (6) and the direction of the current flowing through the primary side of the transformer 51 are indicated by arrows.

[0047] As shown in FIG. (1) to (6) of FIG. 9, in the event that a transition is made from one state to a subsequent state, for example, from state (1) to state (2) from state (2) to state (3), etc., the controller 10 turns on (turns on from off state) switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn of} any one shoulder circuit from the upper arm circuit and lower arm circuit and maintains the switched state of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn of} another shoulder scheme. In other words, from the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn , each of which is in the on state, one of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn is} turned off, but the state of the other of the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn is} maintained (fixed).

[0048] In addition, if the transition of each state is carried out continuously, for example, states (1), (2) and (3), states (3), (4) and (5), etc., switching S _rp , S _sp , S _tp elements of the upper arm circuit or switching elements S _rn , S _sn , S _tn of the lower arm circuit are not continuously switched. In other words, the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn alternately switch between the upper arm circuit and the lower arm circuit.

[0049] Thus, in this embodiment, the number of times when the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn are switched when the state transitions between the respective states (1) to (6 ) to rule out a commutation violation. It should be noted that the switching pattern of region 1 is explained, but for regions from regions 2-6, identical switching control is performed under identical conditions according to a pattern reducing the number of times when switching is performed.

[0050] It should be noted that, as shown in (1) to (6) of FIG. 9, in states (1) to (3), the output current of matrix converter 4 indicates plus, and in states (4) to (6), the output current of matrix converter 4 indicates minus. Thus, the output of the matrix converter 4 indicates alternating current through the switching controls S _rp , S _rn , S _sp , S _sn , S _tp , S _tn in the switching pattern of region 1 of table 14 of the switching patterns. It should also be noted that for region 2, region 3, region 4, region 5, and region 6, the switching control in the pattern shown in FIG. 8 is similarly performed in order to provide alternating current for outputting the matrix converter 4.

[0051] Then, since regions 1-6 are classified according to the phase angle, the switching pattern table 14 stores the switching pattern corresponding to the phase angle (θ).

[0052] The following describes the control of the switching signal generation section 15 using FIG. 10.

FIG. 10 is a graph for explaining a relationship between a carrier and output times (T ₁ , T ₂ , T _z ).

First, the switching signal generation section 15 sets the values of the control commands corresponding to the output times (T ₁ , T ₂ ), taking into account synchronization with the carrier period.

Since the controller 10 performs the switching control via the PWM control method, the durations (T ₁ , T ₂ , T _z ) of the output of the voltage vectors and the zero vector indicate the value of the control command (voltage value).

When control command values are set for output times (T ₁ , T ₂ , T _z ), control command values are normalized so that the maximum carrier amplitude becomes output times (T ₁ , T ₂ , T _z ), during which two vectors are output voltage and one zero vector. In addition, for the distribution of the output times of the voltage vectors and the zero vector, during the first half-period of the carrier period, the values of the control commands are set in such a way that the voltage vectors on the side are primarily clockwise derived in the corresponding regions 1-6 from the vectors (V ₁ -V ₆ ) the voltage shown in FIG. 6. After two voltage vectors are output, the values of the control commands are set so that zero vectors are output (V ₇ -V ₉ ).

On the other hand, the values of control commands are set in such a way that in the second half-period of the carrier, the output times of two vectors (V ₁ -V ₆ ) are reversed relative to the times of output in the first half-period of the carrier period and are output, and then zero vectors are output (V ₇ - V ₉ ).

[0053] As a specific example, if the phase angle (θ) falls within the range of 0-30 degrees (region 1), as shown in FIG. 10, the switching signal generation section 15 sets the control command value (T ₁ ) at a level corresponding to the output time (T ₁ ) of the relatively low carrier level, and sets the control command value (T ₂ ) by summing the level corresponding to the output time (T ₂ ) , with the value (T ₁ ) of the control command as the reference level in the first half-cycle of the carrier. On the other hand, in the second carrier half-cycle, the switching signal generating section 15 sets the control command value (T ₂ ) at a level corresponding to the output time (T ₂ ) lowered from the carrier high level and sets the control command value (T ₁ ) at the level corresponding to the time (T ₁ ) output with the value (T ₂ ) of the control command, as a reference level.

[0054] The switching signal generating section 15 compares the carrier with the predetermined values of the control commands to determine a distribution of output times of the voltage vectors and the zero vector.

In addition, as described above, the values of the control commands are set relative to the times (T ₁ , T ₂ , T _z ) of the output and compared with the carrier, so that six states are calculated per carrier period. However, six states correspond to states (1) to (6) shown in FIG. 8. In other words, the switching signal generating section 15 compares the carrier output times (T ₁ , T ₂ , T _z ) to determine the distribution of the output times of the switching combination stored in the carrier table 14 for switching.

[0055] The switching signal generating section 15 compares the carrier with the output times (T ₁ , T ₂ , T _z ) to determine the distribution of output times, as shown in FIG. 10. At this time, the switching signal generation section 15 extracts the switching pattern in accordance with the phase angle (θ) from the switching pattern table 14, generates switching signals for the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn to be excited, according to the extracted pattern, according to the distribution of output times, and outputs switching signals to the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn .

[0056] In particular, if the phase angle (θ) falls within the range of 0-30 degrees, the switching pattern of region 1 in FIG. 8. During the output time (T ₁ ) with the apex point on the carrier curve, the switching control that outputs the voltage vector (V ₁ ) is performed as the starting point. During the subsequent output time (T ₂ ), switching control is performed to output the voltage vector (V ₂ ). For an additional subsequent output time (T _z ), switching control is performed to output the zero vector (V ₈ ). Then, during the second half-cycle of the carrier, during the output time (T ₂ ) of the output with the peak peak of the carrier as the starting point, switching control is performed to output the voltage carrier (V ₅ ). During the subsequent output time (T ₁ ), switching control is performed to output the voltage vector (V ₄ ). For additional output time (T _z ), switching control is performed to output the zero vector (V ₇ ).

[0057] The waveform of the output voltage of the matrix converter 4 is described using FIG. 11 and 12.

FIG. 11 shows a time characteristic of the waveform of the output voltage of the matrix converter 4 in case the output time (T ₁ ) exceeds the output time (T ₂ ).

FIG. 12 shows another time characteristic of the waveform of the output voltage of the matrix converter 4 in case the output time (T ₂ ) exceeds the output time (T ₁ ).

If the phase angle (θ) falls within the range of 0-30 degrees, the output time (T ₁ ) becomes longer than the output time (T ₂ ). Thus, the voltage waveform outputted from the matrix converter 4 changes as shown in FIG. 12. In addition, if the phase angle (θ) is in the range of 30-60 degrees, the output time (T ₂ ) becomes longer than the output time (T ₁ ), and the output voltage waveform output from the matrix converter 4 varies as shown in FIG. 12.

[0058] As described above, in this embodiment, the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _{tn are} controlled using output times (T ₁ , T ₂ ) outputting voltage vectors and time ( T _z ) of the output outputting the zero vector to set the time (T _z ) of the output included in the first half of the carrier equal to the time (T _z ) of the output included in the second half of the carrier. As described above, since the zero-vector output time (T _z ) is provided, an interval is provided between the switching operation at the initial time for the zero-vector output time (T _z ) and the late-time switching operation (T _z ) of the output, so that the overlap between switching operations at the initial time and recently are not allowed, and switching disturbance can be prevented.

[0059] In this regard, as an difference from this embodiment, an inverter device is known (comparative example 3), in which, in a three-phase inverter circuit formed by a bridge circuit having a plurality of switching elements, with certain voltages from the intermediate voltages of the respective phases specified as the values of the control commands (v _u *, v _v *, v _w *), certain voltages are compared with a triangular wave carrier to control the switching elements.

FIG. 13 shows the waveforms of the carrier signal and the values of the control commands (v _u *, v _v *, v _w *) and the waveform of the output voltage of the inverter circuit.

As shown in FIG. 13, comparative example 3 uses a theoretical equation that controls the level of the output voltage when the carrier exceeds the value of the control command, and controls in such a way as to reverse the theoretical equation with a peak and a depression in the carrier curve as boundaries. In other words, in comparative example 3, an output voltage level is set by comparing certain voltages and a carrier, and AC output is controlled. Therefore, the intervals of zero voltage (correspond to α1, β1 in Fig. 13) deviate relative to the period of the carrier.

Then, since one of the zero voltage intervals (α1 in FIG. 13) becomes relatively short, the switching operation interval becomes accordingly short at the first time of the zero voltage interval and at the last time of the zero voltage interval. Therefore, a switching violation occurs.

In addition, in this comparative example 3, the zero voltage interval is not prescribed as a predetermined interval with respect to the carrier period. Thus, the problem arises that controlling the time during which the zero voltage is output becomes complicated.

[0060] Since, in this embodiment, a zero vector output time (T _z ) is provided with respect to the carrier period, the switching operation interval at the initial time of the zero voltage interval and the last time of the zero voltage interval is prevented, and switching failure can be prevented.

In other words, as shown in FIG. 14, the output interval of the zero vector is equally allocated to each half-cycle of the carrier. Therefore, the time (T _z ) of the output of the zero vector is not reduced excessively, so that the occurrence of a switching failure can be prevented.

In addition, the number of times that a short pulse is generated when controlling the switching elements S _rp , S _rn , S _sp , S _sn , S _tp , S _tn can be reduced so that such disadvantages can be prevented that the load is concentrated on the switching elements and applied to switching elements. In addition, in this embodiment, switching signal operation modes when performing PWM control and switching patterns can be freely set. It should be noted that FIG. 14 shows a graph for explaining the relationship between the carrier and the times (T ₁ , T ₂ , T _z ) of the output, and shows a time characteristic of the output voltage of the matrix converter 4.

[0061] In addition, in this embodiment, the output time (T _z ) is set to a duration that is the result of subtracting the output times (T ₁ , T ₂ ) from the time corresponding to the carrier half-cycle. Thus, since the time (T _z ) of outputting the zero vector is provided, the interval of switching operations between the switching operation at the first (initial) point in time for the time (T _z ) of outputting the zero vector and the switching operation in recent times is provided. Therefore, overlapping switching operations between the first time for the output time (T _z ) and the last time for the output time (T _z ) is prevented, so that switching failure can be prevented.

[0062] In addition, in this embodiment, the switching elements are controlled through an output time (T ₁ ) during which one switching element of the switching elements contained in the upper arm circuit is turned on and one switching element of the switching elements contained in the lower arm circuit a shoulder is included, and the time (T ₂₎ O, in which the other element of the switching elements in the upper arm circuit is turned on and the other switching element of the switching elements contained in a Birmingham lower arm is turned on. Thus, since the time of outputting the zero vector is ensured, overlapping switching operations between the first moment of time for the time of outputting the zero vector and its last moment of time can be prevented. Therefore, switching failure can be prevented.

[0063] In addition, in this embodiment, the output time (T ₁ ) is the time before the output time (T ₂ ) at the first (initial) carrier half-cycle, and the output time (T ₁ ) is time after the last output time (T ₂ ) carrier half-life. This allows you to achieve equalization of the output time of the zero vector according to the positive side and the negative side of the output voltage of the matrix Converter 4.

[0064] In addition, in this embodiment, the output times (T ₁ , T ₂ , T _z ) are calculated from the converted voltages by the coordinate conversion section 11, a table 14 of switching patterns is accessed, and switching elements (S _rp , S _rn , S _sp , S _sn , S _tp , S _tn ) are controlled by a switching pattern corresponding to the transformed voltage phase. Thus, since the time (T _z ) of outputting the zero vector is ensured, switching failure can be prevented.

[0065] It should be noted that, in this embodiment, with the apex (point) of the trough on the carrier curve as the starting point, the output times (T ₁ , T ₂ ) of the two voltage vectors are composed first, and then the output time (T _z ) is composed zero vector. However, it is not always necessary to compose the output times in this sequence.

For example, as shown in FIG. 15, during the half-period of the carrier, the time (T _z / 2) at half the time (T _z ) of outputting the zero vector can be arranged, then the times (T ₁ , T ₂ ) of the output of two voltage vectors can be arranged, and finally, the time ( T _z / 2) in half the remaining time (T _z ) output.

In addition, in this embodiment, the output times (T ₁ , T ₂ ) and the output time (T _z ) of the output are allocated so that they correspond to the half-cycle of the carrier. However, it is not always necessary to correspond to the half-cycle of the carrier.

These output times may have such a correspondence that they are less than the half-period of the carrier or, alternatively, exceed the half-period of the carrier.

In addition, a predetermined smaller limit time in the spatial vector modulation section 12 is not always less than a half-period of a carrier, and may be less than a time partially corresponding to a period of a carrier.

[0066] In addition, in this embodiment, the output times (T ₁ , T ₂ ) are controlled so as to output two voltage vectors (V ₁ -V ₆ ) per half carrier period. The voltage vectors are not always two voltage vectors (V ₁ -V ₆ ), but can be one voltage vector (V ₁ -V ₆ ) or, alternatively, three voltage vectors (V ₁ -V ₆ ). In addition, the switching pattern shown in FIG. 8 is just one example. A different pattern of voltage vectors and zero vectors can be used instead, and a different switching pattern can be used to output voltage vectors and zero vectors.

[0067] The above matrix converter 4 corresponds to a conversion circuit according to the present invention, voltage sensors 31-33 correspond to voltage sensing means, controller 10 corresponds to control means, spatial vector modulation section 12 and zero vector output time calculating section 13 correspond to switching time calculating section, section 15 forming switching signals corresponds to the section forming the control signals, the times (T _1, T ₂₎ correspond to the first output vr Meni switching time (T _z) O correspond to the second time shift, Table 14 corresponds to shift pattern table, and the coordinate conversion section 11 corresponds to the means of coordinate transformation.

Claims (6)

1. A device for converting electrical power, comprising:
- a conversion circuit having several pairs of bi-directionally switched switching elements connected to the respective phases, the conversion circuit configured to convert the input electrical power of alternating current to electrical power of alternating current;
- means for determining the voltage to determine the input voltage into the conversion circuit; and
- control means for turning on and off the switching elements for controlling the conversion circuit,
- while the control tool contains:
- a switching time calculation section configured to calculate a first switching time during which one of the switching elements of the upper arm circuit of several pairs of switching elements contained in one phase of the respective phases is turned on, the other switching elements of the upper arm circuit of several pairs of the switching elements contained in other phases, at least one switching element of the lower arm circuit of several pairs of switching elements comprising living in other phases, it turns on, and other switching elements of the lower arm circuit of several pairs of switching elements contained in one phase are turned off using certain voltages determined by means of determining the voltage and the output value of the control command, and calculate the second switching time during which several pairs of switching elements contained in one phase from the corresponding phases are switched on, and several pairs of switching elements contained in another at these phases from the corresponding phases, they are switched off using the carrier and the first switching time; and
- a section for generating control signals, configured to generate control signals for switching the switching elements on and off using the first switching time and the second switching time, and the second switching time is such that in one period of the electric power of the alternating current derived from the circuit conversion, the second switching time contained in the first half-cycle of one period is equal to the second switching time contained in the second half-cycle of one period. 2. The electric power conversion device according to claim 1, wherein the second switching time is a time that is subtracting the first switching time from a time corresponding to a carrier half-cycle. 3. A device for converting electrical power according to any one of paragraphs. 1 or 2, in which the first switching time includes: a third switching time, during which one of the switching elements contained in the upper arm circuit is turned on and one of the switching elements contained in the lower arm circuit is turned on; and a fourth switching time, during which one switching element of at least one upper and lower arm circuit of the switching elements contained in the upper arm circuit or contained in the lower arm circuit is turned off and the other switching element of one arm circuit is turned on. 4. The electric power conversion device according to claim 3, wherein the third switching time contained in the first half-cycle is the time before the fourth switching time and the third switching time contained in the second half-cycle is time after the fourth switching time. 5. A device for converting electrical power according to any one of paragraphs. 1, 2, 4, in which the control means further comprises: a coordinate conversion section configured to convert rotating coordinates for specific voltages determined by means of the voltage determination means; and a table representing the relationship between the phase angle and the switching pattern of the switching elements, the switching time calculation section calculates the first switching time based on the phase obtained from the voltages of the rotating coordinate system transformed by the coordinate conversion section, and the control signal generation section generates control signals to include and turn off the switching elements according to the switching pattern, which is set according to the phase angle of the voltages of the rotating system s coordinates. 6. The electric power conversion device according to claim 3, wherein the control means further comprises: a coordinate conversion section configured to convert rotating coordinates for specific voltages determined by means of determining voltage; and a table representing the relationship between the phase angle and the switching pattern of the switching elements, the switching time calculation section calculates the first switching time based on the phase obtained from the voltages of the rotating coordinate system transformed by the coordinate conversion section, and the control signal generation section generates control signals to include and turn off the switching elements according to the switching pattern, which is set according to the phase angle of the voltages of the rotating system s coordinates.

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