RU2543500C2 - N-phase voltage transmission device for two-wire network - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: invention relates to the electrical engineering. N-phase voltage transmission device for two-wire network containing a load 13_i (i=1…n), neutral wire C0-C0_out, connected to a neutral point of EMF multiphase system according to star-connected circuit, the first group of keys 9_i (i=1…n), n of inputs 8_i (i=1…n) of phases of EMF multiphase system, each of which is connected to the first input of the similar key 9_i (i=1…n) of the first group, additionally the second group of keys 12_i (i=1…n), the generator of clock impulses (GCI) 1, the AND 2 element, the counter 3, the comparison circuit 4, the register 5, the decoder 6, the first signal conditioners 7_i (i=1…n), the group of delay elements 10_i (i=1…n), the second signal conditioners 11_i (i=1…n) are switched-on, the output of GTI 1 is connected to the first input of AND 2 element, the second input of which is connected to the first input 15 of the device, and the output - to the first input of the counter 3, output of which is connected to the input of the decoder 6 and to the first input of the comparison circuit 4, the second input of which is connected to the output of the register 5, and the output - to the second input of the counter 3, the input of the register 5 is connected to the input 14 of the device, outputs of the decoder 6 are connected to inputs of the first similar signal conditioners 7_i (i=1…n) and through the similar delay elements 10_i (i=1…n) to the inputs of the second similar signal conditioners 11_i (i=1…n), the outputs of the first signal conditioners 7_i (i=1…n) are connected to the working inputs of the keys 9_i (i=1…n) of the first group, the output of each of which is connected to the input transmission line C1, the output of which is connected to the output transmission line C1_out the output of which is connected to the first inputs of the second group of keys 12_i (i=1…n), the operating input of each of which is connected to the output of the second similar signal conditioners 11_i (i=1…n), and the output - to the load 13_i (i=1…n).

EFFECT: expansion of functionality due to transmission of n-phase voltage along two-wire network.

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Description

The invention relates to the field of electrical engineering. The technical result to which the claimed invention is directed is to expand the functionality by transmitting an n-phase voltage through a two-wire network.

The purpose of the invention is the expansion of the functionality of the device.

The device in its composition contains: a clock pulse generator 1, a logical element And 2; phase number counter 3, comparison circuit 4, register 5, decoder 6, control signal conditioners 7 _i (i = 1 ... n, n is the number of phases in the network), phases of the multiphase sinusoidal emf source 8 _i (i = 1 ... n), controlled triacs 9 _i (i = 1 ... n), delay elements 10 _i (i = 1 ... n), drivers of control signals 11 _i (i = 1 ... n, n is the number of phases in the network), controlled triacs 12 _i (i = 1 ... n), phases of the multiphase load of the network 13 _i (i = 1 ... n), inputs 14 and 15, a signal transmission line with poles C1-C0 at the input and C1 _output -C0 _output at the output of line 20 together with the connections.

Known devices for transmitting voltages [1] do not allow the transmission of n-phase voltage over a two-wire network.

The closest in technical essence to the claimed device is a device [1] containing a load of 13 _i (i = 1 ... n), a neutral wire S0-C0 _o , connected to the zero point of the multiphase EMF system according to the "star" scheme, the first group of keys 9 _i (i = 1 ... n), n inputs of 8 _i (i = 1 ... n) phases of the multiphase EMF system, each of which is connected to the first input of the same key 9 _i (i = 1 ... n) of the first group.

The disadvantage of this device is the inability to transmit n-phase voltage through a two-wire network.

The objective of the invention is to create a device that allows the transmission of n-phase voltage over a two-wire network.

The essence of the invention lies in the fact that in the known device [1] containing a load of 13 _i (i = 1 ... n), the neutral wire C0-C0 _out connected to the zero point of the multiphase EMF system according to the "star" scheme, the first group of keys 9 _i (i = 1 ... n), n inputs of 8 _i (i = 1 ... n) phases of the multiphase EMF system, each of which is connected to the first input of the same key 9 _i (i = 1 ... n) of the first group, the second group is additionally included key 12 _{i (i} = 1 ... n), clock generator (GTI) 1, AND gate 2, a counter 3, the comparison circuit 4, a register 5, the decoder 6, the first signal conditioners 7 _{i (i} = 1 n), the group delay elements 10 _{i (i} = 1 ... n), the second signal conditioner 11 _{i (i} = 1 ... n), output GTI 1 is connected to a first input of AND gate 2, a second input of which is connected to the first input 15 the device, and the output is to the first input of the counter 3, the output of which is connected to the input of the decoder 6 and to the first input of the comparison circuit 4, the second input of which is connected to the output of the register 5, and the output to the second input of the counter 3, the input of the register 5 is connected to the input 14 of the device , the outputs of the decoder 6 are connected to the inputs of the same first signal conditioners 7 _i (i = 1 ... n) and through the delay elements of the same name 10 _i (i = 1 ... n) to the inputs of the same second signal conditioners 11 _i (i = 1 ... n), the outputs of the first signal conditioners 7 _i (i = 1 ... n) are connected to the control inputs of the keys 9 _i (i = 1 ... n) of the first group, the output of each of which is connected to the input transmission line C1, the output of which is connected to the output transmission line C1 _o , the output of which is connected to the first inputs of the second group of keys 12 _i (i = 1 ... n), the control input of each of which is connected to the output of the same second signal conditioners 11 _i (i = 1 ... n), and the output to the load ke 13 _i (i = 1 ... n).

A search in the well-known scientific and technical literature did not reveal the presence of such technical solutions.

The novelty of the proposed device is that the new technical device differs from the prototype in that it additionally introduces a second group of keys 12 _i (i = 1 ... n), a clock generator (GTI) 1, element And 2, counter 3, circuit comparisons 4, register 5, decoder 6, first signal conditioners 7 _i (i = 1 ... n), group of delay elements 10 _i (i = 1 ... n), second signal conditioners 11 _i (i = 1 ... n), GTI output 1 is connected to the first input of AND 2, the second input of which is connected to the first input 15 of the device, and the output to the first input of counter 3, you One of which is connected to the input of the decoder 6 and to the first input of the comparison circuit 4, the second input of which is connected to the output of the register 5, and the output to the second input of the counter 3, the input of the register 5 is connected to the input 14 of the device, the outputs of the decoder 6 are connected to the inputs of the first signal conditioners 7 _i (i = 1 ... n) and through the same delay elements 10 _i (i = 1 ... n) to the inputs of the same second signal conditioners 11 _i (i = 1 ... n), the outputs of the first signal conditioners 7 _i (i = 1 ... n) are connected to the control inputs of the keys 9 _{i (i} = 1 ... n) of the first group, each output the first of which is connected to the input of the transmission line C1, the output of which is connected to output transmission line C1 _O, the output of which is connected to the first inputs of the second key group 12 _{i (i} = 1 ... n), the control input of each of which is connected to the output of like second shapers signals 11 _i (i = 1 ... n), and the output to the load 13 _i (i = 1 ... n).

An inventive step is achieved in that the introduction of the corresponding elements into a known prototype together with the connections allows us to solve a new technical problem, the solution of which is not currently reflected in well-known computers and in the literature. The proposed device allows you to expand the functionality by transmitting the n-phase voltage via a two-wire network.

The invention is illustrated in the drawing. The drawing (figure 1) shows a structural diagram of the proposed device, where in figure 1 where are presented: a clock generator 1, a logical element And 2; phase number counter 3, comparison circuit 4, register 5, decoder 6, control signal conditioners 7 _i (i = 1 ... n, n is the number of phases in the network), phases of the multiphase sine wave EMF 8 _i (i = 1 ... n), managed keys (triacs) 9 _i (i = 1 ... n), delay elements 10 _i (i = 1 ... n), control signal generators 11 _i (i = 1 ... n, n is the number of phases in the network), managed keys ( triacs) 12 _i (i = 1 ... n), phases of the multiphase load of the network 13 _i (i = 1 ... n), inputs 14 and 15, signal transmission line with poles C1-C0 at the input and C1 _output -C0 _output at the output of the line .

Point C0 is connected to the zero point of the multiphase EMF system, connected according to the "star" scheme. Point С0 _{out is} connected to the zero point of the multiphase load, which is also included in the "star" scheme.

Triac 9 _i (i = 1 ... n) in each phase is a controllable power switch that commutes signals of arbitrary (positive or negative) polarity. It is connected in series to the circuit to transmit a pulse of a phase signal of positive or negative polarity of duration ∇t from a multiphase source 8 _i to the line C ₁ -C ₀ , and the triac 12 _i (i = 1 ... n) commutes the signal at the output of the line for subsequent transmission of pulses into the load 13 _i .

The frequency of the generator 1 is set so that the appearance of the next signal at its output corresponds to the total signal delay by the elements And 2, counter 3, decoder 6 and the shaper of the control signal 7 _i .

The device operates as follows.

In the initial state, a code of the number of phases n is recorded at input 5 at input 14. The inputs 8 _{i of the} triac 9 are connected to the corresponding phases of the voltage sources e _i (i = 1 ... n). On the counter 3 is stored a zero code (reset input to zero on the counter 3 in figure 1 is not shown).

The operation of the device begins after a start signal is supplied at the input 15 of the And 2 logic element, after which the pulses from the output of the clock pulse generator 1 through the open And 2 element begin to arrive at the input of the counter 3. The code from the output of the counter 3 goes to the input of the decoder 6, the output of which a single signal appears on only one of its n outputs. A single signal at the i-th (i = 1 ... n) output of the decoder 6 is fed to the input of the same signal shaper 7 _i , the output of which is connected to the control electrode of the triac 9 _i , which works in key mode. Triac 9 _i in turn provides the input voltage of the i-th phase to the transmission line C1.

At the same time, the signal from the i-th (i = 1 ... n) output of the decoder 6 is fed to the input of the delay element 10 _i , from the output of which through the element 11 _{i the} generated signal is fed to the control electrode of the triac 12 _i .

The delay element 10 _i provides a signal delay for the response time of elements 7 _i and 9 _i . Thus, the signal of the same phase u _i (i = 1 ... n) of duration ∇t is transmitted to the i-th phase of the load 13 _i (i = 1 ... n). The next signal for the same phase will arrive through the time interval T = ∇t * n.

When counter 3 reaches the number n, a single signal appears at the output of comparison circuit 4, which resets counter 3 to zero, after which the cycle of transmitting phase signal pulses to the C1-C0 transmission line is repeated.

Information sources

1. Patent No. 2400914, cl. H02M 5/16, 2010.

Claims (1)

A device for transmitting an n-phase voltage system over a two-wire network containing a load of 13 _i (i = 1 ... n), a neutral wire С0-С0 _out connected to the zero point of a multiphase EMF system in a star pattern, the first group of switches is 9 _i (i = 1 ... n), n inputs of 8 _i (i = 1 ... n) phases of the multiphase EMF system, each of which is connected to the first input of the same key 9 _i (i = 1 ... n) of the first group, characterized in that it additionally included a second group of keys 12 _{i (i} = 1 ... n), clock generator (GTI) 1, AND gate 2, a counter 3, the comparison circuit 4, a register 5, decoder 6, ne stems conditioners signals 7 _{i (i} = 1 ... n), the group delay elements 10 _{i (i} = 1 ... n), the second signal conditioner 11 _{i (i} = 1 ... n), GTI output 1 is connected to a first input of AND 2 the second input of which is connected to the first input 15 of the device, and the output to the first input of the counter 3, the output of which is connected to the input of the decoder 6 and to the first input of the comparison circuit 4, the second input of which is connected to the output of the register 5, and the output to the second input of the counter 3, the input of the register 5 is connected to the input 14 of the device, the outputs of the decoder 6 are connected to the inputs of the same name Formers signals 7 _{i (i} = 1 ... n) and through the same name delay elements 10 _{i (i} = 1 ... n) to the inputs of similar second signal conditioner 11 _{i (i} = 1 ... n), outputs the first signal conditioner 7 _{i (i} = 1 ... n) are connected to the control inputs of keys 9 _i (i = 1 ... n) of the first group, the output of each of which is connected to the input transmission line C1, the output of which is connected to the output transmission line C1 _out , the output of which is connected to the first inputs of the second group keys 12 _i (i = 1 ... n), the control input of each of which is connected to the output of the same second formers with ignals 11 _i (i = 1 ... n), and the output goes to the load 13 _i (i = 1 ... n).