RU2275683C2 - Walsh functions generator - Google Patents

Abstract

FIELD: automatics and computer science, possible use in information compression equipment in television, multi-channel communications, telemetry for representing varying messages and signals in Walsh basis.

SUBSTANCE: generator has set-point element, NOT element, shift register, function number register, AND element, trigger, n-digit counter and additional AND element.

EFFECT: simplified generator due to decreased number of triggers, used as shift register digits.

3 dwg, 4 tbl

Description

The invention relates to automation and computer engineering, in particular to discrete function generators, and can be used in information compression equipment in television, multichannel communication, telemetry to represent various messages and signals in the Walsh basis.

A known Walsh function generator containing a clock generator, an n-bit counter (2 ⁿ is the number of generated Walsh functions), n AND elements, an n-input adder modulo two, a unit for generating a Walsh function number and a group of n-1 adders modulo two ( see USSR author's certificate No. 1091145, class G 06 F 1/02, 1982).

However, this generator has significant complexity and limited speed due to the use of inertial summation elements modulo two in its circuit.

The closest in technical essence to the present invention is a Walsh function generator containing a master oscillator, a shift register, a function number register, an element NOT, an AND element, and a trigger, the output of the function number register being connected to a parallel information input of the shift register, the output of the master oscillator connected to the clock input of the shift register and to the input of the element NOT, the output of the element NOT and the serial output of the shift register through the AND element are connected to the counting input of the trigger (see copyright certificate Your USSR No. 1076892, class G 06 F 1/02, 1982).

However, this generator has significant complexity due to the large number of bits in the shift register used (2 ⁿ -1 with 2 ⁿ generated Walsh functions), since each bit of the shift register is a trigger.

The aim of the invention is to simplify the generator of Walsh functions by reducing the number of triggers used as bits of the shift register.

This goal is achieved by the fact that in the well-known Walsh function generator containing a master oscillator, a shift register, a function number register, an element NOT, an AND element and a trigger, the output of the function number register being connected to a parallel information input of the shift register, the output of the master oscillator connected to a clock the input of the shift register and the input of the element NOT, the output of the element NOT and the serial output of the shift register through the element AND are connected to the counting input of the trigger, an n-bit counter is introduced (where 2 ⁿ are the numbers generated x Walsh functions) and an additional element And, moreover, the shift register is closed into the ring by a feedback circuit through an additional element And, the second input of which is connected to the output of the high order of the counter, the counting output of which is connected to the output of the master oscillator.

Figure 1 shows the structural diagram of the generator of Walsh functions, figure 2 is a timing diagram illustrating the process of generating the function Wal (5, θ), figure 3 is a timing diagram illustrating the process of generating the function Wal (6, θ) .

The Walsh function generator contains a master generator 1, an element NOT 2, a shift register 3, a function number register 4, an AND 5 element, a trigger 6, an n-bit counter 7 and an additional And 8 element.

The Walsh function generator works as follows.

The binary code of the Walsh function number to be recorded in shift register 3 is determined by the following tables:

The matrix, the rows of which are binary codes of the numbers of Walsh functions, is symmetric with respect to the column with the serial number 2 ^n-1 , marked in the tables by an arrow. Therefore, the initial conditions for modeling the desired Walsh function can be set by writing in register 3 of the shift not the entire binary code of the function number, but only the characters 2 ^n-1 , and following it in order in the line corresponding to the number of the desired function. The number of these characters is 2 ^n-1 .

The number of these characters is equal to the number of bits in the shift register 3. Before starting work, the senior bit of the n-bit counter 7 should be set to a single state, and the remaining bits should be set to zero, trigger 6 should be set to a single state.

The code combination, which is a truncated code, having the number of bits is two times less than the complete binary code of the Walsh function number (see tables 1, 2, 3), is copied from register 4 of the function number to shift register 3.

For example, for the case N = 16, when forming a function with serial number 7 in the prototype (see USSR author's certificate No. 1076892, class G 06 F 1/02, 1982), shift register 3 is used, which has 15 digits (triggers) for write the binary code of the Walsh function number 01010101010101010. And in the proposed generator, the shift register 3 is used to generate the same function, having only 8 bits (triggers) to record the truncated binary code of the Walsh function number 10101010 (see table 3).

Under the influence of the clock frequency coming from the output of the master oscillator 1 to the clock input of the shift register 3, the information recorded in it is shifted and fed to one of the inputs of the And 5 element, the second input of which receives an inverted clock signal. The information from the output of shift register 3 also goes to one of the inputs of the additional element And 8, the second input of which receives the unit potential from the output of the high order of counter 7. Information from the output of the additional element And 8 will go to the input of register 3 of the shift until the high order of the counter 7 will be in a single state. Since counter 7 has n digits, and before it started working in its highest order, “1” was written, this will happen after 2 ^n-1 clock cycles of the master oscillator 1. Thus, 2 ^{n are} written in shift register 3 on the feedback circuit ^-1 -1 characters that have come out of it, and therefore, they will re-enter the input of the And 5 element, that is, the input of the And 5 element will not receive the truncated, but the full code of the Walsh function number.

The voltage at the output of the And 5 element turns out to be gated, and for each binary interval of minimum duration there is one gate, and the duration of each gate is equal to half the duration of the clock interval. The signals from the input of the And element 5 are received at the counting input of the trigger 6, previously set to a single state. The moments of the appearance of logical units at the output of the And 5 element correspond to the moments of sign changes of the generated Walsh function, therefore, at the output of trigger 6, the corresponding Walsh function is formed.

Figure 2 and figure 3 presents diagrams illustrating the process of forming the functions Wal (5, θ) and Wal (6, θ).

The diagrams show the temporary status of the outputs:

a) master oscillator 1;

b) element NOT 2;

c) the senior level of the counter 7;

d) register 3 shift;

d) an additional element And 8;

e) element And 5;

g) trigger 6.

In the proposed generator of the Walsh function, the number of bits in the shift register 3 is 2 ^n-1 , and the number of bits in the counter 7 is n, then the total number of bits:

N ₁ = 2 ^n-1 + n.

In the prototype, the number of bits in shift register 3 is:

N ₂ = 2 ⁿ -1.

Thus, the scheme of the proposed generator of Walsh functions contains significantly less than the prototype, the number of triggers (bits of register 3 shift and counter 7). The gain in the number of triggers is:

N ₂ -N ₁ = 2 ⁿ -1- (2 ^n-1 + n) = 2 ^n-1 (2-1) -1-n = 2 ^n-1 -n-1.

Table 4 presents the calculations of the number of triggers included in the shift register 3 and counter 7 of the proposed Walsh function generator and prototype for a different number of generated functions N = 2 ⁿ .

Table 4 Circuit used Number of triggers for a different number of generated Walsh functions 16 32 64 128 256 512 1024 Prototype fifteen 31 63 127 255 511 1023 Suggested Generator 12 21 38 71 136 265 522

The proposed generator provides a gain in the number of triggers used to construct shift register 3 and counter 7 in comparison with the prototype for the option generating 16 Walsh functions - 20%, for generating 128 functions 44%, for generating 1024 functions - 49%.

With an increase in the number N = 2 ^{n of the} generated Walsh functions, the gain increases and in the limit is 50%.

Using the invention allows to significantly simplify the design of the Walsh function generator by reducing the number of triggers used as bits of the shift register.

Claims (1)

A Walsh function generator containing a master oscillator, a shift register, a function number register, an element NOT, an AND element, and a trigger, the output of the function number register being connected to the parallel information input of the shift register, the output of the master generator being connected to the clock input of the shift register and to the input of the element NOT , the output of the element NOT and the serial output of the shift register through the AND element are connected to the counting input of the trigger, characterized in that, in order to simplify the generator by reducing the number of triggers, used x as the bits of the shift register, an n - bit counter is introduced into it, where 2 ⁿ is the number of generated Walsh functions, and an additional element And, and the shift register is closed into the ring by a feedback circuit through the additional element And, the second input of which is connected to the output of the senior discharge counter, the input of which is connected to the output of the master oscillator.

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