NO323385B1 - Control method and device for inverters using a TSSC - Google Patents

Abstract

The present invention relates to a control method and a control device for a converter using a three-state switching cell (TSSC) connected between an input voltage and a load. The control device comprises measuring devices which measure an inductor current, an input voltage and an output voltage. It further comprises a control circuit which provides a control signal based on the measured values and an output voltage reference value, the control circuit comprising a pulse width modulating device (110, 112) for controlling the switching states of the switches (Q1, Q2) in the three state switching cell. Furthermore, switching current measuring devices measure the switching current through the switches (Q1, Q2) and / or the switching current through the diodes (DI, D2) in the three-state switching cell; wherein the pulse width modulating device (110, 112) controls the switching states depending on the measured currents through the switches and / or diodes.

Description

Technical area

The present invention relates to a method and device for controlling a converter that uses a three-state switching cell (TSSC - Three State Switching Cell).

Background for the invention

In many applications, a DC/DC converter is used to convert an unregulated DC input into a controlled DC output with a desired voltage level. Such DC/DC converters can e.g. be a buck converter, boost converter, buck-boost converter and a full-bridge converter. These converters are usually used as preregulators to achieve active power factor correction. Power supplies for telecommunications equipment are required to supply a DC voltage of e.g. -48 V. The power supplies are powered by the AC mains where the voltage is rectified using a rectification circuit such as a bridge rectifier, etc.

Power supplies have several requirements. First, the output must be kept controlled within a specific range. Furthermore, the power supply should not inject line-borne EMI into the AC distribution lines, such as low-frequency harmonic interference to the input current, and high-frequency radio frequency interference. The input power stage is often designed to keep the harmonic disturbance in the input current lower by active power factor correction (PFC). A PFC circuit can be achieved using a boost converter with a feedback control circuit designed to control the input current to be sinusoidal, or to have the same shape as the input voltage, which is assumed to be sinusoidal. Furthermore, it is often required that the output be electrically isolated from the input by means of an isolation transformer device. The insulation protects personnel working with the telecommunications equipment from the mains voltage. In many applications, the transformer is housed in the DC/DC converter.

In every practical circuit comprising a transformer, there is a risk of unequal volt-second products of the positive and negative voltages across the transformer, so that the net result will be a small DC voltage across the transformer. In switched-mode power supplies, the isolation between the primary side and the secondary side of the transformer is usually implemented with a high-frequency power transformer, which transforms a high-frequency square-wave AC. In a practical circuit, the square wave voltage on the primary side is formed by one or more controlled semiconductor switches. In the cases where there is more than one switch, such as in the family of buck-derived DC/DC bridge converters comprising full-bridge and half-bridge converters, a perfect AC can only be achieved if the on-off time of the switches can be perfectly controlled on such a way that the volt-second product of the positive voltage and the negative voltage across the transformer primary winding match exactly, so that there will be no DC component present. There are many practical reasons why perfect control is not achieved, one is noise entering the feedback loop, another is various types of asymmetries in the circuit, such as different delays for the signals that control the on/off states of the switches or different impedances in series with different switching currents causing different voltage drops.

There is thus a need to have an arrangement for controlling the volt-second product for positive and negative voltages across the transformer in many practical circuits. As an example, in the well-known "full-bridge DC/DC converter" (e.g. described in Chapter 7.7 page 188 of "Power Electronics", 2nd Edition, 1995, by Mohan, Undeland and Robbins), it is common practice of blocking the small DC component with a capacitor in series with the transformer.

The three-state switching cell (TSSC) is proposed as a topology related to various types of DC/DC converters, to reduce the input ripple and current ripple due to the DC link. TSSC is known from Torrico-Bascopé, Grover V.; and Ivo Barbi. "A Single Phase PFC 3kW Converter Using a Three-State Switching Cell", Proe. Power Electronics Specialists Conference, PESC'04, Aachen, Germany, 2004, pages 4037-404. This publication is hereby incorporated by reference in its entirety.

In fig. 1 of the present application, a power factor correction circuit using a TSSC boost converter configuration is shown. The TSSC is indicated by a dashed box. The transistors Q1, Q2 are controlled by means of a control circuit. There are several advantages related to the TSSC boost converter: - The transistor current is reduced to less than half of the input current compared to a normal single transistor boost converter. - The current load through the switches is less compared to a classic interleaved boost converter. - The inductor voltage Vu is significantly reduced compared to a normal boost converter and is completely canceled under certain operating conditions. - Consequently, the input ripple current is significantly reduced and, under certain operating conditions, completely cancelled.

Practical testing and theoretical simulations have revealed a problem related to the management of the TSSC. Namely, the circuit has tended to be unbalanced in terms of the current through the switches, which has caused a need for components with larger ratings than expected, i.e. the circuit has not been found to handle the power as it was expected to when it was made. The imbalance originates from unbalanced volt-second products at the TSSC transformer windings which cause a DC magnetizing current to be applied to one of the diode/transistor pairs and subtracted from the other pair. There is also a risk of saturation of the TSSC transformer.

Additional examples of TSSCs have been featured in publications such as "Generation of a Family of the Non-Isolated DC-DC PWM Converters Using New Three-State

Switching Cells", by Torrico-Bascopé, Grover V.; and Ivo Barbi, Proe. Power Electronics Specialists Conference, PESCOO, Galey Ireland, 2000, pages 858-863. Another publication describing TSSC is "Nova Familia de Conversores CC- CC PWM nao Isolados Utilizando Células de Comutacåo de Tres Estados" by Grover Victor Torrico-Bascopé, Florianopolis, SC-Brazil, 2001.

None of these publications show a solution to the problems regarding TSSC imbalance.

The purpose of the present invention is to provide a single-phase power factor correction circuit with a three-state switching cell and a method for controlling the three-state switching cell where the current in each branch is controlled to avoid the disadvantages mentioned above. Consequently, smaller components, i.e. transformer, transistors, diodes, can be used, in order to achieve a smaller and cheaper converter. The purpose is also to reduce or avoid the risk of saturation of the TSSC transformer. Another effect, rather than a reduction of the components, will be that the power transmitted can be increased with the same components as before.

Summary of the invention

The method in accordance with the invention is defined in claim 1. The control device in accordance with the invention is defined in the independent claims 5-7.

Preferred embodiments of the invention are defined in the independent claims.

Detailed description

A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings: Fig. 1 shows a power factor correction (PFC) circuit in accordance with the prior art where a boost converter is implemented as a three-state switching cell (TSSC). . Fig. 2 shows the circuit in fig. 1 where the transformer is shown as an ideal transformer with a magnetizing inductance Lm.

Fig. 3-5 illustrates the imbalance of the circuit in fig. 2.

Fig. 6 shows an embodiment of a converter with TSSC and control circuit in accordance with the invention.

Fig. 7 shows an embodiment of the control circuit.

Fig. 8 shows the pulse width modulator in fig. 7.

Fig. 9 shows a simulation of the current through the input inductor at a first input voltage level. Fig. 10 and 11 show simulations of the magnetization current respectively without and with the use of the switching currents as input to the control circuit at the first input voltage level. Fig. 12 shows a simulation of the current through the input inductor at a second input voltage level. Fig. 13 and 14 show simulations of the magnetization current respectively without and with the use of the switching currents as input to the control circuit, at the second input voltage level.

The PFC converter circuit of a known type using a TSCC boost is shown in fig. 1. The circuit comprises a bridge rectifier provided with an AC input and an input inductor L3 connected to a TSSC indicated as a dashed box. The TSSC comprises an autotransformer Tl connected to diodes Dl, D2 and to switches Ql, Q2. The converter circuit further comprises an output filter capacitor Co. The principle of the TSSC is that the current is divided in the two branches for the transformer Tl, which is described in detail in the PESC<*>04 publication by Torrico-Bascopé et al.

The switches here are field effect transistors (FET), but other suitable switches can also be used.

The imbalance in the TSSC will be briefly described with reference to fig. 2-5.1 fig. 2 is the autotransformer Tl from fig. 1 shown as an ideal transformer with a magnetizing inductance Lm known to a person skilled in the art.

In fig. 3, a first switching stage is illustrated, where the first switch Q1 is on. The input current Il3 is shown by the solid (red) line; The DC magnetizing current Im is shown with a thin solid (blue) line. The input current Il3 is, as expected, divided into Ili and lu in the respective first and second branches of the transformer comprising, respectively, the first diode Dl or the first switch Ql and the second diode D2 or the second switch Q2.

In fig. 3, the input current lu is distributed between the second diode D2 and the first switch Q1. However, half of the output voltage Vo will lie across each of the windings of the transformer as shown in fig. 3, with the opposite sign. Accordingly, a magnetizing current Imi is added in the first branch with the first switch Q1 and a magnetizing current Im2 (equal to Imj) is subtracted from the second branch with the second diode D2.

In Fig. 4, a second switching stage is illustrated, where both the first and second switches Q1, Q2 are off. The input current lu will be distributed between the first diode D1 and the second diode D2. Here, the magnetizing inductor Lm will discharge its energy, which leads to an increase in the current (shown as Imi) in the first diode Dl and as a decrease in the current (shown as Im2) in the second diode D2.

In fig. 5, a third switching stage is illustrated, where the second switch Q2 is on. The input current will be distributed as Ili and Il2 between the first diode Dl and the second switch Q2. As in fig. 3 above, half of the output voltage Vo will again occur across each of the windings of the transformer as shown in fig. 5, with the opposite sign, leading to an increase in the current (shown as Imi) in the first diode D1 and a decrease (shown as lmi) in the current in the second switch Q2.

The disadvantages of this imbalance are mentioned above.

A control circuit for the converter using the TSSC in accordance with the invention is shown in fig. 6, and details regarding the control circuit are shown in fig. 7.

Current measuring devices and voltage measuring devices are connected to the converter to provide input to the control circuit. Input to the control circuit is the first input voltage Vj„ (input current Ij„), and the output voltage Vout-1 is additionally the first and second switching currents Iqi, Iq2 at the switches Ql, Q2 input to the control circuit. In the preferred embodiment of the invention, the control method for controlling the input current in a power factor correction circuit is based on average current mode control. This method is described in "Application Note U-159", entitled "Boostpower factor corrector design with the UC3853" by Philip C. Todd, published by Unitrode Corporation, which is hereby incorporated by reference. In addition, a peak current mode control method (peak current mode control method) including ramp compensation is used in the preferred embodiment of the invention for controlling the current to become Hk in the two switches of the TSSC, which will be described in detail below. Peak current mode control including ramp compensation is commonly used for other circuits, such as described in the product description for the LM3477 MOSFET switching regulator controller from National Semiconductor (can be downloaded from

http://www. national. com/ pf/ LM/ LM3477. htmn.

The control circuit comprises a first comparator 100 which compares the output voltage Vout with the output voltage Vref. The comparison signal is supplied to a voltage compensator 102 which provides an error signal B.

The error signal B is supplied to a calculation unit 104. The calculation unit 104 is also supplied with a signal A equal to the input voltage Vjn multiplied by a gain constant Kl. A further input to the calculation unit 104 is a signal C equal to a squared and filtered output voltage Wm. The calculation unit 104 provides a current reference signal Iref Hk the signal A multiplied by the signal B divided by the signal C.

A comparator 106 compares the current reference Iref and the measured input current Ii„. The difference between Iref and Ijn is supplied to a current compensator 108 which provides a control signal Vc.

The control circuit further comprises a first pulse width modulator PWM1 110 and a second pulse width modulator PWM2 112 for controlling the first and second switches Q1 and Q2, respectively. PWM1 and PWM2 are each supplied with the control voltage Vc. Furthermore, PWM1 and PWM2 are supplied with first and second switching current signals Iqi, Iq2, as shown in fig. 7. It should be noted that the switching current signals Iqi, Iq2 are actually voltages from the current measuring devices which are proportional to the switching currents Iqi, Iq2. The outputs from PWM1 and PWM2 are respectively the switch control signals Sqi and Sq2.

PWM (PWM1 or PWM2 above) is shown in detail in fig. 8. The PWM comprises a ramp signal generator 120 which produces a ramp signal. The ramp signal is added to the switching current Iq in an adding device 122, to achieve slope compensation (slope compensation) and the added signals are fed into a comparator 124. The second input of the comparator 124 is supplied with the control voltage Vc. The comparator 124 produces a reset signal which is supplied to a reset terminal R of a flip-flop device 126. The flip-flop device 122 further comprises a setting terminal S which is supplied with a pulse signal generated by a pulse signal generator 128. The output of the flip-flop device 126 is a switch control signal Sq that controls the on/off state of switch Q (switch Q1 or switch Q2 above).

In the following, the simulation results shown in fig. 9-13 be described to illustrate what the present invention achieves. The simulations show the differences between using a control device that does not use first and second switching currents Iqi» Iq2 as input, and using a control circuit that uses first and second switching currents Iq1} Iq2 as input. The simulation software PSpice is used for the simulations. Fig. 9-11 shows the simulation where a first input voltage level of 90 V AC is used. The output voltage is considered to be a DC voltage of 400 V. Fig. 12 and 13 show simulations where a second input voltage level of 230 V AC is used. The same output voltage as above is used. Fig. 9 shows the current through the input inductor L3 and shows a half-periodic sine curve at the input voltage with 50 Hz. The extreme value is 30 A. This simulation is the same for the converters that use a control circuit with and without the use of the first and second switching currents Iqi, Iq2 as input. Fig. 10 shows the magnetization current through the magnetization inductor Lm when the first and second switching currents Iqi, Iq2 are not used as input to the control circuit. The result is a magnetizing current with an extreme value of close to 6.0 A. Fig. 11 shows the magnetizing current through the magnetizing inductor Lm when first and second switching currents Iqi, Iq2 are used as input to the control circuit. The result is a magnetizing current with extreme values between +0.5 A and -0.8 A, which is a significant reduction compared to Fig. 10. Fig. 12 shows the current through the input inductor L3 at the second voltage level, which results in an extreme value of 12 A. At two points, the input current ripple is reduced to zero, since the input voltage here is half the output voltage.

It should be noted that ripple cancellation is one advantage of the TSSC boost converter compared to a conventional boost converter. The same input ripple can be received in an interleaved boost converter. However, the physical ripple current in the interleaved boost converter is not canceled since each of the parallel boost converters does not have ripple cancellation. It is only the sum that goes to zero at half the input voltage. So, although the input current looks similar, the real ripple is very different from a TSSC boost compared to two interleaved boost converters. This will bias an efficiency comparison to favor TSSC boost. Fig. 13 shows the magnetizing current through the magnetizing inductor Lm when the first and second switching currents Iqi, Iq2 are used as input to the control circuit. The second input voltage level is used. The result is a magnetizing current with extreme values between +0.9 A and -1.1 A. Fig. 14 shows the magnetizing current through the magnetizing inductor Lm when the first and second switching currents Iqi, Iq2 are not used as input to the control circuit. Again, the second input voltage level is used. The result is a magnetizing current with an extreme value of close to 4.4 A.

As can be seen from the simulations above, the consequences are that the components with smaller nominal values can be used without the risk of saturation, overheating, etc. This in turn reduces the cost of the circuit. Furthermore, not only is the cost reduced, the risk of failure due to undue heat or undue currents or voltages is eliminated.

Further modifications and variations will be apparent to one skilled in the art upon reading the above description. The converter in the description above is a boost converter, but the invention can also be used for other types of converters that use TSSC. It should be noted that the input inductor L3 in a buck converter configuration would be considered an output inductor, as would be understood by one skilled in the art.

It is of course possible to use a digital signal processing unit (DSP) to carry out the method in accordance with the invention, and the control device in accordance with the invention can be designed as a DSP unit.

The scope of the invention will emerge from the following claims and their equivalents.

Claims (7)

1. Method for controlling a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifier device via an input inductor (L3) and on a second side connected to an output filter capacitor (Co), where the method comprises the following steps: a) measurement of input current, input voltage and output voltage of the three-state switching cell (TSSC); b) applying the measured values and an output voltage reference value to provide a control signal to a pulse width modulation device for controlling the switching states of the switches (Q1, Q2) in the three-state switching cell; c) measuring the switching current through the switches (Q1, Q2) in the three-state switching cell and/or the diode current through the diodes (D1, D2); d) providing a signal proportional to the switching current and/or diode current as an input to the pulse width modulation device to control the switching states depending on the measured currents through the switches and/or diodes. 2. Method in accordance with claim 1, where the average current mode control method is used to provide the control voltage in step b). 3. Method in accordance with claim 1, where step d) comprises adding the measured switching current and the control voltage and providing the added signal as a switching control signal to the switches. 4. Method in accordance with claim 3, where a ramp signal is added to the measured switching current before adding the selected switching current and the control voltage. 5. Control device for a converter comprising a three-state switching cell (TSSC) on a first side connected to a rectifier device via an input inductor (L3) and on a second side connected to an output filter capacitor (Co), comprising: - measuring devices arranged to measure an inductor current, a input voltage and an output voltage; - a control circuit arranged to provide a control signal based on the measured values and an output voltage reference value, the control circuit comprising a pulse width modulation device (110, 112) arranged to control the switching states of switches (Q1, Q2) in the three-state switching cell; - switching current measuring devices arranged to measure the switching current through the switches (Q1, Q2) and/or the switching current through diodes (D1, D2) in the three-state switching cell; where the pulse width modulation device (110, 112) is arranged to control the switching states depending on the measured currents through the switches and/or diodes. 6. Control device in accordance with claim 5, where the control device is a digital signal processing unit. 7. Control device in accordance with claim 5, where the control devices are a mixed analog and digital electronic device. S. Control device according to claim 5, wherein the converter is a buck converter, boost converter, buck-boost converter and isolated buck converter, and isolated buck-boost converter or an isolated boost converter.