KR940008699B1 - Chip-type capacitor for elimination of high frequency noise - Google Patents

Abstract

The capacitor for reducing the equivalent serial resistance and impedance against the high frequency by designing the upper and lower electrodes to flow the currents opposite side each other includes a pair of ground electrodes (4',4") laminated on the uppermost and lowermost layers, signal line electrodes (2) laminated between the ground electrodes, and electrodes (3a',3a") for high frequency noise path laminated between the electrodes (2). The more than a pair of the electrodes (3a',3a") are connected alternatively to the opposite ground electrodes so that the electromagnetic field generated by the currents induced while removing the high frequency noise is compensated.

Description

Chip Capacitors for High Frequency Noise Rejection

1 is a diagram illustrating the internal electrode formation and stacking structure of a conventional three-terminal chip type capacitor.

2 is an external view of a typical three-terminal chip capacitor.

3 is an electrical equivalent circuit diagram of a three-terminal chip capacitor.

4 is an internal electrode shape and a lamination structure diagram of an embodiment of a chip type capacitor according to the present invention.

5 is an internal electrode shape and a lamination structure diagram of another embodiment of a chip type capacitor according to the present invention.

* Explanation of symbols for main parts of the drawings

1 dielectric 2 internal electrode for signal line

3 ', 3 ", 3a', 3a", 3b ', 3b ": Internal electrode for high frequency noise passage

4 ', 4 ": Grounding internal electrode 5', 5": External terminal

6 ', 6 ": Ground terminal 7', 7": Signal line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to electronic components used to remove high frequency noise generated in electronic devices such as computers and communication devices. More particularly, the present invention relates to a chip capacitor for removing high frequency noise.

In the related art, the lamination structure and internal electrode shape of a three-terminal capacitor inserted between the signal line and the ground to remove high frequency noise included in the signal line are shown in FIG. 1.

In FIG. 1, the internal electrode 2 is an electrode which is electrically connected to the external terminal 5 ', 5 "of the three-terminal chip capacitor of FIG. 2 and used as a part of a signal line for transmitting a signal.

The internal electrodes 3 'and 3' 'are electrodes used as a path of high frequency noise removed by being connected to the ground terminals 6' and 6 ", and are stacked with two internal electrodes to reduce the equivalent series resistance of the internal electrodes. It has a stacked structure of one 3-terminal chip type capacitor. A three-terminal capacitor of this structure is inserted between signal lines 7 'and 7 "to remove high frequency noise flowing to the signal lines.

FIG. 3 shows an electrical equivalent circuit of the three-terminal chip capacitor.

In FIG. 3, L _p and R _p are inductance and resistance components of an internal electrode used as part of a signal line, and L _s and R _s are inductance and resistance components of an internal electrode used as a path of high frequency noise connected to ground. C is the capacitance caused by the dielectric between the internal electrode 2 used as the signal line and the internal electrode 3 'or 3 "connected to ground, and G is the equivalent parallel conductance with the inverse of the dielectric resistance.

In general, a three-terminal chip type capacitor has a structure in which a plurality of internal electrodes 2, which are used as part of a signal line, and internal electrodes 3 ', 3 "connected to ground are sandwiched between dielectrics.

When the signal frequency and the high frequency noise pass through the internal electrode 2 used as a part of the signal line, the high frequency noise is removed through the internal electrodes 3 'and 3 "connected to the dielectric and the ground. The frequency is determined by the capacitance and the inductance of the internal electrode connected to the ground, so in order to remove high frequency noise with the same capacitance, the inductance value of the internal electrode connected to the ground must be reduced.

In addition, in order to suppress heat generation and temperature rise due to the removed high frequency noise, the real direct equivalent resistance of the device impedance by the dielectric of the three-terminal chip capacitor and the internal electrodes 3 'and 3 "connected to the ground should be reduced. .

In addition, considering that the internal electrode material of the three-terminal chip type capacitor occupies about 50 to 80% of the manufacturing cost, the smaller the area of the internal electrode, the lower the manufacturing cost.

However, conventional chip capacitors are not only difficult to fabricate for high frequency noise, but also generate heat due to high frequency noise to be removed, resulting in an increase in temperature and an inexpensive internal electrode area requiring the use of expensive materials. There were many problems.

The present invention has been made to solve the above problems, the structure is designed so that the current flows to the upper and lower internal electrodes connected to the ground to be opposite to each other, generated by the current at the time of high frequency noise removal It is an object of the present invention to provide a chip capacitor for removing high frequency noise, which reduces the equivalent series resistance and inductance of an internal electrode at high frequencies by canceling the electromagnetic fields.

In order to achieve the above object, the present invention provides an internal electrode used as part of a signal line and an internal electrode connected to ground, which are stacked in multiple layers with a dielectric interposed therebetween, and an external terminal connected to a signal line and a ground terminal connected to a ground line. A three-terminal chip type capacitor comprising: a set of grounding electrode means stacked on an uppermost layer and a lowermost layer: a signal line stacked between at least one set of grounding electrode means and stacked at least one set to be used as part of a signal line Electrode means: and an electrode-means for high frequency noise passages which are respectively laminated between two signal line electrode means constituting a pair of the signal line electrode means, wherein at least two or more electrodes are alternately connected only to opposite ground terminals. It was provided.

In another embodiment, a pair of electrode means connected to both ground terminals and stacked on the uppermost layer and the lowermost layer, respectively; A signal line stacked between the pair of grounding electrode means, the signal line being stacked as at least one set and used as a part of the signal line, the electrode means: and each one of the two signal line electrode means forming a pair of the signal line electrode means. Electrodes stacked between the signal line electrode means of the respective groups are provided with a high frequency noise passage electrode means formed so as to be alternately connected only to the opposite ground terminal.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Figure 4 shows the internal electrode shape and the laminated structure of one embodiment according to the present invention.

In the drawings, 1 is a dielectric, 2 is an internal electrode used as part of a signal line, 3a 'and 3a "are connected to ground, and an internal electrode is used as a path for high frequency noise, and 4' and 4 '' are connected to ground. The electrode and the lowermost internal electrode are shown, respectively.

The innermost electrodes 4 'and 4 "of the uppermost layer and the lowermost layer make the potentials of the inner electrodes 3a' and 3a" connected to the ground coincide, and one ground of the three-terminal chip capacitor is used when the three-terminal chip capacitor is actually used. Even if the terminal 6 'or 6' 'is shorted from the ground wire, the internal electrodes 3a' and 3a "are connected to both ground terminals (6 'and 6" in FIG. 2) so that they can function.

However, each of the two or more internal electrodes 3a 'and 3a "stacked between the internal electrodes 2 used as part of the signal line and connected to the ground terminals are alternately opposite to one of the ground terminals 6' and 6, respectively. By forming the inner electrode so as to be connected only to ") so that the flow of current flowing through the inner electrode 3a 'and the inner electrode 3a " tops each other, the electromagnetic fields cancel each other out, thereby reducing the equivalent thermal resistance at high frequencies. The inductance is also reduced.

In the present embodiment, the internal electrodes 3a 'and 3a are connected to the ground terminal in the conventional structure of the cross (+) to remove the one protruding surface.

5 shows the internal electrode shape and the laminated structure of another embodiment according to the present invention. In the drawings, 1 is a dielectric, 2 is an internal electrode used as part of a signal line, 3b 'and 3b "are internal electrodes for a high frequency noise path, and 4' and 4" are internal electrodes of a top layer and a bottom layer connected to ground, respectively. .

In the present embodiment, as shown in the drawing, the internal electrodes 2 operated as signal lines are stacked with one internal electrode 3b 'or 3b " Internal electrodes are formed by alternately connecting the internal electrodes 3b 'or 3b "for high frequency noise paths stacked between the internal electrodes 2 only to one of the ground terminals 6' or 6 '' in opposite directions. The electromagnetic fields due to the current flowing through them cancel each other, reducing the equivalent series resistance and internship at high frequencies.

Also in this embodiment, a structure (+) in which the ground contact surface of one side is removed from the conventional structure of the cross (+) is used as the internal electrodes 36 'and 36 ".

In addition, in the present invention, as compared with the conventional internal electrode shapes 3 'and 3' ', as shown in FIGS. 4 and 5, the internal electrode shapes 3a', 3a ", 3b 'and 3b" are shown. It reduces the area of the internal electrode that requires the use of expensive materials without reducing the capacity.

Therefore, the present invention as described above has the following effects.

Although the internal electrode material is used less, the effective electrode area that determines capacitance by the internal electrode (2) used as part of the signal line and the internal electrode connected to the ground is the same, so there is no reduction in capacitance. Equivalent series resistance can be greatly reduced to prevent heat generation and temperature rise due to power loss. In addition, the inductance of the internal electrode connected to the ground at a high frequency is also greatly reduced, and the impedance at the high frequency is small, which is advantageous to remove the high frequency noise. In addition, the use of less expensive internal electrode material can reduce the manufacturing cost.

In addition, the chip type capacitor for removing high frequency noise of the present invention has a large application effect when used for removing high frequency noise, which is a problem in signal lines of electronic devices such as computers and communication devices.

Claims (4)

An internal electrode used as part of the signal line and an internal electrode connected to the ground are stacked in a plurality of layers with a dielectric interposed therebetween, and external terminals 5 'and 5' 'connected to the signal line and a ground terminal connected to the ground line ( In a three-terminal chip type capacitor having 6 'and 6 ", a set of grounding electrode means 4' and 4 connected to both ground terminals 6 'and 6" and stacked on the uppermost layer and the lowermost layer, respectively. ''): A signal line electrode means (2) stacked between the set of grounding electrode means, and stacked in at least one or more sets and used as a part of the signal line: and two signal line electrodes forming a pair of the signal line electrode means A high frequency, characterized in that it is stacked between the means, each of which comprises at least two electrode means (3a ', 3a' ') for high frequency noise passages which are alternately connected to only opposite ground terminals, respectively. Chip capacitors for noise cancellation. The method according to claim 1, wherein the electrode means (3a ', 3a' ') for the high frequency noise passage is formed in a cross-shape (+) to remove the one protruding surface connected to the ground terminal. Chip capacitors for high frequency noise cancellation. The internal electrode used as part of the signal line and the internal electrode connected to the ground are stacked in multiple layers with a dielectric in between, and the external terminals 5 'and 5' 'connected to the signal line and the ground terminal connected to the ground line ( A three-terminal chip type capacitor having a 6 ', 6 "), comprising a set of grounding electrode means 4', 4" connected to both ground terminals 6 ', 6 "and stacked on the uppermost layer and the lowermost layer, respectively. A signal line electrode means (2) which is stacked between the set of grounding electrode means, and is extracted as at least one or more sets and used as a part of the signal line; and between two signal line electrode means forming a pair of the signal line electrode means Each having a high frequency noise path electrode means (3a ', 3a ") formed so that the electrodes stacked between each signal line electrode means are alternately connected to only opposite ground terminals. Chip capacitors for high frequency noise cancellation, characterized in that. The method according to claim 3, wherein the electrode means (3b ', 3b ") for the high frequency noise passage is formed in a cross-shaped (+) shape in which one protruding surface connected to the ground terminal is removed. Chip capacitors for high frequency noise cancellation.