KR820000378B1 - Low frequenc inverter - Google Patents

Abstract

The small-size DC-AC inverter comprises a carrier wave generator(31), a low frequency signal generator(32), a gate circuit(33), an amplifier stage(34), a transformer part(35), a demodulator circuit(36) and a Dc eliminating circuit(37). The high frequency signal, 10 KHz-100 KHz, from the generator(31) is modulated by the low frequency from the generator(32) at the gate circuit(33). The modulated signal is switching-amplified at the amplifier stage(14) and is voltage-regulated by the transformer part(15). After the regulated signal is demodulated by the demodulator circuit(36), DC component of the signal is eliminated by the DC eliminating circuit(37). The alternating current of square wave thus can be obtained.

Description

Low frequency inverter

1a is a schematic diagram of a DC-DC converter, and (b) is a schematic diagram illustrating the present invention. (c) is a principle diagram of a direct current canceling circuit of the present invention;

2 is a circuit diagram illustrating one embodiment of the present invention.

3 is a partial waveform diagram of FIG.

4 is a circuit diagram showing another embodiment of the present invention.

The present invention relates to a DC-AC Low Frequeuce Inverter which obtains the required low frequency power signal from a DC power supply.

In general, when a low frequency power signal is obtained from a DC power supply, the size of the transformer used increases in inverse proportion to the frequency. Therefore, when the operating frequency is low, the size of the transformer increases for various reasons.

In addition, the weight also increases significantly, resulting in a rise in product costs.

The present invention has been invented by eliminating such drawbacks and miniaturizing and reducing the butter of DC-AC and reducing the cost.

First, in order to understand the principle of the present invention, a schematic diagram of a DC-DC converter is shown in FIG.

The configuration is composed of a carrier generator 1, an amplifier 2, a transformer 3, a detector 4 as shown in FIG. 1A and its operation is as follows. The carrier generator 1 oscillates a high frequency of about 10KHz-100KHz in order to reduce the size of the transformer used, and by the oscillated signal, the amplification unit 2 switches the DC power to square waves of the same frequency as the carrier wave. The pulses are made, and the square wave pulses are adjusted to the required voltage in the transformer section 3, and the detector 4 removes the carrier component and its harmonic components to obtain the required DC voltage.

The basic construction principle of the present invention is the carrier generators 11, 31, 41, the low frequency signal generators 12, 32, 42, and the gate circuits 13, 33 as shown in FIGS. 1B, 2, and 4. Gate u8 of 41, amplifiers 14, 34, 44, substations 15, 35, 45, detectors 16, 36, 46, and DC erase circuits 17, 37, 47. It is a low frequency inverter characterized in that it is described as follows.

In FIG. 1B, in the carrier generator 11, a high frequency is used to drastically reduce the size of the transformer 15, and if the frequency is too high, the loss of the core is increased and the switching loss is increased to the present technology level. Carrier of about 10KHz-100KHz is mainly used.

The carrier generator 11 of this application also generates the frequency carrier signal of the above grade. This carrier is connected to the gate circuit 13 and is controlled by the low frequency signal generated by the low frequency signal generator 12. That is, the carrier signal is interrupted by the low frequency signal in the gate circuit 13. In other words, the carrier appears at the output terminal of the gate circuit 13 at the high level portion of the low frequency signal, and the carrier signal does not appear at the output terminal of the gate circuit 13 at the low level portion of the low frequency signal.

Therefore, the carrier signal is interrupted by the low frequency signal and is connected to the amplifier 14.

In this case, the current flowing through the transformer 15 in the DC power supply is interrupted with a small loss according to the input carrier to obtain a power pulse having the same frequency as the carrier frequency, and adjusted to the voltage required for the secondary side of the transformer 15. Appears.

The detector 16 removes a carrier wave and its harmonic components to obtain a low frequency square wave signal.

This low-frequency square wave signal has a single polarity, i.e., a direct current superimposed. If pure AC is supplied to the load side, the direct current elimination circuit 17 should be connected to remove the direct current.

The DC cancellation circuit 17 plays an important role in the case of an AC load. 1C is a principle diagram of the DC erasing circuit 17 in the present invention, and its operating state is as follows.

On the secondary side of the substation part 27, a carrier pulse interrupted by a low frequency signal appears and is detected by the diodes 21, 22 and the condenser 23.

In general, small signal detectors use a resistor to remove direct current.

An example is the AM detector of a radio receiver.

However, the use of resistors results in the inserted resistors being connected in series with the load in alternating current, which can not supply nearly 100% of the power to the load side, greatly reducing the efficiency.

In the present invention, the current flows through the coupling capacitor 25 during the half cycle of the low frequency signal in which the carrier pulse signal is present by connecting a switching element, that is, a transistor, a thyristor (SCR), a relay, and the like, instead of a DC erasing resistor, and a current flows through The capacitor 25 is charged to a positive (+) side on the power supply side and to a negative (-) potential on the load side as shown in the figure. Thereafter, the switching element 24 is short-circuited for the remaining half period in which the carrier pulse signal is not present, so that the charge charged in the coupling capacitor 25 flows through the switching element 24 and the load 26. It is reversed from the previous half cycle and the current strength is the same. Thus, it is possible to supply complete AC power to the load side.

According to the principle described above, it is possible to make an inverter that can greatly reduce the size of the pulse transformer by using a high frequency as a carrier wave. 2 is an embodiment of the present invention, the operation waveform thereof is as shown in FIG.

An embodiment of the present invention will be described with reference to FIGS. 2 and 3 as follows. The configuration is similar to the schematic diagram of FIG. 1b, and the characteristic is to separate the (+) side and the (-) side of the low frequency signal, and control the carriers alternately. The two square waves are connected to each other in opposite polarity and combined by a direct current elimination circuit and designed to be used in a relatively large power DC-AC inverter.

In the carrier generator 31 of FIG. 2, a carrier wave of 10 KHz-100 KHz is generated as shown in FIG. 3A, which is connected to the input terminals of the gates U ₆ and U ₇ of the gate circuit 33. In FIG.

단자에 듀티(Duty)가 50％고 위상이 180。 다른 제 3b,c 도와 같은 두 구형파 신호가 나오게 한다. 이것은 게이트회로(33)의 게이트 입력단자에 각각 접속되어서 반송파 발생기(31)에서 들어오는 반송파를 제 3d,e 도와 같이 단속 제어한다.In the low frequency signal generator 32 of FIG. 2, the frequency of the frequency equal to the low frequency obtained from the inverter output side of the present invention is obtained, and the frequency twice that of the obtained frequency to make the duty 50%. Is oscillated by using the inverters U ₃ , U ₄ , resistor R ₃ , and capacitor C _{2 of} FIG. 2 and immersed in half by flip-flop U ₅ to flip the flip-flop U. ₅ ) of

The two square wave signals having the same duty (50% duty and 180 ° out of phase 3b, c) are outputted at the terminal. It is connected to the gate input terminal of the gate circuit 33, respectively, and performs the intermittent control of the carrier wave coming from the carrier generator 31 as in the 3d, e diagram.

These signals are input to the amplifier 34, respectively.

In the amplifier 34, an exciter including a transistor Q ₁ Q ₂ Q ₅ and a resistor R ₄ R ₅ R ₆ is provided to operate the transistor Q ₇ , which is a high frequency square wave interrupting element, with little loss. required and the operation is the transistor (Q ₂₎ is conductive and the transistors (Q ₇ low level (low level) of the high frequency pulse train (pulse train) is input to the base of the transistor (Q ₁ Q ₂₎ consisting of a NPN transistor and the PNP transistor ) Is turned off, and at high level, transistor Q ₁ is turned on so that transistor Q ₇ is turned on. At this time, since the signal input from the gate circuit 33 is weak, the transistor Q ₁ is not sufficiently conducted, so the signal appearing at both ends of the resistor R ₅ is amplified by the transistor Q ₅ to amplify the base of the transistor Q ₇ . Sufficient drive current was passed between the meters to allow the transistor Q ₇ to conduct sufficiently during the high level.

The diode D ₁ of the second diagram amplifying unit 34 is connected to the inductive component of the pulse transformer T ₁ of the second diagram transformer 35 at the instant when the transistor Q ₇ interrupts the current according to the high frequency pulse train. of a high voltage by a negative base voltage generated it was connected between the collector and the emitter of the transistor (Q ₇₎ in order to avoid the risk of destroying a transistor (Q _7), the second FIG amplifier section 34 diode (D ₃ ) Is connected to limit the counter voltage of high voltage not to exceed 2 times of supply voltage (Vcc).

In this way, the transistor Q ₇ , which is a high frequency square wave interrupting element, is interrupted so that a square wave current flows from the DC power supply Vcc through the high frequency pulse transformer T ₁ of the substation part 35 to generate a high power pulse. This high-power pulse is converted to an appropriate voltage in the transformer section 35 and detected by the diodes D ₅ and D ₆ of the detector 36 and the other diodes D ₇ and D ₈ to obtain a low-frequency square wave signal. It is easy to think of the waveform as a complete alternating current as shown in Figure 3f, but it is impossible to actually flow current to the load without the DC erase circuit. Transistors Q ₉ and Q ₁₀ are used as switching elements of the DC erasing circuit 37, and the base end is provided with intermediate taps on the secondary side of the pulse transformer of the transformer section 35, respectively.

In order to drive the switching transistors Q ₉ and Q ₁₀ with high efficiency, the diodes D ₉ and D ₁₀ are respectively rectified in the positive polarity, and the resistor R ₁₀ , the condensate C ₅ , and the resistor R are ₁₁ ) Using the capacitor (C ₆ ), the time constant was adjusted appropriately, and the middle tap of the secondary side of the pulse transformer was connected to the base terminal of the opposite switching transistor (Q ₉ , Q ₁₀ ), respectively.

During the half cycle in which the voltage is applied to the capacitor C ₃ , the transistor Q ₁₀ is short-circuited, and the voltage charged in the capacitor C ₃ flows through the load 38 through the transistor Q ₁₀ . for C ₄₎ the remaining half cycle the voltage applied to both ends of the switching transistor (Q ₉₎ is short-circuited (conducting) is ready capacitor (C voltage hanging in ₄₎ is a transistor for DC cancellation (Q ₉₎ through the load 38 Since it can flow via, the load 38 is supplied with full bidirectional alternating current.

4 shows another embodiment of the present invention, which relates to an inverter capable of obtaining relatively low power even with a simple configuration, and includes a carrier generator and gate circuit 41, a low frequency signal generator 42, an amplifier 44, It consists of a substation part 45, a detector 46, and a DC erase circuit 47. The operation thereof is as follows.

The carrier generator and gate circuit 41 has two functions, that is, a carrier signal generation function (carrier generator 31 in FIG. 2) and a gate function (gate circuit 33 in FIG. 2), and the gate U ₈ . It is a general oscillator circuit oscillated by forward feedback by resistors R ₁₄ and R ₁₅ capacitor C ₇ of inverter U ₉ , which is connected to low frequency signal generator 42 using U ₈ as a gate. Only when the terminal is at a high level, the carrier signal is oscillated. The low frequency signal generator 42 is composed of a general oscillator circuit positively feedbacked by an inverter U ₁₀ and U ₁₁ and resistors R ₁₆ and R ₁₇ and a capacitor C _8. The output is a carrier generator. The carrier generation circuit is operated by being connected to the input terminal of the gate U ₈ of the gate circuit 41, and the carrier generation circuit is controlled by stopping the carrier generation circuit during the half cycle, i.e., low level.

The output carrier pulse train of the carrier generator and the gate circuit 41 is connected to the base of the transistors Q ₁₁ and Q ₁₂ of the amplifier 44 and amplified, and the transistor Q ₁₄ is driven by the transistor Q ₁₃ . The transistor Q ₁₄ switches the current flowing through the primary side of the transformer section 45 from the DC power supply according to the carrier pulse train, and is adjusted to an appropriate voltage on the secondary side of the transformer section 45.

A pulse signal appears and the potential of the positive direction is detected by the diodes D ₁₂ and D ₁₃ of the detector 46, and the carrier and its harmonic components are bypassed by the chocolate coil L ₃ and the capacitor C ₁₁ . A low-frequency square wave signal is obtained, which cannot be supplied to an AC load because it is monopolar, that is, a DC component is superimposed.

It is connected to the DC canceling circuit 47 to obtain a full bidirectional AC square wave. In the DC canceling circuit 47, the capacitor C ₁₂ is inserted in direct connection with the load 38 and the front end of the capacitor C ₁₁ is transferred to the carrier wave. It is conducted during the low period of the low frequency that is not present, so that the charge charged for the half period prior to the capacitor C ₁₂ flows along the load 38 through the conducted transistor Q ₁₅ to be discharged. In order to drive the DC erasing transistor Q ₁₅ , an intermediate tap is provided on the secondary side of the transformer 45 to obtain a negative voltage using the diode D ₁₅ , thereby obtaining a capacitor C ₁₀ and a resistor ( adjusting the time constant of the R ₂₃₎ and disappears, the carrier power and through a resistor (R ₂₃₎ by immediately discharging the electric charge charged in the capacitor (C ₁₀₎ potential is to drop to zero, is where during a half period where the carrier signal incoming The resulting negative potential is used to bring the transistor Q ₁₅ into a non-biased state.

On the other hand, a diode (D ₁₄ ) is used to obtain a voltage in the (+) direction, and the voltage is stored in the capacitor (C ₉ ), and then a (+) bias current is supplied to the base of the transistor (Q ₁₅ ) for half a period without carrier waves to remove DC. Through the transistor Q ₁₅ , the charge that has been charged in the capacitor C ₁₂ during the previous half cycle is discharged through the load through the DC eliminating transistor Q ₁₅ .

This operation is repeated to supply a complete AC square wave to the load.

Claims (1)

As described in the specification and shown in the drawings, the high frequency signal of the carrier generator 11 is modulated in the gate circuit 13 by the low frequency of the low frequency signal generator 12 and then intermittently amplified in the amplifier 14, and the substation part. A low frequency inverter, characterized in that it is adjusted to a constant voltage at (15) and detected by a detector (16) to erase the DC portion by the DC cancellation circuit (17) and then apply a low frequency AC current to the load.

Images