KR20220144648A - Power converting apparatus - Google Patents

Abstract

According to an embodiment, a power conversion device comprises: a first switch connected between one end of a voltage source for applying a voltage to an input terminal and a first node; a first inductor connected between the first node and a third node; a second switch connected between the first node and a second node; a second inductor connected between the second node and a fourth node; a third switch connected between the second node and the ground; a first capacitor and a fifth switch connected in series between the second node and the third node; and a fourth switch connected between the third node and the fourth node.

Description

POWER CONVERTING APPARATUS

The present disclosure relates to a power conversion device.

Recently, as mobile devices provide more functions, power management integrated circuits (PMICs) require more direct current (DC-DC) converters. A DC-DC converter can be mainly used to convert a power supply voltage to a relatively low voltage. In particular, the DC-DC buck converter stably supplies the output voltage even when the input voltage changes over time or the load changes, and is used when changing the voltage from a high voltage to a low voltage.

A method of connecting a plurality of inductors in parallel is used to reduce energy lost in the power conversion device. However, conventionally, a method of sensing and adjusting the inductor current has been used in order to allow the same current to flow through the inductor. However, the sensor used to detect the current flowing through the inductor not only limits the switching frequency of the DC-DC converter, but also has a slow response characteristic, high component cost because each inductor is controlled separately, and has a complex structure. have.

An object of the present disclosure is to solve the above problems, and to provide a power conversion device for allowing the same current to flow in an inductor and an operating method thereof.

A power conversion device according to an embodiment includes a first switch connected between one end of a voltage source applying a voltage to an input terminal and a first node, a first inductor connected between the first node and a third node, a first node, and a second switch connected between the second node, a second inductor connected between the second node and the fourth node, a third switch connected between the second node and the ground, and the second node and the third node connected in series a first capacitor and a fifth switch, and a fourth switch connected between the third node and the fourth node.

During the first period, the first switch, the second switch, and the fifth switch may be closed, and the third switch and the fourth switch may be open.

During the second period after the first period, the second switch, the third switch, the fourth switch, and the fifth switch may be closed, and the first switch may be open.

During the third period after the second period, the first switch and the fourth switch may be closed, and the second switch, the third switch, and the fifth switch may be open.

The voltage of the fourth node increases while having a first slope in the first section, decreases while having a second slope in the second section, and decreases while having a third slope different from the second slope in the third section, The third slope may increase over time.

A method of controlling a power conversion device according to an embodiment includes connecting a voltage source for applying a voltage to an input terminal, connecting a first inductor and a second inductor in parallel, connecting a ground to an input terminal, and a first inductor and connecting a first capacitor in parallel between the second inductors, and connecting a voltage source to an input terminal, and connecting the first inductor, the first capacitor, and the second inductor in series.

The power conversion device includes a first switch connecting an input terminal and one end of the first inductor, a second switch connecting one end of the first inductor and one end of the second inductor, and a third switch connecting one end of the second inductor and a ground , a fourth switch connecting one end of the first inductor and one electrode of the first capacitor to an output terminal, and a fifth switch connecting one end of the second inductor and the other electrode of the first capacitor.

The step of connecting a voltage source for applying a voltage to the input terminal and connecting the first inductor and the second inductor in parallel includes closing the first switch, the second switch, and the fifth switch, and opening the third switch and the fourth switch may include steps.

Connecting the ground to the input terminal and connecting the first capacitor in parallel between the first inductor and the second inductor includes closing the second switch, the third switch, the fourth switch, and the fifth switch, and closing the first switch It may include an opening step.

The step of connecting a voltage source to the input terminal and connecting the first inductor, the first capacitor, and the second inductor in series includes closing the first switch and the fourth switch, and closing the second switch, the third switch, and the fifth switch. It may include an opening step.

A power conversion device according to an embodiment includes a plurality of switches, and a first inductor, a first capacitor, and a second inductor connected in parallel between an input terminal and an output terminal by the operation of a plurality of switches, or connected in series include

While the first inductor, the first capacitor, and the second inductor are connected in series, the first capacitor is charged, and while the first inductor, the first capacitor, and the second inductor are connected in parallel, the first capacitor is discharged can be

The plurality of switches include a first switch connecting an input terminal and one end of the first inductor, a second switch connecting one end of the first inductor and one end of the second inductor, and a third switch connecting one end of the second inductor and ground. , a fourth switch connecting the other end of the first inductor and one electrode of the first capacitor to an output end, and a fifth switch connecting one end of the second inductor and the other electrode of the first capacitor.

The second switch, the third switch, the fourth switch, and the fifth switch may be closed and the first switch may be opened so that the first inductor, the first capacitor, and the second inductor are connected in parallel.

The first switch and the fourth switch may be closed, and the second switch, the third switch, and the fifth switch may be opened so that the first inductor, the first capacitor, and the second inductor are connected in series.

According to at least one of the embodiments according to the present disclosure, the power conversion device has an advantage that it can solve the imbalance of the inductor current flowing without a separate current sensing device.

According to at least one of the embodiments according to the present disclosure, there is an advantage in that it is possible to provide a power conversion device having a simple structure.

According to at least one of the embodiments according to the present disclosure, there is an advantage in that it is possible to provide a power conversion device having a small size.

1 is a schematic block diagram for explaining a power conversion system according to the present disclosure.
2 is a circuit diagram of a power conversion device according to the present disclosure.
3 is a timing diagram of the current when the power conversion device operates.
4 is a timing diagram of voltages at each node when the power conversion device operates.
5 to 7 are circuit diagrams of a power conversion device according to each phase.

Hereinafter, the embodiments disclosed in the present specification will be described in detail with reference to the accompanying drawings, but identical or similar components are given the same and similar reference numerals, and overlapping descriptions thereof will be omitted. The suffixes “module” and/or “part” for the components used in the following description are given or mixed in consideration of only the ease of writing the specification, and do not have distinct meanings or roles by themselves. In addition, in describing the embodiments disclosed in the present specification, if it is determined that detailed descriptions of related known technologies may obscure the gist of the embodiments disclosed in the present specification, the detailed description thereof will be omitted. In addition, the accompanying drawings are only for easy understanding of the embodiments disclosed in the present specification, and the technical spirit disclosed herein is not limited by the accompanying drawings, and all changes included in the spirit and scope of the present invention , should be understood to include equivalents or substitutes.

Terms including ordinal numbers such as first, second, etc. may be used to describe various elements, but the elements are not limited by the terms. The above terms are used only for the purpose of distinguishing one component from another.

When a component is referred to as being “connected” or “connected” to another component, it may be directly connected or connected to the other component, but it is understood that other components may exist in between. it should be On the other hand, when it is said that a certain element is "directly connected" or "directly connected" to another element, it should be understood that the other element does not exist in the middle.

In the present application, terms such as “comprises” or “have” are intended to designate that a feature, number, step, operation, component, part, or combination thereof described in the specification exists, but one or more other features It is to be understood that this does not preclude the possibility of the presence or addition of numbers, steps, operations, components, parts, or combinations thereof.

1 is a schematic block diagram for explaining a power conversion system 1 according to the present disclosure.

The power conversion system 1 according to the present disclosure includes a switch control device 100 and a power conversion device 200 .

The switch control device 100 switches a plurality of switches in the power conversion device 200 .

The power conversion device 200 converts the input DC power into a predetermined DC power. The power conversion device 200 may supply power to a load connected to the output terminal.

The power conversion device 200 includes a plurality of switches. Here, each of the switches in the power conversion device 200 may be implemented as PMOS and NMOS, or may be implemented in other appropriate forms.

2 shows a circuit diagram of a power conversion device 200 according to the present disclosure.

The power conversion device 200 includes two inductors L1 and L2, two capacitors C1 and C2, and five switches S1 to S5.

)이 연결된다. 예를 들어, 입력 직류 전원(V_X

)은 배터리일 수 있다. Between the first node (N1) and the ground node (GND) of the power conversion device 200, the input DC power (

) is connected. For example, input DC power (V _X

) may be a battery.

)가 흐른다.The first inductor L1 is connected between the first node N1 and the third node N3 . The first inductor current from the first node N1 to the third node N3 through the first inductor L1

) flows.

)가 흐른다.The second inductor L2 is connected between the second node N2 and the fourth node N4 . The second inductor current from the second node N2 to the fourth node N4 through the second inductor L2

) flows.

The first inductor L1 and the second inductor L2 may have the same inductance, but is not limited thereto. The first inductor L1 and the second inductor L2 may have different inductances. Hereinafter, description will be made on the assumption that the first inductor L1 and the second inductor L2 have the same inductance. However, the inductance values of the first inductor L1 and the second inductor L2 do not affect the operation of the power conversion device according to the present disclosure.

The first capacitor C1 is connected in series between the third node N3 and the fifth switch S5. The second capacitor C2 is connected between the fourth node N4 and the ground.

The second capacitor C2 may constitute a DC link. The second capacitor C2 may stabilize the output voltage of the fourth node N4 . The second capacitor C2 may have a sufficiently large capacitance so that the ripple voltage of the fourth node N4 is smaller than the output voltage. As will be described later, it is preferable that the capacitance values of the first capacitor C1 and the second capacitor C2 increase.

)를 연결한다. 제2 스위치(S2)는 제1 노드(N1)와 제2 노드(N2)를 연결한다. 제3 스위치(S3)는 제2 노드(N2)와 접지를 연결한다. 제4 스위치(S4)는 제3 노드(N3)와 제4 노드(N4)를 연결한다. 제5 스위치(S5)는 제2 노드(N2)와 제1 커패시터(C1)의 일 전극을 연결한다. The first switch (S1) is the first node (N1) and the DC power supply (

) to connect The second switch S2 connects the first node N1 and the second node N2. The third switch S3 connects the second node N2 to the ground. The fourth switch S4 connects the third node N3 and the fourth node N4. The fifth switch S5 connects the second node N2 and one electrode of the first capacitor C1.

)의 평균만큼의 전류가 흐르도록 설정할 수 있다.The power conversion device 200 may include a current source connected in parallel with the second capacitor C2 between the fourth node N4 and the ground voltage. Here, in the current source, the current (

) can be set to flow as much as the average of the current.

Control signals for controlling on/off of the switches are applied from the switch control device 100 to each of the switches S1 to S5 . These control signals largely repeat the control steps consisting of three sections. These control steps are described in detail below.

3 is a timing diagram of a current when the power conversion device 200 shown in FIG. 2 operates. 4 is a timing diagram of voltages at each node when the power conversion device 200 shown in FIG. 2 operates.

)의 제1 구간(

), 제2 위상(

)의 제2 구간(

), 제3 위상(

)의 제3 구간(

)의 길이는 원하는 출력 전압을 획득하기 위해 각각 상이하게 설정될 수 있다. Here, the length of the section of each phase, the first phase (

) of the first section (

), the second phase (

) in the second section (

), the third phase (

) in the third section (

) may be set differently to obtain a desired output voltage.

) 구간, ii) 인덕터에 충전된 에너지를 제1 커패시터(C1)에 전달(Freewheeling)하는 제2 위상(

) 구간, 및 iii) 인덕터에 흐르는 전류의 균형을 맞추는(Balancing) 제3 위상(

) 구간에 따라 제어된다. Specifically, the power conversion device is i) a first phase (Build up) of energy corresponding to the input voltage applied from the input terminal to each inductor (Build up)

) section, ii) the second phase (freewheeling) of energy charged in the inductor to the first capacitor C1

) section, and iii) a third phase balancing the current flowing in the inductor (

) is controlled according to the section.

Hereinafter, the operation of the power conversion device 200 for each phase will be described with reference to FIGS. 5 to 7 .

5 to 7 are circuit diagrams illustrating circuits of the power conversion device 200 operating for each phase.

)일 때의 전력 변환 장치(200)를 나타낸 회로도이다. 도 6는 제2 위상(

)일 때의 전력 변환 장치(200)를 나타낸 회로도이다. 도 7은 제3 위상(

)일 때의 전력 변환 장치(200)를 나타낸 회로도이다. Specifically, FIG. 5 shows the first phase (

) is a circuit diagram showing the power conversion device 200 at the time. 6 shows the second phase (

) is a circuit diagram showing the power conversion device 200 at the time. 7 shows the third phase (

) is a circuit diagram showing the power conversion device 200 at the time.

이라고 하고, 제2 노드(N2)에서 제4 노드(N4)로 제2 인덕터(L2)를 통해 흐르는 전류를

라고 한다. 제2 노드(N2)에서 제3 노드(N3)로 제1 커패시터(C1)를 통해 흐르는 전류를

이라고 한다. 또한, 입력단으로부터 제4 노드(N4)로 들어오는 전류를

이라고 한다. current flowing through the first inductor L1 from the first node N1 to the third node N3

and the current flowing through the second inductor L2 from the second node N2 to the fourth node N4 is

It is said The current flowing through the first capacitor C1 from the second node N2 to the third node N3 is

It is said In addition, the current entering the fourth node (N4) from the input terminal

It is said

) 동안, 도 5에 도시된 바와 같이, 제1 스위치(S1), 제2 스위치(S2), 및 제5 스위치(S5)는 닫혀있으며, 제3 스위치(S3) 및 제4 스위치(S4)는 열려있다. 이에 따라, 제1 노드(N1)와 제2 노드(N2)는 연결되며, 제3 노드(N3)와 제4 노드(N4)가 연결된다. 이에 따라, 제1 인덕터(L1)와 제2 인덕터(L2)는 병렬로 연결된다.1st section (

), as shown in FIG. 5 , the first switch S1 , the second switch S2 , and the fifth switch S5 are closed, and the third switch S3 and the fourth switch S4 are is open Accordingly, the first node N1 and the second node N2 are connected, and the third node N3 and the fourth node N4 are connected. Accordingly, the first inductor L1 and the second inductor L2 are connected in parallel.

)으로부터 2개의 인덕터(L1, L2)를 거쳐 병렬로 연결되어 있는 제2 커패시터(C2) 및 전류원을 통해 접지 노드(GND)에 이르는 경로로 형성된다. In this state, the current path is at the input (

) to the ground node GND through the second capacitor C2 and the current source connected in parallel through the two inductors L1 and L2.

) 동안, 입력 전압(

)을 통해 에너지가 계속 공급되므로 제1 인덕터(L1)에 흐르는 전류(

) 및 제2 인덕터(L2)에 흐르는 전류(

)는 증가한다. 제1 인덕터(L1)에 흐르는 전류(

)와 제2 인덕터(L2)에 흐르는 전류(

)가 합쳐져

이 되므로, 출력 전류인

의 값도 또한 증가한다.3, the first section (

) while the input voltage (

) through which energy is continuously supplied, so the current (

) and the current flowing in the second inductor L2 (

) increases. The current flowing in the first inductor L1 (

) and the current flowing in the second inductor (L2) (

) are combined

So, the output current is

The value of also increases.

) 동안, 제1 노드(N1) 및 제2 노드(N2)에는 입력 전압

가 인가된다. 또한, 출력 전류인

가 제2 커패시터(C2)를 거쳐 접지 노드(GND)에 이르면서 제2 커패시터(C2)의 전기장 에너지로 변환되어 제2 커패시터(C2)가 충전된다. 이로써 제2 커패시터(C2)의 일 전극에 연결된 제3 노드(N3) 및 제4 노드(N4)의 전압은 증가한다. As shown in Figure 4, the first section (

), the input voltage is applied to the first node N1 and the second node N2.

is authorized Also, the output current

is converted into electric field energy of the second capacitor C2 as it reaches the ground node GND via the second capacitor C2, and the second capacitor C2 is charged. Accordingly, the voltages of the third node N3 and the fourth node N4 connected to one electrode of the second capacitor C2 increase.

) 동안, 도 6에 도시된 바와 같이, 제2 스위치(S2) 내지 제5 스위치(S5)는 닫혀있으며, 제1 스위치(S1)는 열려있다. 이에 따라, 제1 구간(

) 에서와 동일하게 제1 노드(N1)와 제2 노드(N2)는 연결되어 있으며, 제3 노드(N3)와 제4 노드(N4) 또한 연결되어 있다. 이에 따라, 제1 인덕터(L1), 제1 커패시터(C1), 및 제2 인덕터(L2)는 병렬로 연결된다.2nd section (

), as shown in FIG. 6 , the second switch S2 to the fifth switch S5 is closed, and the first switch S1 is open. Accordingly, the first section (

), the first node N1 and the second node N2 are connected, and the third node N3 and the fourth node N4 are also connected. Accordingly, the first inductor L1, the first capacitor C1, and the second inductor L2 are connected in parallel.

)과는 단절되고, 자화된 제1 인덕터(L1) 및 제2 인덕터(L2)와 제1 커패시터(C1)를 거쳐 병렬로 연결되어 있는 제2 커패시터(C2) 및 전류원을 통해 접지 노드(GND)에 이르는 경로로 형성된다.In this state, the current path is the input voltage (

) and the ground node (GND) through the magnetized first inductor (L1) and the second inductor (L2) and the second capacitor (C2) and the current source connected in parallel through the first capacitor (C1) formed by a path leading to

) 동안, 도 3에 나타난 바와 같이, 제2 스위치(S2)가 턴온되는 시점(t1)에 제1 인덕터(L1) 및 제2 인덕터(L2)에 저장된 에너지 일부가 제1 커패시터(C1)에 전달되어 제1 커패시터(C1)에 흐르는 전류는 급격히 상승한다. 이후, 제1 커패시터(C1)에 흐르는 전류(I_C1)는, 제1 인덕터(L1) 및 제2 인덕터(L2)에 저장된 에너지가 감소됨에 따라 점차 감소한다. 일정 기간이 지나면 제1 커패시터(C1)가 쇼트되어 전류(I_C1)가 더 이상 제1 커패시터(C1)에 흐르지 않게 된다. 2nd section (

), a portion of the energy stored in the first inductor L1 and the second inductor L2 is transferred to the first capacitor C1 at a time t1 when the second switch S2 is turned on. As a result, the current flowing through the first capacitor C1 rapidly increases. Thereafter, the current I _C1 flowing through the first capacitor C1 gradually decreases as the energy stored in the first inductor L1 and the second inductor L2 decreases. After a certain period of time, the first capacitor C1 is short-circuited so that the current I _C1 no longer flows through the first capacitor C1.

)의 흐름은, 제1 커패시터(C1)에 저장되어 있던 양전하(Q+)의 양이 제2 커패시터(C2)에 저장되어 있는 양전하의 양보다 많기 때문에, 즉 전하양의 차이 때문에 제2 노드(N2)로부터 제3 노드(N3) 방향으로 흐르게 된다. For reference, the current flowing through the first capacitor C1 (

) flow, because the amount of positive charge Q+ stored in the first capacitor C1 is greater than the amount of positive charge stored in the second capacitor C2, that is, due to the difference in the amount of charge, the second node N2 ) to the third node N3.

) 및 제2 인덕터(L2)에 흐르는 전류(

)는 점차 감소한다. 이에 따라, 제1 인덕터 전류(

), 제2 인덕터 전류(

), 및 제1 커패시터 전류(

)의 합인

또한 감소한다. At the same time, the current flowing in the first inductor L1 (

) and the current flowing in the second inductor L2 (

) gradually decreases. Accordingly, the first inductor current (

), the second inductor current (

), and the first capacitor current (

) sum of

also decreases.

) 동안, 도 4에 나타난 바와 같이, 제1 노드(N1) 및 제2 노드(N2)는 접지된다. 또한, 출력 전류인

이 감소되므로, 제3 노드(N3) 및 제4 노드(N4)에 걸리는 전압 또한 감소된다. 2nd section (

), as shown in FIG. 4 , the first node N1 and the second node N2 are grounded. Also, the output current

is reduced, the voltage applied to the third node N3 and the fourth node N4 is also reduced.

)에서 제1 커패시터(C1)에 저장되어 있던 에너지가 제2 구간(

)에서

으로 출력된다. 이 때,

은, 제1 커패시터(C1)에 저장된 에너지가 없는 경우에 제2 구간(

)에 흐르는 전류의 양보다, 제1 커패시터(C1)에 저장되어 있는 에너지의 양만큼 더 크다. 즉, 바로 직전의 제3 구간(

)에 제1 커패시터(C1)에 저장되어 있던 에너지와 제2 구간(

)에서

으로 출력되는 추가된 에너지의 양은 동일하며, 이에 따라 도 3에 제1 면적(S12)과 제2 면적(S21)이 동일하다. 이와 유사하게, 제3 면적(S22)과 제4 면적(S31) 또한 동일하다. However, as will be described later, the immediately preceding third section (

) in the second section (

)at

is output as At this time,

is, when there is no energy stored in the first capacitor C1, the second period (

) is greater by the amount of energy stored in the first capacitor C1 than the amount of current flowing through it. That is, the immediately preceding third section (

) and the energy stored in the first capacitor C1 and the second section (

)at

The amount of the added energy output as ' is the same, and accordingly, the first area ( S12 ) and the second area ( S21 ) in FIG. 3 are the same. Similarly, the third area S22 and the fourth area S31 are also the same.

) 동안의 제2 노드(N2)와 제3 노드(N3) 사이의 전압 차이가 저장되어 있다. 이후의 제1 구간(

)에서, 제1 커패시터(C1)는 플로팅 상태에 있다. 그리고 이어지는 제2 구간(

)에서, 제1 커패시터(C1)의 일 전극은 접지(GND)에 연결되고, 타 전극은 출력 단자(즉, 제4 단자(N4))에 연결된다. 즉, 제1 커패시터(C1)에 저장되어 있는 전압에 의해, 제3 노드(N3) 및 제4 노드(N4)의 전압은 급격히 증가한다. 시간이 경과함에 따라 제1 커패시터(C1)에 저장된 에너지가 출력 단자에 전달되면서 제3 노드(N3) 및 제4 노드(N4)의 전압이 감소한다. Specifically, the first capacitor C1 has a third section (

), the voltage difference between the second node N2 and the third node N3 is stored. After the first section (

), the first capacitor C1 is in a floating state. And the second section (

), one electrode of the first capacitor C1 is connected to the ground GND, and the other electrode is connected to the output terminal (ie, the fourth terminal N4). That is, the voltages of the third node N3 and the fourth node N4 rapidly increase due to the voltage stored in the first capacitor C1 . As time passes, energy stored in the first capacitor C1 is transferred to the output terminal, and the voltages of the third node N3 and the fourth node N4 decrease.

) 및 제2 인덕터 전류(

)의 리플이 각 인덕터 전류의 직류값보다 상당히 작다고 가정하면, I_L1 = I_L2 = I_L,DC라고 할 수 있다. 이 때, 제1 커패시터(C1)의 값은 다음과 같이 나타낼 수 있다. If the first inductor L1 and the second inductor L2 have the same value, the first inductor current (

) and the second inductor current (

) is significantly smaller than the DC value of each inductor current, I _L1 = I _L2 = I _L,DC . In this case, the value of the first capacitor C1 may be expressed as follows.

는 제3 구간의 시간의 길이이고,

는 제1 및 제2 인덕터의 DC 전류이며,

는 제3 구간 동안에 변하는 제1 커패시터(C1)의 양단 전압이다. 본 개시에서는

가 클수록 커패시터에 저장될 수 있는 용량이 작아지고 전류의 밸런싱을 맞출 수 있는 효율이 낮아지므로,

과

를 고려하여

를 충분히 작게할 수 있는 커패시터를 사용해야 한다. here,

is the length of time of the third interval,

is the DC current of the first and second inductors,

is the voltage across the first capacitor C1 that varies during the third period. In this disclosure

The larger the value, the smaller the capacity that can be stored in the capacitor and the lower the efficiency for balancing the current.

class

taking into account

Capacitors that can make it small enough should be used.

) 동안, 도 7에 도시된 바와 같이, 제1 스위치(S1) 및 제4 스위치(S4)는 닫혀있으며, 제2 스위치(S2), 제3 스위치(S3), 및 제5 스위치(S5)는 열려있다. 이에 따라, 제1 인덕터(L1), 제1 커패시터(C1), 및 제2 인덕터(L2)는 직렬로 연결된다. 3rd section (

), as shown in FIG. 7 , the first switch S1 and the fourth switch S4 are closed, and the second switch S2 , the third switch S3 , and the fifth switch S5 are closed. is open Accordingly, the first inductor L1, the first capacitor C1, and the second inductor L2 are connected in series.

)에서부터 시작되어 제1 인덕터(L1), 제1 커패시터(C1), 및 제2 인덕터(L2)를 거치고, 병렬로 연결되어 있는 제2 커패시터(C2) 및 전류원을 통해 접지 노드(GND)에 이르는 경로로 형성된다.In this state, the current path is the input voltage (

), goes through the first inductor L1, the first capacitor C1, and the second inductor L2, and reaches the ground node GND through the second capacitor C2 and the current source connected in parallel. formed by the path.

) 동안, 도 3에 나타난 바와 같이, 제1 스위치(S1)가 제1 노드(N1)에 연결되는 시점(t2)부터 제1 인덕터(L1)에 흐르는 전류는 증가한다. 또한, 제1 커패시터(C1)를 통해 흐르는 전류(

)는 감소한다. 3rd section (

), the current flowing through the first inductor L1 increases from the time t2 when the first switch S1 is connected to the first node N1 as shown in FIG. 3 . In addition, the current flowing through the first capacitor C1 (

) decreases.

), 제1 커패시터 전류(

), 및 제2 인덕터 전류(

)에는 동일한 전류가 흐르며, 이는 출력 전류(

)과 동일하다. 즉, 제3 위상에서 제1 인덕터 전류(

), 제1 커패시터 전류(

), 제2 인덕터 전류(

), 및출력 전류(

)

의 기울기의 절댓값은 모두 동일하다. At this time, since the first inductor L1, the first capacitor C1, and the second inductor L2 are all connected in series, the first inductor current (

), the first capacitor current (

), and the second inductor current (

) flows the same current, which is the output current (

) is the same as That is, in the third phase, the first inductor current (

), the first capacitor current (

), the second inductor current (

), and the output current (

)

The absolute values of the slopes of are all the same.

)에서는 제1 인덕터(L1)에 흐르는 전류, 제2 인덕터(L2)에 흐르는 전류, 및 제1 커패시터(C1)에 흐르는 전류가 합쳐져서 출력 전류(

)로서 흐른다. 반면, 제3 구간(

)에서는 제1 인덕터(L1), 제1 커패시터(C1), 및 제2 인덕터(L2)가 직렬로 연결되므로, 출력 전류(

)가 제2 구간(

)과 비교하여 감소된다. 상술한 바와 같이, 출력단으로 전달되지 못한 에너지는 제1 커패시터(C1)에 저장되어, 제3 위상(

)에서 제2 노드(N2)와 제3 노드(N3) 사이의 전압차는 증가된다. However, the second section (

), the current flowing through the first inductor L1, the current flowing through the second inductor L2, and the current flowing through the first capacitor C1 are combined to produce an output current (

) flows as On the other hand, the third section (

), since the first inductor L1, the first capacitor C1, and the second inductor L2 are connected in series, the output current (

) is the second section (

) is reduced compared to As described above, the energy not transferred to the output terminal is stored in the first capacitor C1, and the third phase (

), the voltage difference between the second node N2 and the third node N3 is increased.

) 동안, 도 4에 나타난 바와 같이, 제1 노드(N1)는 입력단에 연결되어

의 전압을 가진다. 제1 인덕터(L1)를 통해 흐르는 전류에 의해 제3 노드(N3)의 전압이 증가한다. 반면, 제1 커패시터(C1)의 양단에 걸리는 전압이 증가함에 따라 제2 노드(N2)의 전압은 감소한다. 또한, 출력 전류(

)가 감소함에 따라 제4 노드(N4)의 전압 또한 감소한다. 제4 노드(N4), 즉, 제2 커패시터(C2) 양단에 걸리는 전압은 그 제2 커패시터(C2)에 흐르는 전류의 제곱에 비례한다. 따라서, 제4 노드(N4)에 걸리는 전압은 2차 함수의 형태로 감소한다. 3rd section (

), as shown in FIG. 4 , the first node N1 is connected to the input

has a voltage of The voltage of the third node N3 is increased by the current flowing through the first inductor L1. On the other hand, as the voltage across the first capacitor C1 increases, the voltage at the second node N2 decreases. Also, the output current (

) decreases, the voltage of the fourth node N4 also decreases. The voltage across the fourth node N4, ie, the second capacitor C2, is proportional to the square of the current flowing through the second capacitor C2. Accordingly, the voltage applied to the fourth node N4 decreases in the form of a quadratic function.

) 내지 제3 위상(

)의 상태를 반복한다. Then, the voltage conversion device is the first phase (

) to the third phase (

) repeats the state.

According to the power conversion system according to the present disclosure, it is possible to solve the imbalance of current flowing through the inductor without structural change of the power conversion device.

In addition, the power conversion system according to the present disclosure may provide a power conversion device that is simple in structure and small in size.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims are also presented. It belongs to the scope of the invention.

Claims (15)

a first switch connected between one end of a voltage source for applying a voltage to the input terminal and the first node;
a first inductor connected between the first node and the third node;
a second switch connected between the first node and the second node;
a second inductor connected between the second node and the fourth node;
a third switch connected between the second node and the ground;
a first capacitor and a fifth switch connected in series between the second node and the third node, and
comprising a fourth switch connected between the third node and the fourth node,
power converter. According to claim 1,
During the first period, the first switch, the second switch, and the fifth switch are closed,
the third switch and the fourth switch are open;
power converter. 3. The method of claim 2,
During a second period after the first period, the second switch, the third switch, the fourth switch, and the fifth switch are closed, and the first switch is open;
power converter. 4. The method of claim 3,
During a third period after the second period, the first switch and the fourth switch are closed, and the second switch, the third switch, and the fifth switch are open;
power converter. 5. The method of claim 4,
The voltage of the fourth node increases while having a first slope in the first section, decreases while having a second slope in the second section, and has a third slope different from the second slope in the third section decreases with
The third slope increases over time,
power converter. connecting a voltage source for applying a voltage to the input terminal, and connecting the first inductor and the second inductor in parallel;
connecting a ground to the input terminal and connecting a first capacitor in parallel between the first inductor and the second inductor; and
connecting the voltage source to the input terminal and connecting the first inductor, the first capacitor, and the second inductor in series;
How to control the power converter. 7. The method of claim 6,
The power conversion device includes a first switch connecting the input terminal and one end of the first inductor, a second switch connecting one end of the first inductor and one end of the second inductor, and one end of the second inductor and the A third switch connecting the ground, a fourth switch connecting one end of the first inductor and one electrode of the first capacitor to an output end, and a fourth switch connecting one end of the second inductor and the other electrode of the first capacitor 5 switch included,
How to control the power converter. 8. The method of claim 7,
The step of connecting a voltage source for applying a voltage to the input terminal and connecting the first inductor and the second inductor in parallel comprises:
closing the first switch, the second switch, and the fifth switch, and opening the third switch and the fourth switch;
How to control the power converter. 9. The method of claim 8,
Connecting a ground to the input terminal and connecting a first capacitor in parallel between the first inductor and the second inductor includes:
closing the second switch, the third switch, the fourth switch, and the fifth switch, and opening the first switch,
How to control the power converter. 10. The method of claim 9,
Connecting the voltage source to the input terminal, and connecting the first inductor, the first capacitor, and the second inductor in series,
closing the first switch and the fourth switch, and opening the second switch, the third switch, and the fifth switch.
How to control the power converter. multiple switches, and
A first inductor, a first capacitor, and a second inductor connected in parallel or connected in series between an input terminal and an output terminal by the operation of the plurality of switches
A power conversion device comprising a. 12. The method of claim 11,
while the first inductor, the first capacitor, and the second inductor are connected in series, the first capacitor is charged;
while the first inductor, the first capacitor, and the second inductor are connected in parallel, the first capacitor is discharged,
power converter. 12. The method of claim 11,
The plurality of switches,
a first switch connecting an input terminal and one end of the first inductor;
a second switch connecting one end of the first inductor and one end of the second inductor;
a third switch connecting one end of the second inductor to the ground;
a fourth switch connecting the other terminal of the first inductor and one electrode of the first capacitor to the output terminal;
A fifth switch connecting one end of the second inductor and the other electrode of the first capacitor,
power converter. 14. The method of claim 13,
The second switch, the third switch, the fourth switch, and the fifth switch are closed, and the first switch is opened so that the first inductor, the first capacitor, and the second inductor are connected in parallel. ,
power converter. 15. The method of claim 14,
The first switch and the fourth switch are closed, and the second switch, the third switch, and the fifth switch are opened so that the first inductor, the first capacitor, and the second inductor are connected in series. ,
power converter.

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