KR20090096689A - Power supply and electronic ballast with auxiliary protection circuit - Google Patents

Abstract

An arrangement (10) comprises a front-end circuit (100), a back-end circuit (200), and an auxiliary protection circuit (300). Front-end circuit (100), which typically includes an EMI filter and rectifier circuitry, has first and second input connections (12,14) for receiving a conventional source of AC voltage (20). Back-end circuit (200), which typically includes power factor correction and inverter circuitry, is coupled to front-end circuit (100) and a load (30) such as one or more gas discharge lamps. Auxiliary protection circuit (300) is coupled between front-end circuit (100) and back-end circuit (200). During operation, auxiliary protection circuit (300) protects back-end circuit (200) from any malfunction or damage that may occur due to a line-sag condition or due to a phase-to-phase miswiring condition. Additionally, auxiliary protection circuit (300) significantly reduces the peak inrush current that is experienced by arrangement (10) following initial application of AC power.

Description

POWER SUPPLY AND ELECTRONIC BALLAST WITH AUXILIARY PROTECTION CIRCUIT

The present invention relates to the general subject of circuits and power supplies for powering gas discharge lamps. More specifically, the present invention provides an auxiliary protection circuit for protecting the power supply or ballast against specific AC line fault conditions and for limiting the peak inrush current upon initial application of AC power to the power supply or ballast. It relates to a power supply and an electronic ballast comprising a.

Many existing power sources and electronic ballasts (electronic ballasts for powering one or more gas discharge lamps) typically provide alternating current (AC) voltage (eg, 277 at 60 hertz) provided by an electrical utility company. Is connected to the source of volts rms). Indeed, power supplies and electronic ballasts face many of the operational difficulties associated with AC voltage sources. These problems include AC line drop-out conditions (also referred to as "line-sag" conditions), phase-to-phase miswiring conditions and high inrush currents.

AC line drop-out conditions, where the voltage provided by the AC source temporarily decreases to a level significantly below the nominal value, have been observed to cause problems for power supplies and electronic ballasts. Many power supplies and ballasts include a DC-to-DC converter (eg, a boost converter) for the purpose of providing power factor correction and other features. For such power supplies and ballasts, the AC line drop-out condition (also referred to as the "line sag" condition) sometimes causes the DC-to-DC converter to enter a "lock-out" mode, where The converter does not operate in a normal manner even after the AC line drop-out condition is interrupted, in which case the AC input power is stabilized or powered to allow the DC-to-DC converter to operate in its intended normal manner. It is necessary to circulate in. Additionally, for at least certain DC-to-DC converters, the AC line drop-out condition often results in a significant overshoot of the voltage provided at the output of the DC-to-DC converter, whereby -Jeopardize the reliability of the DC converter.

During the installation of power supplies and electronic ballasts, typical wiring errors (such as the "hot" wire to one phase of the AC voltage source and the "neutral" wire to Instead of correctly connecting the neutral connection of the AC voltage source), the input wiring of the power or ballast is incorrectly connected to two different phases of the AC voltage source. Such miswiring is sometimes referred to as a "phase-to-phase" wiring fault condition, which can produce significantly higher voltages than normal in a power supply or ballast, which is therefore a failure of certain components in the power supply or ballast. May cause.

Inrush currents occurring upon initial application of AC power are widely recognized as a significant problem for power supplies and electronic ballasts, and include a large number of ACs with large bulk capacitance operably coupled in series with the AC voltage source. -Inherent in line powered circuits (without protection / compensation means). High peak inrush currents are associated with a number of problems including cumbersome tripping of circuit breakers, degradation of electrical components, and the like.

Thus, there is a need for power supplies and electronic ballasts that include auxiliary protection circuitry for protection against line drop-out and interphase wiring fault conditions, and to reduce peak inrush current. Power supplies or electronic ballasts with such auxiliary protection circuits show significant progress compared to the prior art.

1 is an electrical diagram of a device including an auxiliary protection circuit according to a preferred embodiment of the present invention.

1 shows an apparatus 10 that includes a front-end circuit 100, a back-end circuit 200, and an auxiliary protection circuit 300. The front-end circuit 100, which typically includes an electromagnetic interference (EMI) filter and rectifier circuitry, is a source 20 of a typical alternating current (AC) voltage (eg, 277 volts rms at 60 hertz). And first and second input connections 12, 14 for receiving. The AC voltage source 20 provides a voltage VAC between the first and second input connections 12, 14. The back-end circuit 200, which typically includes power factor correction (eg, boost converter) and inverter circuitry, is operably coupled (ie, not necessarily directly coupled) to the front-end circuit 100. . During operation of the apparatus 10, the back-end circuit 200 transfers power to the load 30 by the first and second output connections 16, 18. The auxiliary protection circuit 300 is coupled between the front-end circuit 100 and the back-end circuit 200. During operation, the auxiliary protection circuit provides the following functions.

(1) interphase miswiring conditions (ie, where the first input connection 12 is connected to the first phase of the AC source 20, and the second input connection 14 is instead of the neutral wire of the AC source 20; Connected to the second phase of the AC source 20), electrically disconnects the back-end circuit 200 from the AC source 20.

(2) in response to the line-sag condition (ie, where the magnitude of the AC voltage (V _AC ) provided by the AC source 20 is significantly less than its nominal value), It is electrically disconnected from the AC source 20.

(3) Limit peak inrush current (occurs when power is first applied to device 10).

In a preferred embodiment of the present invention, as illustrated in FIG. 1, the auxiliary protection circuit 300 includes first and second input terminals 302, 304, and first and second output terminals 306, 308. , First, second, third, fourth, and fifth nodes 310, 312, 314, 316, 318, first, second, third, and fourth electronic switches M1, M2, M3, M4), first, second, third, fourth, fifth, sixth, seventh and eighth resistors R1, R2, R3, R4, R5, R6, R7, R8 and the first and the first It includes two capacitors (C1, C2).

The first and second terminals 302, 304 are coupled to the front-end circuit 100. The first and second output terminals 306, 308 are coupled to the back-end circuit 200. The first electronic switch M1 is operatively coupled between the second input terminal 304 and the second output terminal 308, and the first electronic switch M1 is a control terminal coupled to the first node 310. Has (332). The second electronic switch M2 is operatively coupled between the first node 310 and the circuit ground 320 (the circuit ground 320 is coupled to the second input terminal 304) and the second electronic switch M2 has a control terminal 342 coupled to a fifth node 318. In response to the line-sag condition, M2 is turned on thereby turning M1 off. The third electronic switch M3 is operatively coupled between the second node 312 and the circuit ground 320, and the third electronic switch M3 is coupled to the fourth node 316 with the control terminal 352. Has In response to the line-sag condition, M3 is turned off, thereby causing M2 to be turned on (which in turn causes M1 to turn off). The fourth electronic switch M4 is operatively coupled between the first node 310 and the circuit ground 320, and the fourth electronic switch M4 is coupled to the third node 314 with a control terminal 362. Has In response to the interphase miswiring condition, M4 is turned on, thereby turning M1 off.

As shown in FIG. 1, each of the electronic switches M1, M2, M3, M4 is preferably implemented by an N-channel field-effect transistor (FET). More specifically, the first electronic switch M1 includes a gate terminal (ie, a control terminal) 332 coupled to the first node 310, a drain terminal 334 coupled to the second output terminal 308, and It has a source terminal 336 coupled to a two input terminal 304. The second electronic switch M2 includes a gate terminal (ie, a control terminal) 342 coupled to the fifth node 318, a drain terminal 344 coupled to the first node 310, and a circuit ground 320. Has a source terminal 346 coupled to it. The third electronic switch is coupled to a gate terminal (ie, a control terminal) 352 coupled to the fourth node 316, a drain terminal 354 coupled to the fifth node 318, and a circuit ground 320. A source terminal 356. Finally, the fourth electronic switch M4 includes a gate terminal coupled to the third node 314 (that is, a control terminal 362, a drain terminal 364 coupled to the first node 310, and a circuit ground) Has a source terminal 366 coupled to 320.

As illustrated in FIG. 1, the first resistor R1 is coupled between the first input terminal 302 and the first node 310. The second resistor R2 is coupled between the first node 310 and the circuit ground 320. The first capacitor C1 is coupled between the first node 310 and the circuit ground 320. The third resistor R3 is coupled between the first input terminal 302 and the second node 312. The fourth resistor R4 is coupled between the second node 312 and the third node 314. The second capacitor C2 is coupled between the second node 312 and the circuit ground 320. The fifth resistor R5 is coupled between the third node 314 and the circuit ground 320. The sixth resistor R6 is coupled between the second node 312 and the fourth node 316. The seventh resistor R7 is coupled between the fourth node 316 and the circuit ground 320. Finally, the eighth resistor R8 is coupled between the second node 312 and the fifth node 318.

During normal operation of the device 10 (ie when no line-sag or interphase miswiring conditions exist), the electronic switch M1 is turned on and the output of the front-end circuit 100 is back. Provided to the end circuit 200, ie the auxiliary protection circuit 300 has no influence on the normal operation of the device 10.

If a phase miswiring condition occurs, the voltage across the input terminals 302, 304 will be significantly higher than normal. Resistors R1 and R2 and capacitor C1 are under this condition that voltage Vc at node 314 is M4 before voltage Va at node 310 reaches a turn-on threshold for M1. It is sized to sufficiently exceed the turn-on threshold for. Thus, M4 will be turned on long before M1 has a chance to turn on. When M4 is turned on, the voltage Va at node 310 will drop to about zero (because M4 is turned on, node 310 is effectively connected to circuit ground 320). This ensures that M1 is not turned on. When M1 is off, the back-end circuit 200 is protected from any excessive (and potentially destructive) voltage, otherwise the excess voltage is misphased between phases Depending on the condition it will appear across output terminals 306 and 308. M4 will remain ON until the time at least the excess voltage (existing across the input terminals 302, 304) due to interphase miswiring conditions is healed (and correspondingly, M1 is turned OFF). Will remain).

If a line-sag condition occurs, the voltage across the input terminals 302, 304 will be significantly less than normal. Resistors R3, R6, and R7 are sized such that under these conditions, the voltage Vd at node 316 falls below the turn-on threshold required to keep M3 ON. Thus, M3 will be turned off. When M3 is turned off, the voltage Ve at node 318 is allowed to take a level above M2's turn-on threshold (which was at approximately zero volts when M3 was turned on). Thus M2 will be turned on. When M2 is turned on, the voltage Va at node 310 will drop to approximately zero (because M2 is turned on, node 310 is effectively connected to circuit ground 320). , Thereby turning M1 off. When M1 is turned off, the back-end circuit 200 effectively separates from the line-sag condition and thus prevents entering any undesirable "closed" mode as a result of the line-sag condition. M2 has at least the line-sag condition healed so that the voltage across the input terminals 302, 304 is at a nearly normal level (at this point the voltage Vd will be higher than the turn-on threshold for M3, which causes M3 to turn on). Will remain on (and correspondingly, M1 will remain OFF) until the time Ve returns to near zero, thereby turning M2 off and causing M1 to turn on. ).

Immediately after the initial application of AC power to device 10, FET M1 becomes conductive (ie, once voltage Va at node 310 reaches a turn on threshold for M1). In the prototype device constructed substantially as shown in FIG. 1, in the presence of the auxiliary protection circuit 300, the peak inrush current (flow into the first input connection 12) exceeds a value of 50 amperes (secondary protection circuit 300 It has been observed that the reduction from)) to values of only a few amperes (with auxiliary protection circuitry). Thus, the auxiliary protection circuit 300 provides the additional advantage of significantly reducing the peak inrush current.

The apparatus 10 may advantageously be employed inside any of the plurality of power circuits for gas discharge lamps or inside electronic ballasts for gas discharge lamps (for the latter application, the load 30 ) Consists of one or more gas discharge lamps).

Although the invention has been described with reference to certain preferred embodiments, many modifications and variations can be made by those skilled in the art without departing from the novel spirit and scope of the invention.

Claims (18)

As an array 10, A front-end circuit 100 having first and second input connections 12, 14 adapted to accept a conventional alternating current (AC) voltage source 20; A back-end circuit (200) operatively coupled to the front-end circuit (100) and operative to deliver power to the load via first and second output connections (16, 18); An auxiliary protection circuit (300) coupled between the front-end circuit (100) and the back-end circuit (300); Including, The auxiliary protection circuit 300, (Iii) in response to miswiring of the first and second input connections 12, 14, operable to electrically disconnect the back-end circuit 200 from the AC voltage source 20, wherein: Wherein the miswiring comprises connecting the first input connection to a first phase of the AC voltage source and connecting the second input connection to a second phase of the AC voltage source; (Ii) operable to electrically isolate the back-end circuit 200 from the AC voltage source 20 in response to a line-sag condition, wherein the AC voltage source 20 The magnitude of the AC voltage provided by is much smaller than its nominal value-, (Iii) operable to limit peak inrush current that occurs upon initial application of AC power to the device; Arrangement. The method of claim 1, The auxiliary protection circuit 300, First and second input terminals 302 and 304 coupled to the front-end circuit 100; First and second output terminals 306, 308 coupled to the back-end circuit 200; First, second, third, fourth, fifth nodes 310, 312, 314, 316, 318; A first electronic switch (M1) operatively coupled between the second input terminal (304) and the second output terminal (308) and having a control terminal (332) coupled to the first node (310); A control terminal 342 operatively coupled between the first node 310 and the circuit ground 320, coupled to the fifth node 318, and turned on in response to a line-sag condition; A second electronic switch M2 operable to turn off one electronic switch M1, wherein circuit ground 320 is coupled to the second input terminal 304; The second electron by being operatively coupled between the second node 312 and circuit ground 320, having a control terminal 352 coupled to the fourth node, and being turned off in response to a line-sag condition. A third electronic switch M3 operable to cause the switch M2 to be turned on; And The first node 310 and the circuit ground 320 are operatively coupled, and have a control terminal 362 coupled to the third node 314, and are turned on in response to an interphase miswiring condition. A fourth electronic switch M4 operable to turn off the electronic switch M1; Including, Arrangement. The method of claim 2, The auxiliary protection circuit 300, A first resistor (R1) coupled between the first input terminal (302) and the first node (310); A second resistor (R2) coupled between the first node (310) and circuit ground (320); A first capacitor C1 coupled between the first node 310 and the circuit ground 320; A third resistor (R3) coupled between the first input terminal (302) and the second node (312); A fourth resistor (R4) coupled between the second node (312) and the third node (314); A second capacitor (C2) coupled between the second node (312) and circuit ground (320); A fifth resistor (R5) coupled between the third node (314) and circuit ground (320); A sixth resistor (R6) coupled between the second node (312) and the fourth node (316); A seventh resistor (R7) coupled between the fourth node (316) and circuit ground (320); And An eighth resistor (R8) coupled between the second node (312) and the fifth node (318); Further comprising, Arrangement. The method of claim 3, The first electronic switch M1 includes an N-channel field-effect transistor having a gate terminal 332, a drain terminal 334, and a source terminal 336, wherein the gate terminal 332 is the control terminal and Coupled to the first node 310, the drain terminal 334 coupled to the second output terminal 308, and the source terminal 336 coupled to the second input terminal 304, Arrangement. The method of claim 4, wherein The second electronic switch M2 includes an N-channel field-effect transistor having a gate terminal 342, a drain terminal 344, and a source terminal 346, wherein the gate terminal 342 is the control terminal and Coupled to the fifth node 318, the drain terminal 344 coupled to the first node 310, and the source terminal 346 coupled to circuit ground 320, Arrangement. The method of claim 5, The third electronic switch M3 includes an N-channel field-effect transistor having a gate terminal 352, a drain terminal 354, and a source terminal 356, wherein the gate terminal 352 is the control terminal. Coupled to the fourth node 316, the drain terminal 354 coupled to the fifth node 318, and the source terminal 356 coupled to circuit ground 320, Arrangement. The method of claim 6, The fourth electronic switch M4 includes an N-channel field-effect transistor having a gate terminal 362, a drain terminal 364, and a source terminal 366, wherein the gate terminal 362 is the control terminal. Coupled to the third node 314, the drain terminal 364 coupled to the first node 310, and the source terminal 366 coupled to circuit ground 320, Arrangement. The method of claim 1, Wherein the load comprises at least one gas discharge lamp, Arrangement. As circuit 10 for supplying power to load 30, A front-end circuit 100 having first and second input connections 12, 14 adapted to accept a conventional alternating current (AC) voltage source 20; A back-end circuit (200) operatively coupled to the front-end circuit (100) and operative to deliver power to a load; Auxiliary protection circuit 300; Including, The auxiliary protection circuit 300, First and second input terminals 302 and 304 coupled with the front-end circuit 100; First and second output terminals (306, 308) coupled to the back-end circuit (300); First, second, third, fourth, fifth nodes 310, 312, 314, 316, 318; A first electronic switch (M1) operatively coupled between the second input terminal (304) and the second output terminal (308) and having a control terminal (332) coupled to the first node (310); A control terminal 342 operatively coupled between the first node 310 and the circuit ground 320, coupled to the fifth node 318, and turned on in response to a line-sag condition; A second electronic switch M2 operable to turn off one electronic switch M1, wherein circuit ground 320 is coupled to the second input terminal 304; The second electron by being operatively coupled between the second node 312 and circuit ground 320, having a control terminal 352 coupled to the fourth node, and being turned off in response to a line-sag condition. A third electronic switch M3 operable to cause the switch M2 to be turned on; And A control terminal 362 operatively coupled between the first node 310 and the circuit ground 320, and having a control terminal 362 coupled to the third node 314, and being turned on in response to a phase miswiring fault condition. A fourth electronic switch M4 operable to turn off the first electronic switch M1; Containing Power supply circuit. The method of claim 9, The auxiliary protection circuit 300, A first resistor (R1) coupled between the first input terminal (302) and the first node (310); A second resistor (R2) coupled between the first node (310) and circuit ground (320); A first capacitor C1 coupled between the first node 310 and the circuit ground 320; A third resistor (R3) coupled between the first input terminal (302) and the second node (312); A fourth resistor (R4) coupled between the second node (312) and the third node (314); A second capacitor (C2) coupled between the second node (312) and circuit ground (320); A fifth resistor (R5) coupled between the third node (314) and circuit ground (320); A sixth resistor (R6) coupled between the second node (312) and the fourth node (316); A seventh resistor (R7) coupled between the fourth node (316) and circuit ground (320); And An eighth resistor (R8) coupled between the second node (312) and the fifth node (318); Further comprising, Power supply circuit. The method of claim 9, The first electronic switch M1 includes an N-channel field-effect transistor having a gate terminal 332, a drain terminal 334, and a source terminal 336, wherein the gate terminal 332 is the control terminal and Coupled to the first node 310, the drain terminal 334 coupled to the second output terminal 308, and the source terminal 336 coupled to the second input terminal 304, Power supply circuit. The method of claim 9, The second electronic switch M2 includes an N-channel field-effect transistor having a gate terminal 342, a drain terminal 344, and a source terminal 346, wherein the gate terminal 342 is the control terminal and Coupled to the fifth node 318, the drain terminal 344 coupled to the first node 310, and the source terminal 346 coupled to circuit ground 320, Power supply circuit. The method of claim 9, The third electronic switch M3 includes an N-channel field-effect transistor having a gate terminal 352, a drain terminal 354, and a source terminal 356, wherein the gate terminal 352 is the control terminal. Coupled to the fourth node 316, the drain terminal 354 coupled to the fifth node 318, and the source terminal 356 coupled to circuit ground 320, Power supply circuit. The method of claim 9, The fourth electronic switch M4 includes an N-channel field-effect transistor having a gate terminal 362, a drain terminal 364, and a source terminal 366, wherein the gate terminal 362 is the control terminal. Coupled to the third node 314, the drain terminal 364 coupled to the first node 310, and the source terminal 366 coupled to circuit ground 320, Power supply circuit. The method of claim 9, Wherein the load comprises at least one gas discharge lamp, Power supply circuit. An electronic ballast for powering at least one gas discharge lamp, A front-end circuit 100 having first and second input connections 12, 14 adapted to accept a conventional alternating current (AC) voltage source 20; A back-end circuit (200) operatively coupled to the front-end circuit (100) and operative to deliver power to a load; Auxiliary protection circuit 300; Including, The auxiliary protection circuit 300, First and second input terminals 302 and 304 coupled with the front-end circuit 100; First and second output terminals (306, 308) coupled to the back-end circuit (300); First, second, third, fourth, fifth nodes 310, 312, 314, 316, 318; A first electronic switch (M1) operatively coupled between the second input terminal (304) and the second output terminal (308) and having a control terminal (332) coupled to the first node (310); A control terminal 342 operatively coupled between the first node 310 and the circuit ground 320, coupled to the fifth node 318, and turned on in response to a line-sag condition; A second electronic switch M2 operable to turn off one electronic switch M1, wherein circuit ground 320 is coupled to the second input terminal 304; The second electron by being operatively coupled between the second node 312 and circuit ground 320, having a control terminal 352 coupled to the fourth node, and being turned off in response to a line-sag condition. A third electronic switch M3 operable to cause the switch M2 to be turned on; And A control terminal 362 operatively coupled between the first node 310 and the circuit ground 320, and having a control terminal 362 coupled to the third node 314, and being turned on in response to a phase miswiring fault condition. A fourth electronic switch M4 operable to turn off the first electronic switch M1; Containing Electronic ballast. The method of claim 16, The auxiliary protection circuit 300, A first resistor (R1) coupled between the first input terminal (302) and the first node (310); A second resistor (R2) coupled between the first node (310) and circuit ground (320); A first capacitor C1 coupled between the first node 310 and the circuit ground 320; A third resistor (R3) coupled between the first input terminal (302) and the second node (312); A fourth resistor (R4) coupled between the second node (312) and the third node (314); A second capacitor (C2) coupled between the second node (312) and circuit ground (320); A fifth resistor (R5) coupled between the third node (314) and circuit ground (320); A sixth resistor (R6) coupled between the second node (312) and the fourth node (316); A seventh resistor (R7) coupled between the fourth node (316) and circuit ground (320); And An eighth resistor R8 coupled between the second node 312 and the fifth node 318; Further comprising, Electronic ballast. The method of claim 17, The first electronic switch M1 includes an N-channel field-effect transistor having a gate terminal 332, a drain terminal 334, and a source terminal 336, wherein the gate terminal 332 is the control terminal and Coupled to the first node 310, the drain terminal 334 coupled to the second output terminal 308, the source terminal 336 coupled to the second input terminal 304, The second electronic switch M2 includes an N-channel field-effect transistor having a gate terminal 342, a drain terminal 344, and a source terminal 346, wherein the gate terminal 342 is the control terminal and Coupled to the fifth node 318, the drain terminal 344 coupled to the first node 310, the source terminal 346 coupled to circuit ground 320, The third electronic switch M3 includes an N-channel field-effect transistor having a gate terminal 352, a drain terminal 354, and a source terminal 356, wherein the gate terminal 352 is the control terminal. Coupled to the fourth node 316, the drain terminal 354 coupled to the fifth node 318, the source terminal 356 coupled to circuit ground 320, The fourth electronic switch M4 includes an N-channel field-effect transistor having a gate terminal 362, a drain terminal 364, and a source terminal 366, wherein the gate terminal 362 is the control terminal. Coupled to the third node 314, the drain terminal 364 coupled to the first node 310, and the source terminal 366 coupled to circuit ground 320, Electronic ballast.

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