KR101882908B1

KR101882908B1 - Apparatus and method for sensing DC fault current in multi-level converter HVDC system

Info

Publication number: KR101882908B1
Application number: KR1020160102400A
Authority: KR
Inventors: 허견; 김희진; 강재식; 김상민; 나종서
Original assignee: 연세대학교 산학협력단
Priority date: 2016-08-11
Filing date: 2016-08-11
Publication date: 2018-07-27
Also published as: KR20180017888A

Abstract

The present invention provides an apparatus and method for detecting a DC accident in a multilevel converter HVDC system capable of detecting DC accidents quickly and accurately under various conditions when the multilevel converter operates as a rectifier and an inverter, A differentiator for differentiating the upper dark current and the lower dark current measured by the dark current measuring unit to thereby calculate the upper dark current differential value and the lower dark current differential value, A maximum value calculator for calculating a maximum value of each of the upper dark current and the lower dark current based on the upper and lower dark current values calculated in the digital processor using the previous and sampled values in the digital processor operation, A comparator for comparing the lower dark current differential values with respective maximum values, A logic operation unit for performing an AND logical operation based on the comparison result in the comparison unit and a detection signal generation unit for generating a detection signal for checking whether or not a DC fault is detected based on the logical operation result performed in the logic operation unit .

Description

FIELD OF THE INVENTION [0001] The present invention relates to a multi-level converter HVDC system,

The present invention relates to a multi-level converter HVDC (High Voltage Direct Current) system, and more particularly, to a DC fault detection apparatus and method in a multi-level converter HVDC system.

High Voltage Direct Current (HVDC) converts AC power to DC power using an HVDC converter, which is an AC / DC converter at the transmission end, and transmits power using a DC / AC converter .

This HVDC transmission method has received much attention recently due to various advantages that the AC transmission method can not have. In particular, the steady-state voltage drop of the line during DC transmission is affected only by the resistance of the line without the influence of the reactance of the line or the capacitor. Therefore, it is possible to perform the long-distance transmission compared to the AC transmission. It is not necessary to synchronize the frequencies even if the frequencies are linked to other systems.

Due to these advantages, the power system of the countries is exported or imported by HVDC in Europe, USA, Canada, etc., and the economic load is managed by using the difference of production and consumption time between regions. In Korea, it is installed in Jeju-Haenam and has high economic efficiency. Especially, DC transmission is widely used from LVDC (Low Voltage DC), which replaces pillar transformer or solar power to system, and HVDC (High voltage DC), which transmits a large amount of energy. It is forecast.

And Modular Multilevel Converter (MMC) is a kind of multilevel converter, which is composed of several sub modules (SM). These modular multilevel converters can exhibit the high voltage output and high output of multiple converters, and the output voltage can be controlled by the stepped output.

Modular multilevel converters are also simpler in structure than conventional multilevel converters, and are easier to implement and have the advantage of extending their lifetime by using redundant submodules.

Accordingly, the multilevel converter HVDC system combines these advantages to enable higher voltage output and large capacity transmission.

However, such a multilevel converter has been studied to cope with an AC (alternating current) accident, but a countermeasure against a DC (direct current) accident has been studied steadily as a weak point.

In particular, in a multi-level converter HVDC system, a pole-to-pole short circuit on the DC link stage has to adversely affect the converter system so that it must detect the accident quickly and accurately and transmit the signal to the protection equipment to protect the equipment.

However, in the related art, when a certain abnormal current is detected by measuring the current in the DC steady state, an accident signal is generated. Since the characteristic of the voltage type HVDC can control the transmitted power, the DC current is variously changed according to the power control do. Therefore, it is difficult to accurately calculate the specific current value in the conventional DC fault current detection method, so that the accident can not be accurately detected.

Therefore, there is a need for a DC accident detection method to overcome the limitation of the DC accident detection technology of the conventional multilevel converter.

Japanese Patent Application Laid-Open No. 10-2013-0065653 (published on June 19, 2013) Japanese Unexamined Patent Application Publication No. 08-47242 (published date 1996.02.06)

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a multi-level converter HVDC system capable of detecting DC accidents quickly and accurately under various conditions when the multilevel converter operates as a rectifier and an inverter. The purpose of the method is to provide.

Other objects of the present invention are not limited to the above-mentioned objects, and other objects not mentioned can be clearly understood by those skilled in the art from the following description.

According to another aspect of the present invention, there is provided an apparatus for detecting a DC accident in a multi-level converter HVDC system, including a dark current measurement unit for measuring a high dark current and a low dark current among patterns of steady state currents of a multilevel converter, And a subtractor for subtracting the upper dark current and the lower dark current from the measured dark current and the lower dark current to calculate the upper dark current differential value and the lower dark current differential value, A comparator for comparing the upper dark current differential value and the lower dark current differential value with a maximum value, and a comparator for comparing the upper dark current differential value and the lower dark current differential value with a maximum value, A logical operation unit for performing an AND logical operation based on the comparison result, Generating a detection of logical operation based on the result generates a detection signal to determine whether the DC incident detection signal can perform stand consists including parts.

Preferably, the dark current measuring unit includes an upper dark current measuring unit for measuring an upper dark current among a pattern of a steady state current of the multilevel converter, and a lower dark current measuring unit for measuring an upper dark current among patterns of steady state currents of the multi- .

Preferably, the differentiator includes a first differentiator for calculating the upper dark current differential value by differentiating the upper dark current measured by the upper dark current measurement unit, and a second differentiator for calculating the lower dark current differential value by differentiating the lower dark current measured by the lower dark current measurement unit And a second differentiator.

Preferably, the comparator includes a first comparator for comparing the calculated upper dark current differential value with a maximum value of the upper dark current differential calculated by the maximum darkness calculator, And a second comparator for comparing the maximum value of the lower dark current differential values calculated by the second comparator with each other.

Preferably, the sense signal generator generates a sense signal through an AND logic operation when the comparison result in the comparator is all True.

Preferably, the sensing signal generator includes a JK flip-flop for inverting an output by setting J = 1 and K = 1, a sensing signal generated by the AND logic operation and a fault clearing signal input by the user And a signal converter for receiving and outputting the output signal of the JK flip-flop as a clock signal and converting the detection signal and the recovery signal into each other and inputting the clock signal as a clock signal of the JK flip- .

Preferably, the recovery signal is switched to high after completion of the DC fault.

According to another aspect of the present invention, there is provided a method for detecting a DC incident in a multi-level converter HVDC system, comprising: (A)

) And lower dark current

(B) comparing the measured upper dark current (< RTI ID = 0.0 >

) And lower dark current

) Are differentiated to obtain the upper dark current differential value (

) And lower dark current differential value (

(C) calculating a maximum value of each of the upper and lower dark current differential values and the lower dark current differential value using a previous value and a current value, which are sampled in the digital processor operation, through a maximum value calculator, (D) comparing the calculated upper dark current differential value with a maximum value of the upper dark current differential value calculated by the maximum value calculating unit through the comparator, and comparing the calculated lower dark dark current differential value And comparing the maximum value of the lower dark current differential values calculated by the maximum value calculating unit with each other; and (E) performing an AND logical operation based on each of the comparison results to detect a DC incident And generating a detection signal for confirming whether or not the detection signal is generated.

Preferably, the pattern of the steady-state current in the step (A) is such that the currents of the upper arm and the lower arm always have a symmetrical pattern, and the differential values always have opposite signs.

Preferably, in the step (E), a sense signal is generated by an AND logic operation when the compared result is all True.

Preferably, the step (E) includes the steps of: (E1) inputting a low value to the signal switch and inputting a low value to the clock signal of the JK flip-flop; (E2) when an accident detection signal having a high value is input from the detection signal generation unit, a high level signal is input to the high level signal, And a recovery signal having a low value is input to the JK flip-flop as a clock signal of the JK flip-flop so that the signal output from the JK flip-flop becomes a high value (E3) inputting a high value output from the JK flip-flop as a clock signal of the signal converter, and converting a signal output from the signal converter to a low value, thereby generating a JK flip-flop Output value to high (E4) a step of switching the clock signal input to the signal converter as a final accident operation signal to a recovery signal, (E5) a step of switching the JK flip-flop to a low value (E6) after the completion of the fault, the recovery signal is switched through the clock signal input to the signal converter and the recovery signal outputs a high value A high value is output from the signal converter and is input to the clock signal of the JK flip-flop so that the signal output from the JK flip-flop is compensated by a low value, (E7) a low value output from the JK flip-flop 92 is input as a clock signal of the signal converter 91, and a low value is output from the signal converter 91 JK flip-flop does not work It is characterized by comprising the step of returning to the initial state.

Preferably, the input value of the JK flip-flop is set to J = 1, K = 1 so that the output signal always takes the complement (inversion) of the previous output.

In the multi-level converter HVDC system according to the present invention as described above, the DC accident detection apparatus and method have the following effects.

First, it can detect DC accidents quickly and accurately even under various conditions of DC current varying according to power control.

Second, DC current can be detected only by the dark current of the multilevel converter, which is necessary for control rather than DC current, so that the accident detection speed is very fast.

Third, since the dark current signal required in the controller is used, there is no need for additional signal processing, and there is an advantage in that it is easy to recover in case of a temporary DC accident in addition to a permanent accident.

1 is a block diagram showing the configuration of a DC incident-detecting device in a multi-level converter HVDC system according to an embodiment of the present invention.
2 is a graph showing the dark current characteristics of a multilevel converter for explaining measurement of a dark current in a high dark current measurement unit and a low dark current measurement unit in FIG.
FIG. 3 is a diagram for explaining calculation of the maximum value in the maximum value calculating unit in FIG.
4 to 9 are diagrams for explaining a DC incident detection method in a multi-level converter HVDC system according to an embodiment of the present invention.
10 is a graph showing the simulation result of the algorithm verification after the DC accident through the DC incident detection method in the multi-level converter HVDC system of the present invention
11 is a flowchart for explaining a DC incident detection method in a multi-level converter HVDC system according to an embodiment of the present invention.
12 is a flowchart for explaining an operation of generating a sense signal in FIG.

Other objects, features and advantages of the present invention will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of a DC accident detection apparatus and method in a multi-level converter HVDC system according to the present invention will be described with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. It is provided to let you know. Therefore, the embodiments described in the present specification and the configurations shown in the drawings are merely the most preferred embodiments of the present invention and are not intended to represent all of the technical ideas of the present invention. Therefore, various equivalents It should be understood that water and variations may be present.

FIG. 1 is a block diagram showing the configuration of a DC incident detection device in a multi-level converter HVDC system according to an embodiment of the present invention.

As shown in FIG. 1, the DC accident detection apparatus includes a dark current measurement unit 10 (20) for measuring upper dark current and lower dark current, a differentiator (20) for calculating dark current differential values by differentiating upper dark current and lower dark current 30) 40, a maximum value calculator 50, comparison units 60 and 70 for comparing the upper dark current differential value and the lower dark current differential value with the maximum value, And a sensing signal generator 90 for generating a sensing signal.

In order to remove the noise of the upper dark current and the lower dark current outputted from the dark current measuring units 10 and 20 located between the dark current measuring units 10 and 20 and the differentiators 30 and 40, (not shown) for performing low pass filtering may be added. The reason why the noise removing unit is required is that there is a possibility that the differentiator result may cause an error due to a strong noise component for raw data before the signal is inputted to the input of the differentiators 30 and 40 after measuring the upper and lower dark currents Because. However, in general, since the signal input to the controller through the sensor is basically subjected to signal conditioning, consideration of noise components is not considered, but it is desirable that such a noise removing unit is added as needed .

The DC accident detection device constructed as above will be described in more detail as follows.

First, an upper dark current measurement unit 10 for measuring an upper dark current among a pattern of steady-state currents of a multi-level converter, a lower dark current measurement unit 20 for measuring an upper dark current among patterns of steady state currents of the multi- A first differentiator 30 for differentiating the upper dark current measured by the upper dark current measuring unit 10 and calculating an upper dark current differential value by differentiating the lower dark current measured by the upper dark current measuring unit 10, A second differentiator 40 for calculating a difference between the upper dark current differential value calculated by the first differentiator 30 and the lower dark current differential value calculated by the second differentiator 40, A maximum value calculation unit 50 for calculating a maximum value of each of the upper and lower current values using a previous value and a current value, A first comparator 60 for comparing the maximum values of the upper dark current differential values calculated by the first calculator 50 with each other and a second comparator 60 for comparing the lower dark current differential values calculated by the second differentiator 40, A second comparison unit 70 for comparing the maximum values of the lower dark current derivatives calculated in the first comparator 60 and the maximum values of the lower dark current derivatives calculated in the first comparator 60 and the second comparator 70, And a sense signal generator 90 for generating a sense signal for confirming whether a DC incident is detected based on the result of the logic operation performed by the logic operation unit 80 .

At this time, the sense signal generator 90 generates a sense signal through an AND logic operation when the comparison results of the first comparator 60 and the second comparator 70 are all True.

The detection signal generating unit 90 includes a JK flip-flop 92 for inverting the output of the flip-flop 92 by setting J = 1 and K = 1, a sense signal generated through an AND logic operation and a recovery signal The JK flip-flop 92 receives the output signal of the JK flip-flop 92 as a clock signal, converts the detection signal and the recovery signal to each other, inputs the signal as a clock signal of the JK flip-flop 92, And a signal converter 91 for recovering the signal. At this time, the recovery signal is switched to high after completion of the DC fault.

The operation of the DC incident sensing device in the multi-level converter HVDC system according to the present invention constructed as above will be described in detail with reference to the accompanying drawings. Like reference numerals in FIG. 1 or FIG. 2 denote the same members performing the same function.

11 is a flowchart for explaining a DC incident detection method in a multi-level converter HVDC system according to an embodiment of the present invention.

Referring to FIG. 11, the dark current measurement unit 10 and the dark current measurement unit 20 calculate the upper dark current

) And lower dark current

(S100). At this time, as shown in FIG. 2, the steady-state current pattern always has a symmetrical pattern of the currents of the upper arm and the lower arm, and the differential values always have opposite signs.

And then through the differentiators 30 and 40, the measured upper dark current (

) And lower dark current

) Are differentiated as shown in Equation (2), and the upper dark current differential value (

) And lower dark current differential value (

(S200).

At this time,

Represents the peak value of the AC current,

Represents a modulation index.

Based on the calculated upper dark current differential value and lower dark current differential value, the maximum value is calculated through a derivative operation using the previous value sampled in the digital processor operation and the current value through the maximum value calculator 50 S300).

As shown in the following equation (3), the maximum value is calculated as shown in the following Equation (4) through a differential equation of the upper dark current to which the upper dark current differential value is applied. At this time, since the formula for calculating the maximum value of the lower dark current differential values is also the same, a detailed description will be omitted. FIG. 3 is a graph showing the maximum value of the upper dark current calculated through Equation (4)

Fig.

At this time,

Represents the current time,

Represents the time having the maximum value of the period function [f (t)].

Next, the calculated upper dark current differential value and the maximum value of the upper dark current differential value calculated by the maximum value calculating unit 50 are compared with each other through the comparators 60 and 70, and the calculated lower dark current differential value And a maximum value of the lower dark current differential values calculated by the maximum value calculating unit 50 are compared with each other (S400).

Then, an AND logic operation is performed based on the compared results to generate a detection signal for confirming whether a DC incident is detected through the sensing signal generator 90 (S500). At this time, when the compared result is all True, a sense signal is generated by an AND logical operation.

The sensing signal is generated by a JK flip-flop 92 and a signal converter 91, receiving a sensing signal generated through an AND logic operation and a fault clearing signal based on the sensing signal, The output signal of the JK flip-flop 92 is converted into a clock signal and the detection signal and the recovery signal are switched to each other to be input to the clock signal of the JK flip-flop 92, thereby generating a signal for maintaining and recovering an accident detection signal.

FIG. 12 is a flowchart illustrating an operation of generating a sensing signal in FIG.

Referring to FIG. 12, as shown in FIG. 4, a low value is input to the signal switching unit 91 as an accident detection signal and a recovery signal, respectively, and a low value is input to the JK flip- and a low value output from the JK flip-flop 92 is input as a clock signal of the signal converter 91 to perform an initial setting. At this time, the input value of the JK flip flop 92 is set to J = 1 and K = 1, and the output signal always takes the complement (inversion) of the previous output.

When an accident detection signal having a high value is input from the detection signal generating unit 90 in step S501, an accident detection signal having a high value and a low alarm signal, as shown in FIG. 5, A high value is input to the clock signal of the JK flip flop 92 as an input of the recovery signal having a value of HIGH in step S502, (S503).

FIG. 10 is a graph showing the simulation result of the algorithm verification after a DC incident using the DC incident detection method in the multilevel converter HVDC system of the present invention. As shown in FIG. 10, (100).

6, a high value output from the JK flip-flop 92 is input as a clock signal of the signal converter 91, and a signal output from the signal converter 91 is set to a low level, Value, the output value of the JK flip-flop 92 is held at a high value (S504). At this time, an accident detection signal input to the signal converter 91 becomes a state in which no value is input. In addition, the final accident operation signal switches the clock signal input to the signal converter 91 to a recovery signal (S505).

Accordingly, the JK flip-flop 92 receives the clock signal input from the signal switch 91 and does not operate, and maintains the current value (S506). As shown in FIG. 10, the accident signal is maintained constant at step S506 (step 200).

Thereafter, when the recovery signal is switched through the clock signal inputted to the signal converter 91 and the recovery signal is outputted as a high value (S507) after the completion of the accident, as shown in Fig. 7, A high value is output from the JK flip-flop 92 to be input to the clock signal of the JK flip-flop 92 and the signal output from the JK flip-flop 92 is complemented by a low value, As a low value (S508). Accordingly, as shown in FIG. 10, it can be seen that, in addition to the permanent accident, a recovery signal operation is easily generated when a temporary DC accident occurs (300).

8, a low value output from the JK flip-flop 92 is input to the signal converter 91 as a clock signal, so that a low value So that the JK flip-flop 92 does not operate. Then, it returns to the initial state as shown in FIG. 9 again.

This operation allows for easy recovery in the event of a temporary DC accident in addition to a permanent accident without requiring additional signal processing.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It will be apparent to those skilled in the art that various modifications may be made without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

Claims

A dark current measuring unit for measuring an upper dark current and a lower dark current among a pattern of a steady state current of the multilevel converter,
A differentiator for differentiating the upper dark current and the lower dark current measured by the dark current measuring unit and calculating the upper dark current differential value and the lower dark current differential value,
A maximum value calculator for calculating a maximum value of each of the upper dark current and the lower dark current using a derivative value and a current value sampled in the digital processor operation based on the upper dark current differential value and the lower dark current differential value calculated by the differentiator,
A comparator for comparing the upper dark current differential value and the lower dark current differential value with a maximum value,
A logical operation unit for performing an AND logical operation based on the compared result in the comparison unit;
And a sense signal generator for generating a sense signal for confirming whether or not a DC incident is detected on the basis of a logic operation result performed by the logic operation unit.

The apparatus according to claim 1, wherein the dark current measuring unit
A high dark current measurement unit for measuring a high dark current among patterns of steady state currents of the multi-level converter,
And a lower dark current measuring unit for measuring an upper dark current among the patterns of the steady state currents of the multilevel converter.

The apparatus of claim 1, wherein the differentiator
A first differentiator for differentiating the upper dark current measured by the upper dark current measurement unit and calculating an upper dark current differential value;
And a second differentiator for differentiating the lower dark current measured by the lower dark current measurement unit to calculate a lower dark current differential value.

The apparatus of claim 1, wherein the comparing unit
A first comparator for comparing the calculated upper dark current differential value with a maximum value of the upper dark current differential value calculated by the maximum value calculator,
And a second comparator for comparing the calculated lower dark current differential value with a maximum value of the lower dark current differential value calculated by the maximum value calculator.

The method according to claim 1,
Wherein the sense signal generator generates a sense signal through an AND logic operation when the comparison result in the comparator is all True.

The apparatus of claim 1, wherein the sensing signal generator
A JK flip flop which is set to J = 1 and K = 1 to invert the output,
And outputs a detection signal and a recovery signal inputted by the user, receives the output signal of the JK flip-flop as a clock signal, converts the detection signal and the recovery signal to each other, And a signal converter for receiving and recovering an accident detection signal by inputting a clock signal of the DC-to-DC converter in the HVDC system.

The method according to claim 6,
Wherein the recovery signal is switched to high after a DC fault has occurred. &Lt; RTI ID = 0.0 > 8. < / RTI >

(A) Through the dark current measurement part, the upper dark current (

) And lower dark current

Respectively,
(B) the measured upper dark current (

) And lower dark current

) Are differentiated to obtain the upper dark current differential value (

) And lower dark current differential value (

),
(C) calculating a maximum value through a derivative operation using a previous value and a current value sampled in the digital processor operation based on the calculated upper dark current differential value and the lower dark current differential value, through the maximum value calculator,
(D) a comparator for comparing the calculated upper dark current differential value with a maximum value of the upper dark current differential value calculated by the maximum value calculating unit, and for comparing the calculated lower dark current differential value and the calculated maximum dark current differential value, Comparing the maximum values of the lower dark current differential values calculated in the step
(E) performing a logical AND operation on each of the comparison results to generate a detection signal for confirming whether or not a DC incident is detected through the detection signal generating unit. The multi-level converter HVDC system In DC accident detection method.

9. The method of claim 8,
In the step (A), the steady state current pattern always has a symmetrical pattern of the currents of the upper arms and the lower arms, and the differential values always have opposite signs. In the HVDC system of the multi-level converter, Way.

9. The method of claim 8,
Wherein, in the step (E), a sense signal is generated by an AND logic operation when the compared result is all True.

9. The method of claim 8, wherein step (E)
(E1) In the signal converter, input the low value to the clock signal of the JK flip-flop by inputting the low value of both the accident detection signal and the recovery signal, and the low value output from the JK flip- Inputting a clock signal of the signal converter to perform an initial setting;
When an accident detection signal having a high value is input from the detection signal generator E2, an accident detection signal having a high value and a recovery signal having a low value are inputted as a clock of the JK flip- A signal is input with a high value, and thus the signal output from the JK flip-flop is complemented by a high value;
(E3) A high value output from the JK flip-flop is input as a clock signal of the signal converter, and a signal output from the signal converter is converted into a low value. Thus, the output value of the JK flip- Value,
(E4) switching a clock signal input to the signal converter as a final accident operation signal to a recovery signal,
(E5) the JK flip-flop does not operate because the clock signal is inputted to the low value input from the signal converter 91,
(E6) After completion of the accident, when the recovery signal is switched through the clock signal input to the signal converter and the recovery signal outputs a high value, a high value is outputted from the signal converter and the clock of the JK flip- A step of outputting a final fault operation signal as a low value because a signal input to the JK flip-flop is complemented by a low value,
(E7) As a low value output from the JK flip-flop 92 is input as a clock signal of the signal converter 91, a low value is output from the signal converter so that the JK flip-flop does not operate And returning to the initial state. The method of claim 1, further comprising:

12. The method of claim 11,
Wherein the input value of the JK flip-flop is set to J = 1 and K = 1 so that the output signal always takes the complement (inversion) of the previous output.