KR101542249B1 - Solar cell capable of recycling a substrate - Google Patents

Abstract

The present invention relates to a solar cell capable of reusing a substrate and a method of manufacturing the same. A solar cell comprises i) a plurality of nanostructures disposed spaced apart from each other and extending in one direction, ii) a first conductor layer covering one end of the at least one of the plurality of nanostructures, iii) a first conductor layer spaced apart from the first conductor layer A second conductor layer covering the other end of the nanostructure, and iv) a dielectric layer positioned between the first conductor layer and the second conductor layer.

Substrate, reuse, solar cell, PDMS, doping region

Description

SOLAR CELL CAPABLE OF RECYCLING A SUBSTRATE [0002]

A solar cell capable of reusing a substrate and a method of manufacturing the same are provided.

In recent years, research and development of clean energy has been actively carried out due to resource depletion and rising resource prices. Examples of clean energy include solar energy, wind energy, and tidal energy. In particular, research and development of solar cells have been continuously carried out in order to utilize solar energy efficiently.

Solar cells are devices that convert solar light energy into electrical energy. When sunlight is irradiated on a solar cell, electrons and holes are generated inside the solar cell. The generated electrons and holes move to the P and N poles included in the solar cell, and all the positions are generated between the P and N poles, and the current flows.

And to provide a solar cell capable of reusing a substrate. The present invention also provides a method of manufacturing the above-described solar cell.

A solar cell according to an embodiment of the present invention comprises i) a plurality of nanostructures arranged in a spaced apart manner and extending in one direction, ii) a first conductor layer covering one end of at least one of the plurality of nanostructures, iii) ) A second conductor layer located apart from the first conductor layer and covering the other end of the nanostructure, and iv) a dielectric layer positioned between the first conductor layer and the second conductor layer.

A silicide layer is formed at one end of the nanostructure and a high concentration p-type doping region may be formed in the nanostructure adjacent to the silicide layer. The high concentration p-type doped region may be located in the first conductive layer.

The solar cell according to an embodiment of the present invention may further include: a transparent contact layer positioned in contact with the first conductor layer; and ii) a light transmitting substrate disposed in contact with the transparent contact layer. The transparent contact layer may comprise ITO (indium tin oxide).

Metal nanoparticles may be located on the surface of one or more of the plurality of nanostructures. The nanostructure contacting the at least one layer selected from the group consisting of the first conductor layer, the second conductor layer, and the dielectric layer includes: i) a first doped region, and ii) a second doped region surrounding the first doped region in a direction parallel to the plate surface of the second conductor layer. Doped regions. The second doped region may be doped with n-type.

The nanostructure contacting the at least one layer selected from the group consisting of the second conductor layer and the dielectric layer may include a first doped region and a second doped region in contact with the first doped region in the longitudinal direction of the nanostructure have. The second conductive layer and the dielectric layer includes at least one layer selected from the group consisting of i) a first doped region, ii) an intrinsic region in contact with the first doped region in the longitudinal direction of the nanostructure, and iii) And a second doped region in contact with the intrinsic region in the longitudinal direction.

A silicide layer may be formed at one end of the nanostructure and at the other end of the nanostructure. The plurality of nanostructures may include: i) a first diameter in contact with the first conductive layer, and ii) a second diameter in contact with the second conductive layer, wherein the first diameter may be less than the second diameter. The diameters of the plurality of nanostructures can be gradually reduced toward the first conductive layer along the longitudinal direction of the nanostructure. A heavily doped region is formed at one end of the nanostructure, and a heavily doped region is in contact with the first conductive layer.

The solar cell according to an embodiment of the present invention may further include a blocking layer located on the first conductive layer between the nanostructures and covering the high concentration p-type doped region. The solar cell according to an embodiment of the present invention may further include another dielectric layer located on the opposite side of the dielectric layer with the second conductive layer therebetween. The thickness of the other dielectric layer may be 0.5 mm to 30 mm. The dielectric layer and another dielectric layer may each comprise PDMS (polydimethylsiloxane).

The plurality of nanostructures may have a concentration gradient along the length direction thereof. The plurality of nanostructures are Si _{1 - x} Ge _x (0 < x < 0.5), and x can be sequentially decreased along the longitudinal direction of the nanostructure toward the second conductive layer. The plurality of nanostructures are Si _{1 - x} Ge _x (0 &lt; x &lt; = 0.3).

The solar cell according to an embodiment of the present invention may further include a transparent conductive layer covering the surface of the plurality of nanostructures and contacting the dielectric layer and the second conductive layer.

A method of manufacturing a solar cell according to an embodiment of the present invention includes the steps of: i) forming a plurality of nano structures extending in a direction substantially perpendicular to a plate surface of a substrate on a substrate on which a mask layer having a plurality of openings is formed, Ii) plating the metal on the bottom of at least one of the plurality of nanostructures to fill the openings; iii) heat treating the nanostructure to form a silicide layer at the bottom of the nanostructure; iv) V) forming a plurality of doped regions in the nanostructure, v) providing a dielectric layer over the mask layer to bond the dielectric layer and the nanostructure, vi) separating the nanostructure bonded to the dielectric layer from the mask layer and the substrate, vii) Forming a heavily doped region in the nanostructure in contact with the silicide layer, and viii) Providing a first conductor layer and a second conductor layer on the back surface of the layer and on the front surface of the dielectric layer, respectively.

In the step of forming the silicide layer, the silicide layer may be formed by combining the metal and the material of the substrate. As the silicide layer is formed, a groove is formed in the substrate, and the siliceous layer can be seated in the groove. The step of forming the high-concentration doped region may be performed by injecting boron (B) into the externally exposed nanostructure.

The method of fabricating a solar cell according to an embodiment of the present invention may further include providing metal nanoparticles on the surface of the nanostructure after forming the plurality of doped regions in the nanostructure. The step of forming a plurality of doped regions in the nanostructure comprises the steps of: i) forming a first doped region in the nanostructure; and ii) forming a second doped region surrounding the first doped region in a direction parallel to the plane of the substrate To form a nanostructure. In the step of forming the second doped region in the nanostructure, the second doped region may be formed in n-type.

Forming a plurality of doped regions in the nanostructure comprises: i) forming a first doped region in the nanostructure; and ii) forming a second doped region adjacent the first doped region in the length direction of the nanostructure . &Lt; / RTI &gt; The step of forming a plurality of doped regions in the nanostructure comprises the steps of: i) forming a first doped region in the nanostructure; ii) forming an intrinsic region adjacent to the first doped region in the length direction of the nanostructure; and iii) ) Forming a second doped region adjacent to the intrinsic region in the longitudinal direction of the nanostructure.

A method of manufacturing a solar cell according to an embodiment of the present invention includes the steps of: i) providing a plurality of nanostructures extending in a direction substantially perpendicular to a plate surface of a substrate on a substrate, ii) doping a plurality of nanostructures Iii) providing a barrier layer over the doped layer, iv) doping the surface of the plurality of nanostructures, and doping one end of the plurality of nanostructures in contact with the substrate with a doping layer to form a heavily doped region V) providing a dielectric layer between the plurality of nanostructures on the substrate, vi) providing a first electrode covering the other end of the plurality of nanostructures exposed over the dielectric layer, vii) Viii) grasping another dielectric layer to separate the substrate from the dielectric layer and exposing the heavily doped region to the outside, ix) a step of covering the high concentration doped region providing a second electrode in contact with the dielectric layer.

In the step of providing the plurality of nanostructures, the plurality of nanostructures may be formed by etching the base material forming the substrate. The etching area to be formed at the time of etching the base material may become larger as it is closer to the surface of the substrate. The step of providing the dielectric layer may include the steps of i) covering the other end of the plurality of nanostructures with the dielectric layer, and ii) plasma-etching the dielectric layer covering the other end to externally expose the other end.

The method of manufacturing a solar cell according to an embodiment of the present invention further includes forming a transparent conductive layer covering a surface of a plurality of nanostructures exposed on the barrier layer after providing the heavily doped region, The transparent conductive layer may be in contact with the first electrode. In providing the second electrode, the second electrode may be spaced apart from the conductive layer by a barrier layer.

A method of manufacturing a solar cell according to an embodiment of the present invention includes the steps of i) providing a substrate, ii) sequentially laminating a plurality of compound semiconductor layers on a substrate, iii) Iv) providing a plurality of nanostructures by partially etching the plurality of compound semiconductor layers, v) doping the plurality of nanostructures, vi) forming a dielectric layer between the plurality of nanostructures on the substrate Vii) providing a transparent electrode on the dielectric layer, vii) providing a first electrode on the transparent conductive layer, ix) separating the substrate from the plurality of nanostructures, And x) providing a second electrode that is in contact with the dielectric layer while covering one end thereof.

The plurality of compound semiconductor layers may have a concentration gradient along the stacking direction. In the step of providing the transparent conductive layer, the transparent conductive layer may cover the other end of the plurality of nanostructures exposed on the dielectric layer.

Since the substrate can be reused, a large amount of solar cells can be manufactured at a low cost. Therefore, the manufacturing efficiency of the solar cell can be increased. Since the flexibility of the solar cell can be secured by using the dielectric layer, the solar cell can be applied to clothes, flexible displays, and the like. In addition, since both the advantages of the organic solar cell and the silicon solar cell can be utilized, the photoelectric conversion efficiency can be excellent and the warping characteristic can be ensured. Solar cells can be manufactured using low-purity silicon.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. It will be apparent to those skilled in the art that the embodiments described below are merely illustrative of the present invention and that the present invention is not limited to the concepts and scope of the present invention, Embodiments of the present invention will be described so that those skilled in the art can easily carry out the present invention. It will be understood by those skilled in the art that the following embodiments are merely illustrative of the present invention and that various changes may be made without departing from the spirit and scope of the present invention. It can be deformed. Wherever possible, the same or similar parts are denoted using the same reference numerals in the drawings.

All terms including technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. Predefined terms are further interpreted as having a meaning consistent with the relevant technical literature and the present disclosure, and are not to be construed as ideal or very formal meanings unless defined otherwise.

If any part is referred to as being "on" another part, it may be directly on the other part or may be accompanied by another part therebetween. In contrast, when a section is referred to as being "directly above" another section, no other section is involved.

The terms first, second and third, etc. are used to describe various portions, components, regions, layers and / or sections, but are not limited thereto. These terms are only used to distinguish any moiety, element, region, layer or section from another moiety, moiety, region, layer or section. Accordingly, a first portion, component, region, layer or section described below may be referred to as a second portion, component, region, layer or section without departing from the scope of the present invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms as used herein include plural forms as long as the phrases do not expressly express the opposite meaning thereto. Means that a particular feature, region, integer, step, operation, element and / or component is specified and that the presence or absence of other features, regions, integers, steps, operations, elements, and / It does not exclude addition.

Terms indicating relative space such as "below "," above ", and the like may be used to more easily describe the relationship to other portions of a portion shown in the figures. These terms are intended to include other meanings or acts of the apparatus in use, as well as intended meanings in the drawings. For example, when inverting a device in the figures, certain parts that are described as being "below" other parts are described as being "above " other parts. Thus, an exemplary term "below" includes both up and down directions. The device can be rotated 90 degrees or rotated at different angles, and the term indicating the relative space is interpreted accordingly.

The term "nano" in the specification refers to nanoscale and may include microunits. In addition, the term "nanostructure" as used in the specification means nanoscale objects including nanostructures, nanotubes, nanowalls, and nanowires including all structures.

1 is a schematic cross-sectional view of a solar cell 100 according to a first embodiment of the present invention. The structure of the solar cell 100 of FIG. 1 is merely for illustrating the present invention, and the present invention is not limited thereto. Therefore, the structure of the solar cell 100 can be modified in other forms.

1, a solar cell 100 includes a plurality of nanostructures 20, a first conductor layer 40, a second conductor layer 42, and a dielectric layer 60. The first conductor layer 40, the second conductor layer 42, In addition, the solar cell 100 may further include other components. For example, the solar cell 100 further includes a catalyst 50, a transparent contact layer 10, a light transmitting substrate 90, and contact portions 80 and 82.

Although FIG. 1 shows the nanostructures 20 in the form of nanorods extending in the z-axis direction, the nanostructures 20 may be manufactured in different shapes. The plurality of nanostructures 20 are disposed apart from each other and extend toward the z-axis direction, so that they can absorb sunlight well.

As the material of the nanostructure 20, silicon (Si), germanium (Ge), silicon germanium (SiGe), or the like can be used. By using such a material, a doped region can be formed in the nanostructure 20.

As shown in FIG. 1, the nanostructure 20 includes a first doped region 201 and a second doped region 203. A second doped region (203) surrounds the first doped region (201). In particular, the second doped region 203 surrounds the first doped region 201 in a direction parallel to the plate surface 421 of the second conductor layer 42, that is, along the xy plane direction. Here, the first doped region 201 may be formed as an n-type, and the second doped region 203 may be formed as a p-type. Accordingly, electrons are coupled to the first doped region 201 by the incident sunlight, and electromotive force is generated when the holes are coupled to the second doped region 203. The nanostructure 20 is directly in contact with the second conductor layer 42 and the dielectric layer 60 so that a short circuit due to the electrical connection with the first conductor layer 40 is not generated.

As shown in FIG. 1, a silicide layer 22 is formed at one end 20a of the nanostructure 20. The silicide layer 23 formed at the other end 20b of the nanostructure 20 functions as a catalyst and is used to grow the nanostructure 20. [

In the case of manufacturing the solar cell 100, a part of the silicide layer 22 may function as the silicide layer 23 which is a catalyst for manufacturing the nanostructure 20 again. Accordingly, since the solar cell 100 can be continuously manufactured by reusing the substrate 70 (shown in FIG. 6), the manufacturing cost of the solar cell 100 can be reduced. This will be described in more detail later.

1, a highly doped p-type doped region 205, that is, a p + -type doped region is formed in the nanostructure 20 in contact with the silicide layer 22. As a result, the holes generated in the nanostructure 20 can be transferred to the transparent contact layer 10 through the p + -type doped region 205 by the incident sunlight, so that the photoelectric conversion efficiency of the solar cell 100 . Further, since the p + -type doped region 205 is located in the first conductive layer 40, the efficiency of transporting the holes through the first conductive layer 40 can be increased.

As shown in Figure 1, the first conductor layer 40 and the second conductor layer 42 are spaced apart from one another. The dielectric layer 60 is positioned between the first and second conductor layers 40 and 42 to isolate the first and second conductor layers 40 and 42 from each other. For example, as the material of the dielectric layer 60, zinc oxide (ZnO), silicon oxide (SiO ₂ ), PDMS (polydimethylsiloxane, polydimethylsiloxane) or a mixture thereof can be used.

The first conductor layer 40 covers one end 20a of the nanostructure 20 and the second conductor layer 42 covers the other end 20b of the nanostructure 20. [ Here, the first conductor layer 40 and the second conductor layer 42 may be formed of a transparent conductive oxide (TCO) so that sunlight can be transmitted through the first conductor layer 40 and the second conductor layer 42. As a result, the sunlight penetrates the first conductor layer 40 and the second conductor layer 42 well and is incident on the plurality of nanostructures 20 well. Therefore, the light absorptance of the solar cell 100 can be increased.

As shown in Fig. 1, the transparent contact layer 10 is located in contact with the first conductor layer 40 and the light transmitting substrate 90. Fig. Therefore, it is possible to transmit the sunlight passing through the light transmitting substrate 90, for example, glass, to the nanostructure 20 without blocking. For example, the transparent contact layer 10 may include ITO (indium tin oxide) to electrically connect the first conductor layer 40 and the first contact portion 80 while transmitting light.

1, a second contact portion 82 and a first contact portion 80 are formed on the upper portion of the second conductor layer 42 and the transparent contact layer 10 to form passive elements P ). Therefore, by supplying power to the passive element P using the solar cell 100, it can be driven.

2 is a schematic cross-sectional view of a solar cell 200 according to a second embodiment of the present invention. Since the structure of the solar cell 200 of FIG. 2 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 2, the nanostructure 21 includes a first doped region 211 and a second doped region 213 formed along the longitudinal direction, that is, the z-axis direction. The first doped region 211 and the second doped region 213 are mutually adjacent along the z-axis direction. Here, the first doped region 211 may be formed as an n-type, and the second doped region 213 may be formed as a p-type. Accordingly, electrons are coupled to the first doped region 211 by the incident sunlight, and electromotive force is generated when the holes are coupled to the second doped region 213. 2, a doped region of the p + / p / n / n + type or a doped region of the p + / p / i / n / n + type may be formed along the longitudinal direction of the nanostructure 21.

3 is a schematic cross-sectional view of a solar cell 300 according to a third embodiment of the present invention. Since the structure of the solar cell 300 of FIG. 3 is similar to that of the solar cell 200 of FIG. 2, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 3, the nanostructure 25 includes a first doped region 211, an intrinsic region 212, and a second doped region 213 formed along the longitudinal direction thereof. The first doped region 211, the intrinsic region 212, and the second doped region 213 are in contact with each other. By forming the intrinsic region 212 between the first doped region 211 and the second doped region 213, the band gap of the nanostructure 25 can be minimized. As a result, the efficiency of transferring holes and free electrons through the nanostructure 25 is increased, so that the photoelectric conversion efficiency of the solar cell 300 can be increased.

4 is a schematic cross-sectional view of a solar cell 400 according to a fourth embodiment of the present invention. Since the structure of the solar cell 400 of FIG. 4 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts, and a detailed description thereof is omitted.

As shown in FIG. 4, the solar cell 400 further includes metal nanoparticles 30. FIG. The metal nanoparticles 30 can be brought into contact with the dielectric layer 60 to further maximize the surface plasmon effect. As a result, the light absorption rate of the solar cell 400 can be further improved.

The metal nanoparticles (30) are located on the surface of the nanostructure (20). The hemispherical metal nanoparticles 30 adhere to the surface of the nanostructure 20 to induce a surface plasmon effect. Plasmon is a similar particle in which free electrons in the metal collectively vibrate, and is partially present on the surface of the metal nanoparticles 30. [

Therefore, a high transmittance in the visible light region can be realized by using the surface plasmon effect using the metal nanoparticles 30. [ As a result, the light absorption rate of the solar cell 300 can be greatly increased. For example, silver (Ag), gold (Au), aluminum (Al), copper (Cu), nickel (Ni), or alloys thereof excellent in surface plasmon effect can be used as the material of the metal nanoparticles have. Since the material of the metal nanoparticles 30 is excellent in the surface plasmon effect, it is suitable for use in the solar cell 400.

FIG. 5 schematically shows a flow chart of the manufacturing process of the solar cell 100 of FIG. 1, and FIGS. 6 to 13 are views schematically showing steps of the manufacturing process of the solar cell 100 of FIG. Hereinafter, with reference to FIG. 5 and FIG. 6 to FIG. 13, the manufacturing process of the portion where the first conductor layer 40, the second conductor layer 42 and the dielectric layer 20 in the solar cell 100 of FIG. The process is described in order. The manufacturing process of the remainder of the solar cell 100 excluding the above-described portions will be easily understood by those skilled in the art, and thus a detailed description thereof will be omitted.

5, a plurality of nanostructures 20 are grown on a substrate 70 through a mask layer 72 located on a substrate 70, as shown in FIG. Since a plurality of openings 721 are formed in the mask layer 72, the plurality of nanostructures 20 are grown through the plurality of openings 721. The plurality of nanostructures 20 extend in a direction substantially perpendicular to the plate surface 701 of the substrate 70.

A plurality of nanostructures 20 are fabricated by implanting a precursor into a chamber (not shown) using a silicide layer 23 as a catalyst. Here, p-type silicon doped at a high concentration may be used as the material of the substrate 70, and silicon oxide (SiO ₂ ) may be used as the material of the mask layer 72. Further, for example, nickel silicide (NiSi _x ) can be used as the material of the silicide layer 23. The nanostructure 20 can be made of silicon.

Next, in step S20 of FIG. 5, a metal 24 is plated on the lower end of the nanostructure 20 to fill the opening 721. Then, as shown in FIG. For example, as shown in Fig. 7, a metal 24 such as nickel is electroless-plated to fill the lower end of the nanostructure 20. [

In step S30 of FIG. 5, the nanostructure 20 is heat-treated to form a silicide layer 22 at the lower end of the nanostructure 20. FIG. That is, as shown in FIG. 8, the substrate 70 and the metal 24 (shown in FIG. 7) interact with each other to form the silicide layer 22 at the lower end of the nanostructure 20. The silicide layer 22 is formed by combining the metal 24 (shown in FIG. 7) and silicon as the material of the substrate 70. Therefore, since a part of the substrate 70 is used to form the silicide layer 22, a groove 701 is formed in the substrate 70. And the silicide layer 22 is seated and positioned in the groove 701.

Next, in step S40 of FIG. 5, a plurality of doped regions 201 and 203 are formed in the nanostructure 20. FIG. As shown in FIG. 9, the plurality of doped regions 201 and 203 includes a first doped region 201 and a second doped region 203.

In order to form the first doped region 201, boron may be coated on the nanostructure 20. In this case, the boron coated on the surface of the nanostructure 20 is diffused into the nanostructure 20 by heat, and the nanostructure 20 is entirely changed into the first doped region 201. Thus, the uniformly doped nanostructure 20 can be fabricated in the first doped region 201.

Next, phosphorus (P) is implanted into the nanostructure 20 while heat treating the nanostructure 20 formed with the first doped region 201. That is, when phosphorus is coated on the surface of the nanostructure 20 and then the nanostructure 20 is heat-treated, phosphorus is diffused into the nanostructure 20 and injected. Then, the phosphorus-doped nanostructure 20 is doped with a plasma ion to form a second doped region 203 in the nanostructure 20. As a result, the second doped region 203 is shifted to the first doped region 203 along the direction parallel to the plate surface 701 of the substrate 70 while the outer region of the first doped region 201 is switched to the second doped region 203. [ Surrounding the region (201). The second doped region 203 may be formed in an n-type so as to increase the free electron transfer efficiency of the nanostructure 20. In order to prevent the first doping region 201 from being completely replaced with the second doping region 203, the heat treatment time of the nanostructure 20 for forming the second doping region 203 is set to a first doping region 201 is shorter than the heat treatment time of the nanostructure 20 for forming the nanostructure 20.

5, a first doped region 211 and a second doped region 213 are formed along the longitudinal direction of the nanostructure 20, as shown in FIGS. 2 and 3 . In this case, both ends of the nanostructure 20 are doped and diffused to form a pn junction structure or a pin junction structure before the conductor layers 40 and 42 are formed. Here, the pin junction structure includes an undoped intrinsic region.

The nanostructure 20 is doped in a state where a dielectric layer 60 serving as a mask is formed. An organic material containing phosphorus (P) and boron (B) may be spin-coated on both ends of the nanostructure 20 and then heat-treated at the same time to form a first doped region 211 and a second doped region 213 have. Alternatively, both ends of the nanostructure 20 may be doped with p-type or n-type through ion implantation and then diffused by heat treatment to form a pn junction or a pin junction.

On the other hand, the metal nanoparticles 30 (shown in FIG. 4) may be provided on the surface of the nanostructure 20. In this case, the metal nanoparticles 30 can be deposited on the surface of the nanostructure 20 in a chamber (not shown) using a target source such as silver (Ag).

Alternatively, the metal nanoparticles 30 may be provided on the surface of the nanostructure 20 by supporting the nanostructure 20 on a plating bath (not shown) containing a metal plating solution. The metal nanoparticles 30 are attached to the surface of the nanostructure 20 by electroless plating. When the nanostructure 20 is dried, the metal nanoparticles 30 adhere to the surface of the nanostructure 20 in a hemispherical shape.

5, a dielectric layer 60 is provided on the mask layer 72 to bond the dielectric layer 60 to the nanostructure 20, as shown in FIG. The dielectric layer 60 is supported by the mask layer 72 and does not penetrate into the opening 721 because the dielectric layer 60 uses a material with high hardenability such as PDMS. A boundary surface extending in a direction parallel to the plate surface 701 of the substrate 70 is formed between the mask layer 72 and the dielectric layer 60. [

5, the nanostructure 20 coupled with the dielectric layer 60 is separated from the mask layer 72 and the substrate 70, as shown by arrows in Fig. Here, only the nanostructure 20 combined with the dielectric layer 60 can be used for manufacturing the solar cell 100 (shown in FIG. 1).

On the other hand, the remaining silicide layer 22 is present in the opening 721 of the substrate 70 separated from the nanostructure 20. Thus, the mask layer 72 can reuse the substrate 70 positioned thereon. That is, when the substrate 70 is placed in a chamber (not shown) and a precursor is implanted, the remaining silicide layer 22 functions as a catalyst and the nanostructure 20 can be manufactured again through the opening 721. As a result, the manufacturing cost of the solar cell 100 (shown in FIG. 1) can be reduced by the continuous reuse of the substrate 70.

Next, in step S70 of FIG. 4, a heavily doped region, that is, ap + doped region 205 is formed in the nanostructure 20 in contact with the silicide layer 22, as shown in FIG. That is, the p + doped region 205 can be formed by implanting and diffusing boron (B) into one end of the nanostructure 20 exposed to the outside. As a result, the efficiency of transporting the holes through the p + doped region 205 can be increased.

The first conductor layer 40 and the second conductor layer 42 are provided on the back surface 601 and the front surface 603 of the dielectric layer 60 in step S80 of Fig. 4 . As a result, the dielectric layer 60 is placed in contact with the first conductor layer 40 and the second conductor layer 42. The first conductor layer 40 and the second conductor layer 42 may be formed by spin coating the dielectric layer 60. Through these methods, a solar cell 100 (shown in Fig. 1) capable of reusing the substrate 70 can be manufactured.

FIG. 14 schematically shows a cross-sectional structure of a solar cell 500 according to a fifth embodiment of the present invention. Since the structure of the solar cell 500 of FIG. 14 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts and the detailed description thereof is omitted.

14, the solar cell 500 includes a plurality of nano structures 25, a first conductive layer 40, a second conductive layer 42, a metal grid 44, a first dielectric layer 60 ) And a second dielectric layer (62). The nanostructure 25 includes a first doped region 251, a second doped region 253, and a high concentration p-type doped region 255. Some of the elements described above may be omitted in the solar cell 500. [ Further, other elements can be added to the solar cell 500. [

As shown in Fig. 14, the nanostructure 25 has an inverted trapezoidal shape. Therefore, the diameter of the nanostructure 25 becomes smaller toward the first conductive layer 40 along the longitudinal direction of the nanostructure 25, that is, along the z-axis direction. The first diameter D1 of the nanostructure 25 in contact with the first conductive layer 40 is smaller than the second diameter D2 of the nanostructure 25 in contact with the second conductive layer 42. [ Since the nanostructure 25 has such a structure, it is convenient to separate the nanostructure 25 from the substrate (not shown). That is, since the area of contact of the nanostructure 25 with the substrate (not shown) is small, the nanostructure 25 easily drops from the substrate (not shown).

As shown in FIG. 14, a p-type doped region 255 of high concentration is formed at one end of the nanostructure 25. In this case, the first doped region 251 may be formed in a p-type, and the second doped region 253 may be formed in an n-type. As a result, a sufficient amount of electromotive force can be generated by the sunlight by implementing the pn junction in the nanostructure 25. [ The high concentration p-type doped region 255 is located in contact with the first conductive layer 40. Therefore, the high concentration p-type doped region 255 can efficiently transfer the electrons or holes necessary for power generation to the first conductive layer 40.

The second dielectric layer 62 is located over the metal grid 44 and the second conductive layer 42. That is, the second dielectric layer 62 is located on the opposite side of the first dielectric layer 60 with the second conductive layer 42 therebetween. The thickness of the second dielectric layer 62 may be 0.5 mm to 30 mm. If the thickness of the second dielectric layer 62 is too small, it is difficult to support the underlying silicon wire array. Also, when the thickness of the second dielectric layer 62 is too large, the solar cell 500 does not bend well. Therefore, the thickness of the second dielectric layer 62 is maintained in the above-described range. The second dielectric layer 62 may be held to separate the plurality of nanostructures 25 from the substrate (not shown).

The first dielectric layer 60 and the second dielectric layer 62 described above may include PDMS. PDMS is an organic support, which causes the solar cell 500 to bend well. Therefore, the solar cell 500 can be adhered to the outside of the curved building. Hereinafter, a manufacturing method of the solar cell 500 will be described in more detail with reference to FIG. 15 and FIGS.

Fig. 15 is a flowchart schematically showing a manufacturing method of the solar cell 500 of Fig. 14, and Figs. 16 to 24 are schematic sectional views of the solar cell 500 corresponding to the respective steps of Fig.

As shown in FIG. 15, a method of manufacturing a solar cell 500 includes i) providing a base material (S15), ii) etching a base material to provide a plurality of nanostructures on a substrate (S25), iii) Providing a doping layer and a blocking layer; iv) doping a surface of the plurality of nanostructures and providing a heavily doped region at one end of the nanostructure, S45) v) forming a plurality of nanostructures between the plurality of nanostructures Vi) providing a first conductive layer covering the other end of the nanostructure (S65), vii) providing a further dielectric layer on the first conductive layer (S75), viii) providing a dielectric layer on the first conductive layer, Separating the substrate from the dielectric layer (S85), and ix) providing a second conductive layer in contact with the dielectric layer (S95). In addition, the manufacturing method of the solar cell 500 may further include other steps as needed.

As shown in Fig. 15, first, in step S15, a base material 501 is provided. For example, as shown in Fig. 16, p-type silicon can be used as the base material 501. [

Next, in step S25 of FIG. 15, the base material 501 is etched to provide a plurality of nanostructures 25 on the substrate 70. Next, as shown in FIG. That is, as shown in FIG. 17, a plurality of nanostructures 25 are formed while anisotropically etching the base material 501 using a mask. Therefore, the etching region located between the plurality of nanostructures 25 becomes larger toward the substrate 70. As a result, the inverted trapezoidal-shaped nanostructure 25 is produced. Here, the plurality of nanostructures 25 extend in a direction substantially perpendicular to the plate surface 701 of the substrate 70. The diameter of the nanostructure 25 may be 2 탆 to 10 탆. When the diameter of the nanostructure 25 is too small, the pn junction is unstable. In addition, when the diameter of the nanostructure 25 is too large, the density of the nanostructure 25 is low and the light absorption rate and photoelectric conversion efficiency of the nanostructure 25 are low.

In step S35 of Fig. 15, a doping layer 71 and a blocking layer 73 are provided. That is, as shown in FIG. 18, a doping layer 71 and a blocking layer 73 are sequentially formed between the plurality of nanostructures 25 on the substrate 70. The doping layer 71 is provided to form a highly doped region at the lower end of the nanostructure 25. [ For example, a doping layer 71 is provided using a method of coating boron SOD (spin on dopatn).

On the other hand, a blocking layer 73 is provided on the doping layer 71. The blocking layer 73 prevents the highly doped region, for example phosphorus (P), from being diffused to the top of the nanostructure 25 by the doping layer 71. The barrier layer 73 may be coated with SOG (spin on glass).

Next, in step S45 of FIG. 15, the surface of the plurality of nanostructures 25 is doped, and the heavily doped region 255 is provided at one end of the nanostructure 25. Next, as shown in FIG. That is, as shown in FIG. 19, a phosphorous spin on glass (PSOD) 75 is floated on the plurality of nanostructures 25 and heated at 600 ° C. to 1100 ° C. for 1 second to 30 seconds And the surface of the plurality of nanostructures 25 is doped. In this case, the surface of the plurality of nanostructures 25 may be doped with n-type. The doping layer 71 (shown in FIG. 18) acts on one end of the nanostructure 25 in contact with the substrate 70 to form a heavily doped region 255. As a result, the nanostructure 25 including the first doped region 251, the second doped region 253, and the heavily doped region 255 is fabricated. For example, the first doped region 251 may be an n-type, the second doped region 253 may be a p-type, and the doped region 255 may be a p-type with a high concentration. On the other hand, when the above-described reaction is completed in step S45 of FIG. 15, the diluted hydrogen fluoride solution can be used to remove the blocking layer 71 (shown in FIG. 18) and the remaining residue.

Returning again to Fig. 15, in step S55, a dielectric layer 60 is provided between the plurality of nanostructures 25. [ That is, as shown in FIG. 20, the dielectric layer 60 is uniformly coated on the substrate 70 between the plurality of nanostructures 25 by using a spin-coater. The coating speed can be adjusted from 1000 rpm to 5000 rpm and is performed for 10 seconds to 10 minutes. As the material of the dielectric layer 60, PDMS can be used. PDMS is used by diluting the substrate with methylene chloride. The PDMS is diluted with a dilution concentration ratio of 1 to 4. After completing the PDMS coating, the PDMS is heated to 50 ° C to 150 ° C. The dielectric layer 60 passes the surface of the nanostructure 25.

Meanwhile, the upper end of the nanostructure 25 may be exposed to the outside. That is, the end of the plurality of nanostructures 25 is covered with the dielectric layer 60, and the dielectric layer 60 is plasma-etched, thereby exposing the top of the nanostructure 25 to the outside.

Next, in step S65 of FIG. 15, a first conductive layer 42 covering the upper ends of the plurality of nanostructures 25 is provided. That is, as shown in FIG. 21, since the plurality of nanostructures 25 are electrically connected to the first conductive layer 42, power can be supplied to the outside.

In step S75 of Fig. 15, a dielectric layer 62 is provided. 22, a metal grid 44 may be provided on the first conductive layer 42, and then a dielectric layer 62 may be provided thereon. The metal grid 44 may be omitted if it is unnecessary. A metal grid 44 is attached over the first conductive layer 42 to enhance the conductivity of the first conductive layer 42.

Next, in step S85 of FIG. 16, the substrate 70 is separated from the dielectric layer 60. Next, as shown in FIG. 23, the substrate 70 (shown in Fig. 22) is firmly supported by the dielectric layer 62, so that the dielectric layer 62 is gripped and then pulled to remove the substrate 70 It can be recycled.

Finally, in step S95, a second conductive layer 40 in contact with the dielectric layer 60 is provided. The second conductive layer 40 may be deposited under the dielectric layer 60. That is, as shown in FIG. 24, the second conductive layer 40 is electrically connected to the nanostructure 25. Therefore, the solar cell 500 can be manufactured using the above-described method.

25 schematically shows a cross-sectional structure of a solar cell 600 according to a sixth embodiment of the present invention. Since the sectional structure of the solar cell 600 of FIG. 25 is similar to that of the solar cell of FIG. 15, the same reference numerals are used for the same parts, and the detailed description thereof is omitted.

25, the solar cell 600 includes a plurality of nanostructures 26, a first electrode 43, a second electrode 45, a transparent conductive layer 42, and a dielectric layer 60 do. In addition, the solar cell 600 may further include other elements as needed. The removed substrate can be reused while manufacturing the solar cell 600.

The nanostructure 26 has a concentration gradient along the longitudinal direction, that is, the z-axis direction. That is, the nanostructure 26 is made of Si _{1 - x} Ge _x (0 < x &lt; = 0.5). Here, x becomes smaller gradually toward the second conductive layer 42. Preferably, x may be greater than 0 and less than or equal to 3. The nanostructure 26 having a concentration gradient can minimize its bandgap, and thus can greatly increase the photoelectric conversion efficiency. In addition, since the surface of the nanostructure 26 is doped to form a pn junction, electrons and holes are formed by the incident light, and as they move, an electromotive force is generated. Hereinafter, a manufacturing method of the solar cell 600 will be described in detail with reference to FIGS. 26 and 27 to 33. FIG.

Fig. 26 shows a schematic flow chart of a manufacturing method of the solar cell 600 of Fig. The manufacturing method of the solar cell 600 of FIG. 26 is merely for illustrating the present invention, and the present invention is not limited thereto. Therefore, the manufacturing method of the solar cell 600 can be modified to other forms.

26, a method of manufacturing a solar cell 600 includes the steps of: i) providing a substrate (S16), ii) sequentially laminating a plurality of compound semiconductor layers on a substrate (S26), iii) (S36) forming an oxidation induction pattern on the compound semiconductor layers of the compound semiconductor layers, iv) providing a plurality of nanostructures by partially etching the plurality of compound semiconductor layers (S46), v) doping the plurality of nanostructures (S56), vi) providing a dielectric layer between the plurality of nanostructures on the substrate (S66), vii) providing a transparent conductive layer on the dielectric layer (S76), viii) Ix) separating the substrate from the plurality of nanostructures to externally expose one end of the plurality of nanostructures (S96), and x) providing a second electrode in contact with the dielectric layer while covering one end Step S106. In addition, the manufacturing method of the solar cell 600 may further include other steps.

As shown in Fig. 26, a substrate 70 is provided in step S16. That is, various materials such as ceramics such as alumina, stainless use steel (SUS), silicon, polymer or aluminum foil can be used for the substrate 70 shown in Fig.

Next, in step S26 of FIG. 26, a plurality of compound semiconductor layers 260 are stacked on the substrate 70 in order. That is, the plurality of compound semiconductor layers 260 shown in FIG. 28 has a multilayered film structure in which the composition thereof changes. The compound semiconductor layers 260 may be a gallium arsenide (GaAs) layer or a silicon germanium (SiGe) layer. When the compound semiconductor layer 260 is a gallium arsenide layer, the addition amount of N can be controlled. More specifically, the compound semiconductor layers 260 may have a composition of GaAs _{1 - x} N _x , where x may be different for each compound semiconductor 260.

As shown in Fig. 26, in step S36, an oxidation inducing pattern 262 is formed on the plurality of compound semiconductor layers 260. As shown in Fig. After a mask pattern (not shown) is formed on the compound semiconductor layer 260, an oxidation inducing layer (not shown) is formed thereon. The mask pattern (not shown) has a dot shape. The mask pattern (not shown) may be a photoresist pattern.

The oxidation inducing layer (not shown) can oxidize the compound semiconductor layer 260 by a galvanic effect. The reduction potential of the oxidation inducing layer (not shown) may be higher than the reduction potential of the compound semiconductor layer 260. For example, the oxidation inducing layer (not shown) may be a noble metal such as Ag, Au, and Pt.

The oxidation inducing pattern 262 is formed by removing the mask pattern (not shown) as shown in Fig. Thus, the oxidation inducing pattern 262 is located on the compound semiconductor layer 260.

Referring again to FIG. 26, in step S46, a plurality of nanostructures are provided by partially etching the plurality of compound semiconductor layers. That is, the electrolyte is brought into contact between the oxidation inducing pattern 262 and the compound semiconductor layer 260. Specifically, the substrate on which the oxidation inducing pattern 262 is formed can be immersed in the electrolytic solution. In this case, the surface of the compound semiconductor layer 260 in contact with the oxidation inducing pattern 262 due to the reduction potential difference between the oxidation inducing pattern 262 and the compound semiconductor layer 260 is oxidized to generate an oxide. When the electrolyte further includes an etchant for etching the oxide, the surface of the compound semiconductor layer 260 in contact with the oxidation inducing pattern 262 can be selectively etched.

As a result, the region of the compound semiconductor layer 260 not in contact with the oxidation inducing pattern 262 remains to form the nanostructure 26, as shown in Fig. In this case, the etching time can be adjusted so that the substrate 70 is not etched or the etching is minimized. When the compound semiconductor layer 260 is a silicon germanium layer having a compositional change, the electrolyte containing the etchant may be an HF / H ₂ O ₂ solution. On the other hand, the remaining oxidation inducing pattern 262 is removed by using an HF diluted aqueous solution or the like.

Preparing a substrate 70 of silicon, and to form a lower region of the compound semiconductor layer 260 to the Si _0.5 Ge _0.5 or Si _{0 .7} Ge _{0 .3} material, an upper region of the compound semiconductor layer 260 of silicon A strain due to lattice mismatching may be induced between the substrate 70 and the lower region of the compound semiconductor layer 260. [ However, when the compound semiconductor layer 260 is etched to manufacture the nanostructure 26, the strain due to lattice mismatching can be relaxed. Therefore, the possibility of occurrence of defects in the nanostructure 26 can be reduced.

Referring back to Fig. 26, in step S56, the core-shell nanostructure 26 is prepared by doping a plurality of nanostructures 26. That is, as shown in FIG. 31, a plasma ion doping method or a monolayer doping (MLD) method can be used to fabricate the nanostructure 26. This method is used to form a conformal shallow pn junction in the surface of the nanostructure 26.

26, the dielectric layer 60 is formed between the plurality of nanostructures 26 formed on the substrate 70. In this case, That is, as shown in FIG. 32, the dielectric layer 60 is formed in such a state that the upper ends of the plurality of nanostructures 26 are exposed on the dielectric layer 60.

Next, a transparent conductive layer 42 is provided on the dielectric layer 60 in step S76 of Fig. 33, the transparent conductive layer 42 is provided on the dielectric layer 60 so that the upper ends of the plurality of nanostructures 26 are covered with the transparent conductive layer 42. Next, as shown in FIG. Here, as the material of the transparent conductive layer 42, ZnO, ITO or a conductive polymer can be used.

26, the first electrode 43 is provided on the transparent conductive layer 42 in step S86. As shown in Fig. 34, the first electrode 43 can be formed of a Ti / Al thin film. The first electrode 43 may be formed by forming an electrode film on the transparent conductive layer 42 and patterning the electrode film.

Next, in step S96 of FIG. 26, the substrate 70 is separated from the plurality of nanostructures 26 to expose the plurality of nanostructures 26 to the outside. That is, the substrate 70 (shown in Fig. 34) is detached from the plurality of nano structures 26 as shown in Fig. Therefore, the substrate 70 can be recycled.

Finally, in step S106 of FIG. 26, a second electrode 45 (shown in FIG. 25) is provided which is in contact with the dielectric layer 60 while covering one end of the plurality of nanostructures 26. That is, a second electrode 45 (shown in Fig. 25) made of an Al thin film is formed below the dielectric layer 60 (shown in Fig. 25).

The solar cell 600 (shown in Fig. 25) can be manufactured through the above-described manufacturing method. The substrate 70 (shown in Fig. 34) used in manufacturing the solar cell 600 can be reused, and thus the manufacturing cost of the solar cell 600 can be greatly reduced.

In addition, in addition to the above-described manufacturing method, a mask layer may be patterned on a substrate to form an opening, and a nanostructure having a concentration gradient may be selectively grown while adjusting a concentration of a substance to be deposited. In this case, a solar cell having the same structure as that of the solar cell 600 of FIG. 25 can be manufactured.

36 schematically shows a sectional structure of a solar cell 700 according to a seventh embodiment of the present invention. The structure of the solar cell 700 of FIG. 36 is similar to that of the solar cell 500 of FIG. 14, so that the same reference numerals are used for the same parts, and a detailed description thereof is omitted.

36, the solar cell 700 includes a plurality of nanostructures 27, a first electrode 40, a second electrode 42, a dielectric layer 60, a barrier layer 71, Layer (29). The nanostructure 27 includes a first doped region 271, a second doped region 273, and a high concentration p-type doped region 275. Some of the elements described above may be omitted in the solar cell 700. [ In addition, other elements can be added to the solar cell 700. [

As shown in Fig. 36, the transparent conductive layer 29 covers the surface of the plurality of nanostructures 27. The transparent conductive layer 29 is in contact with the dielectric layer 60 and the first electrode 40. As the material of the transparent conductive layer 29, ITO or the like can be used. The transparent conductive layer 29 covers the surfaces of the plurality of nanostructures 27 so that the photo-generated carriers formed in the nanostructure 27 can be efficiently collected. On the other hand, the blocking layer 71 is located on the first conductive layer 40 and covers the high concentration p-type doped region 275. Therefore, the transparent conductive layer 29 is not electrically connected to the second electrode 42 due to the blocking layer 71, so that a short phenomenon does not occur.

37 is a flowchart schematically showing a manufacturing method of the solar cell 700 shown in Fig. The manufacturing method of the solar cell 700 of FIG. 37 is similar to the manufacturing method of the solar cell 500 of FIG. 16, so that the same reference numerals are used for the same parts and the detailed description thereof is omitted. Hereinafter, a method of manufacturing the solar cell 700 will be described in detail with reference to FIGS. 37 and 38 to 45. FIG.

As shown in FIG. 37, a method of manufacturing a solar cell 700 includes i) providing a plurality of nanostructures, a doping layer and a blocking layer (S17), ii) doping a surface of a plurality of nanostructures A step (S 27) of providing a high-concentration doped region at one end of the nanostructure, iii) a step (S 37) of providing a transparent conductive layer, a dielectric layer and a first electrode covering a plurality of nanostructures exposed on the barrier layer, And iv) separating the substrate and forming a second electrode (S47). In addition, the manufacturing method of the solar cell 700 may further include other steps as needed.

37, a plurality of nanostructures 27, a doping layer 71, and a blocking layer 73 are provided in step S17. The barrier layer 73 may be formed of undoped spin on glass (SOG). That is, as shown in FIG. 38, the doping layer 71 and the blocking layer 73 are stacked between the plurality of nanostructures 27.

Next, in step S27 of FIG. 37, the surface of the plurality of nanostructures 27 is doped, and the heavily doped region 275 is provided at one end of the nanostructure 27. Next, as shown in FIG. For example, boron can be used to form the heavily doped region 275. As shown in FIG. 39, the surfaces of the plurality of nanostructures 27 are doped to form the first doped region 271 and the second doped region 273.

37, the transparent conductive layer 29, the dielectric layer 60, and the first electrode 40 covering the plurality of nanostructures 27 exposed on the barrier layer 73 are provided. Here, as the material of the dielectric layer 60, PDMS can be used. That is, as shown in FIG. 40, the first electrode 40 is in electrical contact with the transparent conductive layer 29 protruding above the dielectric layer 60.

Next, in the step S47 of FIG. 37, the substrate 70 is separated, and the second electrode 40 contacting the heavily doped region 275 is formed. The heavily doped region 275 is in good electrical contact with the second electrode 40. That is, as shown in Fig. 41, the substrate 70 (shown in Fig. 40) must be well spaced from the blocking layer 73 in order to separate the substrate 70. Fig. Therefore, it is preferable that the thickness of the blocking layer 73 is made small so that the substrate 70 (shown in FIG. 40) is well separated from the blocking layer 73.

Hereinafter, the present invention will be described in more detail with reference to experimental examples. These experimental examples of the present invention are only for illustrating the present invention, and the present invention is not limited thereto.

Experimental Example

A solar cell was fabricated using the same method as that of the solar cell according to Example 1 of the present invention described above. First, metal was deposited by providing an oxidized mask layer patterned in a hole shape on an over-doped silicon substrate. Next, the metal was left only on the silicon substrate exposed to the outside after the oxide mask layer was peeled off. Through the chemical vapor deposition (CVD) process of supplying a source gas containing Si, the nanostructures are grown selectively in one direction vertically only in the portion where the metal catalyst is located.

Next, metal was electrolytically plated on only the lower end portion of the nanostructure grown vertically in one direction on the substrate. Then, the nanostructure was heat-treated to form a silicide at the lower end of the nanostructure. Other details of the manufacturing method of the solar cell can be easily understood by those skilled in the art, so that detailed description thereof will be omitted.

FIG. 42 is a scanning electron microscope (SEM) image of nanostructures included in a solar cell manufactured according to an experimental example of the present invention. Fig. 42 corresponds to Fig.

As shown in Fig. 42, it was observed that nanostructures having a diameter of about 2 mu m were grown on the substrate. The nanostructures were grown in one direction on the substrate.

43 is a scanning electron microscope (SEM) image of the nanostructure of FIG. 42 enlarged.

As shown in FIG. 43, it was observed that silicide was formed at the lower end of the nanostructure. That is, the nanostructure was fixed by the silicide.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, Of course.

1 is a schematic cross-sectional view of a solar cell according to a first embodiment of the present invention.

2 is a schematic cross-sectional view of a solar cell according to a second embodiment of the present invention.

3 is a schematic cross-sectional view of a solar cell according to a third embodiment of the present invention.

4 is a schematic cross-sectional view of a solar cell according to a fourth embodiment of the present invention.

5 is a schematic flowchart showing a manufacturing process of the solar cell of FIG.

FIGS. 6 to 13 are schematic views of manufacturing processes of the solar cell corresponding to the respective steps of FIG. 5. FIG.

14 is a schematic cross-sectional view of a solar cell according to a fifth embodiment of the present invention.

15 is a schematic flow chart showing the manufacturing process of the solar cell of Fig.

FIGS. 16 to 24 are schematic views of manufacturing processes of the solar cell corresponding to the respective steps of FIG.

25 is a schematic cross-sectional view of a solar cell according to a sixth embodiment of the present invention.

26 is a schematic flowchart showing a manufacturing process of the solar cell of Fig.

27 to 35 are schematic views of manufacturing processes of the solar cell corresponding to the respective steps of FIG.

36 is a schematic cross-sectional view of a solar cell according to a seventh embodiment of the present invention.

37 is a schematic flowchart showing a manufacturing process of the solar cell of FIG. 36. FIG.

38 to 41 are schematic views of manufacturing processes of the solar cell corresponding to the respective steps of Fig.

FIG. 42 is a scanning electron microscope (SEM) image of nanostructures included in a solar cell manufactured according to an experimental example of the present invention.

43 is a lateral scanning electron microscopic photograph of the nanostructure of FIG. 42. FIG.

Claims (40)

A plurality of nanostructures spaced apart from each other and extending in one direction, A first conductor layer covering one end of at least one of the plurality of nanostructures, A second conductor layer located apart from the first conductor layer and covering the other end of the nanostructure, A dielectric layer disposed between the first conductor layer and the second conductor layer, &Lt; / RTI &gt; The method according to claim 1, Wherein a silicide layer is formed at one end of the nano structure and a p-type doped region at a high concentration is formed in the nano structure in contact with the silicide layer. 3. The method of claim 2, Wherein the high concentration p-type doped region is located within the first conductive layer. The method according to claim 1, A transparent contact layer positioned in contact with the first conductor layer, and And a transparent conductive layer Further comprising a photovoltaic cell. 5. The method of claim 4, Wherein the transparent contact layer comprises ITO (indium tin oxide). The method according to claim 1, Wherein the metal nanoparticles are disposed on a surface of at least one of the plurality of nanostructures. The method according to claim 1, The second conductor layer, and the dielectric layer, the nanostructure contacting the at least one layer selected from the group consisting of the first conductor layer, A first doped region, and A second doped region surrounding the first doped region in a direction parallel to the plane of the second conductor layer; &Lt; / RTI &gt; 8. The method of claim 7, And the second doped region is doped n-type. The method according to claim 1, The second conductor layer, and the dielectric layer, the nanostructure contacting the at least one layer selected from the group consisting of the first conductor layer, A first doped region, and A second doped region in contact with the first doped region in a longitudinal direction of the nanostructure, &Lt; / RTI &gt; The method according to claim 1, The second conductor layer, and the dielectric layer, the nanostructure contacting the at least one layer selected from the group consisting of the first conductor layer, The first doped region, An intrinsic region in contact with the first doped region in the longitudinal direction of the nanostructure, and A second doped region in contact with the intrinsic region in the longitudinal direction of the nanostructure, &Lt; / RTI &gt; The method according to claim 1, And a silicide layer is formed at one end of the nano structure and at the other end of the nano structure. The method according to claim 1, The plurality of nanostructures may include a plurality of nanostructures, A first diameter in contact with the first conductive layer, and A second diameter &lt; RTI ID = 0.0 &gt; / RTI &gt; Wherein the first diameter is smaller than the second diameter. 13. The method of claim 12, Wherein the diameter of the plurality of nanostructures gradually decreases toward the first conductive layer along a longitudinal direction of the nanostructure. 13. The method of claim 12, A heavily doped region is formed at one end of the nanostructure, and the heavily doped region is in contact with the first conductive layer. 15. The method of claim 14, And a blocking layer located over the first conductive layer between the nanostructures and covering the high concentration p-type doped region. 13. The method of claim 12, And another dielectric layer located opposite the dielectric layer with the second conductive layer interposed therebetween. 17. The method of claim 16, And the thickness of the another dielectric layer is 0.5 mm to 30 mm. 18. The method of claim 17, Wherein the dielectric layer and another dielectric layer each comprise PDMS (polydimethylsiloxane). The method according to claim 1, Wherein the plurality of nanostructures have a concentration gradient along a longitudinal direction thereof. 20. The method of claim 19, The plurality of nanostructures may include Si _{1 - x} Ge _x (0 < x &lt; = 0.5), and the x gradually decreases toward the second conductive layer along the longitudinal direction of the nanostructure. 21. The method of claim 20, The plurality of nanostructures may include Si _{1 - x} Ge _x (0 < x &lt; = 0.3). The method according to claim 1, And a transparent conductive layer covering a surface of the plurality of nanostructures and in contact with the dielectric layer and the second conductive layer. delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete

Images