KR100967781B1 - Circuit for driving switching device in inverter - Google Patents

Abstract

The present invention relates to a driving circuit of a switching element in an inverter for stably driving a plurality of switching elements in an inverter. When the switching element is turned on, a turn-on loop through which a gate current of the switching element flows and a switching element to be turned off. In this case, the turn-off loop through which the gate current of the switching element flows is separated, and the gate current flowing into the turn-off loop is lower than the gate current flowing through the turn-on loop so that the overshoot does not occur when the switching element is turned off. It is possible to prevent the circulating current and oscillation generated between a plurality of switching elements by connecting a resistor to the emitter of the switching element located at the bottom of the switching unit, and to provide a stable voltage to the load by having a snubber capacitor. have.

Inverter, switching element, IGBT, overshoot, snubber, circulating current

Description

Circuit for driving switching device in inverter

The present invention relates to a driving circuit of a switching element in an inverter. More specifically, in the inverter for switching the DC voltage to convert the AC voltage, and outputs the converted AC voltage to the load to drive the drive, the inverter for stably driving a plurality of switching elements for converting the DC voltage to the AC voltage The driving circuit of the switching element.

In general, inverters are widely used throughout the industry, including motor applications and various electrical equipment. The inverter generates an AC voltage by switching a DC voltage with a switching element, and outputs and drives the generated AC voltage to a load, and precisely controls the driving of the load by supplying an AC voltage having a desired voltage and frequency to the load. can do.

IGBTs (Insulated Gate Bipolar Transistors) are commonly used as the switching device. The IGBT is easy and simple to drive due to its high input impedance, and has the advantage of MOSFET (Metal Oxide Film Field Effect Transistor) which can operate at high speed because there is no minority carrier scale, and it can be manufactured easily and inexpensively even at high voltage and high current. Combined with the advantages of switching elements.

1 is a diagram illustrating an example of a general inverter. Here, reference numeral 100 denotes a switching unit. In the switching unit 100, a plurality of switching elements 101 to 106 are connected in series between two power supply terminals DCP and DCN. For example, the switching elements 101 to 106 are IGBTs, and collectors of the switching elements 101, 103, and 105 are connected to the power supply terminal DCP, and emitters of the switching elements 101, 103, and 105 are switched. The emitters of the switching elements 102, 104, and 106 are connected to the power supply terminal DCN, respectively, so as to be connected to the collectors of the elements 102, 104, and 106, respectively. The connection points of the emitters of the switching elements 101, 103, 105 and the collector of the switching elements 102, 104, 106 are connected to the load.

Gates and emitters of each of the plurality of switching elements 101 to 106 are provided with a driving circuit including a plurality of switching signal generators 110 and a plurality of switching signal transfer units 120 to provide a plurality of switching elements ( 101-106 each turn on and off.

Each of the plurality of switching signal generators 110 generates a gate switching signal and an emitter switching signal for applying to gates and emitters of the plurality of switching elements 101 to 106.

The switching signal transfer unit 120 transfers a plurality of gate switching signals and emitter switching signals generated by the plurality of switching signal generators 110 to the gates and the emitters of the plurality of switching elements 101 to 106, respectively. do.

An inverter having such a configuration includes a plurality of switching elements 101 to 106 in which a plurality of switching signal generators 110 configure the switching unit 100 while driving power is applied to a power supply terminal DCN. A switching signal to be switched is generated, that is, a gate switching signal and an emitter switching signal to be applied to the gates and the emitters of the plurality of switching elements 101 to 106, respectively.

The gate switching signal and the emitter switching signal generated by the plurality of switching signal generators 110 are applied to the gates and the emitters of the plurality of switching elements 101 to 106 through the plurality of switching signal transmitters 120, respectively. The plurality of switching elements 101 to 106 are switched.

The switching signal generated by the plurality of switching signal generators 110 may include the switching elements 101 and 102, the switching elements 103 and 104, and the switching elements 105 and 106 that are connected in series. Each of the switching elements 102, 104, and 106 is turned on and off with a phase difference of 180 ° between each other, and the switching elements 101, 103, and 105 are turned on and off with a phase difference of 120 ° between each other. Occurs to be turned on and off with a phase difference of 120 ° to each other.

Then, the switching elements 101 to 106 are selectively switched on and off in accordance with the switching signal, and converts the direct current coin power supplied to the power supply terminal DCN to three-phase AC power. The converted three-phase AC power is supplied to the load to drive the load.

2 is a circuit diagram showing a detailed configuration of a conventional driving circuit. 2, the plurality of switching signal generators 110 includes a gate driver 200 and an amplifier 210, respectively.

The gate driver 200 may include gates of the plurality of switching elements 101 to 106 according to a control signal input from a control unit (not shown) such as a CPU (Central Processing Unit) that controls the driving of the inverter. A switching signal to be applied to the emitter, that is, a gate switching signal and an emitter switching signal, is generated, and the generated emitter switching signal is applied to the emitters of the plurality of switching elements 101 to 106.

The amplifier 210 amplifies a switching signal generated by the gate driver 200. The gate switching signal output terminal of the gate driver 200 is connected to the ground capacitor C1 and the transistors Q1 and Q2 through a resistor R1. Are commonly connected to the base of the transistor, and the collectors of the transistors Q1 and Q2 are connected to the power supply terminal Vcc and the ground terminal, respectively. The emitters of the transistors Q1 and Q2 are connected to each other and amplified by the connection terminal. The gate switching signal is configured to be output.

In addition, the plurality of switching signal transfer units 120 are connected to the gates of the plurality of switching elements 101 to 106 through the resistors R2 at the connection points of the emitters of the transistors Q1 and Q2, respectively. A limiter 220 in which constant voltage diodes ZD1 and ZD2 are connected to each other in a reverse direction between a connection point and a gate switching signal output terminal of the gate driver 200 and an emitter of the emitters 101 to 106; The resistor R3 is connected in parallel.

In the conventional driving circuit configured as described above, the gate driver 200 of the switching signal generator 110 generates a switching signal according to a control signal input from an external controller while operating power is applied to the power supply terminal Vcc. .

Here, assuming that the switching elements 101 to 106 are turned on, the gate driver 200 generates a gate switching signal as a high potential signal of logic 1, and the emitter switching signal is a low potential signal of logic 0. Occurs.

The gate switching signal of logic 1 in which the gate driver 200 is generated is applied to the bases of the transistors Q1 and Q2 while being charged to the capacitor C1 through the resistor R1 of the amplifier 210 and the gate driver 200. The emitter switching signal of logic 0, which is generated, is applied to the emitters of the switching elements 101 to 106.

In this state, when the capacitor C1 is charged with a predetermined voltage or more, the transistor Q1 is turned on and the transistor Q2 is turned off. When the transistor Q1 is turned on, the driving power of the power supply terminal Vcc is applied to the gates of the switching elements 101 to 106 through the resistor R2 of the switching signal transmission unit 220, so that the switching elements 101 to 101 are turned on. 106 is turned on, and the driving power of the power supply terminal (DCP) DCN is supplied to the load through the switching elements 101 to 106.

When the switching devices 101 to 106 are turned off, the gate driver 200 generates a gate switching signal as a low potential signal of logic 0, and the emitter switching signal is generated as a high potential signal of logic 1. The generated emitter switching signal of logic 1 is applied to the emitters of the switching elements 101 to 106.

As the gate driver 200 generates a gate switching signal of logic 0, the voltage charged in the capacitor C1 begins to be discharged to the gate switching signal output terminal of the gate driver 200 through the resistor R1. When the voltage of the capacitor C1 is discharged below the threshold voltages of the transistors Q1 and Q2, the transistor Q1 is turned off and the transistor Q2 is turned on.

When the transistor Q2 is turned on, a low potential is applied to the gates of the switching elements 101 to 106 to be turned off.

As described above, the series-connected switching elements 101, 102, 103, 104, 105, and 106 are turned on and off with a phase difference of 180 °, respectively, and the switching elements 101, 103, 105) 102, 104, and 106 are turned on and off with a phase difference of 120 ° from each other, and the plurality of switching elements 101 to 106 are turned on and off to drive the power terminal DCC. The power is switched to supply three-phase drive power to the load.

When the pair of switching elements 101, 102, 103, 104, 105, 106 are turned on at the same time, the overcurrent is applied to the switching elements 101, 102, 103, 104, 105, 106. Flow and damage. That is, in a state in which the switching elements 102, 104, 106 are turned on or the switching elements 102, 104, 106 are not turned off completely while the switching elements 101, 103, 105 are not turned off completely. When the switching elements 101, 103, 105 are turned on, overcurrent flows to the switching elements 101, 102, 103, 104, 105, 106 and is damaged.

Therefore, the switching signal generator 110 includes a resistor R1 and a capacitor C1 to delay the time that the transistor Q1 is turned on when the gate driver 200 generates the switching signal. Delaying the time that 106 is turned on prevents the paired switching elements 101, 102, 103, 104, 105, 106 from turning on at the same time.

In such a conventional driving circuit, when the switching elements 101 to 106 are turned off, the voltage Vce between the collector and the emitter of the switching elements 101 to 106 is as shown in FIG.

Referring to FIG. 3, when the switching elements 101 to 106 are turned off, an overshoot occurs while the voltage Vce between the collector and the emitter of the switching elements 101 to 106 rises at a high speed. In many cases, overvoltage is applied to the switching elements 101 to 106 due to the generated overshoot.

In order to prevent this, the switching signal transmission unit 120 includes a limiter 220 in which the constant voltage diodes ZD1 and ZD2 are connected to each other in reverse directions, but the limiter 220 eliminates an overshoot that occurs momentarily. There is still a problem that the switching elements 101 to 106 are damaged by the overshoot.

In addition, the plurality of switching elements 102, 104, and 106 positioned at the bottom of the switching unit 100 are turned on and off with a phase difference of 120 ° from each other, and thus, due to a difference in their turn on and off times. A circulating current has occurred between the plurality of switching elements 102, 104, 106.

In addition, the plurality of switching elements 102, 104, and 106 have different stray capacitors from each other, and oscillation occurs in the gate current by coupling with an internal parasitic capacitor.

In addition, the driving elements of the power supply terminal DCC are turned on by turning on the switching elements 101, 103, and 105 positioned at the top of the switching unit 100, and turning off the switching elements 102, 104, and 106 positioned at the bottom of the switching unit 100. In the case of supplying to the load through the upper switching elements (101, 103, 105), the voltage supplied to the load rises rapidly, and the load is often damaged.

Therefore, a problem to be solved by the present invention is to provide a driving circuit of a switching element such that the overshoot does not occur in the voltage between the collector and the emitter of the switching element when the switching elements are turned off.

In addition, the present invention provides a driving circuit of the switching element to prevent the circulating current and the oscillation between the plurality of switching elements generated by the difference in the time that the plurality of switching elements located at the bottom of the switching unit is turned on and turned off.

In addition, the present invention provides a driving circuit of the switching element capable of supplying a stable driving voltage to the load.

According to the driving circuit of the switching element of the present invention, a turn-on loop through which the gate current of the switching element flows when the switching element is turned on, and a turn-off loop through which the gate current of the switching element flows when the switching element is turned off Separate each one. The gate current flowing in the turn-off loop is lower than the gate current flowing through the turn-on loop, thereby lowering the speed at which the voltage between the emitter and the collector of the switching element increases when the switching element is turned off, and the overshoot Do not occur.

In addition, by connecting a resistor to the emitter of the switching element located at the lower end of the switching unit to prevent the circulating current and oscillation generated between the plurality of switching elements, it is equipped with a snubber capacitor to supply a stable voltage to the load. .

Therefore, in the driving circuit of the switching element of the present invention, the first switching element and the second switching element are connected in series in a pair, and the plurality of first and second switching elements connected in series are connected to a positive power supply terminal and a negative power supply. A switching unit connected in parallel between the terminals, a plurality of switching signal generators for generating a gate switching signal and an emitter switching signal for switching the plurality of first and second switching elements, and the plurality of switching signal generators A switching signal transfer unit configured to apply the generated gate switching signal and the emitter switching signal to the gates and the emitters of the plurality of first and second switching elements, wherein the switching signal transfer unit turns the first and second switching elements. When turned on, the gate switching signal generated by the switching signal generator is transferred to the gate of the switching element. And a turn-off loop which causes the gate currents of the first and second switching devices to flow to the switching signal generator when the first and second switching devices are turned off. .

The turn off loop may be set to have a higher resistance value than the turn on loop.

The switching signal transfer unit may further include a limiter for limiting a voltage level between gates and emitters of the first and second switching devices.

The switching signal transfer unit for switching the second switching element is characterized in that it further comprises a resistor between the emitter of the second switching element.

The switching unit may further include a snubber capacitor connected in parallel to adjacent positions of the first and second switching elements connected in series when the first and second switching elements connected in series are fixed to the substrate.

The driving circuit of the switching device of the present invention prevents overshooting by slowing down the collector voltage of the switching device when the switching device is turned off, thereby preventing the switching device from being damaged by the voltage of the overshoot. can do.

In addition, the emitter switching signal is applied to the emitters of the switching elements located at the lower end of the switching unit so that the circulating current and the oscillation do not occur between the switching elements located at the lower end of the switching unit. It can be provided to supply a stable voltage to the load.

The following detailed description is only illustrative, and merely illustrates embodiments of the present invention. In addition, the principles and concepts of the present invention are provided for the purpose of explanation and most useful.

Accordingly, various forms that can be implemented by those of ordinary skill in the art, as well as not intended to provide a detailed structure beyond the basic understanding of the present invention through the drawings.

4 is a circuit diagram showing the configuration of a preferred embodiment of an inverter provided with a drive circuit of the present invention. Here, reference numeral 400 denotes a switching unit. For example, the switching unit 400 uses Insulated Gate Bipolar Transistors (IGBTs) as the switching elements 401 to 406. The plurality of first switching elements 401, 403, and 405 and the plurality of second switching elements are used. The pairs 402, 404, 406 are connected in series, and the plurality of first connected switching elements 401, 403, 405 and the plurality of second switching elements 402, 404, 406 are connected in series. It is connected in parallel between DCP) (DCN).

Snubber capacitors C11 and C12 in adjacent positions of the first and second switching elements 401, 402, 403, 404, 405, 406 connected in series, respectively, in pairs. Each C13 is connected in parallel.

Reference numeral 410 denotes a plurality of switching signal generators 410. Each of the plurality of switching signal generators 410 generates a switching signal for applying to gates and emitters of the plurality of first and second switching elements 401 to 406.

Reference numeral 420 denotes a plurality of switching signal transfer units. The plurality of switching signal transfer units 420 may include the plurality of gate switching signals and the emitter switching signals respectively generated by the plurality of switching signal generators 410. Passes to their gates and emitters.

In the inverter of the present invention having the above configuration, the plurality of switching signal generators 410 constitute the switching unit 400 in the state where the driving power is applied to the power supply terminal DCN. The gate switching signal and the emitter switching signal for switching the two switching elements 401 to 406 are respectively generated.

The gate switching signal and the emitter switching signals generated by the plurality of switching signal generators 410 are respectively applied to the gates and the emitters of the plurality of switching elements 401 to 406 through the plurality of switching signal transfer units 420, respectively. Thus, the plurality of switching elements 101 to 106 are switched on or off.

According to the switching of the first and second switching elements 101 to 106, the DC driving power supplied to the power supply terminal DCN is converted into three-phase AC power, and the converted three-phase AC power. This load is supplied to drive the load.

In this operation, the present invention provides a pair of two first and second switching elements 401, 402, 403, 404, 405, 406 connected in parallel to each other between the power supply terminals DCP and DCN. Snubber capacitors C11, C12, and C13 are connected in parallel to each other. That is, each of the first and second switching elements 401, 402, 403, 404, 405, 406 is fixed to the substrate, and a pair of two is connected in series between the power terminals DCP and DCN. In this case, the collector of the first switching elements 401, 403, 405 and the emitter of the second switching elements 402, 404, 406 are respectively adjacent to the snubber capacitors C11, C12, and C13. ).

Therefore, in the present invention, when the first switching elements 401, 403, 405 are turned on and the second switching elements 402, 404, 406 are turned off to supply driving power to the load, the snubber Capacitors C11, C12, and C13 may stabilize the voltage to supply a stable driving voltage to the load.

5 is a circuit diagram showing the configuration of a preferred embodiment of the driving circuit of the present invention. Here, reference numeral 410 denotes a switching signal generator, and reference numeral 420 denotes a switching signal transmitter.

The switching signal generator 410 includes a gate driver 411 and an amplifier 413. The gate driver 411 may include a gate switching signal to be applied to gates and emitters of the switching elements 401 to 406 of the switching unit 400 according to a control signal input from an external controller (not shown). Generates an emitter switching signal.

The amplifier 413 amplifies the switching signal generated by the gate driver 411, and the gate switching signal output terminal of the gate driver 411 is connected to the ground capacitor C11 and the transistors Q11 and Q12 through the resistor R11. Is connected in common to the base, and the collectors of transistors Q11 and Q12 are connected to the power supply terminal Vcc and the ground terminal, respectively, and the emitters of the transistors Q11 and Q12 are connected to each other. The switching signal is configured to be amplified and output.

In the switching signal transfer unit 420, the connection point of the emitters of the transistors Q11 and Q12 is connected to the gates of the switching elements 401 to 406 through the diode D11 and the resistor R11, so that the first and The turn-on loop 421 for turning on the second switching elements 401 to 406 and the gates of the switching elements 401 to 406 are connected to the transistors Q11 and Q12 through the resistor R13 and the diode D12. And a turn off loop 423 connected to the connection point of the emitter to turn off the first and second switching elements 401 to 406.

And a connection point of the turn on loop 421 and the turn off loop 423 and the gates of the first and second switching elements 401 to 406, the emitter switching signal output terminal of the gate driver 401, and the Between the connection points of the emitters of the switching elements 401 to 406, the limiter 425 and the resistor R14, in which the constant voltage diodes ZD11 and ZD12 are connected in opposite directions to each other, are connected in parallel.

In the driving circuit of the present invention configured as described above, the gate driver 411 of the switching signal generator 410 is gated when the switching elements 401 to 406 are turned on while the driving power is applied to the power terminal Vcc. The switching signal is generated as a high potential signal of logic 1 and the emitter switching signal is generated as a low potential signal of logic 0.

The gate switching signal of logic 1 in which the gate driver 411 is generated is amplified by the amplifier 413, and the gate switching signal of logic 1 is amplified by the diode D11 and the resistor R12 of the turn-on route 421 of the switching signal transfer unit 420. Emitter switching signals of logic 0 applied to the gates of the first and second switching elements 401 to 406 and generated by the gate driver 421 are applied to the emitters of the first and second switching elements 401 to 406. The switching element is turned on as it is applied.

When the first and second switching elements 401 to 406 are turned off, the gate driver 411 of the switching signal generator 410 generates the gate switching signal as a low potential signal of logic 0, and emitter switching. Generate the signal as a high potential signal of logic 1.

Since the gate switching signal of logic 0 generated by the gate driver 411 is amplified by the amplifier 403 and outputted, the gate currents of the first and second switching elements 401 to 406 may cause resistance of the turn-off loop 423 to be reduced. The emitter switching signal of logic 1, which flows to R13 and the diode D12 and the transistor Q12, and is generated by the gate driver 411, is applied to the emitter of the switching element. The two switching elements 401 to 406 are turned off.

Here, the present invention may limit the overshoot between the emitter and the collector generated when the switching element is turned off by adjusting the value of the resistor R13. For example, the value of the resistor R12 of the turn-on loop 421 is set equal to the value of the conventional resistor R2, while the value of the resistor R13 is, for example, the value of the resistor R12. Setting it twice as high reduces the rate at which the voltage between the emitter and collector rises so that no overshoot occurs.

6 is a circuit diagram showing the configuration of another preferred embodiment of the driving circuit of the present invention. Referring to FIG. 6, another embodiment of the present invention provides a switching signal transfer unit 420 that transfers a switching signal to a plurality of second switching elements 402, 404, and 406 positioned at a lower end of the switching unit 400. The emitter switching signal output terminal of the gate driver 411, the connection point of the limiter 425 and the resistor R14, and the emitters of the plurality of second switching elements 402, 404, and 406 are shown. A resistor R15 is further provided therebetween.

According to another exemplary embodiment of the present invention configured as described above, since the resistors R15 are provided at the emitters of the plurality of second switching elements 402, 404, and 406 positioned at the bottom of the switching unit 400, the first switching at the top of the switching unit 400 is performed. When the elements 401, 403, 405 are turned off, and the lower second switching elements 402, 404, 406 are turned on, the second switching elements 402, 404, 406 are driven by the resistor R15. The circulating current and oscillation are prevented due to the difference in turn on and off time.

The present invention has been described in detail with reference to exemplary embodiments, but those skilled in the art to which the present invention pertains can make various modifications without departing from the scope of the present invention. Will understand.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined by the claims below and equivalents thereof.

The present invention is an inverter that is widely used throughout the industry, including motor applications, various electrical equipment, and the like, to stably drive a plurality of switching elements and to supply a stable driving voltage to a load.

1 is a view schematically showing a configuration of a general inverter,

2 is a detailed circuit diagram showing a configuration of a conventional driving circuit;

3 is a waveform diagram showing a voltage change between an emitter and a collector of a switching device when the switching device is turned off;

4 is a circuit diagram showing the configuration of a preferred embodiment of an inverter provided with a drive circuit of the present invention;

5 is a circuit diagram showing a configuration of a preferred embodiment of the drive circuit of the present invention, and

6 is a circuit diagram showing the configuration of another preferred embodiment of the driving circuit of the present invention.

Claims (5)

A switching unit in which the first switching element and the second switching element are connected in series and connected in series, and the plurality of first and second switching elements connected in series are connected in parallel between the positive power supply terminal and the negative power supply terminal; A plurality of switching signal generators generating a gate switching signal and an emitter switching signal to switch the plurality of first and second switching elements; And A switching signal transfer unit for applying the gate switching signal and the emitter switching signal generated by the plurality of switching signal generators to the gates and the emitters of the plurality of first and second switching elements, The switching signal transmission unit; A turn-on loop transferring a gate switching signal generated by the switching signal generator to the gate of the switching element when the first and second switching elements are turned on; And And a turn-off loop for causing gate currents of the first and second switching devices to flow to the switching signal generator when the first and second switching devices are turned off. The turn off loop is a driving circuit of the switching element in the inverter is set higher resistance than the turn on loop. delete The apparatus of claim 1, wherein the switching signal transfer unit; And a limiter for limiting the voltage level between the gate and the emitter of the first and second switching elements. A switching unit in which the first switching element and the second switching element are connected in series and connected in series, and the plurality of first and second switching elements connected in series are connected in parallel between the positive power supply terminal and the negative power supply terminal; A plurality of switching signal generators generating a gate switching signal and an emitter switching signal to switch the plurality of first and second switching elements; And A switching signal transfer unit for applying the gate switching signal and the emitter switching signal generated by the plurality of switching signal generators to the gates and the emitters of the plurality of first and second switching elements, The switching signal transmission unit; A turn-on loop transferring a gate switching signal generated by the switching signal generator to the gate of the switching element when the first and second switching elements are turned on; And And a turn-off loop for causing gate currents of the first and second switching devices to flow to the switching signal generator when the first and second switching devices are turned off. A switching signal transfer unit for switching the second switching element; A drive circuit for a switching element in an inverter comprising a resistor between the emitter of the second switching element. The method of claim 1 or 4, wherein the switching unit; And a snubber capacitor connected in parallel to adjacent positions of the first and second switching elements connected in series when the first and second switching elements connected in series are fixed to the substrate. Driving circuit.

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