KR100742373B1 - Flat Panel Display and method of fabricating the same - Google Patents

Abstract

The present invention relates to a flat panel display device and a method of manufacturing the same. More particularly, a hole is formed to expose an antistatic wiring when forming a contact hole, and after the source / drain electrode patterning using the hole, the antistatic property is prevented. BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a flat panel display device and a method of manufacturing the same that can effectively remove static electricity generated in a display device by dry etching the wiring.

Flat Panel Display, Anti-Static Wiring, Dry Etch, SF6 / O2, CF4 / O2

Description

Flat panel display and manufacturing method thereof {Flat Panel Display and method of fabricating the same}

1 is a plan view schematically illustrating a TFT substrate of an organic light emitting display device as a conventional flat panel display device.

2 is a plan view schematically illustrating a TFT substrate of a flat panel display device according to the present invention.

FIG. 3 is an enlarged view of the antistatic wiring between the gate lines of FIG. 2.

4A to 4E are cross-sectional views illustrating a flat panel display device according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

110, 210, 310. Gate lines 120, 220. Data lines

130, 230, 320, 445. Antistatic wiring 240. Antistatic circuit

330, 457. Hole 400. Insulated substrate

410. Buffer layer 420. Semiconductor layer

421. Source region 423. Channel region

425 Drain region 430 Gate insulating film

441. Gate electrodes 451, 455. Contact holes

460. Film of conductive material 461. Source electrode

465. Drain electrode 470. Protective film

475. Via hole 480. Bottom electrode

The present invention relates to a flat panel display device and a method of manufacturing the same. More particularly, a hole is formed to expose an antistatic wiring when forming a contact hole, and after the source / drain electrode patterning using the hole, the antistatic property is prevented. BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a flat panel display device and a method of manufacturing the same that can effectively remove static electricity generated in a display device by dry etching the wiring.

Cathode ray tube (CRT), which is one of the commonly used display devices, is mainly used for monitors such as TVs, measuring devices, and information terminal devices.However, due to the weight and size of the CRT itself, You cannot actively respond.

In order to replace such a CRT, a flat panel display device having the advantages of small size and light weight has been attracting attention. The flat panel display includes a liquid crystal display (LCD), an organic electroluminescence display (OELD), and the like.

Such a flat panel display device is composed of a TFT substrate on which a TFT is formed and a light emitting element of red, green, and blue.

As described above, the flat panel display includes a TFT array process in which a TFT that applies a signal of a pixel unit is formed, and a process of forming red, green, and blue light emitting elements for realizing color, and a unit flat panel display. It is formed through a process of cutting into a cell (cell).

In this case, a cell cutting process of the unit flat panel display device includes a scribe process of forming a light emitting element on a TFT substrate, and then forming a cutting line on the TFT substrate, and applying a force along the cutting line. It consists of a break process which cut | disconnects the said TFT substrate.

Most of the manufacturing processes of the flat panel display are performed on an insulating substrate such as a glass substrate. Since the insulating substrate is a non-conductor, instantaneous charge cannot be discharged below the substrate, and thus is very vulnerable to static electricity. Thus, the insulating film, TFT or light emitting element formed on the insulating substrate may be damaged by static electricity.

In particular, static electricity has a very high voltage but a very low amount of charge, which locally degrades the substrate. In addition, the static electricity is mainly generated in the cell cutting process of cutting the substrate, and most of the static electricity flows through the pad portion of the gate line and the data line to cause deterioration of the channel of the TFT.

Hereinafter, a conventional technology will be described with reference to the accompanying drawings.

1 is a plan view schematically showing a TFT substrate of an organic light emitting display device as a conventional flat panel display device.

Referring to FIG. 1, a gate line 110 and a data line 120 are formed to vertically intersect on an insulating substrate. A switching TFT and a driving TFT (not shown) may be formed in the pixel area defined by the gate line 110 and the data line 120 crossing each other.

In addition, at the ends of the gate line 110 and the data line 120, an anti-static wire 130 called a shorting bar, which binds the plurality of gate lines 110 and the data line 120 to each other, is provided. It is formed on the edge portion of the substrate, the antistatic wiring 130 is electrically connected to each other.

That is, when all the gate lines 110 and the data lines 120 are connected to one, and static electricity is generated in the gate line 110 or the data line 120, the static electricity is discharged by using the antistatic wiring 130 as a path. do.

However, the antistatic wiring 130 must be disconnected in order to operate a flat panel display device by applying a signal to each cell. In the related art, in order to remove the antistatic wiring 130, a separate etching process or Although the cutting process is performed, this is a problem that the cost is increased by the addition of a process, and in the case of the transient etching, there is a problem that the insulating layer formed on the source / drain electrode and the lower portion is excessively etched.

The present invention is to solve the above-mentioned problems of the prior art and to form a hole (hole) to expose the anti-static wiring when forming the contact hole, and when the source / drain electrode patterning the anti-static wiring SF ₆ / O ₂ or The purpose of the present invention is to provide a flat panel display device which can effectively prevent static electricity generation, simplify the process, and reduce the cost by etching and disconnecting CF ₄ / O ₂ gas.

In order to achieve the above object, a flat panel display device manufacturing method according to the present invention,

Forming a plurality of gate lines and a plurality of data lines formed on an insulating substrate having a light emitting region and a pad portion;

Forming a pixel area defined by the gate line and the data line crossing each other;

Forming an antistatic wiring line formed at end portions of the plurality of gate lines to bind the gate lines together; And

The antistatic wiring between any one of the gate lines and the adjacent gate line of the plurality of gate lines is electrically separated from each other by using a hole for cutting an antistatic wire, but using a hole after forming a source / drain electrode And cutting the antistatic wiring to form a flat panel display device.

The source / drain electrodes may be formed of Ti / Al, Ti / Al / Ti, Ti / Al / Si, Ti / AlSi / Ti, Ti / TiN / Al / Tin / Ti or Ti / TiN / AlSi / TiN / Ti. Characterized in that,

The source / drain electrodes may be etched using Cl ₂ or Cl ₂ / BCl ₃ .

Removing the anti-static wiring is characterized in that for removing by using a hole after the source / drain electrode patterning,

The cutting of the anti-static wiring is characterized in that the dry etching,

The cut of the antistatic wiring is characterized in that the SF ₆ / O ₂ or CF ₄ / O ₂ .

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in more detail.

2 is a plan view schematically illustrating a TFT substrate of a flat panel display device having antistatic wiring according to an embodiment of the present invention.

Referring to FIG. 2, a plurality of gate lines 210 and a plurality of data lines 220 are formed in the light emitting region to extend to the outside of the light emitting region. In this case, the plurality of gate lines 210 are formed in parallel in a first direction, and the plurality of data lines 220 are formed in parallel in a second direction perpendicular to the first direction.

In addition, the data line 220 is connected to the antistatic circuit 240 at an outer side of the light emitting area, and the antistatic circuit 240 prevents static electricity that may occur in a manufacturing process of a flat panel display device. .

Also, although not shown in the drawing, a switching TFT and a driving TFT may be formed in a pixel area defined by the gate line 210 and the data line 220 crossing each other.

On the other hand, the end portion of the gate line 210 in the outer portion of the light emitting region, that is, the region between the light emitting region and the pad portion, the anti-static called a shorting bar that binds the plurality of gate lines 210 together. Although the wiring 230 is formed, the antistatic wiring 230 serves to prevent static electricity that may occur in the manufacturing process of the flat panel display.

The antistatic wiring 230 between any one of the gate lines 210 and the adjacent gate line 210 of the plurality of gate lines is exposed by a hole (330 of FIG. 3), and the hole 330 is a contact hole. When formed, the contact hole and the hole 330 may be formed in the emission area. After the source / drain electrode patterning, the antistatic wiring 230 is etched through the hole 330.

FIG. 3 is an enlarged view of the antistatic wiring between the gate lines of FIG. 2.

Referring to FIG. 3, the antistatic wiring 320 between any one gate line 310 and the adjacent gate line 310 of the plurality of gate lines is formed as two or more parallel lines, and each line is At least one cut is performed by the hole 330 for cutting the antistatic wiring. In this case, the hole 330 for cutting the antistatic wiring 320 preferably has a width greater than or equal to the width of the antistatic wiring 320.

4A to 4E are cross-sectional views illustrating a flat panel display device having antistatic wiring according to a preferred embodiment of the present invention.

Referring to FIG. 4A, a flat panel display according to the present invention selectively forms a buffer layer (diffusion barrier) 410 with a predetermined thickness on an insulating substrate 400 made of glass, synthetic resin, stainless steel, or the like. Form. In this case, the buffer layer 410 is to prevent the diffusion of impurities in the substrate 400 during the crystallization process of the amorphous silicon formed in a subsequent process, it is deposited by a method such as PECVD, LPCVD, sputtering (sputtering).

Next, amorphous silicon is deposited on the buffer layer 410 to a predetermined thickness using a method such as PECVD, LPCVD, or sputtering, and then the amorphous silicon is crystallized and patterned by a photolithography process. A layer 420 is formed, and a gate insulating layer 430 is deposited on the entire surface of the insulating substrate 400. In this case, the gate insulating layer 430 may be formed using a silicon oxide layer (SiO ₂ ), a silicon nitride layer (SiN _x ), or a stacked structure thereof. As the crystallization method, a crystallization process such as ELA, MIC, MILC, SLS, SPC, or the like is preferably used.

A gate insulating film 430 is deposited on the semiconductor layer 420, a conductive metal film is deposited on the gate insulating film 430, and then the conductive metal film is patterned to form a gate electrode 441. The gate electrode 441 is formed of at least one conductive film. For example, a gate electrode 441 made of a double conductive film of Mo, MoW, or MoW / AlNd can be formed.

At this time, the gate electrode 441 is formed and an antistatic wiring 445 made of the same material as the gate electrode material is formed. The antistatic wiring 445 is to prevent static electricity that may occur in the manufacturing process of the flat panel display device.

Then, the source / drain regions 421 and 425 are formed by doping the semiconductor layer 420 with an impurity having a predetermined conductivity using the gate electrode 441 as a mask. A region of the semiconductor layer 420 that is not doped with impurities between the source / drain regions 421 and 425 serves as a channel region 423 of the TFT.

Referring to FIG. 4B, after forming a gate electrode 441 and the antistatic wiring 445, an interlayer insulating layer 450 is formed on the entire surface of the insulating substrate 400, and patterned to form the source / drain regions 421. Contact holes 451 and 455 exposing a portion of the 425 and holes 457 exposing a portion of the antistatic wiring 445.

In this case, the contact holes 451 and 455 are formed, and the hole 457 exposing the antistatic wiring 445 is formed. In addition, the width of the hole 457 is preferably equal to the width of the antistatic wiring 445 or larger than the width of the antistatic wiring 445.

This electrically insulates each gate line by etching away the antistatic wiring 445 exposed by the hole 457 at the same time as forming the source / drain electrodes 461 and 465 to be formed later. To do so.

Referring to FIG. 4C, after forming the holes 457 exposing the contact holes 451 and 455 and the antistatic wiring 445, a conductive material is deposited on the entire surface of the insulating substrate 400. A film 460 is formed.

Referring to FIG. 4D, after forming the predetermined conductive material film 460, the conductive material film 460 is etched to form source / drain electrodes 461 and 465.

At this time, the source / drain electrodes 461 and 465 are formed, and at the same time, the antistatic wiring 445 exposed by the hole 457 is also etched and removed, and a source region (through the contact hole 451) is removed. A drain electrode 465 connected to the drain region 425 is formed through the source electrode 461 connected to the 421 and the contact hole 455. In this case, as the conductive material for forming the source / drain electrodes 461 and 465, molybdenum (MoW), aluminum-neodymium (Al-Nd) or Ti / Al, Ti / Al / Ti, Ti / Al / Si, Ti / AlSi / Ti, Ti / TiN / Al / Tin / Ti, Ti / TiN / AlSi / TiN / Ti and the like may be used, and the source / drain electrodes 461 and 465 may be Cl ₂ or Cl ₂ / BCl _3. Can be etched using.

Subsequently, the source / drain electrodes 461 and 465 are etched, followed by dry etching the antistatic wiring (445 of FIG. 4C) using SF ₆ , SF ₆ / O _2, or CF ₄ / O ₂ . Since SF ₆ and CF ₄ have a very slow rate of etching Ti, especially Al does not etch at all, thereby preventing the source / drain electrodes 461 and 465 from being reduced in width by etching. As in the present invention, after removing the source / drain electrodes 461 and 465 without dry etching, the Al layer formed under the Ti is excessively etched when the antistatic wiring 445 is removed by wet etching. Will occur.

Referring to FIG. 4E, after forming the source / drain electrodes 461 and 465, a protective film 470 is formed on the entire surface of the insulating substrate 400 and then etched to form a source / drain electrode 461 and 465. For example, a via hole 475 exposing a portion of the drain electrode 465 is formed.

Next, a lower electrode 480 is formed to be electrically connected to the drain electrode 465 through the via hole 475. The lower electrode 480 may be formed as a reflective film on the insulating substrate 400 and a transparent electrode on the reflective film. The reflective film may emit light from an organic film (not shown) formed in a subsequent process. And to reflect in the opposite direction to 400). Here, the lower electrode 480 serves as an anode electrode.

At this time, the material of the reflective film is a single metal of silver (Ag), aluminum (Al), chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti) and thallium (Ta) and alloys thereof. As a material of the transparent electrode of the lower electrode 480, indium tin oxide (ITO) or indium zinc oxide (IZO) having a high work function may be used, and aluminum may be used in consideration of reflection efficiency and work function. Al or alloys thereof and ITO are most widely used.

Although not shown in the drawings, a flat panel display is formed by performing a manufacturing process of a general flat panel display.

As described above, according to the present invention, when forming a contact hole, a hole is formed to expose the antistatic wiring, and after the source / drain electrode patterning, the antistatic wiring is SF ₆ / O ₂ or CF ₄ / O ₂ . By etching and disconnecting, it is possible to effectively prevent the generation of static electricity, simplify the process and reduce the cost.

While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

Claims (6)

Forming a plurality of gate lines and a plurality of data lines formed on an insulating substrate having a light emitting region and a pad portion; Forming a pixel area defined by the gate line and the data line crossing each other; Forming an antistatic wiring line formed at end portions of the plurality of gate lines to bind the gate lines together; And The antistatic wiring between any one of the gate lines and the adjacent gate line of the plurality of gate lines is electrically separated from each other by using a hole for cutting an antistatic wire, but using a hole after forming a source / drain electrode And cutting the anti-static wires. The method of claim 1, The source / drain electrode is any one of Ti / Al, Ti / Al / Ti, Ti / Al / Si, Ti / AlSi / Ti, Ti / TiN / Al / Tin / Ti, or Ti / TiN / AlSi / TiN / Ti. A manufacturing method of a flat panel display characterized in that it is formed. The method of claim 1, The source / drain electrode is etched using Cl ₂ or Cl ₂ / BCl ₃ . delete The method of claim 1, The cutting of the antistatic wiring is a manufacturing method of a flat panel display characterized in that the dry etching. The method of claim 1, The cutting of the antistatic wiring is a manufacturing method of the flat panel display, characterized in that SF ₆ / O ₂ or CF ₄ / O ₂ .

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