JPS63136812A - Pulse generating device - Google Patents

Pulse generating device

Info

Publication number
JPS63136812A
JPS63136812A JP28545586A JP28545586A JPS63136812A JP S63136812 A JPS63136812 A JP S63136812A JP 28545586 A JP28545586 A JP 28545586A JP 28545586 A JP28545586 A JP 28545586A JP S63136812 A JPS63136812 A JP S63136812A
Authority
JP
Japan
Prior art keywords
current
pulse
circuit
coil
switching element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28545586A
Other languages
Japanese (ja)
Other versions
JPH0666662B2 (en
Inventor
Yukio Moriguchi
幸男 森口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61285455A priority Critical patent/JPH0666662B2/en
Publication of JPS63136812A publication Critical patent/JPS63136812A/en
Publication of JPH0666662B2 publication Critical patent/JPH0666662B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Amplitude Modulation (AREA)

Abstract

PURPOSE:To use the titled device to a modulator with high PRF(pulse repetitive frequency) by constituting an inductive circuit element with a parallel connection circuit of a coll which controls a first transition of a pulse current and a satura ble reactance which controls a discharge current in terms of time. CONSTITUTION:A DC current is supplied to a line type pulse generating device from a DC power source 1 through a series connection circuit consisting of a charging choke 2 and a diode 3 and a trigger pulse is given to a switching element 4 to be ON. By charges accumulated in the capacitor of a pulse forming circuit 5 and electromotive forces generated in the coil of the pulse forming circuit 5, the coil 8 and the saturable reactance 9, the current Ip is discharged in an opposite direction. And the discharge current Ip flows through the coil 8 until the saturable reactance 9 is saturated. By means of the current Ip and energy by the trigger, the switching element 4 increases the diffusing speed of a carrier and expands the connection area in a short time. At this time the saturable reactance is saturated and a high current flows and then the high-current which passes through the saturable reactance 9 becomes zero when electric energy supplied from the DC power source 1 is consumed.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、レーダ装置等に用いられるラインタイプパル
ス発生装置に関し、特に発生する出力パルスの立ち上り
部の電流上層率(di/dt : iは電流、tは時間
)を制御し、スイッチング素子を最適に動作きせる方式
のラインタイプパルス発生装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a line type pulse generator used in radar equipment, etc., and in particular, the current upper ratio (di/dt: i is The present invention relates to a line-type pulse generator that controls current (t is time) to optimally operate switching elements.

(従来の技術)  ゛ 従来ラインタイプパルス発生装置は、マグネトロン、タ
ライストロン、進行波管等のパルス変調型送信管を駆動
するパルス発生装置として広く用いられている。またス
イッチング素子としてはサイラトロンが用いられてきた
が、寿命などの問題からSCR,トランジスタ等の固体
化素子が使用されることが多くなった。
(Prior Art) Conventional line-type pulse generators are widely used as pulse generators for driving pulse modulation type transmitting tubes such as magnetrons, talistrons, and traveling wave tubes. Furthermore, although thyratrons have been used as switching elements, solid-state elements such as SCRs and transistors are increasingly being used due to problems such as longevity.

一般的にサイラトロンは、ヒータ・リザーバ印加方式で
あり、陰極の電子放出速度が速いため、パルス電流の立
上り部の電流上昇率(di、/ dt )を大きくとる
ことができる。しかし固体化素子の場合、内部構造上ト
リガが印加されると、キャリャが拡散して導通面積が充
分大きくなるには時間を要するから、パルス電流の立上
り部の電流上昇率(di/dt)を大きくとれないとい
う欠点がある。
Generally, a thyratron uses a heater/reservoir application method, and since the electron emission rate of the cathode is fast, a large current increase rate (di,/dt) at the rising edge of the pulse current can be achieved. However, in the case of solid-state devices, when a trigger is applied due to the internal structure, it takes time for the carriers to diffuse and the conduction area to become sufficiently large, so the current increase rate (di/dt) at the rising edge of the pulse current must be set high. There is a drawback that there is no

このような欠点を解決する方式としては、第2図(a)
に示すパルス発生装置の場合のように・放電回路内に直
列にコイルを入れる方式があり、また第3図(a)に示
すパルス発生装置の場合のように放電回路内に直列に可
飽和リアクタを入れる方式等が考えられている。
As a method to solve these drawbacks, the method shown in Fig. 2 (a)
There is a method in which a coil is placed in series in the discharge circuit, as in the case of the pulse generator shown in Figure 3(a), and a saturable reactor is placed in series in the discharge circuit, as in the case of the pulse generator shown in Fig. 3(a). Methods such as adding .

(発明が解決しようとする問題点) 上述した第2図(a)に示すパルス発生装置は、コイル
8によりパルス電流の立上り部の傾きすなわち電流上昇
率(di/ dt )を小きくする方式である。しかし
電流上昇率(di/ dt )が小言い場合、次のよう
な欠点がある。
(Problems to be Solved by the Invention) The pulse generator shown in FIG. 2(a) described above uses a method that uses the coil 8 to reduce the slope of the rising portion of the pulse current, that is, the current increase rate (di/dt). be. However, if the current increase rate (di/dt) is too low, there are the following drawbacks.

■パルス幅が広くなるため短パルスおよび高いPRF(
パルス繰返し周波数)の変調器には使用できない。
■The pulse width becomes wider, resulting in shorter pulses and higher PRF (
It cannot be used as a modulator for pulse repetition frequency).

■フィル部の発熱が大きい。■The fill section generates a lot of heat.

■パルス成形回路は、フィル8のインダクタンスを考慮
してパルス幅を設定する必要がある。
(2) It is necessary to set the pulse width of the pulse shaping circuit in consideration of the inductance of the filler 8.

また第3図(a)に示すパルス発生装置は、可飽和リア
クタ9により、トリガを印加してキャリヤの拡散時間が
経過した後、コイル容量を飽和させ、パルス電流を流す
というもので、この方式にも下記のような欠点がある。
The pulse generator shown in FIG. 3(a) uses a saturable reactor 9 to apply a trigger and, after carrier diffusion time has elapsed, saturate the coil capacitance and cause a pulse current to flow. It also has the following drawbacks:

■飽和特性が良い場合(第3図の) パルス電流が発生するのは、キャリヤ拡散時間後であり
高PRFには適さない。
■When the saturation characteristics are good (as shown in Fig. 3) The pulse current is generated after the carrier diffusion time and is not suitable for high PRF.

■飽和特性が悪い場合(第3図■) (2−1)可飽和リアクタの特性として■のような特性
を有するリアクタは、飽和後の 残留インダクタンス分が大きく、短パ ルス又は立上りの速いパルス電流は流 せない。
■If the saturation characteristics are poor (Fig. 3 ■) (2-1) A reactor with the characteristics of a saturable reactor as shown in can't flow.

(2−2)飽和リアクタ分が大きく、発熱が大きい。(2-2) The amount of saturation reactor is large and heat generation is large.

(2−3)飽和リアクタ分が大きく、パルス幅が広くな
る。
(2-3) The saturation reactor is large and the pulse width is wide.

(問題点を解決するための手段) 本発明によるパルス発生装置は、誘導性回路要素と、パ
ルス成形回路網と、負荷との直列接読からなる二端子回
路と、この二端子回路に並列に接続されたスイッチング
素子とを備え、直流電源から前記二端子回路に電力を供
給し、送信トリガを受けた前記スイッチング素子の開閉
により、前記二端子回路と前記スイッチング素子とから
なる閉回路内にパルス電流を発生するラインタイプパル
ス発生装置において、前記誘導性回路要素がパルス電流
の立上りを制御するコイルと、放電電流を時間的に制御
する可飽和リアクタとの並列接続回路からなることを特
徴とする。
(Means for Solving the Problems) A pulse generator according to the present invention includes a two-terminal circuit consisting of an inductive circuit element, a pulse shaping circuit network, and a load connected in series, and a pulse generator connected in parallel to the two-terminal circuit. A DC power source supplies power to the two-terminal circuit, and when the switching element receives a transmission trigger and opens and closes, a pulse is generated in the closed circuit consisting of the two-terminal circuit and the switching element. A line-type pulse generator that generates a current, characterized in that the inductive circuit element consists of a parallel connection circuit of a coil that controls the rise of the pulse current and a saturable reactor that temporally controls the discharge current. .

(実施例) 本発明の実施例について図面を参照して説明する。(Example) Embodiments of the present invention will be described with reference to the drawings.

第1図(a)は本発明の一実施例を示すブロック回路図
、同図(b)はこの実施例の各部信号を示す波形図であ
る。この実施例は、コイル8と可飽和リアクタ9との並
列接続回路と、パルス成形回路5と、二次側に負荷7を
接続した変圧器6の一次側とを直列に接続した二端子回
路と並列に、スイッチング素子4を接続したラインタイ
プパルス発生装置である。直流電R1からチャージング
チョーク2とダイオード3の直列接続回路を経て前記ラ
インタイプパルス発生装置に直流電流を供給し、トリガ
パルスをスイッチング素子4に与えてオンとし、パルス
成形回路5のコンデンサに蓄積きれた電荷と、パルス成
形回路5のフィルおよびコイル8.可飽和リアクタ9に
発生した起電力とにより、電流Ipを逆方向に放電する
。しかして、可飽和リアクタ9が飽和するまで、放電電
流Ipはコイル8を通して流れる。この電流Ipとトリ
ガによるエネルギーにより、スイッチング素子4は、キ
ャリヤの拡散速度を増し、短時間で導通面積を増大させ
、その時点で可飽和リアクタが飽和して大電流を流し、
直流電filから供給された電気的エネルギーがつきた
時点で、可飽和リアクタ9を通過していた前記大電流は
零となる。
FIG. 1(a) is a block circuit diagram showing one embodiment of the present invention, and FIG. 1(b) is a waveform diagram showing various signals of this embodiment. This embodiment is a two-terminal circuit in which a parallel connection circuit of a coil 8 and a saturable reactor 9, a pulse shaping circuit 5, and the primary side of a transformer 6 with a load 7 connected to the secondary side are connected in series. This is a line type pulse generator in which switching elements 4 are connected in parallel. A DC current is supplied from the DC current R1 to the line-type pulse generator through a series connection circuit of a charging choke 2 and a diode 3, and a trigger pulse is applied to the switching element 4 to turn it on, so that the capacitor of the pulse shaping circuit 5 is completely stored. charge and the fill and coil 8 of the pulse shaping circuit 5. Due to the electromotive force generated in the saturable reactor 9, the current Ip is discharged in the opposite direction. Thus, the discharge current Ip flows through the coil 8 until the saturable reactor 9 is saturated. With this current Ip and energy from the trigger, the switching element 4 increases the carrier diffusion rate and increases the conduction area in a short time, at which point the saturable reactor is saturated and a large current flows.
When the electrical energy supplied from the DC current fil is turned on, the large current passing through the saturable reactor 9 becomes zero.

この場合の電流Ipの波形は、第1図(b)に実線で示
す如くであり、所望のパルス波形となっている。その経
過を次に説明する。
The waveform of the current Ip in this case is as shown by the solid line in FIG. 1(b), and is a desired pulse waveform. The process will be explained below.

11ffl(a)において、コイル8を取り除き、可飽
和リアクタ9のみを有するラインタイプパルス発生装置
として動作した場合の、放を電流Ipに対応する電流波
形は、第1図(b)に電流波形■で示きれる。また同様
に第1図(a)において、可飽和リアクタ9を取り除き
、コイル8のみを有するラインタイプパルス発生装置と
して動作させた場合の、放電電流Ipに対応する電流波
形は、第1図(b)において電流波形■で示される。こ
炸ら電流波形■と電流波形■を組み合わせて、可飽和リ
アクタ9に飽和電流が流れはじめた時から次のトリガパ
ルスが来る迄は、コイル8を流れる電流を零とした電流
波形が、第1図(b)におけるIp電流波形の実線部分
である。かくて放電電流Ipが零となってから次の送信
トリガを受けるまで、スイッチング素子4はオフとなる
。しかして負荷7には変圧器6を経て第1図(b)のI
p電流波形のパルス電流が供給きれ、以後上記の動作が
繰り返される。このように各装置によって最適な値に、
可飽和リアクタ9の飽和特性およびコイル8の値を決定
する。
11ffl(a), when the coil 8 is removed and the device operates as a line type pulse generator having only the saturable reactor 9, the current waveform corresponding to the discharge current Ip is shown in FIG. 1(b). It can be shown by Similarly, in FIG. 1(a), when the saturable reactor 9 is removed and the device is operated as a line-type pulse generator having only the coil 8, the current waveform corresponding to the discharge current Ip is as shown in FIG. 1(b). ) is shown by the current waveform ■. By combining the current waveforms ■ and ■, the current waveform with the current flowing through the coil 8 as zero is the current waveform from the time when the saturated current starts flowing in the saturable reactor 9 until the next trigger pulse arrives. This is the solid line portion of the Ip current waveform in FIG. 1(b). In this way, the switching element 4 remains off until the next transmission trigger is received after the discharge current Ip becomes zero. Therefore, the load 7 is connected to the I of FIG. 1(b) via the transformer 6.
After the pulse current of the p current waveform is completely supplied, the above operation is repeated. In this way, the optimum value can be set for each device.
The saturation characteristics of the saturable reactor 9 and the value of the coil 8 are determined.

本発明により異常発熱、高PRFのレーダ装置およびパ
ルス幅の選択等の問題を解決でき、本発明を容易にパル
ス発生装置に活用できる。
The present invention can solve problems such as abnormal heat generation, high PRF radar equipment, and pulse width selection, and the present invention can be easily applied to pulse generators.

(発明の効果) 以上説明したように、本発明は放電電流Ipを制御する
コイル8と、スイッチング素子4が充分な導通面積にな
ってから飽和する可飽和リアクタ9との並列回路を、放
電回路に直列に挿入し、スイッチング素子4を最適に動
作きせる。本発明にはこのような効果がある。
(Effects of the Invention) As explained above, the present invention connects the parallel circuit of the coil 8 that controls the discharge current Ip and the saturable reactor 9 that saturates after the switching element 4 reaches a sufficient conduction area to the discharge circuit. The switching element 4 is inserted in series to operate the switching element 4 optimally. The present invention has such effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明のパルス発生装置の一実施例を示
すブロック回路図、第1図(b)は第1図(a)の実施
例における各部信号の波形図、第2図(a)、第3図(
a)はそれぞれ従来のパルス発生装置のブロック回路図
、第2図(b)、第3図(b)はそれぞれ第2図(a)
、第3図(a)の装置における各部信号の波形図である
・1・・・直流電源、2・・・チル−ジングチヨーク、
3・・・ダイオード、4・・・スイッチング素子、5・
・・パルス成形回路、6・・・変圧器、7・・・負荷、
8・・・フィル、9・・・可飽和リアクタ。
FIG. 1(a) is a block circuit diagram showing an embodiment of the pulse generator of the present invention, FIG. 1(b) is a waveform diagram of various signals in the embodiment of FIG. 1(a), and FIG. a), Figure 3 (
a) is a block circuit diagram of a conventional pulse generator, and FIGS. 2(b) and 3(b) are respectively shown in FIG. 2(a).
, is a waveform diagram of signals of various parts in the device of FIG. 3(a). 1. DC power supply, 2.
3... Diode, 4... Switching element, 5...
...Pulse shaping circuit, 6...Transformer, 7...Load,
8... Fill, 9... Saturable reactor.

Claims (1)

【特許請求の範囲】[Claims] 誘導性回路要素と、パルス成形回路網と、負荷との直列
接続からなる二端子回路と、この二端子回路に並列に接
続されたスイッチング素子とを備え、直流電源から前記
二端子回路に電力を供給し、送信トリガを受けた前記ス
イッチング素子の開閉により、前記二端子回路と前記ス
イッチング素子とからなる閉回路内にパルス電流を発生
するラインタイプパルス発生装置において、前記誘導性
回路要素がパルス電流の立上りを制御するコイルと、放
電電流を時間的に制御する可飽和リアクタとの並列接続
回路からなることを特徴とするパルス発生装置。
A two-terminal circuit consisting of an inductive circuit element, a pulse shaping circuit network, and a load connected in series, and a switching element connected in parallel to the two-terminal circuit, and power is supplied to the two-terminal circuit from a DC power source. In the line type pulse generator, the inductive circuit element generates a pulse current in a closed circuit consisting of the two-terminal circuit and the switching element by opening and closing the switching element that receives a transmission trigger. 1. A pulse generator comprising a parallel-connected circuit of a coil that controls the rise of the current and a saturable reactor that temporally controls the discharge current.
JP61285455A 1986-11-28 1986-11-28 Pulse generator Expired - Lifetime JPH0666662B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61285455A JPH0666662B2 (en) 1986-11-28 1986-11-28 Pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61285455A JPH0666662B2 (en) 1986-11-28 1986-11-28 Pulse generator

Publications (2)

Publication Number Publication Date
JPS63136812A true JPS63136812A (en) 1988-06-09
JPH0666662B2 JPH0666662B2 (en) 1994-08-24

Family

ID=17691740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61285455A Expired - Lifetime JPH0666662B2 (en) 1986-11-28 1986-11-28 Pulse generator

Country Status (1)

Country Link
JP (1) JPH0666662B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260696A (en) * 1989-03-31 1990-10-23 Toppan Printing Co Ltd Method of inspecting multilayer printed board
JP2007189800A (en) * 2006-01-12 2007-07-26 Toshiba Corp Pulse power supply
JP2007189799A (en) * 2006-01-12 2007-07-26 Toshiba Corp Pulse power supply

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5841086U (en) * 1981-09-11 1983-03-18 株式会社東芝 smoothing circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5841086U (en) * 1981-09-11 1983-03-18 株式会社東芝 smoothing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260696A (en) * 1989-03-31 1990-10-23 Toppan Printing Co Ltd Method of inspecting multilayer printed board
JP2007189800A (en) * 2006-01-12 2007-07-26 Toshiba Corp Pulse power supply
JP2007189799A (en) * 2006-01-12 2007-07-26 Toshiba Corp Pulse power supply

Also Published As

Publication number Publication date
JPH0666662B2 (en) 1994-08-24

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