JPS6211816B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a testing device for analog-to-digital converters.

Among the test items for analog-to-digital converters (hereinafter referred to as A/D converters), there is something called missing bits. For example, in an A/D converter with an n-bit (n is an integer greater than or equal to 2) digital output, there are 2 ⁿ digital codes, and among them, there is a certain code for the analog input. There are things I don't do. This is called bit missing.

Conventionally, to detect this bit missing defect, A/
A staircase voltage was applied to the analog input terminal of the D converter, and digital codes corresponding to the analog values of each stage were read, processed, and judged. However, if an n-bit A/D converter is tested with an accuracy of m stages per code, and the processing time is t, the processing time for making a determination is m.2 ^n.t. becomes. If an attempt is made to test with high accuracy, the voltage difference per stage will be small (that is, m will be large), and the measurement time will become even longer.

The present invention provides a test device in which the time required for measurement is shortened by shortening this processing time.

The configuration of the test apparatus of the present invention is shown in FIG.

In FIG. 1, the analog input terminal A _IN of the A/D converter B to be tested is connected to the voltage output terminal V _OUT of the staircase voltage source A, and the digital output terminal D _OUT of the A/D converter B is When at least one bit changes in the digital output code of A/D converter B, a circuit that detects the change and generates one pulse (hereinafter abbreviated as bit detection circuit) is connected to input terminal B _IN of C. It is also connected to one comparison input terminal _DIA of the comparison circuit D. The output terminal P _OUT of the bit detection circuit C is connected to the clock input terminal C _IN of the counting circuit E and to the output voltage holding input terminal A _IH of the staircase voltage source A. The counting result of the counting circuit E is sent to the output terminal C.
It is output from _OUT and input to the other comparison input terminal _DIB of the comparison circuit D. Output terminal D of comparison circuit D
_OAB is connected to the input terminal J _I of the determination circuit F for determining the comparison result and to the output voltage hold release input terminal A _ID of the staircase voltage source A, respectively.

This operation is as follows.

Now set the state before the test as follows. Voltage source A
The initial analog output voltage of is set to 0V, and the output voltage is changed stepwise over time. Since the input terminal A _IN of A/D converter B inputs 0V in the initial state, its digital output terminal D _OUT terminal (n bits)
becomes code 0. Also, the counting circuit E is cleared,
A code 0, which is the same as the output code of A/D converter B, is output from the terminal C _OUT . Note that the counting circuit E is a counting circuit that adds 1 each time it receives one output pulse from the bit detection circuit C. When the test starts, the analog voltage increases in steps, and when the voltage exceeds the first threshold of A/D converter B, the output code of A/D converter B changes. Then the code of 1 (00...
01). At this time, this change in the output code is detected by the bit detection circuit C, and one pulse is output from the output terminal P _OUT of the bit detection circuit C. This pulse is the output voltage holding input terminal A of the staircase voltage source A.
It is input to _IH and changes in analog output voltage are temporarily stopped. Further, this pulse is input to the pulse input terminal C _IN of the counting circuit E, and the counting circuit E counts +1, and the output becomes code 1 (00...01). In this case, since the output code of the A/D converter B and the counting code of the counting circuit E match, the comparing circuit D outputs a signal indicating that both inputs are equal to the input terminal J of the determining circuit J.
Enter _I. In the judgment circuit, when different inputs are received or when all the same inputs are received, a means is taken to transmit the result to the outside. Further, the output of the comparator circuit D is input to the output voltage holding release input terminal A _ID of the staircase wave voltage source A, and the voltage held until then rises again in a stepwise manner. Then, when the next threshold voltage is exceeded, the output code of the A/D converter is further increased by 1 and the same thing as described above is performed. If bit omission occurs, when the output of A/D converter B is code P, the staircase wave voltage will rise and if it exceeds the threshold level, it will become P if it is normal.
A +1 code is generated, but because the P+1 code is missing, it may become a P+2 code. However, since only one pulse enters the input of the counting circuit E, its counting code is only P+1, and a comparison circuit can determine whether it is defective.

Incidentally, when the staircase wave voltage V _OUT decreases one step at a time, the same thing as described above can be achieved by using a circuit having a counting function of incrementing by -1 every time a pulse is input as the counting circuit E.

The above is the principle of the present invention. If the processing time for one code is t, processing is performed only when the code changes, so the processing time for making a decision on an n-bit A/D converter is 2 ⁿ・It becomes t.

This is due to the fact that with conventional testing machines, when the voltage difference per stage was reduced in order to increase accuracy, the measurement time increased accordingly (with conventional testing machines, the processing time for making a judgment was m・2 ⁿ・t (where m has an accuracy of m steps per code), and the present invention has no relation to m, so it has the advantage of shortening the measurement time. In addition, in the present invention, the processing time t is a short time from the output pulse of the bit detection circuit C to the output of the comparator circuit D, and the processing can be performed at a very high speed. Processing can be done within the time required for each stage, making it possible to measure missing bits at extremely high speed. Regarding the circuit configuration, the staircase voltage source A, the counting circuit E, the comparing circuit D and the determining circuit F can be realized by existing circuits, but the bit detection circuit C can be realized by the following embodiment.

FIG. 2 shows the configuration of bit detection circuit C. L is a temporary storage circuit and M is a comparison circuit. Now assume that the output code of A/D converter B is Q. Temporary memory circuit L
contains the same code Q. When the input of A/D converter B changes and the output code Q becomes Q+1, Q+1 will be input to the input terminal M _IA of the comparator circuit M, and Q will be input to the input terminal M _IB , so that the output of the comparator circuit will be Change. This change becomes the clock input L _CIN of the temporary storage circuit, which then stores Q+1. As a result, both input terminals of the comparison circuit M have Q+1.
is input and a match signal is output. This coincidence signal becomes a pulse input to the counting circuit E. That is, the first
The input terminal B _IN of the bit detection circuit C in the figure corresponds to the input terminal L _IN of the temporary storage circuit L in FIG. 2 and the input terminal M _IA of the comparator circuit M, and the bit detection circuit C in FIG.
The output terminal P _OUT corresponds to the output terminal M _OAB of the comparator circuit M in FIG. This makes it possible to realize a bit detection circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the present invention, and FIG. 2 is a block diagram of the bit detection circuit of the present invention. A...Staircase wave voltage source, A _IH ...Output voltage holding input,
A _ID ...Output voltage hold release input, V _OUT ...Staircase wave voltage output, B...A/D converter, A _IN ...A/D converter analog input terminal, D _OUT ...Digital code generation output, C...Bit detection circuit , B _IN ...bit detection input, _POUT ...pulse generation output, D, M...comparison circuit, _DIA , _DIB , _MIA , _MIB ...comparison input, E...counting circuit, _CIN ...clock input, _COUT ...Counting circuit output, F...Judgment circuit, J _I ...Judgment input, L...Temporary memory circuit, L _IN ...Memory input, L _OUT ...Memory output,
L _CIN ...Clock input.

Claims (1)

[Claims] 1. A voltage source that generates an analog signal whose voltage changes stepwise, and an analog-to-digital converter that converts the analog signal into a digital code.
A bit detection circuit that is connected to the digital output terminal of the converter and that detects the change and generates one pulse when the output of at least one bit in the digital code changes, and a pulse from the bit detection circuit. a counting circuit that counts the output and outputs the counting result; a comparison circuit that compares the counting result from the counting circuit with the digital output from the converter;
and a determination circuit for determining the comparison result, the stepwise change of the analog signal in the voltage source is temporarily stopped by the pulse output of the bit detection circuit, and the stepwise change of the analog signal is stopped by the coincidence signal from the comparison circuit. An analog-to-digital converter testing device characterized by changing the shape of the analog to digital converter.