JPS5914367A - Parallel device for inverters - Google Patents

Abstract

PURPOSE:To enable to maintain a current equilibrium with small reactors by selecting the switching operation pattern of a GTO so that the voltage pulse between reactor terminals between phases alternately becomes positive and negative going. CONSTITUTION:When a load current is positive, negative going voltage is applied until a GTO 21 is turned OFF and the GTO 11 is turned OFF, and positive voltage is applied until the GTO 21 is turned OFF and the GTO 11 is turned OFF, between reactor terminals between phases. When the load current is negative, positive going voltage is applied until a GTO 22 is turned ON and a GTO 12 is turned ON, and negative voltage is applied until the GTO 22 is turned OFF and the GTO 12 is turned OFF, between the reactor terminals between phases. Accordingly, the applied voltage to a reactor 7 between phases becomes both positive and negative going voltage, the reactor is not saturated but the current can be maintained in equilibrium state.

Description

DETAILED DESCRIPTION OF THE INVENTION The present oscillator 4 relates to a device using a self-extinguishing semiconductor element, particularly an inverter cell using a gate turn-off thyristor (hereinafter abbreviated as GTO) or a transistor, and in which inverter sets are connected in parallel. It is.

FIG. 1 shows an inverter set parallel device using GTO. This circuit is an inverter device in which a two-arm single-phase inverter using a two-divided DC power supply is connected in parallel via a phase-to-phase reactor for balancing flow. In the figure, 1.2 is a single-phase inverter set, 3.4 is a DC power supply, 5 is a load, 51 is a resistor, and 52 is a reactor. 1
GTO 111' and 12' of the inverter 1 are the respective feedback diodes, 21 and 22 are the GTOs of the inverter 2, and 21' and 22' are the respective feedback diodes. Further, 7 is a phase reactor for balancing the output currents of the inverters 1 and 2.

In this device, a voltage vxpx corresponding to the switching time difference of the GTOs is applied to the phase reactor due to variations in the turn-on time and turn-off time of the GTO II and 21, and variations in the turn-on time and turn-off time of the GTOs 12 and 22. FIG. 2 shows switching operation patterns due to variations in GTO switching time.

In the figure, (a) shows the operation of GTOII, and (b) shows the operation of GTO21. If GTO is selected arbitrarily, GTOll
When using this as a reference, GTO21 has pattern 1 where turn-on is delayed and turn-off is advanced, and pattern 1 where turn-on is advanced or delayed.
Pattern 2, in which the turn-off is delayed, can be considered. l
Similar operation patterns exist for GTO12 and GTO22. Therefore, when each GTO is arbitrarily selected, a voltage in only one direction may be applied between the correlation reactor terminals. In Figure 3, GTO21 is pattern 1 based on GTOII, and GTO22 is pattern 1 based on GTO12.
The operation of each part when the operation becomes the operation of pattern 2 is shown. In the figure, control signals for CSr1 modulated wave A and carrier wave B, PWM are pulse width modulated signals, INVI is the operation of inverter 1, IN
V2 is the operation of inverter 2, 11 is the load tfi, VIP
X indicates the voltage between the interphase reactor terminals. In FIG. 3, all voltages to the correlation reactors are applied in the positive direction.

Also, contrary to the fIX3 diagram, GTO
When GTO 21 operates in pattern 2 and GTO 22 operates in pattern 1 with reference to GTO 12, only negative voltage is applied to the correlation reactor.

As shown in Figure 3, if a voltage of the same polarity is continuously applied between the mutual reactor terminals, the magnetic flux of the mutual reactors will become saturated, making it impossible to maintain current balance, making it impossible to perform set parallel operation normally. Can not. Alternatively, even if current balance could be maintained, the phase reactor required for this purpose would be extremely large.

The present invention aims to eliminate the above-mentioned drawbacks, maintain the output current balance of each inverter in a parallel inverter set, and further downsize the current balancing phase reactor.

If the switching operation pattern of the GTO is such that voltage pulses are applied between the correlation reactor terminals alternately in the positive direction and the negative direction, the excitation voltage of the correlation reactor is always reversed between positive and negative, and the magnetic flux does not depend on one direction. Therefore, the interphase reactor is not saturated, the amount of excitation of the correlation reactor is small, and the 'l1lc flow balance can be maintained with a small glue accelerator. Therefore, the switching characteristics of the GTO used in the inverter set parallel device may be selected so that positive and negative voltages are applied between the interphase reactor terminals.

In a single-phase inverter set parallel device that is exactly the same as that shown in FIG. 1, which is an embodiment of the present invention, FIG. 4 shows GTOll, G
The switching operation patterns of GTO21° and GTO22 are shown based on TOI2. (a) in the diagram shows the inverter l
(b) is the operation of inverter 2, and (b) is the operation of inverter 2.
The switching characteristics of the GTO may be selected so that the deviation h of the two patterns is obtained. Is the switching operation pattern 1 in Figure 4 GTOII? GTO21 as a standard
Fast turn-on and turn-off times, GTO1
FIG. 5 shows the operation when a GTO 22 with fast turn-on and turn-off times is selected based on GTO 22.

The signals in the figure correspond to those in FIG. In FIG. 5, load current 1. When is positive, GTO21 is turn-on GTOI
Negative voltage until I turns on, GTO21
A positive voltage is applied between the correlation reactor terminals until GTOII is turned off and GTOII is turned off. Also, when the load current i is negative, the positive direction voltage G
TO22 is turned off A negative voltage is applied between the interphase reactor terminals until the LGTO12 is turned off.

Therefore, since the voltage applied to the interphase reactor is in both positive and negative directions, current balance can be maintained without saturating the reactor. At this time, the size of the interphase reactor required to maintain the current balance is compared for the PWM pulse mode 9 in Figure 3 and Figure 5, assuming that the size of the interphase reactor is one line. can be reduced to about 1/9 in terms of the core cross-sectional area, which is smaller than the reciprocal of the number of PWM pulses. Also, when the number of PWM pulses is 15 or 27, it is 1/15 and 1/1, respectively.
27, and as the number of pulses increases, this effect increases.

Note that the present invention is not limited to the single-phase inverter shown in FIG. 1, but can also be applied to a three-phase inverter shown in FIG. 6. In the figure, 10 and 20 are three-phase inverter sets, 30 is a DC power supply, and 5'0 is a load, which is generally an AC motor. The DC power supply 3 is common to the inverters 1 and 2, and the U phase, ■ phase, and W phase of each inverter are connected to interphase reactors 70, 80, and 90, and the respective output currents are supplied to the load 50. GTO has inverter 10
and 20 GTOII and GTO, respectively.
21, GTO12 and GTO22, GTO13 and GTO2
3. GTO14 and GTO24, GT015 and GTO25
゜In GTO16 and GTO26, the above single phase in/<
- As shown in Figure 2, if the switching characteristics of one GTO are used as a reference and the other GTO is selected so that both turn-on and turn-off proceed, or both turn-on and turn-off are delayed, the same effect as a single-phase inverter can be obtained. .

As described above, according to the present invention, in an inverter set parallel device using GTOs, when one of the two GTOs corresponding to inverter 1 and inverter 2 is used as a reference, the turn-on time is By selecting a GTO with a fast turn-off time as the other, it is easy to maintain the current balance state of the shifter.
This brings about the great effect that the current balancing phase reactor can be downsized, and the device can be downsized. In addition, the present invention applies GTO to an inverter and applies it to the case 7 (I have described the case, but also to the case of a transistor,
Of course, it can also be applied in the same way.

[Brief explanation of drawings]

Figure 1 is a diagram showing an example of a single-phase inverter set parallel circuit, Figure 2 is a diagram showing an example of the switching operation pattern of the GTO in Figure 1, and Figure 3 is a diagram showing an example of a switching operation pattern of the GTO in Figure 1. 1 is an explanatory diagram of the operation, FIG. 4 is a diagram showing an example of the GTO switching operation pattern when both positive and negative solder pressure is applied to the correlation reactor, FIG. 5 is an explanatory diagram of the operation of FIG. 4, and FIG. The figure shows another embodiment of the invention. 1.2, 10.20...Inverter set, 11゜1
2.13,14,15,16,21,22゜23.24
,25.26...GTO17,70゜80.90...
・Correlation reactor for current balance.

Claims (1)

[Claims] 1. Equipped with a plurality of inverter sets each having at least one series connection of self-extinguishing semiconductor elements, the output points of each inverter set are connected via a reactor, and power is supplied to the load from the midpoint of the reactor. In a parallel inverter system configured to supply A parallel inverter device in which the turn-on and turn-off operations of the inverters are both advanced or both delayed.