JPS58112195A - Test system - Google Patents

Test system

Info

Publication number
JPS58112195A
JPS58112195A JP21376481A JP21376481A JPS58112195A JP S58112195 A JPS58112195 A JP S58112195A JP 21376481 A JP21376481 A JP 21376481A JP 21376481 A JP21376481 A JP 21376481A JP S58112195 A JPS58112195 A JP S58112195A
Authority
JP
Japan
Prior art keywords
measured
measurement
objects
test system
item
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21376481A
Other languages
Japanese (ja)
Inventor
荒井 伸夫
居弥口 良邦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ando Electric Co Ltd
Original Assignee
Ando Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ando Electric Co Ltd filed Critical Ando Electric Co Ltd
Priority to JP21376481A priority Critical patent/JPS58112195A/en
Publication of JPS58112195A publication Critical patent/JPS58112195A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 この発明は、シーケンスプロセッサの指令により測定w
=ニット出力を切換器を介して被測定物に供給するテス
トシステムについてのものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for measuring w by instructions of a sequence processor.
This is about a test system that supplies the knit output to the object to be measured via a switch.

従来システムの一例を第1図に示す。図で、1はシーケ
ンスプロセッサ%2A・2Btll11定ユニツト、3
人・6Bは切換器、4A・4Bは被測定物である。第1
図では測定ユニット2、切換器6、被測定物4がそれぞ
れ2つの場合を例示しているが、これらは必要に応じて
増減する。
An example of a conventional system is shown in FIG. In the figure, 1 is the sequence processor %2A/2Btll11 constant unit, 3
Person 6B is a switching device, and 4A and 4B are objects to be measured. 1st
Although the figure shows an example in which there are two measurement units 2, two switching devices 6, and two objects to be measured 4, these may be increased or decreased as necessary.

シーケンスプロセッサIKは、プログラムメモ ”す、
コンビエータ、ディジタル回路などを使用することがで
きる。測定ユニット2には、例えば交流レベル測定用に
発振器とレベルメータを、直流レベル測定用に電源と電
圧・電流計などをそれぞれ配置する。切換器3人・5B
は測定ユニット2人・2Bと被測定物4A・4Bの間を
連動して切換える。
The sequence processor IK has program memo
Combiators, digital circuits, etc. can be used. The measurement unit 2 is provided with, for example, an oscillator and a level meter for AC level measurement, and a power supply, voltage/ammeter, etc. for DC level measurement. Switcher 3 people/5B
is linked to switch between the measurement unit 2/2B and the object to be measured 4A/4B.

次に、第1図によるフローチャートの一例を第2図に示
す。図で、11は例°えば交流レベル測定などの測定項
目、12Fi例えば直流レベル測定などで測定項目11
と異なる一定項目で゛ある。
Next, an example of the flowchart shown in FIG. 1 is shown in FIG. In the figure, 11 is a measurement item such as AC level measurement, and 12Fi is a measurement item 11 such as DC level measurement.
There are certain items that are different from the above.

シーケンスプロセッサ10指令で時間t1〜t2の間に
測定項目11について被測定物4Aを測定する。tX、
時間t2〜tsの間に掬定項目12について被測定物4
Aを測定する。この場合、測定項目11の測定中は測定
項目12用の測定ユニット2が遊んでおり、測定項目1
2の測定中は測定項目11用の測定ユニット2が遊んで
いる。
The sequence processor 10 commands to measure the measurement item 11 on the object 4A between times t1 and t2. tX,
Measured object 4 for scooping item 12 between time t2 and ts
Measure A. In this case, measurement unit 2 for measurement item 12 is idle while measurement item 11 is being measured, and measurement item 1
2, the measurement unit 2 for measurement item 11 is idle.

次の時間t4〜t6の間に測定項目11・12について
被測定1kJ4Bを測定し、以下同じようにしてテスト
が進行する。
During the next time t4 to t6, 1 kJ4B to be measured is measured for measurement items 11 and 12, and the test proceeds in the same manner.

このように従来システムでは、測定中に使用していない
測定ユニット2があるので、時間的なロスが大きいとい
う問題がある。
In this way, in the conventional system, there is a measurement unit 2 that is not used during measurement, so there is a problem in that there is a large time loss.

この発明は、切換器6の切換えを個別に制御するレジス
タを備え、各測定ユニット2をかち合わないようにして
各被測定物4に接続し、複数の被測定物4を同時に測定
するようにして、テストシステムの稼働率をあげること
を目的とする。
This invention is equipped with registers that individually control the switching of the switching devices 6, and connects each measurement unit 2 to each object to be measured 4 so as not to overlap each other, so that a plurality of objects to be measured 4 can be measured simultaneously. The purpose is to increase the operating rate of the test system.

以下1図面によりこの発明の詳細な説明する。The present invention will be explained in detail below with reference to one drawing.

まず、この発明による実施例の構成図を第6図に示す。First, a configuration diagram of an embodiment according to the present invention is shown in FIG.

第6図は第1図のシーケンスプロセッサ1と測定エニツ
)2A・2Bの間で測定ユニット2人・2Blillに
レジスタ5A・5Bを追加し友ものである。
FIG. 6 shows a configuration in which registers 5A and 5B are added to the two measurement units 2Brill between the sequence processor 1 and measurement units 2A and 2B in FIG.

レジスタSA・5Bはシーケンスプロセッサ1の指令で
切換器6A・6Bが測定エニッ)2A・2Bを被測定物
4A・4Bのどちらに接続しているかを認識するととも
に、被測定物4A・4Bのテストプログラムに従い、測
定ユニット2人・2Bをかち合わないように切換器3A
・6Bを個別に制御して被測定物4A・4Bに接続する
The registers SA and 5B are used to recognize which of the objects to be measured 4A and 4B the switches 6A and 6B are connected to, and to test the objects to be measured 4A and 4B. According to the program, switch 3A is installed so that the measurement units 2 and 2B do not collide.
・Control 6B individually and connect to the objects to be measured 4A and 4B.

第1図では切換器3A、3Bをシーケンスプロセッサ1
の指令で連動させるのに対し、第6図では切換器6A・
3Bをレジスタ5A・5Bにより個別に制御する。
In FIG. 1, the switchers 3A and 3B are connected to the sequence processor 1.
In contrast, in Fig. 6, the switching device 6A.
3B are individually controlled by registers 5A and 5B.

次に、第3図によるフローチャートの一例を第4図に示
す、第2図では時間t1〜t2で測定項目11について
被測定物4Aを測定しているときは、測定項目12用の
測定ユニット2は遊んでいる。これに対し、第4図では
時間t1〜t2で測定項目11について被測定物4Aを
測定し5時間t1〜t11 で測定項目12について被
測定物4Bを測定する。この場合、測定項目11・12
に使用する測定ユニット2はお互いにかち合わないよう
にレジスタ5A・5Bで制御される。
Next, an example of the flowchart according to FIG. 3 is shown in FIG. 4. In FIG. are playing. On the other hand, in FIG. 4, the object to be measured 4A is measured for measurement item 11 from time t1 to t2, and the object to be measured 4B is measured for measurement item 12 from time t1 to t11. In this case, measurement items 11 and 12
The measuring units 2 used for this purpose are controlled by registers 5A and 5B so that they do not overlap each other.

また、時間t12〜t14で測定項目12について被測
定物4Aを測定し1時間112〜ttsで測定環111
について被測定物4Bt−測定する。すなわち、第2図
では時間の経過に対し測定が直列的なのに対し、第4図
で紘並列的な測定ができるようになっている。これは、
レジスタ5A・5BがそnJen切換器3A−3Bを個
別に制御し、測定ユニット2人・2Bをそn−tJf′
L単独に被測定物4A・48に*続するようにしている
からである。
Further, the object to be measured 4A is measured for measurement item 12 from time t12 to t14, and measurement ring 111 is measured from time 112 to tts for 1 hour.
Measure the object to be measured 4Bt. That is, whereas in FIG. 2, measurements are made in series over time, in FIG. 4, measurements can be made in parallel. this is,
Registers 5A and 5B individually control the switching devices 3A and 3B, and the measuring units 2 and 2B are controlled individually.
This is because L alone is connected to the objects to be measured 4A and 48.

以上のように、この発明によnば切換器6の制御用に追
加したレジスタ5に工り、各測定ユニット2をかち合わ
ないように各被測定物4に接続するので、並列測定が可
能となシ、テストシステムの稼働率をあげることができ
る。
As described above, according to the present invention, the resistor 5 added for controlling the switch 6 is modified and each measurement unit 2 is connected to each object to be measured 4 so as not to overlap, so parallel measurement is possible. It is possible to increase the operating rate of the test system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来システムの一例、 第2図は第1図によるフローチャートの一例。 第6図社この発明による実施例の構成図。 第4図は第3図によるフローチャートの一例。 1・・・・・・シーケンスプロセッサ、2人・2B・・
・・・・測定エニツ)、5A、5B・・・・・・切換器
、4A・4B・・・・・・被測定物、5A・5B・・・
・・・レジスタ、11・12・・・・・・測定項目。 代理人  弁理士  小俣欽司
Figure 1 is an example of a conventional system, and Figure 2 is an example of a flowchart based on Figure 1. Fig. 6 is a configuration diagram of an embodiment according to the present invention. FIG. 4 is an example of a flowchart based on FIG. 3. 1... Sequence processor, 2 people, 2B...
...Measurement equipment), 5A, 5B...Switcher, 4A/4B...Measurement object, 5A/5B...
...Register, 11/12...Measurement items. Agent Patent Attorney Kinji Omata

Claims (1)

【特許請求の範囲】 t シーケンスプロセッサ(1)と、複数のII 定エ
ニッ) (2Jと、各測定エニン) (2)と複数の被
測定物4Jとの間の接続を連動して切換える切換器(6
)とをもつテストシステムにおいて、 各測定エニン) (21がどの被測定aIIJ帽に選択
さn接続されているかt−認識するとともに、測定エニ
ン) (21を選択している被測定物4141のテスト
プログラムに従い各切換器(31の切換えを個別に制御
するレジスタ61を備え。 各測定ユニットQ)をかち合わないようにして各被測、
魔物4】に接続し、複数の被測定物V41を同時に測定
することを特徴とするテストシステム。
[Claims] A switching device that interlocks and switches connections between a sequence processor (1), a plurality of II constants (2J, and each measurement ennin) (2), and a plurality of objects to be measured 4J. (6
), each measurement element) (t-recognizes to which measured object a IIJ cap 21 is selected and connected, and the measurement element) (test of the measured object 4141 selecting 21) Equipped with a register 61 that individually controls the switching of each switch (31) according to the program.
A test system characterized in that it connects to a monster 4 and measures multiple objects to be measured V41 at the same time.
JP21376481A 1981-12-24 1981-12-24 Test system Pending JPS58112195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21376481A JPS58112195A (en) 1981-12-24 1981-12-24 Test system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21376481A JPS58112195A (en) 1981-12-24 1981-12-24 Test system

Publications (1)

Publication Number Publication Date
JPS58112195A true JPS58112195A (en) 1983-07-04

Family

ID=16644633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21376481A Pending JPS58112195A (en) 1981-12-24 1981-12-24 Test system

Country Status (1)

Country Link
JP (1) JPS58112195A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007292723A (en) * 2006-03-29 2007-11-08 Hitachi Kokusai Electric Inc Automatic test system
CN104822597A (en) * 2012-11-30 2015-08-05 株式会社吉野工业所 Container with synthetic resin window, preform, and preform injection molding apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007292723A (en) * 2006-03-29 2007-11-08 Hitachi Kokusai Electric Inc Automatic test system
CN104822597A (en) * 2012-11-30 2015-08-05 株式会社吉野工业所 Container with synthetic resin window, preform, and preform injection molding apparatus

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