JPS5478639A - Input/output control unit - Google Patents
Input/output control unitInfo
- Publication number
- JPS5478639A JPS5478639A JP14572677A JP14572677A JPS5478639A JP S5478639 A JPS5478639 A JP S5478639A JP 14572677 A JP14572677 A JP 14572677A JP 14572677 A JP14572677 A JP 14572677A JP S5478639 A JPS5478639 A JP S5478639A
- Authority
- JP
- Japan
- Prior art keywords
- input
- bit width
- devices
- data
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
Abstract
PURPOSE: To use the same control unit and thus to simplify the unit constitution with no use of the new control unit in case the data bit width of the input/output device is increased, by connecting in parallel more than one unit of the LSI-formed input/output device.
CONSTITUTION: The LSI-formed input/output control device 10, 11 and 12, which perform the control for the data transfer with bit width M, are connected in parallel to CPU which transfers the data with bit width M and the input/output control device which carries out the data transfer with bit width N (M<N). Then wired OR-coupled data bus 103 showing the contents of devices 10W12 is provided, along with data bus 203 which connects devices 10W12 in sequence and imforms the end of the information transfer of devices 10W12 of the preceding step to devices 10W12 of the next step. The state of data bus 103 and 203 are detected via devices 10W 12, and the data transfer is carried out in sequence and with every bit width M.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14572677A JPS5478639A (en) | 1977-12-06 | 1977-12-06 | Input/output control unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14572677A JPS5478639A (en) | 1977-12-06 | 1977-12-06 | Input/output control unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5478639A true JPS5478639A (en) | 1979-06-22 |
Family
ID=15391704
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14572677A Pending JPS5478639A (en) | 1977-12-06 | 1977-12-06 | Input/output control unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5478639A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717048A (en) * | 1980-07-07 | 1982-01-28 | Nippon Telegr & Teleph Corp <Ntt> | Time-division information output system of data transfer circuit |
JPS5729935U (en) * | 1980-07-28 | 1982-02-17 | ||
JPS59226923A (en) * | 1983-05-27 | 1984-12-20 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Bus interface apparatus |
-
1977
- 1977-12-06 JP JP14572677A patent/JPS5478639A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717048A (en) * | 1980-07-07 | 1982-01-28 | Nippon Telegr & Teleph Corp <Ntt> | Time-division information output system of data transfer circuit |
JPS6321938B2 (en) * | 1980-07-07 | 1988-05-10 | Nippon Telegraph & Telephone | |
JPS5729935U (en) * | 1980-07-28 | 1982-02-17 | ||
JPS59226923A (en) * | 1983-05-27 | 1984-12-20 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Bus interface apparatus |
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