JPH11332226A - Synchronous commutation dc-dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve efficiency by controlling for optimum performance a switching element for synchronous commutation of a synchronous commutation DC-DC converter. SOLUTION: In this synchronous commutation DC-DC converter, a voltage which occurs in the secondary windings 2b of a transformer 2 when a MOS-FET 3 changes from an 'on' state into an 'off' state is detected as a voltage V3 which occurs across the connection points of voltage detecting resistors 21, 22. At the time t0 when the voltage level of this detected signal V3 is changed over, a MOS-FET4 for synchronous commutation is changed over from the 'off' state to the 'on' state. Also, the voltage drop of the current flowing in the MOS-FET4 for the synchronous commutation is detected as the difference of voltages V1 , V2 to be inputted into each of non-inverted and inverted input terminals of a comparator 12 inside a synchronous commutation control circuit 14. At the time t3 when the voltage level of the output signal V4 of the comparator 12 is changed over, the MOS-FET4 for synchronous commutation is changed over from the 'on' state to the 'off' state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a synchronous rectification type DC-D.
The present invention relates to a synchronous rectification type DC-DC converter in which a C converter, particularly a synchronous rectification switching element is optimally controlled to improve efficiency.

[0002]

2. Description of the Related Art A diode rectifier such as a Schottky barrier diode (SBD) is generally used in an output rectifier circuit of a low output voltage DC-DC converter. The power loss at the time increases, which causes a reduction in efficiency. For this reason, a synchronous rectification type DC-DC converter has been proposed in which an efficiency is improved by using a switching element such as a MOS-FET having a low electric resistance when conducting to an output rectifier circuit and having no offset voltage as a synchronous rectifier. ing. For example, the synchronous rectification type DC-DC converter shown in FIG. 3 includes a DC power supply 1 such as a battery or a capacitor input type rectifier circuit, a primary winding 2 a of a transformer 2 connected in series to both ends of the DC power supply 1, and main switching. MO as an element
Synchronous rectification MOS-FET as a synchronous rectification switching element connected in series with an S-FET 3 and a secondary winding 2b magnetically coupled to the primary winding 2a of the transformer 2 with the opposite polarity.
4, the secondary winding 2b of the transformer 2 and the MOS-
And a smoothing capacitor 5 as a smoothing circuit connected to both ends of the series circuit of the FET 4. In FIG. 3, 4
a indicates a parasitic diode existing between the drain and the source of the synchronous rectification MOS-FET 4, and
It is connected in parallel between the drain and source terminals of OS-FET4. A resistor 6 to both ends of the secondary winding 2b of the transformer 2
9 is connected, the connection point between the resistors 6 and 7 is connected to the drain terminal of the synchronous rectification MOS-FET 4 via the diode 10, and the connection point between the resistors 8 and 9 is connected via the diode 11 to the synchronous rectification MOS-FET 4 Connected to the source terminal. The voltage V _{1 at} the connection point of the resistors 6 and 7 and the voltage V _{2 at} the connection point of the resistors 8 and 9 are input to the inverting input terminal and the non-inverting input terminal of the comparator 12 and compared. A pulse signal is output. The output signal of the comparator 12 is a pull-up resistor 1
3 is assigned as a synchronous rectification control signal V _G2 to the gate terminal of the synchronous rectification MOS-FET 4 via a synchronous rectification MO
The S-FET 4 is turned on and off. That is, the resistance 6 ~
9, the diodes 10 and 11, the comparator 12 and the pull-up resistor 13 constitute a synchronous rectification control circuit 14 of the synchronous rectification MOS-FET 4.

Further, both ends of the smoothing capacitor 5 and the MOS-
Between the gate terminal of the FET 3 and the DC output voltage V supplied to the load 15 connected to both ends of the smoothing capacitor 5
By controlling the pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the MOS-FET 3 according to _O , the MOS
-A constant voltage control circuit 16 for controlling the ON / OFF period of the FET 3 is provided. Constant voltage control circuit 16, a reference power source 17 for generating a reference voltage V _R which defines the output voltage value
And an error amplifier 1 that compares the DC output voltage V _O and the reference voltage V _R of the reference power supply 17 and outputs a voltage corresponding to the difference.
8 and the light emitting unit 1 driven by the output of the error amplifier 18
A photocoupler 19 including a light receiving unit 19b that controls a current flowing through the light emitting unit 9a according to the light output of the light emitting unit 9a and the light emitting unit 19a;
The PWM modulation circuit 20 controls the pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the MOS-FET 3 according to the current flowing through the light receiving portion 19b of the photocoupler 19. The PWM modulation circuit 20 controls the control pulse signal V _G1 when the light output of the light emitting portion 19a of the photocoupler 19 increases, the current flowing in the light receiving portion 19b increases, and the voltage between the collector and the emitter of the light receiving portion 19b decreases. The light emitting portion 19a of the photocoupler 19
Of the light output is reduced by reducing the current flowing through the light receiving portion 19b is, the collector of the light receiving portion 19b - emitter voltage to an operation to widen the pulse width of the control pulse signal V _G1 when raised.

The operation of the main circuit of the synchronous rectification type DC-DC converter shown in FIG. 3 is as follows. Constant voltage control circuit 1
The control pulse signal V _G1 shown in FIG. 4B is given from the PWM modulation circuit 20 in the MOS-FET _{6 at} time t ₀ .
When the switch 3 is turned off from the on state, the MOS-FET 3
The voltage V _DS1 between the drain and the source becomes equal to the DC input voltage E of the DC power supply 1 as shown in FIG. At this time, a back electromotive force is generated in the secondary winding 2b of the transformer 2 and the parasitic diode 4a of the synchronous rectification MOS-FET 4 is forward-biased, and the current I ₀ shown in FIG. After flowing, the current gradually decreases from the maximum value I _{0P at} a ratio of V _S / L _S (V _S : voltage of the secondary winding 2b, L _S : inductance of the secondary winding 2b). Due to the current I ₀ flowing through the secondary circuit,
Voltages V ₁ and V ₂ shown in FIG. 4D are generated at respective connection points of the resistors 6 and 7 and the resistors 8 and 9 in the synchronous rectification control circuit 14, and these voltages V ₁ and V ₂ are time the same potential in t _2. Figure 4 (D) each voltage shown in V _1, V ₂ are input to the inverting input terminal and non-inverting input terminal of the comparator 12, the synchronous rectification from the comparator 12 through a pull-up resistor 13 at time t ₁ The synchronous rectification control signal V _{G2 applied} to the gate terminal of the MOS-FET 4 is shown in FIG.
It becomes a high level as shown in FIG. As a result, the synchronous rectification MOS-FET 4 is turned on, and a DC output is supplied from the secondary winding 2 b of the transformer 2 to the load 15 via the synchronous rectification MOS-FET 4 and the smoothing capacitor 5.
At time t ₃ , as shown in FIG. 4C, the current I ₀ flowing through the secondary side circuit becomes 0, and the voltage V input to the inverting input terminal and the non-inverting input terminal of the comparator 12 respectively.
_When V ₁ and V ₂ become as shown in FIG.
2 through a pull-up resistor 13 and a synchronous rectification MOS
The synchronous rectification control signal V _G2 applied to the gate terminal of the FET 4 changes from the high level to the low level as shown in FIG. 4E, and the synchronous rectification MOS-FET 4 is turned off. At this time, the charge of the smoothing capacitor 5 charged during the ON period of the synchronous rectification MOS-FET 4 is supplied to the load 15. Further, MOS-FET 3 drain - as shown voltage V _DS1 between source gradually decreases from the DC input voltage E as shown in FIG. 4 (A), at time t ₄ in FIG. 4 (B) M
The control pulse signal V _{G1 applied} to the gate terminal of the OS-FET 3 changes from a low level to a high level,
When the MOS transistor 3 changes from the OFF state to the ON state, the MOS-FET 3
It becomes 0V voltage V _DS1 between the source as shown in FIG. 4 (A) - the drain.

[0005] The constant voltage control operation of the synchronous rectification type DC-DC converter shown in FIG. 3 is as follows. For example,
When the load 15 is in a light load state and the DC output voltage V _O increases, the output voltage of the error amplifier 18 increases and the light output of the light emitting portion 19a of the photocoupler 19 increases. Accordingly, the current flowing through the light receiving portion 19b of the photocoupler 19 increases, and the voltage between the collector and the emitter of the light receiving portion 19b decreases. As a result, the MOS-
Control pulse signal V _{G1 applied} to the gate terminal of FET3
Becomes narrower, and the ON period of the MOS-FET 3 becomes shorter, so that the DC output voltage V _O decreases. Conversely, when the load 15 is overloaded and the DC output voltage V _O decreases, the output voltage of the error amplifier 18 decreases and the light output of the light emitting portion 19a of the photocoupler 19 decreases. Accordingly, the current flowing through the light receiving portion 19b of the photocoupler 19 decreases, and the voltage between the collector and the emitter of the light receiving portion 19b increases. As a result, the PWM modulation circuit 20
The pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the S-FET 3 becomes wider, and the ON period of the MOS-FET 3 becomes longer, so that the DC output voltage V _O rises. By the above operation, the DC output voltage V _{O of the} synchronous rectification type DC-DC converter shown in FIG. 3 is controlled to a constant value, and a constant voltage DC output is supplied to the load 15.

[0006]

In the conventional synchronous rectification type DC-DC converter shown in FIG. 3, the voltage drop corresponding to the current flowing through the synchronous rectification MOS-FET 4 is determined by the comparator 12 in the synchronous rectification control circuit 14. And a synchronous rectification control signal V _G2 output from the comparator 12 via the pull-up resistor 13 to detect the difference between the voltages V ₁ and V ₂ respectively input to the inverting input terminal and the non-inverting input terminal. The ON / OFF control of the MOS-FET 4 is performed. For this reason, there is no particular problem when the input / output characteristics of the comparator 12 are ideal. However, since the comparator actually used has a response delay, the synchronous rectification MOS
-Synchronous rectification control signal V applied to the gate terminal of FET4
Delay time t _{1 for} the rise and fall of _{G2
-T 0 = Δt 1, t 3} -t 2 = Δt 2 occurs. When a delay time Δt ₂ occurs at the fall of the synchronous rectification control signal V _G2 ,
The regenerative current flows from the secondary side to the primary side by reversing the polarity of the current I ₀ flowing through the secondary side circuit. In this case, it can be solved relatively easily by adjusting the threshold voltage of the comparator 12 low. At this time, the synchronous rectification MOS-F
Since the value of the current flowing through ET4 is also very close to 0, the effect of the regenerative current is small. However, if a delay time Δt ₁ occurs at the rise of the synchronous rectification control signal V _G2 , the time for switching the synchronous rectification MOS-FET 4 in the off state to the on state is delayed, and the effect of the synchronous rectification method is most remarkably exhibited. The peak portion of the falling slope of the current I ₀ (FIG. 4C) flowing through the secondary circuit becomes invalid. Therefore, due to the response delay of the comparator 12 in the synchronous rectification control circuit 14,
There is a drawback that the on-start time of the synchronous rectification MOS-FET 4 is delayed to generate reactive power, and the efficiency of the synchronous rectification type DC-DC converter is reduced.

Therefore, the present invention provides a synchronous rectification type DC which can improve efficiency by optimally controlling a switching element for synchronous rectification.
-To provide a DC converter.

[0008]

A synchronous rectification type DC-DC converter according to the present invention comprises: a primary winding and a main switching element of a transformer connected in series to both ends of a DC power supply;
A switching element for synchronous rectification connected in series with a secondary winding of the transformer; and a smoothing circuit connected to both ends of a series circuit of the secondary winding and the switching element for synchronous rectification, A voltage drop of a current flowing through the synchronous rectification switching element is detected by on / off operation of the element, and the synchronous rectification switching element is turned on / off in accordance with the detected value, and the output voltage of the smoothing circuit is reduced. By controlling on / off of the main switching element accordingly, a DC output of a constant voltage is supplied from the secondary winding of the transformer to the load via the smoothing circuit. In this synchronous rectification type DC-DC converter, voltage detection means for detecting a voltage generated in the secondary winding of the transformer, and the synchronous rectification switching element is turned from an off state to an on state by a detection voltage of the voltage detection means. A synchronous rectification control circuit for switching and switching the synchronous rectification switching element from an on state to an off state based on a detected value of a voltage drop of a current flowing through the synchronous rectification switching element. The voltage generated in the secondary winding of the transformer by the on / off operation of the main switching element is detected by the voltage detection means, and the synchronous rectification switching element is turned from the off state to the on state by the detection voltage of the voltage detection means. Further, the synchronous rectification switching element is turned off from the on state by the detected value of the voltage drop of the current flowing through the synchronous rectification switching element when the synchronous rectification switching element is on. This allows the synchronous rectifying switching element to be instantaneously turned on when the main switching element is turned off or turned on.
No reactive power is generated due to a delay in the on-time of the switching element for synchronous rectification. Therefore, the efficiency of the synchronous rectification type DC-DC converter can be improved by optimally controlling the switching element for synchronous rectification.

In an embodiment of the present invention, the switching element for synchronous rectification, the voltage detecting means, and the synchronous rectification control circuit are formed in an integrated circuit body, and are connected to the transformer.
It is connected between the next winding and the smoothing circuit. Therefore, a synchronous rectifying switching element, a voltage detecting means and a synchronous rectification control circuit are combined with a hybrid IC (hybrid integrated circuit)
Or by forming it on an integrated circuit such as an intelligent IC (intelligent integrated circuit) and connecting it between a secondary winding of a transformer of an existing DC-DC converter and a smoothing circuit, a highly efficient synchronous rectification type can be easily achieved. It is possible to configure a DC-DC converter.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A synchronous rectification type D according to the present invention will be described below.
An embodiment of a C-DC converter will be described with reference to FIGS. However, in FIG. 1, the same portions as those shown in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. As shown in FIG. 1, the synchronous rectification type DC-DC converter of this embodiment is a synchronous rectification type DC-DC converter shown in FIG. Voltage detection resistor 2
1 and 22 and the comparison output terminal of the comparator 12 in the synchronous rectification control circuit 14 and the synchronous rectification MOS-FET 4
Between the NOT terminal 23 and the diode 2
4, a control signal forming circuit 29 composed of a resistor 25, a capacitor 26, a NOR gate 27 and an OR gate 28 is connected, and a connection point of the voltage detecting resistors 21 and 22 is connected to the NOR gate 27 in the control signal forming circuit 29. Connected to one input terminal, the connection point of the connection point of the resistors 6 and 7 is connected to the comparator 1
2 is changed to the non-inverting input terminal, and the connection point of the connection point of the resistors 8 and 9 is changed to the inverting input terminal of the comparator 12. Further, the synchronous rectification MOS-
FET4, synchronous rectification control circuit 14, voltage detection resistor 2
1, 22 and the control signal forming circuit 29 are indicated by broken lines A, B, C
It is formed as a hybrid IC or intelligent IC having three terminals in the portion surrounded by. The other circuit configuration is substantially the same as the synchronous rectification type DC-DC converter of FIG.

Next, the operation of the main circuit of the synchronous rectification type DC-DC converter shown in FIG. 1 will be described. Control pulse signal V _G1 shown in FIG. 2 (B) is applied from the PWM modulation circuit 20 of the constant voltage control circuit 16, at time t ₀ MOS-
When the FET 3 changes from the on state to the off state, the MOS-F
The drain-source voltage V _{DS1 of} ET3 becomes equal to the DC input voltage E of the DC power supply 1 as shown in FIG.
At this time, a back electromotive force is generated in the secondary winding 2b of the transformer 2, and the parasitic diode 4a of the synchronous rectification MOS-FET 4 is forward-biased, and the current I ₀ shown in FIG.
Flows from the maximum value I _0P and gradually decreases at a ratio of V _S / L _S (V _S : voltage of the secondary winding 2b, L _S : inductance of the secondary winding 2b). Current I ₀ flowing in the secondary side circuit
As a result, the voltage V ₁ shown in FIG. 2D is connected to each connection point of the resistors 6 and 7 and the resistors 8 and 9 in the synchronous rectification control circuit 14.
V ₂ is generated, and these voltages V ₁ and V ₂ have the same potential at time t ₂ . On the other hand, the voltage generated in the secondary winding 2b of the transformer 2 is the voltage detecting resistors 21 and 2 shown in FIG.
2 is detected as the voltage V _{3 at} the connection point. Figure 2 (D) each voltages V ₁ shown in, V ₂ is input to the non-inverting input terminal and the inverting input terminal of the comparator 12, Delta] t from the time t ₀ of shown in FIG. 2 (F) from the comparison output terminal ₁ = t ₁ -t ₀ delayed by pulse signal V ₄ is output. The pulse signal V ₄ output from the comparison output terminal of the comparator 12 is inverted by the NOT gate 23 in the control signal forming circuit 29 to become an inverted pulse signal −V ₄ shown in FIG. −V ₄ is a signal V ₅ having a gentle falling portion as shown in FIG. 2H due to the diode 24, the resistor 25 and the capacitor 26. The signal V ₅ shown in FIG.
Is input to the NOR gate 27 together with the voltages V ₃ shown in FIG. 2 (E), NOR signal V ₆ showing the NOR gate 27 in FIG. 2 (I) is output. The NOR signal V ₆ output from the NOR gate 27 is input to the OR gate 28 together with the inverted pulse signal −V ₄ shown in FIG. 2 (G), and the OR gate 28 outputs these OR signals. The OR signal output from the OR gate 28 is a synchronous rectification control signal V
Granted to the gate terminal of the synchronous rectification MOS-FET 4 as _G2, a high level at time t ₀ as shown in FIG. 2 (J). Thus, at time t ₀ , the synchronous rectification M
The OS-FET 4 is turned on, and a DC output is supplied from the secondary winding 2 b of the transformer 2 to the load 15 via the synchronous rectification MOS-FET 4 and the smoothing capacitor 5.

At time t ₃ , the current I ₀ flowing through the secondary circuit becomes 0 as shown in FIG. 2C, and the voltage V ₁ input to the non-inverting input terminal and the inverting input terminal of the comparator 12 respectively. When V ₂ is as shown in FIG. 2 (D), pulse signal V ₄ output from the comparator 12 in FIG. 2
The level changes from a low level to a high level as shown in FIG. At the same time, the voltage V ₃ at the connection point of the voltage detecting resistors 21 and 22 becomes a high level from the low level as shown in FIG. 2 (E). At this time, the inverted pulse signal −V ₄ , the signal V ₅ input to the NOR gate 27 and the voltage waveform of the NOR signal V ₆ output from the NOR gate 27 are shown in FIG.
(G), (H) and (I) show. Thereby, M for synchronous rectification
The synchronous rectification control signal V _{G2 applied} to the gate terminal of the OS-FET 4 changes from a high level to a low level as shown in FIG. 2J, and the synchronous rectification MOS-FET 4 is turned off. At this time, the charge of the smoothing capacitor 5 charged during the ON period of the synchronous rectification MOS-FET 4 is supplied to the load 15. Further, the voltage V _DS1 between the drain and the source of the MOS-FET 3 becomes equal to the DC input voltage E as shown in FIG.
At time t ₄ , the control pulse signal V _{G1 applied} to the gate terminal of the MOS-FET 3 changes from a low level to a high level at time t ₄ , as shown in FIG.
When the FET 3 changes from the off state to the on state, the MOS-F
The voltage V _DS1 between the drain and the source of ET3 becomes 0 V as shown in FIG. The synchronous rectification type D shown in FIG.
The constant voltage control operation of the C-DC converter is substantially the same as the case shown in FIG.

The synchronous rectification type DC-D of the embodiment shown in FIG.
The C converter, detects the voltage V ₃ for generating a voltage generated in the secondary winding 2b of the transformer 2 when MOS-FET 3 is turned off from the on state to the connection point of the voltage detecting resistors 21 and 22, By changing the synchronous rectification control signal _VG2 from a low level to a high level at the time when the voltage level of the detection signal switches (t ₀ ), the synchronous rectification MOS-
The FET 4 is switched from the off state to the on state. Also,
The voltage drop of the current flowing through the synchronous rectification MOS-FET 4 is detected as the difference between the voltages V ₁ and V ₂ input to the non-inverting input terminal and the inverting input terminal of the comparator 12 in the synchronous rectification control circuit 14, respectively. Comparator 1
By synchronous rectification control signal V _G2 from the high level when the voltage level of the pulse signal output from the 2 (V ₄₎ is switched (t ₃₎ to the low level, the synchronous rectification MOS-
The FET 4 is switched from the ON state to the OFF state. Therefore, the synchronous rectification MOS-FET 4 can be instantaneously turned on when the MOS-FET 3 changes from the on state to the off state. MOS-
By controlling the FET 4 optimally, it is possible to improve the efficiency of the synchronous rectification type DC-DC converter. Further, since the synchronous rectification MOS-FET 4, the synchronous rectification control circuit 14, the voltage detection resistors 21 and 22, and the control signal forming circuit 29 are formed as a three-terminal hybrid IC or intelligent IC, the existing flyback type DC-FET is used. By incorporating it between the secondary winding of the transformer of the DC converter and the smoothing capacitor, a highly efficient synchronous rectification type DC-
It is possible to configure a DC converter.

The embodiment of the present invention is limited to the above embodiment.
However, various changes are possible. For example, the implementation above
In the embodiment, the DC output voltage of the synchronous rectification type DC-DC converter is
Pressure V _OOf the control pulse signal
PWM (pulse width change) that controls the pulse width while keeping the number constant
Control), but the on-period of the control pulse signal
PFM (pulse frequency change
It is also possible to adopt a tonality) method. In this case,
Instead of the PWM modulation circuit 20 in the embodiment,
The light output of the light emitting portion 19a of the photocoupler 19 increases and receives light.
The current flowing through the portion 19b increases, and the collector of the light receiving portion 19b increases.
-A control pulse signal is output when the voltage between
Operate to extend the off period of the force, and
The current flowing through the light receiving portion 19b due to the decrease in the optical output of the light portion 19a
Decreases, and the voltage between the collector and the emitter of the light receiving portion 19b decreases.
The control pulse signal output off period when
What is necessary is just to use the PFM modulation circuit which operates. Also,
In the above embodiment, the flyback type synchronous rectification type DC-
An embodiment in which the present invention is applied to a DC converter has been described.
High-speed synchronous rectification type DC-DC converter
Lighting can be applied. Further, the above embodiment
Then, MOS-FET4 for synchronous rectification, synchronous rectification control circuit 1
4. Voltage detecting resistors 21 and 22 and control signal forming circuit 2
9 is a three-terminal hybrid IC or intelligence
Although the form formed as the IC was shown, the MO for synchronous rectification was
S-FET4, synchronous rectification control circuit 14, resistor for voltage detection
21 and 22 and the control signal forming circuit 29 are discrete
It is also possible to form each circuit separately.
Needless to say.

[0015]

According to the present invention, since the switching element for synchronous rectification can be optimally controlled, the performance of the synchronous rectifier circuit is maximized and the efficiency of the synchronous rectifier DC-DC converter is remarkably improved. It becomes possible. Also, when the synchronous rectifier circuit is formed as one hybrid IC or intelligent IC, the existing D
Since it can be incorporated in a C-DC converter, its versatility is extremely high and it is easy to use a highly efficient synchronous rectification type DC-DC converter.
It is possible to configure a DC converter.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram showing an embodiment of a synchronous rectification type DC-DC converter according to the present invention.

FIG. 2 is a waveform chart showing voltages and currents of respective parts of the circuit of FIG.

FIG. 3 is an electric circuit diagram showing a conventional synchronous rectification type DC-DC converter.

FIG. 4 is a waveform chart showing the voltage and current of each part of the circuit of FIG.

[Explanation of Codes] . . DC power supply, 2. . . Transformer, 2a. . . Primary winding, 2b. . . 2. secondary winding; . . 3. MOS-FET (main switching element); . . MOS-FE for synchronous rectification
T (switching element for synchronous rectification), 4a. . . 4. parasitic diode; . . Smoothing capacitors, 6, 7, 8,
9. . . Resistance, 10,11. . . Diode, 1
2. . . Comparator, 13. . . Pull-up resistor,
14． . . 14. Synchronous rectification control circuit, . . Load, 1
6. . . Constant voltage control circuit, 17. . . Reference power supply, 1
8. . . Error amplifier, 19. . . Photocoupler, 19
a. . . Light emitting section, 19b. . . Light receiving section, 20. . . PWM
Modulation circuits, 21, 22,. . . 23. voltage detecting resistor (voltage detecting means); . . NOT gate, 24. . . Diode, 25. . . Resistance, 26. . . Capacitor, 2
7. . . NOR gate, 28. . . OR gate, 2
9. . . Control signal forming circuit

Claims (2)

[Claims] A primary winding and a main switching element of a transformer connected in series to both ends of a DC power supply; a synchronous rectification switching element connected in series with a secondary winding of the transformer; A winding and a smoothing circuit connected to both ends of a series circuit of the synchronous rectifying switching element, detecting a voltage drop of a current flowing through the synchronous rectifying switching element by an on / off operation of the main switching element; By controlling on / off of the synchronous rectifying switching element according to the detected value and controlling on / off of the main switching element according to the output voltage of the smoothing circuit, the secondary winding of the transformer In a synchronous rectification type DC-DC converter for supplying a constant-voltage DC output to a load via the smoothing circuit, a voltage generated in a secondary winding of the transformer is generated. Voltage detecting means for detecting a voltage, and the synchronous rectification switching element is switched from an off state to an on state by a detection voltage of the voltage detection means, and the synchronous rectification is performed by a detection value of a voltage drop of a current flowing through the synchronous rectification switching element. A synchronous rectification control circuit for switching a rectifying switching element from an on-state to an off-state.
converter. 2. The synchronous rectification switching element, the voltage detection means, and the synchronous rectification control circuit are formed in an integrated circuit and connected between a secondary winding of the transformer and the smoothing circuit. Synchronous rectification type D according to item 1)
C-DC converter.