JPH0728537A - System interconnection type inverter - Google Patents

Abstract

PURPOSE:To simplify a control circuit, to efficiently extract a maximum output power, and to reduce the distortion rate of an output current waveform to secure the power quality. CONSTITUTION:A signal operation processing part 46 calculates the output power value of a solar battery 32 by an input voltage signal S11 and an input current signal S12 and compares the present power value with the preceding power value; and if the former is larger than the latter, a larger waveform number is designated to a waveform pattern storage part 48 to read out a sine wave waveform pattern signal S15 having a large amplitude value. If the former is smaller than the latter, a smaller waveform number is designated to reduce the amplitude value of the sine wave waveform pattern signal S15. An error amplifier 49 generates a sine wave error signal S17 by the error between the sine wave waveform pattern signal S15 and an inverter output current signal S14, and a PWM modulation control part 50 controls an PET bridge 38 based on the sine wave error signal S17 and converts the DC power of the solar battery 32 to an AC power in the maximum power point tracking control state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a grid interconnection inverter configured to convert DC power output from a DC power source such as a solar cell into AC power and supply the AC power to a commercial power system.

[0002]

2. Description of the Related Art In a conventional system interconnection type inverter, a PWM inverter circuit composed of switching elements is used for converting direct current into alternating current, and is used as a gate pulse signal for controlling ON / OFF of the switching elements. By outputting a pulse train whose pulse width and positive and negative polarities are controlled, DC power is converted into AC power of commercial frequency and sent to the existing commercial power system.

FIG. 7 shows an example of a grid-connected photovoltaic power generation system to which a conventional grid-connected inverter is applied. In this system, the DC power of the solar cell 2 is converted into AC power by a PWM (pulse width modulation) controlled grid-connected inverter 1, and the output end of the grid-connected inverter 1 passes through a commercial transformer 3 to produce an existing power. It is connected to the commercial power supply 4.

The grid interconnection inverter 1 includes a backflow prevention diode 5, a noise filter 6, an input capacitor 7, and an FE.
It is composed of a T-bridge 8, an output choke coil 9 which functions as an output filter and changes a rectangular wave into a sine wave, a smoothing capacitor 10, an interconnection relay 11, a noise filter 12 and a control circuit 13. The interconnection relay 11 is
After detecting that the voltage of the grid interconnection inverter 1 has been established, the inverter output is supplied to the commercial grid power source 4 via the commercial transformer 3. The control circuit 13 includes a DC voltage constant control unit 14, a DC reference voltage source 15, and a multiplier 1.
6, an output current detector 17, an error amplifier 18, a PWM modulation control unit 19, and a gate drive signal generation circuit 20 for driving the FET bridge 8.

The control circuit 13 includes a DC voltage constant controller 14
At an error voltage signal S 3 between the input voltage signal S 1 of V _DC from the solar cell 2 and the reference voltage signal S 2 of V _REF from the DC reference voltage source 15 is generated, and this error amplifier 18 is input to one input of the multiplier 16. And

The output voltage signal S4 of V _CS on the output side of the interconnection relay 11 is used as the other input of the multiplier 16. The multiplier 16 receives the input error voltage signal S3 and output voltage signal S4.
And are multiplied to generate a sinusoidal voltage signal S5.

The error amplifier 18 detects the sinusoidal voltage signal S5 from the multiplier 16 and I _OUT detected by the output current detector 17.
Of the output current signal S6 of FIG. The PWM modulation control unit 19 performs PWM based on the input sine wave error signal S7.
The switching pattern signal S8 whose pulse width and positive / negative polarities are determined is output to the gate drive signal generation circuit 20. The gate drive signal generation circuit 20 outputs a gate pulse signal S9 based on the gate drive signal generation circuit 20 and drives the FET bridge 8 to control the input voltage V _DC that matches the reference voltage V _REF .

In the FET bridge 8, when the switching transistors Q1 and Q2 are simultaneously turned on, the switching transistors Q3 and Q4 are simultaneously turned off. Conversely, when the switching transistors Q3 and Q4 are simultaneously turned on, the switching transistor Q1 is turned on. Turn off Q2 at the same time.

As described above, in order to obtain the sine wave error signal S7 as the output current command value (waveform pattern) to be given to the PWM modulation controller 19 in the grid interconnection inverter 1, the input voltage signal S1 and the output voltage signal S1 are output. S4 and the output current signal S6 were used.

The sine wave error signal S7 is used as a feedback signal for controlling the grid interconnection inverter 1. In other words, this conventional example adopts a method of controlling the input voltage _VDC of the inverter 1 (that is, the output voltage of the solar cell 2) to a preset constant voltage value V _REF .

The voltage at the operating point where the maximum power is taken out from the solar cell is actually changing every moment depending on the weather conditions such as the amount of solar radiation and the element temperature. By the way, the characteristic of the above-mentioned conventional method is that it is attempted to operate artificially at the maximum power point of the solar cell on the assumption that it can be approximated to an arbitrary substantially constant voltage regardless of the amount of solar radiation and the element temperature.

From this, in the above-mentioned conventional method, open loop control is performed in terms of control, and the constant voltage value predicted in advance and the operating voltage value at which the actual maximum output can be taken out do not always match. Naturally expected. In this case, it will operate at a point deviating from the optimum operating point,
The maximum power cannot be output. Due to the characteristics of solar cells, if the operating point deviates from the optimum operating point even a little, especially when the amount of solar radiation becomes high to some extent, a large amount of power is wasted. In addition, since the optimum operating point changes depending on the season, in consideration of heating in the winter and dehumidification during the rainy season throughout the year, the conventional method requires complicated operation such as frequent change of a preset constant voltage value. Otherwise, a large amount of solar cell output power will be wasted throughout the year, which is inefficient and not very useful.

Further, in order to generate the sine wave error signal S7 as the above-mentioned output current command signal which is necessary for the feedback control of the grid interconnection inverter 1 and determines the inverter output current quality, a sine wave voltage source is used. The inverter output voltage signal (V _CS ) at the inverter output end with insufficient waveform quality is used as a basic signal.
Since analog signal processing is frequently used such as using the analog multiplier 16 in the control signal processing process, the circuit is complicated and the sine wave error signal S7 also becomes a sine wave signal containing many harmonics. ing. As a result, the waveform distortion rate of the inverter output current also becomes a large value, making it difficult to improve the circuit that is complicated for analog signal processing.

[0014]

As described above, in the conventional system grid-connected inverter 1, the control circuit 13 is composed of an analog circuit, even though the generated power from the solar cell changes every moment. Therefore, the circuit for obtaining better control characteristics is complicated, and the adjustment of circuit constants is complicated. In addition, it is impossible to efficiently extract the maximum power of the solar cell, let alone actively change the operating point on the characteristic curve of the solar cell, it is almost impossible to actively control the output power. I had a problem.

In addition, in regard to the power quality, which is the most important problem in connecting with the existing commercial power system, it is possible to control the output current distortion rate to be sufficiently low. Since the circuit 13 is composed of an analog circuit, there were many difficulties in adjusting circuit constants.

The present invention was devised in view of such circumstances, and aims to simplify the control circuit and
The objective is to ensure that the maximum output power can be extracted accurately and efficiently, and that the distortion rate of the output current waveform is kept small to ensure the power quality of the system.

[0017]

The present invention has the following constitution in order to achieve the above object. The greatest feature is that a plurality of types of waveform patterns for generating a sinusoidal waveform pattern signal which is a source of pulse width modulation are stored in advance in a memory. That is, the grid interconnection inverter according to the present invention turns on / off the bridge of the switching element based on the switching pattern signal.
Means for controlling and converting DC power input from a DC power source such as a solar cell to AC power and supplying it to a commercial system power source; and means for generating the switching pattern signal by pulse width modulation based on a sine wave error signal. , Means for detecting a zero cross point of the system voltage and generating a synchronization signal,
Sine wave waveform data that has multiple types of amplitude values that are proportional to the amplitude value of the rated output current waveform of the inverter.For each amplitude value, there is a waveform number in the order of the amplitude value, and each waveform number Waveform pattern storage means for storing in advance digital value data having individual quantized amplitude values at time positions evenly divided for each sine wave waveform in the time axis direction, and an inverter detected at an arbitrary cycle. If the means for digitally calculating and storing the power value based on the input current, input voltage or output current, output voltage is compared with the previous power value and the current power value, and if the power value is increasing, Means for designating a waveform number whose amplitude value is one step higher, and a waveform number whose amplitude value is one step lower when the power value is decreasing, and for giving it to the waveform pattern storage means as a read signal. At the timing of the synchronizing signal, a sine wave waveform pattern signal is started to be read from the waveform pattern storage means based on the read signal, and the quantized amplitude value of the determined sine wave waveform pattern is continuously obtained in a predetermined minute cycle. And a means for generating the sine wave error signal from an error between the sine wave waveform pattern signal read from the waveform pattern storage means and the detected inverter output current signal. It is characterized by that.

[0018]

The waveform pattern storage means has a plurality of types of amplitude values proportional to the amplitude value of the rated output current waveform of the inverter, and each amplitude value has a waveform number in the order of the magnitude of the amplitude value and each waveform. The sine wave waveform data is stored in advance as digital value data having individual quantized amplitude values at the position in the time axis direction for each sine wave waveform of the number. Then, the calculation of the power value which is the basis of the designation of the waveform number that determines which amplitude value of the sine wave waveform data is read from the waveform pattern storage means is also performed digitally. In this way, digital processing accounts for a large proportion.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a grid interconnection type inverter according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of a grid-connected photovoltaic power generation system to which the grid-connected inverter of the embodiment of the present invention is applied. In this system, the solar cell 32 is connected to the grid interconnection inverter 31, and the grid interconnection inverter 31 is connected to an existing commercial grid power supply 34 via a commercial transformer 33. The grid interconnection inverter 31 is adapted to convert the DC power generated by the solar cell 32 into AC power of 60/50 Hz and supply it to the commercial grid power supply 34 by PWM (pulse width modulation) control.

The system interconnection inverter 31 includes a backflow prevention diode 35, a noise filter 36, an input capacitor 37 for suppressing fluctuations in input power from the solar cell 32, and a FET bridge 38 composed of four switching power MOS-FET bridges. , An output choke coil 39 which has a function of an output filter and changes a rectangular wave into a sine wave, a smoothing capacitor 40, an interconnection relay 41, a noise filter 42, an input current detecting current transformer (CT) 43, an output current detecting current transformer And a control circuit 45. The noise filters 36 and 42 are inserted in the input / output portions in order to prevent noise generated in the inverter 31 from flowing out. Interconnection relay 41
Is for supplying the inverter output to the commercial system power supply 34 via the commercial transformer 33 after detecting that the voltage of the system interconnection inverter 31 has been established.

A flywheel diode is connected in reverse polarity to each of the four switching transistors Q1 to Q4 in the FET bridge 38. The FET bridge 38 is a gate drive signal generation circuit 5 described later.
With the control of 1, the transistors Q1 and Q2 are turned on simultaneously.
In this case, the transistors Q3 and Q4 are simultaneously turned off, and conversely, when the transistors Q3 and Q4 are simultaneously turned on, the transistors Q1 and Q2 are simultaneously turned off.

The control circuit 45 includes a signal calculation processing section 46, a synchronizing signal detection section 47, a sine wave waveform pattern storage section 48,
Gate drive signal generation circuit 51 for driving the error amplifier 49, the PWM modulation control unit 50, and the FET bridge 38.
It consists of

FIG. 2 is a block diagram showing a detailed internal structure of the waveform pattern storage section 48. The main element of the signal calculation processing unit 46 is the CPU 60. Waveform pattern storage unit 48
Is an address setting switch 61, an address decoder circuit 62, OR gates 63 and 64, a latch circuit 65, a clock / frequency divider circuit 66, a counter circuit 67 and a memory 68.
It consists of 69 is an address bus and 70 is a data bus.

Next, the operation of the grid-connected photovoltaic power generation system having the above configuration will be described.

Basically, based on the gate pulse signal S19 outputted from the gate drive signal generation circuit 51 which is PWM-controlled by the sine wave in the PWM modulation control section 50, a pair of switching transistors Q1 in the FET bridge 38 are provided. By alternately turning on / off Q2 and the pair of switching transistors Q3 and Q4 to perform switching, this system interconnection inverter 31
The output power of the solar cell 32 is supplied to the commercial system power source 34 by controlling so that a sine wave current flows as the output current of the.

In this case, the sine wave waveform pattern signal S15 read from the waveform pattern storage section 48 and the inverter output current signal S detected by the output current detecting current transformer 44.
14 is input to the error amplifier 49, the difference between the two is amplified, and the PWM modulation control unit 50 outputs a sine wave error signal S17.
Entered in. The PWM modulation control unit 50 generates the switching pattern signal S18 by PWM modulation based on the sine wave error signal S17 and outputs it to the gate drive signal generation circuit 51. Switching pattern signal S18
The gate drive signal generation circuit 51 which has received the signal outputs the gate pulse signal S19 to the FET bridge 38 and turns on the transistors Q1 and Q2 and the transistors Q3 and Q4.
N / OFF to generate a rectangular wave. The rectangular wave is converted into a sine wave current by the output filter including the output choke coil 39 and the smoothing capacitor 40, and is supplied to the commercial power supply 34 via the interconnection relay 41. As a result, feedback control is realized so that the output current of the grid interconnection inverter 31 matches the sine wave waveform pattern signal S15 read from the waveform pattern storage unit 48.

Regarding the sine wave waveform pattern stored in advance in the waveform pattern storage section 48, a plurality of sine wave waveform patterns having different amplitude values are prepared because they directly affect the output current waveform of the inverter 31. That is, the amplitude value of the sine wave waveform pattern is proportional to the magnitude of the inverter output current, and when the sine wave waveform pattern with a large amplitude value is read, the inverter output current increases, and conversely, the sine wave waveform pattern with a small amplitude value is read. And keep the inverter output current small.

For example, as shown in FIG. 3, 256 kinds of sine wave waveform patterns from No. 0 to No. 255 having different amplitude values are prepared. When the waveform patterns having smaller amplitude values are sequentially read, the output current of the grid interconnection inverter 31 increases according to the amplitude values of the read waveform patterns. Waveform numbers are assigned to the 256 sine wave waveform patterns in the order of the magnitude of the amplitude value. The waveform number of the waveform pattern having the minimum amplitude value is "0", and the waveform number of the waveform pattern having the maximum amplitude value is "255".

However, the input power source of the grid interconnection inverter 31 is not a power source such as a power system or a storage battery that can supply arbitrary power, but a solar cell. This solar cell
As is well known, this is a special power source in which the electric power that can be supplied changes with every moment. Therefore, regarding the reading of the sine wave waveform pattern in the control circuit 45, a waveform pattern having an arbitrary amplitude value is read from the above-mentioned waveform patterns having 256 amplitude values, and an arbitrary inverter output corresponding to the amplitude value is read. Even when trying to obtain the current value, the input from the solar cell 32, which is the power source of the inverter 31,
There may be a shortage depending on the output current of the inverter 31 to be obtained. In such a case, the control circuit 45 will be out of control.

Therefore, regarding the reading of the sine wave waveform pattern that determines the output current of the grid interconnection inverter 31, a waveform that can detect the output of the solar cell 32 and output an inverter output current commensurate with the output of the solar cell is provided. It is necessary to control the control circuit 45 so that the pattern is read out.

As an example of the read control of the sine wave waveform pattern, first, when the waveform pattern of the waveform number 0 having the minimum amplitude value is read, the output of the inverter 31 becomes the minimum. The input voltage V _DC and the input current I _DC from the inverter to the inverter 31 are detected, the output power of the solar cell 32 is calculated from the product thereof, and the values are temporarily stored in a memory or the like. The solar cell 32 when the waveform pattern of waveform number 1 whose amplitude value is one step larger than that of the waveform pattern of waveform number 0 is read out
The output power from is similarly detected and stored. Then
Compare the previous output power value with the current output power value, and if the current output power value is larger, store the larger current output power value instead of the previous output power value, and A waveform pattern having a large amplitude value is read out by one step. Then, the output power at this time is detected,
The same processing as described above is repeatedly executed. On the contrary, the previous output power value is compared with the current output power value, and if the current output power value is smaller, the waveform pattern having the one-step smaller amplitude value is read out. Then, the output power at this time is detected, and the same processing as described above is repeatedly executed.

As described above, it is possible to avoid the inconvenient control of requesting the output current of the inverter 31 that exceeds the output power of the solar cell 32. Regarding the inverter output current control, It becomes possible to control to an appropriate output current value corresponding to the electric power of the solar cell 32.

On the other hand, the waveform number of the sine wave waveform pattern must be defined in advance from the relationship between the waveform pattern, the amplitude value and the inverter rated output current. That is, in this embodiment, the inverter rated output current is 0 to 30A.
The size of this rated output current value is 2 with respect to (effective value).
When divided into 56 stages, 2 for each output current
Waveform patterns having 56 amplitude values are defined as waveform numbers 0 to 255 in ascending order of amplitude value. By presetting as described above, the amplitude value of the waveform pattern increases as the waveform number increases, and the output current also increases in proportion to this.

Next, the storage of the sine wave waveform pattern will be described in detail with reference to the block diagram of the waveform pattern storage section 48 shown in FIG.

Here, for one cycle of a sine wave waveform pattern having an arbitrary amplitude value, the time is taken on the X axis and the scalar quantity of the waveform pattern is taken on the Y axis to represent one cycle in the X axis direction. The scalar amount in the Y-axis direction, that is, the quantized amplitude value for every 1/256 period when divided into 256 equal parts is stored in advance in the memory 68 as a digital value. Therefore, one cycle of the sine wave waveform data having an arbitrary amplitude value is configured as digital value data representing 256 quantized amplitude values (scalar amount). That is, one one
Each of the sine wave waveform data relating to one sine wave waveform pattern is composed of 256 pieces of digital value data (quantized amplitude values).

In this embodiment, a 1 Mbit memory 68 having a data bit width of 16 bits is used as a storage element for the sine wave waveform data. Part 1
Using the lower 8 bits of the memory address specified by the 6-bit width, the sine wave waveform pattern for one cycle described above
The six quantized amplitude values (scalar amounts) are stored as digital value data. Further, the waveform numbers (0 to 255) that determine the amplitude value of the sine wave waveform pattern are stored using the remaining upper 8 bits of the memory address.
As described above, the waveform numbers include 256 kinds of waveform patterns having different amplitude values, from 0 to 25 in ascending order of amplitude value.
Numbered up to number 5.

As described above, 256 digital value data are stored for each of the 256 types of waveform patterns. That is, the total of 256 × 256 =
65,536 pieces of data (16-bit length) are stored.

As described above, at each address (16-bit length) in the memory 68, the scalar quantity forming the sine wave waveform pattern is stored as a 16-bit digital value. Here, the waveform number data (0 to 255) specified by the upper 8 bits of the memory address is converted into digital value data of the quantized amplitude value (scalar amount) for one cycle of the sine wave waveform pattern specified by the lower 8 bits. All have the same number. As a result, one cycle of the sine wave waveform pattern represents a sine wave waveform pattern having an arbitrary amplitude value defined by the waveform number data. That is, specifically describing, for example, 256 data for one cycle of the sine wave waveform pattern having the smallest amplitude value defined by the waveform number data 0 is stored in the addresses 0000H to 00FFH of the memory 68. become. In the memory space, data for one cycle of the sine wave waveform pattern will be stored as follows.

0000H to 00FFH ...... 1 cycle of sine wave waveform data of waveform number 0 (minimum amplitude value) 0100H to 01FFH ...... 1 cycle of sine wave waveform data of waveform number 0 200H to 02FFH ...... Sine of waveform number 2 Waveform data 1 cycle 0300H to 03FFH ...... Waveform number 3 sine wave waveform data 1 cycle FE00H to FEFFH ...... Waveform number 254 sine wave data 1 cycle FF00H to FFFFH ...... Waveform One cycle of the sine wave waveform data of number 255 (maximum amplitude value) As described above, the amplitude value of the sine wave waveform pattern is proportional to the amplitude value of the inverter output current waveform, that is, the inverter output. Therefore, in determining the magnitude of the amplitude value of the waveform pattern, the inverter output is obtained as a result of PWM control based on the waveform pattern.
Here, the amplitude value of the waveform pattern with which the rated output of the inverter is obtained is defined as the maximum value of the amplitude value (the amplitude value of the sine wave waveform pattern of waveform number 255). Then, the sine wave waveform pattern of waveform number 0 is defined as the minimum value of the amplitude values obtained by dividing the maximum value of the amplitude values into 256 equal parts.

Further, the amplitude value of waveform number 0 is doubled, the amplitude value of waveform number 1 is tripled, the amplitude value of waveform number 2 is multiplied by 255, and the amplitude value of waveform number 254 is multiplied by 255. The multiplied value is used as the amplitude value of the waveform number 255. As described above, the 1M-bit memory 68 stores 256 sinusoidal waveform patterns represented by the digital value data of the quantized amplitude value (scalar amount) obtained by dividing one cycle into 256. The 256 waveform patterns have different amplitude values.

Next, a method of reading the sine wave waveform data stored in the memory 68 will be described.

As described above, the sine wave waveform data in the memory 68 is stored as a quantized amplitude value (scalar amount) at each designated address, and this address is read when reading the sine wave waveform data. Sine wave waveform data is formed by sequentially designating at fixed time intervals and reading the data stored in each address at the fixed time intervals.

Here, when the memory address is designated, the lower 8 bits (A0 to A7) of the address indicate the storage location of the digital value data of the quantized amplitude value (scalar amount) which constitutes one cycle of the waveform pattern. Has been decided and the top 8
As described above, the bits (A8 to A15) determine the storage location of the waveform number indicating the magnitude of the amplitude value of the waveform pattern. From the above, the input terminals A0 to A7 that determine the lower 8-bit address of the memory 68
When a value from 0 (00H) to 255 (FFH) is sequentially input at fixed time intervals, digital value data of a quantized amplitude value (scalar amount) having a resolution of 16 bits for each input address. Is output terminal Q0
It is sequentially output to Q15 at fixed time intervals. Then, the sine wave waveform pattern signal S15 is output from the output terminals Q0 to Q15 in the form of an aggregate of digital value data of these output quantized amplitude values (scalar amounts).

Further adding here, input terminals A8 to A1 for determining the address of the upper 8 bits of the memory 68.
When the value 0 (00H) is input to 5, the amplitude value of the sine wave waveform pattern signal S15 output to the output terminals Q0 to Q15 is the minimum value, and the value 255 (FFH) is input. At this time, the amplitude value of the output sine wave pattern signal S15 is the maximum value.

The counter circuit 67 gives the lower 8 bits of the address to the memory 68.

The counter circuit 67 receives a clock of an arbitrary frequency output from the clock / frequency divider 66 and functions as an 8-bit binary counter. Therefore, from the clock / divider circuit 66, for example, (60 × 2
When a clock having a frequency of 56 × 1/2) Hz is input to the counter circuit 67, 1 / (60 × 25)
6) Output terminals Q0 to Q of the counter circuit 67 every sec
7 changes so that the contents are incremented by one.

The output terminals Q0 to Q7 of the counter circuit 67 are connected to the input terminals A0 to A7 of the memory 68 for determining the lower 8-bit address. Therefore, the contents of the output terminals Q0 to Q7 of the counter circuit 67 are 1 / (60 × 25).
6) One is added every sec, which means that the lower 8-bit address of the memory 68 is 1 / (60 × 256)
The value is incremented by 1 from 0 to 255 every sec and changes, and as a result, the memory 68 is 1 /
Addresses XX00H to XXFFH are designated at intervals of 1 / (60 × 256) sec during 60 sec. The 256 quantized amplitude value (scalar amount) digital value data stored in the respective addresses are sequentially read from the output terminals Q0 to Q15 of the memory 68, and 60
It constitutes one cycle of the sine wave waveform pattern signal S15 of Hz.

Here, the lower 8-bit clear terminal CLR
Is a synchronization signal S1 that detects a zero-cross point of the system voltage V _CS detected by the synchronization signal detector 47 (see FIG. 1).
0 is input via the CPU 60 of the signal calculation processing section 46. Since the counting operation of the counter circuit 67 is cleared every time the synchronizing signal S10 is input, the reading operation of the waveform pattern described above is performed while the reading operation of the sine wave waveform data is reset every cycle of the system voltage V _CS. Will be repeated. Therefore, the system voltage V is always
An inverter output current in the same phase as _CS (without phase shift) can be supplied to the commercial system power supply 34 via the commercial transformer 33.

Further, a case will be described in which the maximum power point tracking control is favorably performed so that the maximum power can always be taken out even if the voltage-current characteristics of the solar cell 32 fluctuate. When using the system interconnection inverter 31 as described above in combination with a solar cell 32, the action of the signal processing unit 46, an input voltage signal V _DC from a solar cell 32 S11 and I
_{The DC} input current signal S12 is sampled at an arbitrary cycle, these analog signals are converted into digital quantities, and the product of both digital quantities is calculated to obtain the DC input power value, that is, the solar cell output power value. At this time, the sampling intervals of the input voltage signal S11 and the input current signal S12 are arbitrary. Instead of the input voltage signal S11 and the input current signal S12 for the inverter 31, the output voltage signal S13 and the output current signal S14 may be used to obtain the power value.

The obtained power value is always stored once in the memory. Then, the power value that is the current calculation result of the next sampling is compared with the previous power value stored in the memory. Based on the magnitude relationship, it is determined whether the waveform number described above is increased by 1 or decreased by 1. Then, instead of the previous power value, the current power value is stored in the memory, and further compared with the next power value obtained by the next sampling.

By repeating the above operation, the waveform number is increased until the maximum power of the solar cell 32 is obtained, and the output of the grid interconnection inverter 31 is changed to the solar cell 3
Increase to a value commensurate with the maximum output of 2.

Of course, since the soft start control is required when the inverter 31 is started, the waveform number is 0.
Start from (the minimum amplitude value of 1/256 of the rated output). At this time, the signal calculation processing unit 46 calculates the input power value when the waveform number is 0, but sets the initial value 0 W as the previous power value to be compared, and performs the control at startup without any trouble. Is done.

Memory 6 for determining the amplitude value of the waveform pattern
For the higher 8 bit address of 8, the 8-bit data bus 70 of the CPU 60 forming the signal arithmetic processing unit 46 is used.
Directly specify with (D0 to D7). The details will be described below.

I / O request signal I from CPU 60
The ORQ and the write signal WR are output, and the logical sum of these signals is input to the enable terminal E of the latch circuit 65 as a latch signal. As a result, the CPU 60
8-bit data on the data bus 70 (D0 to D7) designated by is latched from the input terminals D0 to D7 of the latch circuit 65 to the output terminals Q0 to Q7. Then, it is input from the output terminals Q0 to Q7 of the latch circuit 65 to the input terminals A8 to A15 of the upper 8 bits of the memory 68.

From the above, the 8-bit data on the data bus 70 when the CPU 60 accesses the address of the waveform pattern storage section 48 by the write command is stored in the memory 68.
Are input to the higher 8-bit addresses A8 to A15. That is, the 8-bit data (one of 0 to 255) written from the CPU 60 to the upper 8-bit address A8 to A15 of the memory 68 of the waveform pattern storage unit 48 is the magnitude of the amplitude of the sine wave waveform pattern signal S15 ( Only one out of 256 ways). The 8-bit data output from the CPU 60 to the data bus 70 is determined depending on whether the current power value is increasing or decreasing as compared with the previous power value.

In the above description, the synchronization signal S10 output from the synchronization signal detector 47 is a signal obtained by detecting the zero cross point of the sine wave waveform of the voltage V _CS of the power system as shown in FIG. The synchronizing signal S10 is inputted from the CPU 60 to the clear terminal CLR of the counter circuit 67, and the synchronizing circuit S10 resets the counter circuit 67. This is because the inverter 31 can always output a current having the same phase as the voltage waveform of the commercial system power source 34 by resetting the reading count of the sine wave waveform data for each cycle of the sine wave voltage waveform of the commercial system power source 34. This is because it is controlled. The synchronization signal S10 is the timing for reading the sine wave waveform data in this way. In the present embodiment, the synchronization signal S1 is used.
The readout of the sine wave waveform data is started for one cycle from the zero cross point with 0 as a trigger. And repeat that. Thus, the grid interconnection inverter 31 can supply the commercial grid power supply 34 with an output current whose phase matches the grid voltage.

FIG. 5 shows the output characteristics of the solar cell 32. The horizontal axis represents voltage and the vertical axis represents current. Insolation intensity (E1,
E2, E3) are used as parameters. The output characteristics change every moment due to changes in solar radiation intensity and element temperature. Here, in FIG. 5, assuming that the output characteristic curve when the solar radiation intensity is E1 (1 kW / m ² ) and the element temperature is 25 ° C. is a,
According to the impedance of the load provided on the output side of the solar cell, the output voltage value and the output current value of the solar cell are the output characteristic curve a.
Change above. Therefore, the output power value of the solar cell also changes.

Here, assuming that the impedance of the load provided at the output end of the solar cell is R, the output voltage value and output current value of the solar cell at this time are points p which are the intersections of the characteristic curve a and the load impedance straight line R. It becomes the value in. This point p
Is called the operating point of the solar cell.

By changing the load impedance R, the operating point p of the solar cell moves on the output characteristic curve a, and the output voltage value and output current value of the solar cell change.

A grid interconnection inverter 31 is provided as a load on the solar cell 32 itself. Changing the impedance R of the grid interconnection inverter 31 means
That is, it can be realized by changing the above-mentioned waveform number (amplitude value of sine wave waveform data). This is because the duty ratio of the switching pattern signal S18 which is the source of the gate pulse signal S19 for switching the FET bridge 38 in the inverter 31 can be changed by changing the waveform number.

From this, by changing the above waveform number, the operating point p on the output characteristic curve a of the solar cell 32 can be controlled to an arbitrary point as shown in FIG. That is, the load impedance is changed from R ₀ to R ₁ by increasing the amplitude value of the sinusoidal waveform pattern signal S15 read from the waveform pattern storage unit 48 in the grid interconnection inverter 31, and the operating point is changed from p ₀ to p _1. To decrease the operating point voltage of the solar cell 32 from V ₀ to V ₁ (the current increases), or
By decreasing the amplitude value of the sinusoidal waveform pattern signal S15, the load impedance is changed from R ₀ to R ₂ , the operating point is changed from p ₀ to p _2, and the operating point voltage of the solar cell 32 is changed from V ₀ to V _2. Can be increased (current reduced). In addition, R ₁ <R ₀ <R ₂ , V
₁ <V ₀ <V ₂ . The larger the amplitude value, the lower the output voltage of the solar cell 32, and the smaller the amplitude value, the higher the output voltage. In this way, by controlling the amplitude value of the sine wave waveform pattern signal S15, the output power value of the solar cell 32 can be arbitrarily adjusted.

Next, a detailed operation example of the maximum power point tracking control will be described with reference to FIG. FIG. 6 shows a solar cell output characteristic curve in which the horizontal axis represents voltage and the vertical axis represents power.

As described above, the grid interconnection inverter 31
Basically, the duty ratio of the gate pulse signal S19 of the FET bridge 38 is controlled so that the output current of the inverter 31 becomes equal to the current value given by the amplitude value of the sine wave waveform data defined by the waveform number. That is.
Here, when determining the waveform number of the sine wave waveform data, the signal calculation processing unit 46 determines the waveform number of the sine wave waveform pattern that matches the maximum output power of the solar cell 32.
That is, as shown in FIG. 6, the output power P _B of the solar cell 32 in this waveform number X _B (the input power of the inverter 31), the waveform number of the last stored X _A (X _A <X
The values of the output power P _{A in B} ) are compared.

Regarding the voltage, the current voltage V _B is lower than the previous voltage V _A , but the current output power P _B is larger than the previous output power P _A , so there is only one waveform number. Increase to X _C. Although the voltage drops to V _C, the output power P _C of the solar cell 32 is higher than the previous power P _B. Therefore, the waveform number is further increased by one to be X _D. The voltage drops to V _D. However, since the output power P _{D of} this time is smaller than the stored output power P _{C of the} previous time, the waveform number is decreased by one. Then, the operating voltage returns to V _C , and the output power is P _C
Return to.

As described above, the waveform number is X _A → X _B → X
_By changing the order of _C → X _D → X _C , the solar cell 32
Output power changes in the order of P _A → P _B → P _C → P _D → P _C. The operating point of the solar cell 32 moves to A → B → C → D → C toward the maximum power point. In addition, in FIG. 6, the movement amount is set large for the sake of easy understanding of the description.
The difference in the amplitude value of the first step of the waveform number that is changed in one control is set to a minute value as long as the control speed and the control accuracy allow, which leads to the improvement of the control characteristic of the maximum power point tracking control.

As described above, the control is performed to follow the waveform number (sine wave waveform pattern proportional to the amplitude value of the output current) of the grid interconnection inverter 31 that maximizes the output power of the solar cell 32. In the embodiment, this control is realized by the signal arithmetic processing unit 46 shown in FIG. 1 by software control using a microcomputer.

Through the above series of operations, the grid interconnection inverter 31 can determine the solar cell operating point at any point on the solar cell output characteristic curve by controlling the waveform number. The inverter 31 can always operate by tracking the maximum power point that can be taken out from the solar cell 32.

Further, the grid interconnection inverter 31 can be controlled not only by tracking the maximum point of the solar cell output by the above control method, but also by taking out an arbitrary solar cell output. This corresponds to the following. Since the characteristic curve of the solar cell itself changes when the solar radiation intensity and the element temperature change, the operating point p of the solar cell moves even if the load impedance R does not change. Further, even if the solar radiation intensity and the element temperature are constant, the operating point p of the solar cell moves if the impedance R of the load is changed. Therefore, from the signal calculation processing unit 46 to the solar cell 32
Output power value is designated, and the waveform number is determined so as to match this power value, the input impedance of the inverter 31 takes an impedance R _X corresponding to the waveform number, and the desired power value is obtained as desired. It can be controlled at the operating point p _x where a matching solar cell output is obtained.
The details will be described below.

When the operating point of the solar cell 32 is positively moved on the output characteristic curve to freely adjust the inverter output power at a point smaller than the maximum power point, the CPU 60
The address of the waveform pattern storage unit 48 viewed from above is preset to an arbitrary value determined by 8-bit data by using the address setting switch 61. Then, when the CPU 60 uses the 8-bit address bus 69 (A0 to A7) to access a preset address of the waveform pattern storage unit 48 by a write command, the address match from the P = Q terminal of the address decoder circuit 62. Signal is output,
Further, the CPU 60 outputs an I / O request signal IORQ.
And a write signal WR are output, and the logical sum of these signals is input to the enable terminal E of the latch circuit 65 as a latch signal. As a result, the 8-bit data on the data bus 70 (D0 to D7) designated by the CPU 60 is latched from the input terminals D0 to D7 of the latch circuit 65 to the output terminals Q0 to Q7. Then, it is input from the output terminals Q0 to Q7 of the latch circuit 65 to the input terminals A8 to A15 of the upper 8 bits of the memory 68.

From the above, the 8-bit data on the data bus 70 when the CPU 60 accesses the address of the waveform pattern storage section 48 by the write command is the memory 68.
Are input to the higher 8-bit addresses A8 to A15. That is, the 8-bit data (one of 0 to 255) written from the CPU 60 to the upper 8-bit address A8 to A15 of the memory 68 of the waveform pattern storage unit 48 is the magnitude of the amplitude of the sine wave waveform pattern signal S15 ( Only one out of 256 ways). The choice depends on the 8-bit data, which can be arbitrarily determined.

By using the above method, the CPU
The reference numeral 60 sets the waveform number indicating the magnitude of the amplitude value in the address setting switch 61 of the waveform pattern storage unit 48 and writes the address of the waveform number into the address decoder circuit 62 via the address bus 69. The sine wave waveform data having different amplitudes can be freely read. For this reason, the CPU 60 has a sufficient arithmetic processing capacity of about 8 bits, and it is not necessary to use an expensive CPU capable of high-speed processing. Further, since the amplitude value of the read sine wave waveform data is proportional to the amplitude value of the output current waveform of the inverter 31 and the inverter output power, the upper 8-bit address A8 to A15 of the memory 68 of the waveform pattern storage unit 48, the sine wave. By writing a waveform number from 0 to 255 (00H to FFH) indicating the amplitude value of the waveform data, it is possible to realize a grid-connected current control type inverter that can freely control the inverter output power.

Although the data of the sine wave pattern is stored in the unit of one cycle in the above embodiment, it may be stored in the unit of ½ cycle or in the unit of ¼ cycle and may be corrected after the reading. Good.

As described above in detail, according to the present invention,
The output power control in the grid interconnection inverter 31 can be easily performed, and the maximum power point tracking control of the solar cell 32 can be easily realized. Since most of the signal processing is digitally processed, the control circuit 45 can be simplified and a high-quality output current waveform with less harmonic distortion can be obtained. In addition, it is possible to effectively use natural energy, which is electric power generated by the solar cell 32, to drive various household appliances such as air conditioners and refrigerators. When the natural energy is low, it is supplemented with the power from the grid power supply,
When there are many, the power is returned to the grid power supply. Alternatively, by appropriately controlling the power, it is possible for the user to provide usability as usual without providing the distinction between the power from the solar cell and the power from the grid power source, and provide a more comfortable living environment. . From the perspective of the power supply side, the widespread use of this system has the effect of suppressing the peak power consumption especially during the daytime in summer. This is extremely effective for both consumers and suppliers of electricity. Also, the use of environmentally friendly natural energy can be expected to have a great effect on the global environment.

[0075]

As described above, according to the present invention, the sinusoidal waveform pattern signal to be compared with the inverter output current signal to generate the sinusoidal error signal which is the basis of the pulse width modulation switching pattern signal. As, the sine wave waveform data as digital value data is stored in advance in the waveform pattern storage means and is read out for use.
Since the calculation of the power value that determines the waveform number that is the basis for reading is also performed digitally, the control circuit can be simplified and the distortion rate of the inverter output current waveform can be suppressed to ensure good power quality.

Further, not only accurate maximum power point tracking control corresponding to the output power of a DC power source such as a solar cell at any given time can be performed, but also an arbitrary amount of power can be extracted within the range below the maximum power point. It can be easily realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a grid-connected photovoltaic power generation system to which a grid-connected inverter according to an embodiment of the present invention is applied.

FIG. 2 is a block diagram showing a detailed internal configuration of a waveform pattern storage section in the example.

FIG. 3 is a waveform diagram of 256 types (most of which are omitted) of a sine wave waveform pattern having different amplitude values.

FIG. 4 is a waveform diagram showing a relationship between a power system voltage and a synchronization signal.

FIG. 5 is a diagram showing an output characteristic curve of a solar cell.

FIG. 6 is an explanatory diagram showing a detailed operation of maximum power point tracking control.

FIG. 7 is a block diagram showing a grid-connected photovoltaic power generation system to which a conventional grid-connected inverter is applied.

[Explanation of symbols]

31 ... Grid interconnection inverter 32 ... Solar cell 33 ... Commercial transformer 34 ... Commercial grid power supply 35 ... Reverse current prevention diode 36 ... Noise filter 37 ... Input capacitor 38 ... FET bridge 39 ... Output choke coil 40 ... smoothing capacitor 41 ... interconnection relay 42 ... noise filter 43 ... input current detection current transformer 44 ... output current detection current transformer 45 ... control circuit 46 ... signal arithmetic processing unit 47 ... ... Synchronization signal detection unit 48 ... Waveform pattern storage unit 49 ... Error amplifier 50 ... PWM modulation control unit 51 ... Gate drive signal generation circuit 60 ... CPU 61 ... Address setting switch 62 ... Address decoder circuit 65 ... … Latch circuit 66 …… Clock / divider circuit 67 …… Counter circuit 68 …… Memory 69 …… Address Bus 70 ... Data bus S10 ... Synchronization signal S11 ... Input voltage signal S12 ... Input current signal S13 ... Output voltage signal S14 ... Output current signal S15 ... Sine wave waveform pattern signal S17 ... Sine wave error signal S18: Switching pattern signal S19: Gate pulse signal

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiroshi Nakata 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka

Claims (1)

[Claims] 1. A means for controlling ON / OFF of a bridge of a switching element based on a switching pattern signal to convert DC power input from a DC power supply such as a solar cell into AC power and supplying the AC power to a commercial system power supply. Means for generating the switching pattern signal by pulse width modulation based on the wave error signal, means for detecting a zero cross point of the system voltage and generating a synchronizing signal, and a plurality of means proportional to the amplitude value of the rated output current waveform of the inverter. Sine wave waveform data with different amplitude values, with each amplitude value having a waveform number in the order of the magnitude of the amplitude value, and for each sine wave waveform with each waveform number, a large number in the time axis direction, etc. Waveform pattern storage means for pre-storing digital value data having individual quantized amplitude values at divided time positions, and detection at arbitrary cycles The means for digitally calculating and storing the power value based on the input current, input voltage or output current, and output voltage of the inverter is compared with the previous power value and the current power value, and the power value increases. When the power value is decreasing, the waveform number whose amplitude value is one step higher is designated, and when the power value is decreasing, the waveform number whose amplitude value is one step lower is designated, and the waveform number is read out to the waveform pattern storage means as a read signal. A means for giving a sine wave waveform pattern signal from the waveform pattern storage means based on the read signal at the timing of the synchronization signal, and starts the quantized amplitude value of the determined sine wave waveform pattern in a predetermined minute cycle. Means for continuously changing and reading out as a sine wave waveform pattern signal, and an invertor detected as the sine wave waveform pattern signal read from the waveform pattern storage means. And a means for generating the sine wave error signal from an error from the output current signal.