JPH055866A - Method for checking active matrix substrate - Google Patents

Abstract

PURPOSE:To check an active matrix substrate with a high precision and to easily correct a defect position by quickly and surely checking not only driving circuits and bus lines but also picture element transistors and checking them in the state of the active matrix substrate to surely specify the defective position. CONSTITUTION:Respective picture element transistors 4 in a pertinent row are turned on by selection of a gate bus line 1, and source bus lines 2 are successively selected in this horizontal scanning period to write prescribed video signals in respective picture element capacities 3 in order, and next, respective picture element transistors 4 in the pertinent row are made conductive by selection of the gate bus line 1, and respective source bus lines 2 are successively selected in this horizontal scanning period to read out video signals held in picture element capacities 3 in order, and these read signals are checked to discriminate whether the active matrix substrate is defective or not.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting an active matrix substrate in a liquid crystal display device or the like.

[0002]

2. Description of the Related Art The structure of a conventional active matrix substrate incorporating a drive circuit in a liquid crystal display device will be described with reference to FIG. In the active matrix substrate, a large number of gate bus lines (scanning signal lines) 101 and source bus lines (data signal lines) 10 are formed on the substrate surface so as to intersect each other vertically and horizontally.
The pixel capacitors 103 and the pixel transistors (switching elements) 104 are arranged in a matrix at each intersection of the two. Each gate bus line 101 is driven by a gate drive circuit 105 and controls ON / OFF of each pixel transistor 104 in the row. The source bus line 102 is adapted to be connected to one of the video signal lines 108 via an analog switch 107 whose ON / OFF is controlled by a source drive circuit 106. Also, source bus line 1
02 is connected to the corresponding picture element capacitor 103 via each picture element transistor 104 in the column. further,
Each source bus line 102 has an additional capacitance 10
9 is connected, and the wiring 110 is configured so that the other electrode of each pixel capacitor 103 and the other electrode of the additional capacitor 109 have the same reference potential.

In the above-mentioned active matrix substrate, first, the gate drive circuit 105 sequentially outputs an ON signal to each gate bus line 101, and all the pixel transistors 104 in the row of the gate bus line 101 to which this ON signal is output are turned ON. And Also, it is turned on for the gate bus line 101 of 1
While the signal is being output, the source drive circuit 106 sequentially outputs an ON signal to each analog switch 107. Then, the video signal line 108 corresponding to the source bus line 102 connected to the turned-on analog switch 107.
Is connected to and is turned on via this source bus line 102.
The video signal is written in the picture element capacitor 103 connected to the picture element transistor 104. Further, the gate drive circuit 105 turns on the video signal written in the pixel capacitance 103 in this way to the gate bus line 101 of another row.
While the signal is being output, the pixel transistor 104 is O
It is held by FF. Then, when the gate drive circuit 105 finishes outputting the ON signals to the gate bus lines 101 of all the rows, the ON signals are sequentially output again from the first row, and this operation is repeated thereafter.

The transmittance of the liquid crystal depends on the effective value of the applied voltage during one cycle of this operation. Therefore, in order to improve the display quality of the liquid crystal display device, the video signal is sufficiently written in each pixel capacitor 103, and
It is necessary to reduce the leak current as much as possible so that the electric charges of the above are retained.

The above-mentioned active matrix substrate can be easily inspected for defects by optical inspection after it can be actually driven as a liquid crystal display device by combining it with a counter substrate via a liquid crystal. You can However, if it is determined that the active matrix substrate is defective in this state, it is no longer possible to correct the defective portion, and the process of assembling with the counter substrate is completely wasted. Therefore, it is necessary to inspect the active matrix substrate at a stage after the formation process of the pixel transistors 104 and the like, correct the defective portion if possible, and send it to the assembly process with the counter substrate. There is.

[0006]

Therefore, in order to inspect such an active matrix substrate before assembling, it is conceivable to form inspection circuits 111 to 114 as shown in FIG. 7 on the substrate. Inspection circuit 111, 112
Outputs the output of the final stage of the shift register in the gate drive circuit 105 and the source drive circuit 106 to the inspection pad 111.
a, 112a. Therefore, by operating the gate drive circuit 105 and the source drive circuit 106 while monitoring the outputs of these inspection pads 111a and 112a, it is possible to inspect the quality of these circuits.

The inspection circuit 113 is a circuit in which each gate bus line 101 is collectively connected to the inspection pad 113b via the switch 113a. Furthermore, the inspection circuit 114 determines that each source bus line 1
02 is a circuit configured to be collectively connected to the inspection pad 114b via the switch 114a. Further, ON / OFF of these switches 113a and 114a is controlled by the inspection pads 113c and 114c. Therefore, for example, when inspecting the gate bus line 101, the inspection pad 113c is turned on.
When a signal is applied to turn on the switch 113a and the gate drive circuit 105 is operated, a defect such as disconnection can be found from the output of the inspection pad 113b. Also,
When inspecting the source bus line 102, an appropriate signal is added to the video signal line 108, and the inspection pad 11
If an ON signal is applied to 4c to turn on the switch 114a and operate the source drive circuit 106, a defect such as a disconnection can be found from the output of the inspection pad 114b.

However, this improved inspection method only inspects the operation of the gate drive circuit 105 and the source drive circuit 106 and the quality of the gate bus line 101 and the source bus line 102. However, in the active matrix substrate, a huge number of pixel transistors 104
Therefore, the quality of the pixel transistor 104 has a greater effect on the manufacturing yield. Moreover, the inspection circuits 113 and 11 used to inspect the gate bus line 101 and the source bus line 102.
Since 4 has the switches 113a and 114a, it is not uncommon for these transistors to fail, and further, these switches 113a and 114a later.
In some cases, the process of separating the

Therefore, the above-described inspection method has a problem in that the pixel transistor 104, which accounts for a large proportion of defects in the active matrix substrate, cannot be inspected and cannot be sufficiently inspected. Moreover, the inspection circuits 113, 1
There is also a problem that the yield may be worsened due to the defect of 14 itself and the inspection cost is high.

In view of the above circumstances, the present invention makes it possible to inspect not only the drive circuit or the bus line but also the picture element transistor by reading out the data once written in each picture element capacitance and checking it. It is an object of the present invention to provide an inspection method of an active matrix substrate capable of surely detecting.

[0011]

According to the inspection method of the present invention, a pixel capacitor is connected to each intersection of a plurality of scanning signal lines and data signal lines formed by crossing each other in the vertical and horizontal directions through a switching element. In the method of inspecting an active matrix substrate, each switching element in the corresponding row is made conductive by selecting the scanning signal line, and during this period, a predetermined video signal is sequentially written in each pixel capacitance by sequentially selecting each data signal line. After each switching element is once cut off, each switching element in the row is made conductive again by selecting the scanning signal line, and during this period, each data signal line is sequentially selected and held in each pixel capacitance. It includes reading video signals in sequence and determining pass / fail by inspecting the read signals. Serial object is achieved.

It is preferable that at least one of a scanning signal line driving circuit for driving the scanning signal line and a data signal line driving circuit for driving the data signal line is provided on the active matrix substrate. ..

It is preferable that writing and reading of the video signal be performed through a video signal terminal.

[0014]

According to the present invention, first, by selecting the scanning signal line, each switching element in the row is made conductive, and during this period, the respective data signal lines are sequentially selected to sequentially write a predetermined video signal in each pixel capacitance. .. Then, as in the case of normal display, the video signal is held as an electric charge in each pixel capacitance.

Then, each switching element is once cut off, and, for example, the video signal is also written in each pixel capacitance of another row, and then each switching element of this row is made conductive by selecting the scanning signal line again. By sequentially selecting each data signal line, the video signals held in each picture element capacitance are sequentially read. This video signal can be read from the video signal line used for writing. Further, the video signal is sequentially read out for each held picture element capacity.

The video signal read in this way is checked for good or bad operation of the scanning signal line drive circuit or the data signal line drive circuit for selecting the passage route of the video signal by inspection such as comparison with the original video signal. And the quality of the scanning signal line,
In addition, it is possible to detect the quality of the data signal line serving as the passage and the quality of the operation of the analog switch and the switching element. Moreover, by detecting the position on the readout time series of the video signal in which the abnormality appears, the pixel capacity holding the video signal can be specified. Therefore, for example, when a defective switching element is the cause, the defective pixel transistor can be specified. Further, when an abnormality occurs in the video signal held by the picture element capacitance on a specific row or column, a bus line on the path of the video signal, an analog switch, or a drive circuit for selecting the path. It can be determined that the cause is a defect.

As a result, according to the inspection method of the present invention, it is possible to inspect not only the drive circuit and the bus line but also the switching element in the state of the active matrix substrate according to the actual drive state, and further, the defective portion. Will be able to be reliably identified.

When the scanning signal line drive circuit or the data signal line drive circuit is not formed on the active matrix substrate, it is difficult to apply a signal to each signal line when performing the above-described inspection. However, if the scanning signal line driving circuit or the data signal line driving circuit is formed on the same substrate, there is an advantage that signals can be easily applied and the number of signal lines to be prepared can be reduced.

[0019]

EXAMPLES The present invention will be described below with reference to examples.

The active matrix substrate to be inspected in this embodiment is, as shown in FIG. 1, a gate bus line (scanning signal line) 1 and a source bus line (data) formed in n rows and m columns on the substrate surface. At each intersection of the (signal line) 2, the pixel capacitance 3 and the pixel transistor (switching element), respectively.
4 and 4 are arranged in a matrix. Picture element capacity 3
Is for holding the video signal written through the pixel transistor 4, and the liquid crystal is driven by the charge of the video signal. Each gate bus line 1
Are driven by the gate drive circuit 5 to control ON / OFF of each pixel transistor 4 in the row. The gate drive circuit 5 is composed of a shift register formed on the same substrate, is driven by an external power supply, and is also controlled by an external start signal and clock.

The source bus line 2 is a source drive circuit 6
Analog switch 7 whose ON / OFF is controlled by
Is connected to any one of the three video signal lines 8 via. Further, the source bus line 2 is connected to each picture element capacitor 3 via the picture element transistor 4 in the column. Further, each source bus line 2 has a parasitic capacitance, and if this is not enough, the additional capacitance 9 is added as necessary.
And the other electrode of each picture element capacitance 3 and the other electrode of this additional capacitance 9 are connected to the ground GND by the wiring 10. Further, the video signal can be held on the source bus line 2 by the parasitic capacitance and the additional capacitance 9. The source drive circuit 6 is composed of a shift register formed on the same substrate, is driven by an external power supply, and is also controlled by a start signal and a clock from the outside. The three video signal lines 8 are externally connected to the RG via the terminals 8a.
It is a signal line for inputting video signals of the respective three primary colors of B. Further, the terminal 8b is used to input a video signal for inspection. The numeral 11 indicates a parasitic capacitance on the video signal line.

FIG. 2 shows an equivalent circuit of the write / read path for one picture element capacitor 3 in the active matrix substrate. The pixel capacitor 3 is connected to the source bus line 2 via a pixel transistor 4 controlled by the gate bus line 1. Source bus line 2
Has an additional capacitance 9 and a parasitic capacitance (not shown). The source bus line 2 is connected to the video signal line 8 via an analog switch 7 controlled by the source drive circuit 6. The video signal line 8 has a parasitic capacitance 11. And when inspecting the active matrix substrate,
The buffer circuit 13, the A / D converter 14, and the computer 15 are connected to the terminal 8 a of the video signal line 8 via the switch 12. Further, a predetermined video signal is input to the terminal 8b of the video signal line 8 via the switch 16. In addition, 17 shows the parasitic capacitance of the circuit for inspection connected to the terminal 8a.

When inspecting the above active matrix substrate, first, as shown in FIG. 3, the switch 16 is connected based on the H level of the control signal Rw, and the AC pulsed video signal R is input to the terminal 8b. To do. In addition, here
Although only the video signal R is shown as a representative of the three types of RGB video signals, other video signals can be inspected by the same procedure. Next, the gate driving circuit 5 is operated to sequentially send a gate signal to the respective gate bus lines 1 (Y _{1 to} Y _n ) to be at the H level for one horizontal scanning period (1H). Video signals are sequentially written to P (1,1) to P (1, n)). Then, when a gate signal is sent to all the gate bus lines 1 and scanning for one vertical scanning period (field) is completed, the writing operation is completed.

Only the operation of one horizontal scanning period in the vertical scanning period shown in FIG. 3 will be described in more detail with reference to FIG. Note that one horizontal scanning period is 80 μs here. During each horizontal scanning period, the source drive circuit 6 is operated to send a control signal (X _{1 to} X _m , but the drawing is shown only every two video signals R in the drawing) to the analog switch 7, This is sequentially turned on. Then, the video signal from the video signal line 8 is charged in the additional capacitance 9 of the source bus line 2 through the analog switch 7. At this time, since one picture element transistor 4 already connected to one of the gate bus lines 1 intersecting with the source bus line 2 is turned on, the picture signal is also supplied to the picture element capacitor 3 of the picture element. Written. However, as shown in FIG. 4, the source bus line 2 (S _{1 to} S _m ) is immediately charged with the video signal when the analog switch 7 is turned on, but this pixel through the pixel transistor 4 is charged. Capacity 3 (P
Writing to (1,1) to P (m, 1)) is continued even after the analog switch 7 is turned off because the time constant is long. Therefore, in order to secure the writing time of the pixel capacitor 3 in which writing is performed at the end of one horizontal scanning period, the period until the source drive circuit 6 outputs the first control signal and the last control signal are output. There is plenty of time left for later periods.

When the video signals are written in all the pixel capacitors 3 as described above, the switch 16 is opened and the switch 12 is connected based on the L level of the control signal Rw, as shown in FIG. The signal is output from the terminal 8a to the buffer circuit 13. The control signal Rw is
As will be described later with reference to FIG. 6, the L level is not actually completely achieved, and H / L is repeated at high speed. Also, terminal 8
The video signal R of b is fixed to the L level of the ground GND. Next, the gate drive circuit 5 is operated to sequentially send a gate signal to the respective gate bus lines 1 (Y _{1 to} Y _n ) which is at the H level for one horizontal scanning period. Then, the picture element transistor 4 connected to each gate bus line 1 to which the gate signal is sent is turned on, and the video signal held in the picture element capacitor 3 is read out to the source bus line 2. Become.
Then, when the gate signal is sent to all the gate bus lines 1 and the scanning for one vertical scanning period is completed, the read operation is completed.

1 in the vertical scanning period shown in FIG.
The operation during the horizontal scanning period will be described in more detail with reference to FIG. During each horizontal scanning period, the source driving circuit 6 is operated, the control signals (X _{1 to} X _m ) are sent to the analog switch 7, and these are sequentially turned on. Then, the video signals that have already been read from the picture element capacitance 3 to the source bus line 2 reach the video signal line 8 sequentially through the analog switch 7, pass through the terminal 8 a and the switch 12, and then pass through the buffer circuit 1.
Sent to 3. Then, the video signal Rr amplified by the buffer circuit 13 is converted into a digital signal by the A / D converter 14 and input to the computer 15.
A control signal (X ₁ ~
X _m ) is output every two lines to the video signal line 8, so a certain amount of gap is opened between the front and rear control signals.
Therefore, each time the analog switch 7 is turned off due to the gaps between the control signals, the control signal Rw becomes H level, the switches 12 and 16 are switched, and the video signal remaining in the parasitic capacitance 11 of the video signal line 8 is switched. I am trying to erase.

The computer 15 sequentially stores the digital video signal Rr sent in time series in a predetermined memory and compares this with a predetermined pattern. If there is no abnormality in the operation of the gate drive circuit 5, the source drive circuit 6, the analog switch 7, and the pixel transistor 4 and no disconnection or the like occurs in the gate bus line 1 or the source bus line 2, this video signal Rr Is a periodic pulse as shown in FIG. 6, and it can be determined that the pulse is normal. However, for example, when some of the picture element transistors 4 do not operate normally, the pulse at the corresponding position in the time series in the video signal Rr is in a state of being missing, which allows the defect of the active matrix substrate to be detected. it can. Further, by detecting the time-series position where this pulse is missing in the video signal Rr,
The defective pixel transistor 4 can be identified,
This also facilitates correction work with a laser or the like.

Further, according to the inspection method of this embodiment, it takes a time of two vertical scanning periods to write and read the entire active matrix substrate, and the inspection can be completed in a short time of about 1/30 second. You can However, in the actual active matrix substrate, the pixel capacitance 3 is about 0.2 pF,
The additional capacitance 9 (including parasitic capacitance) of the source bus line 2 is about 5 to 10 pF, and the parasitic capacitance 11 of the video signal line 8 is about 10
It is about 20 pF. Therefore, when a video signal of 5 V is written, the read video signal r becomes about 40 mV, and although it is possible to detect a complete disconnection or leak, it may be difficult to detect a subtle defect. Therefore,
The writing / reading operation of the video signal in the two vertical scanning periods is repeated, for example, about 10 to 100 times, and the S / N ratio is improved by sequentially adding the video signals read from the same pixel capacity 3 by the computer 15, It is also possible to detect a subtle defect such as a leak in which the constant is approximately the same as the driving timing. Even in this case, the time required for all the inspections is only a few fractions of a second to a few seconds, and an efficient inspection can be performed.

As described above, according to the inspection method of this embodiment, the active matrix substrate is connected to the drive circuits 5 and 6.
In addition to the bus lines 1 and 2 and the like, the operation of the picture element transistor 4 can be inspected quickly and surely. Moreover, since the video signal is actually written in the picture element capacitor 3 to perform the inspection, it is possible to perform the efficient inspection collectively for all the functions involved in writing and holding the video signal. Further, if it is a defect for each picture element such as the picture element transistor 4, this position can be reliably identified, and if there is a defect in the drive circuits 5 and 6 or the bus lines 1 and 2, the read image is displayed. By investigating the distribution of abnormal points occurring in the signal, the defective points can be estimated with high accuracy. However, in order to improve the efficiency of the inspection, the drive circuits 5 and 6 may be separately inspected by another method.

In this embodiment, the video signal to be written in each picture element capacitor 3 is an AC pulse signal which is inverted every horizontal scanning period, and the holding operation of each picture element capacitor 3 is performed every time one row is written. However, the present invention is not limited to such a driving method. For example, a constant video signal is written in all the pixel capacitors 3 and then a holding operation is performed, and then the video signal is changed. It is also possible to read out sequentially.

In the present embodiment, the inspection switches 12, 16 and the buffer circuit 13 are connected to the outside of the active matrix substrate, but these circuits are also provided together with the gate drive circuit 5 and the source drive circuit 6. It is possible to form them on the same substrate and perform the inspection. The switches 12 and 16 can be composed of a CMOS circuit using a polycrystalline SiTFT. Buffer circuit 13
Can be configured by a circuit such as an operational amplifier or a source follower. The buffer circuit 13 has an input impedance higher than the ON resistance of the pixel transistor 4 and an input capacitance smaller than the pixel capacitance 3 so that the voltage gain is 1 or more, preferably the source for the pixel capacitance 3. If the ratio is larger than the capacity of the bus line 2 (additional capacity 9), highly accurate detection becomes possible.

Further, although the present embodiment has been described using the active matrix substrate having the three video signal lines 8, the present invention is not limited to this, and the control shown in FIG. Any configuration can be implemented as long as the parasitic capacitance 11 can be removed by the signal Rw.

In the equivalent circuit of FIG. 2, switches for refreshing the potential may be provided between the source bus line 2 and the ground and between the input part of the buffer 13 and the ground. In this case, these switches can be composed of CMOSFETs like the switches 12 and 16.

[0034]

As is apparent from the above description, according to the method for inspecting an active matrix substrate of the present invention, not only the drive circuit and the bus line but also the quality of the pixel transistor can be inspected quickly and surely. It is possible to perform high-level inspection, and moreover, it is possible to inspect in the state of the active matrix substrate to reliably identify the defective portion,
It becomes possible to easily correct the defective portion.

[Brief description of drawings]

FIG. 1 shows an embodiment of the present invention and is a block diagram of an active matrix substrate.

FIG. 2 shows an embodiment of the present invention and is an equivalent circuit showing a write / read path for one picture element capacitance.

FIG. 3 shows an embodiment of the present invention and is a time chart showing each signal in a vertical scanning period at the time of writing a video signal.

FIG. 4 shows an embodiment of the present invention and is a time chart showing each signal in a horizontal scanning period at the time of writing a video signal.

FIG. 5 shows an embodiment of the present invention and is a time chart showing each signal in a vertical scanning period at the time of reading a video signal.

FIG. 6 shows an embodiment of the present invention and is a time chart showing each signal in a horizontal scanning period at the time of reading a video signal.

FIG. 7 is a block diagram of an active matrix substrate.

[Explanation of symbols]

 1 gate bus line (scanning signal line) 2 source bus line (data signal line) 3 picture element capacity 4 picture element transistor (switching element) 5 gate drive circuit 6 source drive circuit 12 switch 15 computer 16 switch

Claims (1)

Claim: What is claimed is: 1. An inspection of an active matrix substrate in which a pixel capacitance is connected to each intersection of a plurality of scanning signal lines and data signal lines formed by crossing each other in the vertical and horizontal directions through a switching element. In the method, each switching element of the row is made conductive by selecting the scanning signal line, and a predetermined video signal is sequentially written to each pixel capacitance by sequentially selecting each data signal line during this switching element. , The switching elements of the row are turned on again by selecting the scanning signal line, and the video signals held in the pixel capacitors are sequentially read by sequentially selecting the data signal lines during this period. And a method of inspecting an active matrix substrate, which includes determining pass / fail by inspecting the read signal. 2. The active matrix substrate is provided with at least one of a scanning signal line driving circuit for driving the scanning signal lines and a data signal line driving circuit for driving the data signal lines. The inspection method described in 1. 3. The inspection method according to claim 1, wherein writing and reading of the video signal are performed via a video signal terminal.