JPH05189587A - Maximum grade discriminating circuit - Google Patents

Abstract

PURPOSE:To reduce the number of elements and to increase the processing speed by changing a maximum value calculating circuit and a maximum grade identifying circuit in a conventional circuit to an analog maximum value circuit and an analog comparator respectively and eliminating a need of an A/D converter and eliminating a need to select an inference circuit which outputs a maximum grade value by time-division processing. CONSTITUTION:In a fuzzy operation circuit consisting of plural fuzzy inference circuits, the circuit which outputs a maximum grade of grades outputted from plural fuzzy inference circuits 1-1 to 1-n consists of an analog maximum value circuit 3, and outputs of these fuzzy inference circuits and the output of the maximum value circuit 3 are compared with each other by analog comparators 2-1 to 2-n to identify the fuzzy inference circuit which outputs the maximum grade.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a maximum grade discrimination circuit used for control, pattern recognition, decision making, diagnosis, etc. using fuzzy theory.

[0002]

Fuzzy reasoning is used to make advanced reasoning based on ambiguous knowledge. In fuzzy reasoning, reasoning based on knowledge including ambiguity is made possible by describing reasoning rules numerically by using a membership function. The reasoning steps are as follows.

A step of obtaining the inference result for each inference rule as a grade from the matching degree between each inference rule and the input. The step of outputting the final conclusion as a deterministic value from the inference result for each inference rule obtained in.

The present invention relates to a step-related computing means. As one of the concrete methods of the step, there is a method of obtaining a definitive final conclusion depending on which inference rule has the highest grade among the grades obtained from each inference rule. What is needed here is a means for obtaining the maximum value of the obtained grades and a means for identifying which inference rule has output the maximum grade.

FIG. 4 shows an example in which the above means is realized by an electronic circuit. In the figure, 10-1 to 10-n are fuzzy inference circuits, 11-1 to 11-n are A / D converters that convert the analog output of the fuzzy inference circuits to digital, and 20 is a subtracter 21 and a register 22. Is a maximum grade calculation unit, 30 is a maximum grade circuit identification unit including a counter 31 and a register 32, and 41, 42 and 43 are digital changeover switches (time division processing).

The grade (analog value) output from the fuzzy inference circuits 10-1 to 10-n is converted into an A / D converter 11
The value stored in the register is subtracted from the value converted into the digital value by the subtractor 21 by -1 to 11-n. If the subtraction result is positive, the switch 42 is turned on and is newly stored in the register 22. At this time, the switch 43 is also turned on, and the address at that time is stored in the register 32. If the value subtracted by the subtracter 21 is negative, the switches 42 and 43 remain off, and the registers 22 and 2
No. 3 remains the previous data. The above-described processing is time-divisionally processed by the clock CLK. In addition, register 2
The initial values of 2 and 32 are 0.

[0007]

The drawbacks of the prior art described above are that the maximum clade arithmetic unit 20 and the maximum grade circuit identification unit 30 are composed of digital circuits.
Since the number of elements is large and input switching is performed by time division processing, the processing speed is slow. The problems to be solved by the present invention are to reduce the number of elements used and improve the processing speed.

[0008]

In order to solve this problem, the maximum grade discrimination circuit of the present invention is a fuzzy arithmetic circuit composed of a plurality of fuzzy inference circuits. The circuit that outputs the maximum grade is configured by an analog maximum value circuit, and the fuzzy inference circuit that outputs the maximum grade is compared with the output of these fuzzy inference circuits and the output of the maximum value circuit by an analog comparator. It is characterized in that it is configured to identify.

[0009]

The fuzzy inference circuit outputting the maximum grade is identified by the analog comparator and the analog maximum value circuit, and is output together with the maximum grade. As a result, the number of elements can be reduced and the processing speed can be improved.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the embodiments shown in the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention, where 1-1 to 1-n are fuzzy inference circuits and 2-
1 to 2-n are comparators, 3 is a maximum value circuit, and 4 is an encoder.

[0011] calculated plurality of fuzzy inference circuits 1-1 to 1-n grade output from μ ₁ ~μ _n grade throat whether a maximum grade mu _max the maximum value circuit 3, the maximum grade mu _max And a plurality of fuzzy inference circuits 1-1 to 1-1
1-n outputs the grade μ _{1 to} μ _n from the comparator 2-
1 to 2-n are compared, and the encoder 4 outputs which of the fuzzy inference circuits is outputting the maximum grade as encoded (compressed) information.

As the maximum value circuit 3, as shown in FIG. 2, transistors Q _{1 to} Q _n are connected to a common collector and a common emitter, and a constant current source is connected to the common emitter so that the maximum base input is common. A circuit that outputs from the emitter can be used.

[0013] As also comparator, it may be used a differential amplifier connected by connecting in common the emitters of the transistors Q ₁₁ to Q _12, as shown in FIG. 3 to the constant current source. The maximum voltage μ _max output from the maximum value circuit 3 is applied to one input of the differential amplifier as a reference voltage. Here, the comparator is “1” when μ ≧ μ _max and “0” when μ <μ _max
Is output.

Of the n comparators 2-1 to 2-n, the output of the comparator connected to the fuzzy inference circuit outputting the maximum grade value is "1", and the other outputs. Although it is "0", the encoder 4 is for compressing the input of the n output of log ₂ n lines. By inputting the output of the encoder 4 to the CPU, the CPU determines which fuzzy inference circuit outputs the maximum grade value.

If data compression is unnecessary, the encoder 4 may be omitted.

[0016]

According to the present invention, the number of elements can be reduced by changing the maximum value calculation circuit of the conventional circuit to the analog maximum value circuit and the maximum grade identification circuit to the analog comparator, and the A / D converter is not necessary. In addition, since it is not necessary to select the inference circuit that outputs the maximum grade value by the time division processing, the processing speed can be improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an embodiment of a maximum value circuit according to the present invention.

FIG. 3 is a circuit diagram showing an embodiment of a comparator according to the present invention.

FIG. 4 is a circuit diagram showing an example of a conventional digital processing circuit.

[Explanation of symbols]

1-1 to 1-n Fuzzy inference circuit, 2-1 to 2-n
Comparator, 3 maximum value circuit, 4 encoder

Claims (1)

[Claims] 1. In a fuzzy arithmetic circuit composed of a plurality of fuzzy inference circuits, a circuit for outputting the maximum grade of the grades output from the plurality of fuzzy inference circuits is constituted by an analog maximum value circuit, and the maximum grade is output. A maximum grade discriminating circuit, characterized in that the fuzzy inference circuit that is operating is identified by comparing the outputs of these fuzzy inference circuits and the output of the maximum value circuit with an analog comparator.