JPH05115178A - Power converter - Google Patents

Abstract

PURPOSE:To simplify the circuitry and to enhance efficiency by discharging the charges, stored in a capacitor when the AC side phase current is brought to zero during commutation process, to the AC side when a current is fed to same phase. CONSTITUTION:When GTOs 8, 9 are turned OFF and GTOs 10, 11 are turned ON, voltage VCv1 of a capacitor 33 is applied such that a current iv1 increases whereas a current iu1 decreases. On the other hand, a capacitor 32 is charged with the current iu1 to increase the voltage VCu1 thereof which is applied in the direction for increasing the current iv1 and decreasing the current iu1. Consequently, the line voltage between phases v1 and u1 is equal to the sum of voltages VCv1 and VCu1. Furthermore, when the GTOs 8, 9 are turned OFF, the capacitor 32 is connected in parallel with the GTOs 8, 9 through conducting diodes 20, 21 thus suppressing the dv/dt to be applied on the GTOs 8, 9. According to the constitution, special snubber circuit is not required for the GTO.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter using a self-arc-extinguishing semiconductor element, and more particularly to a power converter having reduced efficiency during commutation and improved efficiency.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram showing an example of a conventional power converter. In the figure, the AC voltage of the first AC system 1 is transformed through the first transformer 2 and applied to the first converter 3A configured as described below, whereby it is converted into DC. It has become so. First converter 3
A is a bridge-connected self-extinguishing type semiconductor device, for example, a gate turn-off thyristor (hereinafter referred to as GTO)
Switches 69 to 74 and di / dt suppression circuits 75 to 80 connected in series to the GTO switches 69 to 74, respectively.
It has and. Each of the GTO switches 69 to 74 includes a GTO 93, diodes 94 and 95, a capacitor 96, a resistor 97, and a reactor 98. The di / dt suppression circuits 75 to 80 each include a diode 99 and a resistor 100.

The direct current converted by the converter 3A is smoothed by the capacitor 68, converted into an alternating current by the second converter 5A having the structure described below, and transformed by the second transformer 6 to convert the direct current. 2 is applied to the AC system. The second converter 5A, like the first converter 3A,
GTO switches 81-86 and di / dt suppressing circuits 87-92 serially connected to them are provided.
All of these have the same configuration as the first converter 3A.

In such a structure, the diode 94 functions as a free wheel diode for circulating the circuit current when the GTO switch 72 is turned off. Further, the diode 95 guides the current flowing in the GTO 93 to the capacitor 96 when the GTO 93 is turned off. The condenser 96 is a G when the GTO 93 is turned off.
It acts as a so-called snubber capacitor that suppresses the forward voltage increase rate dv / dt of the TO93 below the allowable value of the element. The resistor 97 discharges the electric charge of the capacitor 96 when the GTO 93 is turned on. The GTO switch 69 is configured by the above 93 to 97. Reactor 98 is G
The forward current increase rate di / dt of the GTO 93 when the TO 93 is turned on is suppressed to be equal to or lower than the allowable value of the element. The diode 99 guides the current flowing through the reactor 98 to the resistor 100 when the GTO 93 is turned off. Reactor 98
The electromagnetic energy trapped in is consumed by the resistor 100.

[0005]

However, as shown in FIG.
The conventional example shown in (1) has the following drawbacks.

(1) The electric charge of the capacitor 96 charged when the GTO 93 is in the off state is discharged to the resistor 97 when the GTO 93 is turned on and becomes a heat loss. Therefore, the efficiency of the power converter is deteriorated. (2) The current flowing in the reactor 98 when the GTO 93 is in the off state is discharged to the resistor 100 and becomes a heat loss. Therefore, the efficiency of the power converter is deteriorated.

(3) For example, when the GTO switch 69 is in the ON state and the GTO switch 72 is erroneously ignited, a path for short-circuiting the DC circuit is generated. Therefore, it is difficult to protect against overcurrent and the configuration is complicated.

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional structure, and an object thereof is to provide a power converter having a simple circuit structure and high efficiency.

[0009]

In order to achieve the above object, the present invention connects the cathode of the first self-arc-extinguishing semiconductor element and the anode of the first diode to form a first common connection point. A second common connection point is formed by connecting the cathode of the second diode and the anode of the second self-arc-extinguishing semiconductor element, and capacitors are connected to the first common connection point and the second common connection point. And connecting the anode of the first self-arc-extinguishing semiconductor element and the anode of the second diode in common to form a third common connection point, the cathode of the first diode and the second self A power conversion in which the cathodes of arc-extinguishing semiconductor elements are commonly connected to form a fourth common connection point, and a switch unit having the third common connection point and the fourth common connection point as terminals is a minimum constituent element. It is a device.

[0010]

According to the present invention, in the process of commutation, the electric charge charged in the capacitor when the phase current on the AC side is made zero is
Next, when current is applied to the same phase, it is discharged to the AC side,
There is no loss and the efficiency of the converter is good.

Further, when the self-arc-extinguishing semiconductor element is turned off, the capacitor is connected in parallel with the self-arc-extinguishing semiconductor element by the diode being energized. Can be suppressed sufficiently. Therefore, it is not necessary to provide a special snubber circuit for the self-arc-extinguishing type semiconductor element, and the main circuit structure is simplified.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing the overall configuration of an embodiment of the present invention. This power conversion device has a switch unit described below as a minimum structure, and a plurality of switch units are used in a bridge connection to form a first converter 3 and It is composed of a second converter 5.

The switch unit is a first self-extinguishing type semiconductor device such as a GTO (gate turn-off thyristor).
9 and the anode of the first diode 21 are connected to form a first common connection point, and the second diode 20
Cathode and second self-extinguishing semiconductor device, eg GTO
8 anodes are connected to form a second common connection point, and a capacitor 3 is connected to the first common connection point and the second common connection point.
2 and the anode of the first GTO 9 and the anode of the second diode 20 are commonly connected to form a third common connection point, and the cathode of the first diode 21 and the second diode 21 are connected to each other.
Of the GTO 8 are commonly connected to form a fourth common connection point, and the third common connection point and the fourth common connection point are used as terminals. Other switch units are similarly configured, and 10 to 19 are GTOs, 22 to 31 are diodes, and 32 to 37 are capacitors in the figure. The second converter 5 also has the same configuration as the first converter 3, and 38 to
49 is a GTO, 50 to 61 are diodes, and 62 to 67 are capacitors.

Except for the above points, the configuration is the same as that of the conventional example of FIG. 10, 1 is a first AC system, 2 is a first transformer, 4
Is a DC reactor, 6 is a second transformer, and 7 is a second AC system.

The operation of the present embodiment thus constructed will be described below by taking the case where the electric power of the first AC system 1 is sent to the second AC system 7 as an example. In this case, the power of the first AC system 1 is supplied to the first converter 3 by the first transformer 2 and the first converter 3
Performs a forward conversion operation to convert AC power into DC power.
The DC reactor 4 smoothes the output current of the first converter 3. The second converter 5 performs an inverse conversion operation to convert DC power into AC power, and supplies the AC power to the second AC system 7 via the second transformer 6.

Here, u1, v1 and w1 are secondary terminals of the first transformer 2, P1 and N are DC output terminals of the first converter 3, and P2 and N are DC of the second converter 5. Input terminal, u2
v2 and w2 are secondary terminals of the second transformer 6. iu1
Is a current flowing from the secondary u1 phase of the first transformer 2 into the first converter 3. iv1 is a current flowing from the secondary v1 phase of the first transformer 2 into the first converter 3. ID
Is the DC output current of the first converter 3.

Iu2 is a current flowing from the second converter 5 to the secondary u2 phase of the second transformer 6. iv2 is a current flowing from the second converter 5 to the secondary v2 phase of the second transformer 6. iw2 is a current flowing into the second converter 5 from the secondary w2 phase of the second transformer 6.

FIG. 2 is a waveform diagram showing the forward conversion operation of the first converter 3. In the figure, iu1 is the first transformer 2
Is a current flowing into the first converter 3 from the secondary u1 phase. iv1 is a current flowing from the secondary v1 phase of the first transformer 2 into the first converter 3. vv1 is the voltage of the primary v1 phase of the first transformer 2. vuv1 is the line voltage of the secondary u1 phase v1 phase of the first transformer 2.

VCu1 is the voltage of the capacitor 32 of the first converter 3. VCv1 is the voltage of the capacitor 33 of the first converter 3. VGv1 is the first converter 3
This is the voltage of GTOs 10 and 11. VDv1 is the voltage of the diodes 22 and 23 of the first converter 3. ID
Is the DC output current of the first converter 3. VD1 is
This is the DC output voltage of the first converter 3.

FIG. 3 is a waveform diagram showing the commutation operation at the time of forward conversion of the present invention. From time t1 to time t2, the commutation from the u1 phase to the v1 phase is performed "A" in FIG. It is an enlarged waveform of the part. iu1, iv1, vv1, vuv1, VCu
1 and VCv1 are the same as the same symbols in FIG.

4 to 7 are circuit diagrams for explaining the commutation operation at the time of forward conversion according to the present invention. 8 to 19 are GTOs, 20 to 31.
Are diodes and 32-37 are capacitors, which are the same as the symbols in FIG. The commutation operation at the time of forward conversion according to the present invention will be described below with reference to FIGS. Figure 4
It is a figure which shows the electricity supply state before the time t1. GTO8,
9, 18, 19 and the diodes 20, 21, 30, 31 are turned on, and the u1 phase current iu1 is the diode 20 and the G
It is shunted into the series circuit of TO8 and the series circuit of GTO9 and diode 21, and is supplied to the DC side. DC current ID
Is a series circuit of the diode 30 and the GTO 18, and the GTO
It is shunted to the series circuit of 19 and the diode 31 and supplied to the w1 phase. At this time, iu1, ID, and iw1 are equal.

FIG. 5 shows u from time t1 to time t2.
It is a figure which shows the electricity supply state in the process of the positive side commutation from 1 phase to v1 phase. At time t1, GTOs 8 and 9 are turned off, and GT
O10 and 11 are turned on. Voltage VCv of capacitor 33
1 is added in the direction of increasing iv1 and decreasing iu1. Therefore, the current value increases when iv1 starts to flow, while iu1 decreases. The capacitor 32 is charged by iu1 and its voltage VCu1 increases. VCu1 is also VC
Similar to v1, iv1 is increased and iu1 is decreased. Line voltage vuv1 of u1 phase with respect to v1 phase
Is the sum of VCv1 and VCu1. I at time t2
The commutation is completed when u1 and VCv1 become zero.

FIG. 6 is a diagram showing the energized state after time t2. At time t2, when VCv1 becomes zero, the diodes 22 and 23 become conductive. Therefore, iv1 is shunted into the series circuit of the diode 22 and the GTO 10 and the series circuit of the GTO 11 and the diode 23, and is supplied to the DC side.
The direct current ID is shunted to the series circuit of the diode 30 and the GTO 18 and the series circuit of the GTO 19 and the diode 31, and is supplied to the w1 phase. At this time, iv1, ID, and iw1 are equal.

FIG. 7 shows that after the time t3, the w1 phase to u1
It is a figure which shows the electricity supply state of the process of the negative side commutation to a phase. At time t3, the GTOs 18 and 19 are turned off and the GTO 14 and
Turn on 15. The voltage of the capacitor 35 is applied in the direction of increasing iu1 and decreasing iw1 to start commutation. The operation is similar to that described with reference to FIG. In this way, the forward conversion operation is performed, and the AC power supplied from the secondary side of the first transformer 2 is converted into DC power by the first converter 3.

FIG. 8 is a waveform diagram showing the inverse conversion operation of the second converter 5. In the figure, iu2 is the second converter 5
To the secondary u2 phase of the second transformer 6 from. iv2 is 2 from the second converter 5 to the second transformer 6.
This is the current flowing into the next v2 phase. vv2 is the voltage of the primary V2 phase of the second transformer. -Vuv2 is the line voltage of the secondary v2 phase u2 phase of the second transformer 6. VCu2
Is the voltage of the capacitor 62 of the second converter 5. V
Cv2 is the voltage of the capacitor 63 of the second converter 5. VGv2 is the voltage of the GTOs 40 and 41 of the second converter 5. VDv2 is the voltage of the diodes 52 and 53 of the second converter 5. ID is a DC input current flowing into the second converter 5. VD2 is the second converter 5
DC input voltage supplied to the. ICu2 is a current flowing into the capacitor 62. ICy2 is a current flowing into the capacitor 66.

FIG. 9 is a waveform diagram showing a commutation operation at the time of inverse conversion according to the present invention. FIG. 8 shows the commutation from the u2 phase to the v2 phase.
It is an enlarged waveform of the portion "B" of. iu2, iv2, v
v2, -vuv2, VCu2, VCv2, ICu2, I
Cy2 is the same as the same symbol in FIG.

The commutation operation at the time of inverse conversion according to the present invention will be described below with reference to FIGS. 1, 8 and 9. Before time t4 when the commutation from the u2 phase to the v2 phase is performed, GTO 38,3
9, 48, 49 and the diodes 50, 51, 60, 61 are turned on, and the u2-phase current iu2 is the series circuit of the GTO 38 and the diode 50, the diode 51 and the GTO 39.
It splits and flows into the series circuit of. Also, w2 phase current iw2
Is shunted into the series circuit of the GTO 48 and the diode 60 and the series circuit of the diode 61 and the GTO 49. At this time, iu2 and iw2 have the same ID.

At time t4, the GTOs 38 and 39 are turned off and the GTOs 40 and 41 are turned on. The voltage VCv2 of the capacitor 63 is applied in the direction of increasing iv2 and decreasing iu2. For this reason, the current value increases when iv2 starts flowing, while iu2 decreases. The capacitor 62 is iu
It is charged by 2 and its voltage VCu2 increases. VCu
Similarly to VCv2, 2 also increases iv2 and decreases iu2. Line voltage of v2 phase with respect to u2 phase-
vuv2 is the sum of VCv2 and VCu2.

Iu2 becomes zero at time t5. The capacitor 63 is continuously discharged by iv2, and the time t6 is reached.
When the voltage VCv2 becomes zero, the diode 52,
53 is conducted and the commutation is completed. On the other hand, during the period from time t4 to t5, the commutation voltage indicated by -vuv2 is generated between the v2 phase and the u2 phase, and therefore the voltage between the v2 phase and the w2 phase increases and becomes higher than the voltage of the capacitor 66. ..

Therefore, the diode 59 and the diode 58
Is forward biased, and a current indicated by ICy2 flows through the capacitor 66. At time t5, when iu2 becomes zero and the diodes 50 and 51 are turned off, -vuv2 becomes smaller and v2 becomes smaller.
The voltage between the phase and the w2 phase is also small, so ICy2
Decreases to zero at time t7.

Since ICy2 flows, iv2 becomes
The current value is reduced by this amount. At time t8, -vu
When v2 becomes higher than VCu2, the diodes 51 and 50 become conductive, and the current ICu2 that charges the capacitor 62 flows.

At time t9, ICu2 becomes zero. I
Cu2 flows again during the period from time t10 to time t11. Next, at time t12, when the GTOs 48 and 49 are turned off and the GTOs 44 and 45 are turned on, the voltage of the capacitor 65 is applied in the direction of increasing iu2 and decreasing iw2, and the negative polarity from the w2 phase to the u2 phase. Side commutation occurs. At this time, as at time t4 to time t7, at time t12
ICu2 flows through the capacitor 62 during the period from to the time t13. In this way, the reverse conversion operation is performed, and the DC power supplied to the second converter 5 is converted into AC power,
It is supplied to the second AC system 7 via the second transformer 6. As described above, the embodiment of the power conversion device according to the present invention has the following features.

(1) In the process of commutation, when the phase current on the alternating current side is set to zero, the electric charge charged in the capacitor is discharged to the alternating current side when the current flows in the same phase next time. There is no loss and the efficiency of the converter is good.

(2) As can be seen from FIG. 5, u1 phase G
When the TO8 and 9 are turned off, the diode 21,
Since the capacitor 32 is connected in parallel to the GTOs 8 and 9 by 20, the dv / dt applied to the GTOs 8 and 9 can be sufficiently suppressed. Therefore, it is not necessary to provide a special snubber circuit for the GTO, and the main circuit structure is simplified. Besides, it is possible to eliminate the above-mentioned drawbacks of the conventional method.

In the above description, the case where the power conversion device of the present invention is configured by using the GTO has been described as an example, but the switching element forming the power conversion device is not limited to the GTO. Other types of self-quenching semiconductor devices can also be used.

[0036]

According to the present invention, a power converter having a simple circuit configuration and high efficiency can be provided.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall configuration of an embodiment of a power conversion device according to the present invention.

FIG. 2 is a waveform diagram showing a forward conversion operation of the converter according to the embodiment of FIG.

3 is a waveform diagram showing a commutation operation during forward conversion in the embodiment of FIG.

FIG. 4 is a circuit diagram illustrating a commutation operation during forward conversion according to the embodiment of FIG.

5 is a circuit diagram illustrating a commutation operation during forward conversion according to the embodiment of FIG.

FIG. 6 is a circuit diagram illustrating a commutation operation during forward conversion according to the embodiment of FIG.

7 is a circuit diagram illustrating a commutation operation during forward conversion according to the embodiment of FIG.

8 is a waveform diagram showing an inverse conversion operation of the converter according to the embodiment of FIG.

9 is a waveform diagram showing a commutation operation during reverse conversion of the converter according to the embodiment of FIG.

FIG. 10 is a diagram showing an overall configuration of an example of a conventional power converter.

[Explanation of symbols]

1 ... 1st AC system, 2 ... 1st transformer, 3 ... 1st converter, 4 ... DC reactor, 5 ... 2nd converter, 6 ... 2nd transformer, 7 ... 2nd AC system, 8 to 19 ... GTO,
20-31 ... Diode, 32-37 ... Capacitor, 3
8 to 49 ... GTO, 50 to 61 ... Diode, 62 to 6
7, 68 ... Capacitor, 69-74 ... GTO switch,
75-80 ... di / dt suppression circuit, 81-86 ... GTO
Switch, 87-92 ... di / dt suppression circuit, 93 ... G
TO, 94, 95 ... Diode, 96 ... Capacitor, 9
7 ... Resistor, 98 ... Reactor, 99 ... Diode, 1
00 ... resistor.

Claims (1)

[Claims] 1. A cathode of a first self-arc-extinguishing semiconductor element and an anode of a first diode are connected to form a first common connection point, and a cathode of a second diode and a second self-arc-extinguishing type. An anode of the semiconductor element is connected to form a second common connection point, a capacitor is connected to the first common connection point and the second common connection point, and an anode of the first self-arc-extinguishing semiconductor element is formed. An anode of the second diode is commonly connected to form a third common connection point, and a cathode of the first diode and a cathode of the second self-arc-extinguishing semiconductor element are commonly connected to form a fourth common connection point. A power conversion device comprising a switch unit having a common connection point and terminals of the third common connection point and the fourth common connection point as minimum components.