JPH05101228A - Analog switch input card system - Google Patents

Abstract

PURPOSE:To provide an analog switch input card system which detects the troubles of a multiplexer for each channel and improves the overall reliability of the system. CONSTITUTION:In an analog input circuit system where various types of process amount are measured, the analog switches 21-2n are provided for each channel at the precedent stage part of the analog input. At the same time, the analog switches 21'-2n' which receive the input of the reference voltage and work inversely to the switches 21-2n are provided in parallel to each other for each channel at the output of the system. Then the switches 21-2n are switched to the switches 21'-2n' for each channel at least once per several times of the analog input processing. So that the normal or abnormal state is decided for each channel with input of the reference voltage. Thus it is possible to detect the presence or absence of a trouble of a multiplexer 33 for each channel.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog switch input for measuring various process quantities (flow rate, temperature, pressure, etc.) and A / D converting them into digital quantities for data processing in process control. Regarding the card system.

[0002]

2. Description of the Related Art Conventionally, in process control, various process quantities (flow rate, temperature, pressure, etc.) are measured, and analog voltage signals thereof are A / D converted into digital quantities, which are then processed by a microprocessor for data processing. In the analog switch processing card system, the most general hardware configuration is as shown in FIG.

That is, a plurality of analog switch inputs I
The voltage signals of N1, IN2, ... INn are input to the multiplexer 2 through the filter 1. The reference voltage Vref generated by the reference voltage generating circuit 3 is assigned to one of the input channels of the multiplexer 2.

In such an analog switch input section, the microprocessor 4 outputs a channel selection signal 5 to the multiplexer 2 in order to perform data processing of each channel, and the multiplexer 2 corresponds to this channel 5. The input voltage of the channel is output to the input buffer 6, and the output voltage of the input buffer 6 becomes the A / D conversion voltage signal 7 and is input to the A / D converter 8.

Then, the microprocessor 4 uses an A / D
After waiting for the voltage of the conversion voltage signal 7 to settle down, the A / D conversion start signal 9 is sent to the A / D converter 8.
Is output.

When the A / D converter 8 receives the A / D conversion start signal 9, the A / D conversion voltage signal is converted into an A / D conversion voltage signal.
It is converted and converted into a digital data signal, which is output for the microprocessor. When the A / D conversion is completed, the A / D converter 8 outputs the A / D conversion completion signal 10 to the microprocessor 4.

Upon receipt of the A / D conversion completion signal 10, the microprocessor 4 reads the conversion data from the A / D converter 8 and performs data processing for each process amount.

The above is the configuration of a general conventional analog input card system. However, in such an analog input card system, which is premised on being used for process control, self-diagnosis of the A / D conversion circuit portion is not possible. This is a required function. Therefore, various methods have been proposed in the past, but the most typical one is the multiplexer 2 which uses the reference voltage Vref generated by the reference voltage generating circuit 3 inside the card.
1 specific channel (here, n + 1 channel)
, The reference voltage Vref is selected by the channel selection signal 5 once in one cycle T of the external analog processing as shown in FIG. 4, the A / D conversion processing is performed, and the reference input check is executed by the digital signal. .. In this check process, if the reference voltage Vref is within a certain error range with respect to the true value, the A / D conversion circuit portion is normal, and if it is outside the error range, it is determined to be abnormal, and it is determined to be abnormal. In the event of a failure, the subsequent processing is stopped and an alarm indicating that an abnormality has occurred is displayed to the operator.

[0009]

However, in such a conventional analog input card system, although the failure of the A / D converter 8 can be detected, the failure of the circuit which generates the channel selection signal 5 is detected. When an output failure that cannot select each channel correctly (however, the selection of the reference input channel is normal) or a selection failure of a specific channel of the multiplexer 2 occurs, the failure must be detected completely. There was a problem that I could not do it.

In a system in which one analog input 11 is connected in parallel with an A / D converter of another device as shown in FIG. 5, one channel of the multiplexer 2 of the analog input card on one side. If a fault occurs in the short-circuit mode, the fault cannot be detected and the input impedance is significantly reduced.
There is also a problem that the input voltage of the D converter 12 is remarkably lowered and correct measurement cannot be performed.

The present invention has been made in view of the above-mentioned problems of the related art, and it is possible to detect a failure mode which could not be detected in the related art, and its analog input is connected in parallel with another system. It is an object of the present invention to provide an analog input card system which does not adversely affect other systems when a failure occurs in parallel processing.

[0012]

In the analog input card system of the present invention, a first analog switch is provided for each input terminal of a measurement voltage signal of various process quantities, and the first analog switch is provided.
An analog switch selection signal generation circuit for individually controlling ON / OFF of each of the analog switches, and an ON / OFF control signal of the analog switch selection signal generation circuit is provided on the output side of each of the first analog switches.
Second analog switches that perform an inversion operation with respect to each of the first analog switches are provided in parallel for each of the first analog switches, and a reference voltage generating circuit is provided for each of the first analog switches so as to input the reference voltage. The input terminals of the multiplexers are connected to the input terminals of the two analog switches, and the input terminals of the channels of the multiplexer are connected to the connection points of the outputs of the first analog switches and the outputs of the second analog switches. An A / D conversion circuit is connected to the output side of the A / D conversion circuit, and a microprocessor for calculating various process quantities is provided. The microprocessor performs sequential selection control of the channels of the multiplexer. The analog switch selection signal generating circuit is normally turned on for each of the first analog switches. In which the analog input processing channels for each channel is to be turned off inversion control one by one period ending with Gosuru.

[0013]

In the analog input card system of the present invention,
The analog switch selection signal generation circuit sets the first analog switch to 1 for each channel in each cycle in which the multiplexer makes a cycle of all channels according to the multiplexer channel selection signal controlled by the microprocessor.
On / off control is performed for each cycle by shifting channels, and when the first analog switch is in the on state, the analog input is input to the multiplexer,
In the next cycle of the same channel, the first analog switch for that channel is turned off and vice versa.
The analog switch of turns on and the reference voltage is input to the multiplexer from the reference voltage generation circuit.
A / D conversion processing is performed on this reference voltage, and the suitability of the reference voltage is judged by a microprocessor as a digital signal.
When the reference voltage digital signal sequentially input from each channel in each cycle is within the error range with respect to the true value, it is determined to be normal, and if it is out of the error range, it is determined to be abnormal.

Thus, the reference voltage signal is input to each channel, and the normality / abnormality of each channel can be determined by judging the suitability of the digital signal, and the failure of each channel of the multiplexer and the output of the channel selection signal. It is possible to detect an abnormality, an abnormality in the A / D conversion circuit portion, and the like.

[0015]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 shows a circuit configuration of an embodiment of the present invention, in which analog inputs of low-speed voltage signals of various process quantities are input to input terminals IN1, IN2, ..., INn. There is.

The input terminals IN1, IN2, ...
The first analog switches 21 and 2 are provided for each INn.
2, ..., 2n are provided, and each is on / off controlled by analog switch selection signals SEL1, SEL2, ..., SELn.

Further, the first analog switch 21,
Second analog switches 21 ', 22' ..., 2n 'are provided in parallel on the output side of each of the second analog switches 21', 22n.
The reference voltage Vref is input from the reference voltage generating circuit 31 to each of the ', ..., 2n', and the on / off control is performed by the analog switch selection signal SEL1 ,.
, SELn are inverted signals. Therefore, the connection points between the first analog switches 21, 22, ..., 2n and the second analog switches 21 ', 22' ,.
Analog switch selection signals SEL1, SEL2, ..., S
When ELn is "high", the input terminals IN1, IN2, ...,
The analog input from INn is directly input, and analog switch selection signals SEL1, SEL2, ..., SELn are input.
When is off, the reference voltage Vref is raised.

Each connection point between the first analog switch and the second analog switch is connected to each input terminal of the input filter 32 for removing noise. A multiplexer 33 is provided on the output side of the input filter 32.

The multiplexer 33 receives the first to nth channels from the multiplexer channel selection signal 34.
Channels are sequentially switched and selected, and the input of the selected channel is directly output.

An input buffer 35 is provided on the output side of the multiplexer 33, and an A / D converted voltage signal 36 as an output of the input buffer 35 is supplied to an A / D converter 37.
It is supposed to be input to. A microprocessor 38 is provided on the output side of the A / D converter 37. The microprocessor 38 controls the A / D conversion operation of the A / D converter 37 and selects a multiplexer channel for the multiplexer 33. The signal 34 is output and further analog switch selection signals SEL1 and SEL
, ..., SELn are generated to control the analog switch selection signal generating circuit 39.

In the figure, 40 is an A / D conversion start signal given from the microprocessor 38 to the A / D converter 37, and 41 is A / D conversion completion given from the A / D converter 37 to the microprocessor 38. It is a signal.

Next, the operation of the analog input card system of the above embodiment will be described.

, INn are input to the first analog switches 21, 22, ..., N in the preceding stage of the input section. , 2n are turned on when the analog switch selection signals SEL1, SEL2, ... SELn are at a high level, the input voltage thereof passes through the input filter 32, and each of the multiplexers 33. It is input to the input terminals 1, 2, ..., N. Further, the analog switch selection signals SEL1, SEL2, ..., SELn are converted into second analog switches 21 ′, 22 ′,
, 2n 'is also derived as a gate signal. The input of each of the second analog switches 21, 22, ..., 2n ′ is the reference voltage Vref generated by the reference voltage generation circuit 31.

However, at the time of normal analog input processing, since the external analog input voltage is taken in by the second analog switches 21, 22, ..., 22n, the analog switch selection signals SEL1, SEL2 ,.
Each is a high level output, and therefore the second analog switches 21 ', 22', ..., 2n 'are in the off state.

In this way, the analog input voltage input to each channel of the multiplexer 33 is sequentially selected from the first channel to the nth channel under the control of the multiplexer channel selection signal 34 from the microprocessor 38, and the signals of the selected channels are output. It is output to the input buffer 35.

Then, the A / D converted voltage signal 36 obtained through the input buffer 35 is inputted to the A / D converter 37.

The microprocessor 38 gives an A / D conversion start signal 40 to the A / D converter 37 so that the A / D converter 37 starts the A / D conversion. If completed, A / D conversion completion signal 4
1 is given to the microprocessor 38, and the microprocessor 38 receives the completion signal 41, inputs the digital data as the A / D conversion result, and performs the arithmetic processing of the process data for each channel.

Next, the processing operation of the self-diagnosis function of the A / D conversion circuit section will be described with reference to FIG.

Assuming that the analog input processing is sequentially performed from channel 1 to channel n, the microprocessor 38 switches the analog switch selection signal generating circuit 39 to the analog switch after the analog input processing of the input terminal IN1 of the channel 1 is completed. The selection signal SEL1 is instructed to output a low level. In response to this,
When the analog switch selection signal generation circuit 35 sets the analog switch selection signal SEL1 to the low level, the first analog switch 21 connected to the analog input terminal IN1 is turned off, and conversely the second analog switch 21 ′.
Is turned on, and the reference voltage Vref is input to the channel 1 of the multiplexer 33 via the input filter 32.

After this, when the analog input processing of the channel n is completed, the multiplexer selection signal 34 selects the channel 1 of the multiplexer 33 to which the reference voltage Vref has been input, and the A / D conversion processing for this channel 1 starts. become.

Therefore, the microprocessor 9 reads the digitally converted data of the reference voltage Vref, checks whether it is within a certain error range with respect to the expected true value, and checks whether the high voltage is exceeded until the error range is exceeded. Alternatively, if the voltage is low, it is judged to be abnormal, the processing for that channel is stopped, and at the same time, an alarm is displayed on the CRT display device or the like by an appropriate means that an abnormality has occurred in channel 1. Thus, from the normal analog input voltage signal processing for channel 1 to channel n
After the processing of the analog input voltage for the channel 1, and until the determination of the normality / abnormality of the reference voltage for the channel 1, it takes 1 cycle T, and then the second cycle is started, and the next channel 2
, The analog input voltage from the input terminal IN2 is processed, the analog input processing is sequentially performed up to the channel n, the channel 1 is returned to the same analog input processing, and the reference voltage of the channel 2 is continuously processed. Determine normal / abnormal.

In the same manner, analog input processing and reference voltage input processing are successively continued in the third and subsequent cycles in the same manner, thereby performing analog input processing and normal / abnormal determination for each channel in parallel. You can do it.

When it is determined that the reference input is abnormal, the analog switch selection signal for the channel in which the abnormality is detected is set to the low level, or the analog switch selection signals SEL1 to SELn of all the channels are set to the low level for that channel. Alternatively, the entire analog input card can be isolated from the external process.

As described above, in the analog input card system of this embodiment, the reference voltage signal Vref is allocated to one specific channel of the multiplexer in the related art, so that the failure or abnormality of the normal multiplexer of the analog input channel is detected. However, it was not possible to detect the failure of the multiplexer of the channel to which the reference voltage is assigned, the output abnormality of the channel selection signal, the abnormality of the A / D converter, etc. Separated by the analog switches 21, 22, ..., 2n, instead of this, the second analog switches 21 ', 2
Since the reference voltage Vref is assigned to each channel of the corresponding multiplexer 33 by 2 ', ..., 2n' to check the reference voltage input, the multiplexer diagnosis, the channel selection signal output abnormality, the input stage to the final stage are performed for each channel. It becomes possible to detect the failure of all electronic components such as the failure of the A / D converter, and the system can be made highly reliable.

Further, according to the system of this embodiment, the analog input processing time is equal to the conventional analog input processing time, the processing time becomes long, and there is no fear of delay in response.

That is, conventionally, when the analog input is connected in parallel with another device as shown in FIG. 5, when the failure mode, the short circuit failure of the corresponding channel of the multiplexer, or the input current increasing mode, the Since the input impedance is lowered, the measured voltage of other equipment may be lowered, which may hinder the control.However, in the analog input card system of this embodiment, the analog switch of the channel is detected when an abnormality is detected. Since it can be turned off, it does not affect the analog input of other devices connected in parallel when the card itself fails.

[0038]

As described above, according to the present invention, since the analog input processing is performed for each channel of the multiplexer and the analog input processing is performed once or several times for the reference voltage input, the number of channels is increased. It is possible to detect a multiplexer failure, an A / D conversion circuit portion abnormality, a channel selection signal output failure, etc., for each system, and a highly reliable system can be provided.

When an analog input is input in parallel with another device and a short circuit fault or a fault in the input current increasing mode occurs in the corresponding channel of the multiplexer of the system, its input impedance is changed as in the conventional case. Does not affect the control because the measured voltage of other equipment decreases, and the analog input can be cut off by turning off the analog switch selection signal of the corresponding channel when an abnormality is detected. , There is no fear of adversely affecting other devices that have analog inputs connected in parallel when their own card fails.

[Brief description of drawings]

FIG. 1 is a circuit configuration block diagram of an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of each part of the above embodiment.

FIG. 3 is a circuit configuration block diagram of a conventional example.

FIG. 4 is a timing chart illustrating the operation of each unit of a conventional example.

FIG. 5 is a block diagram showing a circuit configuration for connecting an analog input in parallel with another device in a conventional example.

[Explanation of symbols]

IN1, IN2, ..., INn Input terminals 21, 22, ..., 2n First analog switch 21 ', 22', ..., 2n 'Second analog switch 31 Reference voltage generation circuit 32 Input filter 33 Multiplexer 34 Multiplexer channel selection Signal 35 Input buffer 36 A / D conversion voltage signal 37 A / D converter 38 Microprocessor 39 Analog switch selection signal generation circuit 40 A / D conversion start signal 41 A / D conversion completion signal Vref Reference voltage SEL1, SEL2, ..., SELn analog switch selection signal

Claims (1)

[Claims] 1. A first analog switch is provided for each input terminal of measurement voltage signals of various process amounts, and an analog switch selection signal generation circuit for individually performing ON / OFF control is provided for each of the first analog switches, At the output side of each of the first analog switches, there is provided a second analog switch, which is inverted with respect to each of the first analog switches by an ON / OFF control signal of the analog switch selection signal generating circuit, for each of the first analog switches. Each switch is provided in parallel, and a reference voltage generating circuit is connected to an input terminal of each second analog switch so that a reference voltage is input via each of the second analog switches, Connect the input end of each channel of the multiplexer to the connection point between the output and the output of each second analog switch, and An A / D conversion circuit is connected to the output side of the processor, and a microprocessor for performing arithmetic processing of various process amounts is provided on the output side of the A / D conversion circuit, and the microprocessor sequentially selects the channels of the multiplexer. In addition to performing control, the analog switch selection signal generation circuit normally turns on each of the first analog switches, and sequentially performs off inversion control for each channel for one cycle at which the analog input processing of the channel ends. Analog input card system.