JPH04136770A - Digital ac wattmeter - Google Patents

Abstract

PURPOSE:To stably display a phase by mounting a phase discriminating means performing the operation detecting the zero cross of a voltage input signal and judging the advance phase/delay phase due to the value of the current input signal at the time of the detection of zero cross to count the result of the advance phase/delay phase judgment. CONSTITUTION:A data processing part (DSP) 3 executes the operation of power and the processing of phase discrimination from the sampling data of voltage/ current from a date acquisition part 1 due to a timer 2. That is, advance phase/ delay phase is judged using the judgement of the zero cross of voltage input. The advance phase is set to +1 and the delay phase is set to -1 and the sum of discrimination results is counted during the period of an up-date time. When a timer 5 becomes the up-date time, a microprocessor (CPU) 4a performs display renewing processing by interruption. That is, the CPU 4a receives the count data of phase discrimination from the DSP 3 and, in a positive case, the data is judged to be an advance phase to be displayed and, in a negative case, said data is judged to be a delay phase to be displayed.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to an AC wattmeter that displays power, reactive power, power factor, etc., and more specifically, the present invention relates to an AC wattmeter that displays power, reactive power, power factor, etc. This invention relates to a digital AC wattmeter that displays the phase difference (lead/lag) between currents.

<Prior Art> In general, an AC wattmeter displays numerical values such as power, reactive power, and power factor, as well as the lead/lag of the current phase relative to the voltage being measured. I'm trying to understand the situation.

In an AC power meter using an analog calculation method based on PWM time/minute calculation, the phase lead/lag can be directly obtained as the polarity of the calculation result. Therefore, the polarity obtained in this way is used together with the power display.

<Problems to be Solved by the Invention> Digital AC wattmeters other than those described above amplify voltage and current to predetermined levels, and then pass through a zero-cross comparator to shape the waveforms to logic level.
Some devices detect and display phase lead/lag using a phase discrimination circuit using a D-type flip-flop.

According to this method, a dedicated circuit for phase detection is required. Further, if there is jitter in the phase when the power factor is close to 1, there is a problem that the display of phase lead/lag changes frequently and cannot be read stably.

The present invention has been made to solve the above-mentioned problems, and its purpose is to eliminate the need for a dedicated circuit for phase detection, and to eliminate the need for a dedicated circuit for phase detection, even when the power factor is close to 1 and there is jitter in the phase. The purpose of this invention is to realize a digital AC wattmeter that can stably display phase lead/lag.

Means for Solving the Problems> The present invention to solve the above problems includes a data acquisition unit that digitally samples the instantaneous values of a voltage input signal and a current input signal, and a data acquisition unit that digitally samples the instantaneous values of a voltage input signal and a current input signal; , a data processing section that calculates the effective value of current, power, etc., and a general processing section that interrupts the data processing section at regular intervals and reads out the calculation results. Performs calculations and determines phase lead/lag based on the value of the current input signal when zero crossing is detected,
It is equipped with phase discrimination means for counting the results of phase lead/phase lag judgment.

Function> In the digital AC wattmeter of the present invention, the data processing section performs a zero-cross detection calculation of the voltage input signal, and upon detection of a zero-cross, makes a phase lead/lag judgment based on the value of the current input signal. Count the results of your decisions. Then, based on the count results for each predetermined period, phase leading/phase slowing is displayed.

<Examples> Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing a schematic structure of an embodiment of the present invention.

In this figure, 1 is a data acquisition section that captures the instantaneous values of voltage input signal waveforms and current input signal waveforms and converts them into A/D converters, and 2 is an A/D converter and sample hold circuit for each sampling rate. 3 is a data processing unit that is composed of a DSP etc. and calculates voltage, current effective values, power effective values, etc. at high speed; 4 is a general processing unit that centrally controls the digital AC wattmeter. Section 5 is a timer in which update data switching time is set.

The operation of this configuration is as follows.

When the timer 5 reaches the update time, an interrupt is generated to the microprocessor 4a, and one display update process is performed starting from this interrupt.

Ru. Here, the microprocessor 4a is the data processing section 3.
It interrupts the data processing section 3, receives various data that have been processed by the data processing section 3, and processes them for display. At this time, the data as a result of the phase discrimination is also received, but if the value on the counter inside the data processing section 3 has a positive sign, it is a phase advance, and if it has a negative sign, it is a phase lag. On the other hand, data processing section 3
Now, after data transfer, clear the counter and prepare for the next phase determination.

Here, the phase determination of the data processing section 3 will be explained in detail with reference to the flow chart shown in FIG. 2, the schematic configuration diagram of the phase determination means in the data processing section 3 shown in FIG. 3, and the time chart shown in FIG. 4. do.

After the timer 2 outputs a starting pulse to start the sample hold circuits 1e, If and the A/D converters 1g, 1h for each sampling rate, the data is given from the data acquisition section 1 to the data processing section 3 for arithmetic processing. Let's do it.

First, as normal processing, calculations to obtain the effective voltage value (step ■) and calculations to obtain the current (step ■)
, performs calculation to obtain electric power (step ■).

Next, phase discrimination processing is performed. First, the zero-crossing determination section 6 determines whether or not a zero-crossing determination is necessary (step (2)). For example, the previous sampling value V. -1 is smaller than a predetermined zero-cross comparison voltage e1 on the negative side. Here, if v, . Next, the zero-cross determination section 6 detects whether a zero-cross has actually occurred (step 2). For example, the current voltage sampling value ■, (
A comparison calculation is made to determine whether the voltage shown in FIG. 4(a) is greater than a predetermined positive zero-cross comparator voltage e2. Here, ■. ＞
If it is e2, it means zero crossing from negative to positive, so the process continues. Others have not yet reached zero cross, so return.

When it is confirmed that a zero crossing has occurred, the leading/lag determining unit 7 determines the magnitude of the current sampling value ln (Fig. 4(b)) and the current value 12, which is the same digital value as the zero crossing comparator 1jl pressure e2. By looking at the relationship, determine whether the phase is leading or slowing (step ■). Here, l,, >
If it is 12, the phase is advanced, so the value N of counter 8 is set to 1.
Increment by (step ■) and return. Further, if i<i2, the phase is slow, so the value N of the counter 8 is decremented by one (step ■) and the process returns.

The above series of phase determination processes are repeated during the update time. Therefore, the counter records the difference in the sum of the leading/lag phase discrimination results of all zero crossing points during this period. The general processing unit 4 reads this at each update time and displays the updated information on a display device (not shown).

According to the embodiment described above, since the display is performed after taking the average of the phase lead/phase discrimination results during the update time period, the display is performed even when the power factor is close to 1 or when there is jitter in the phase. Even if there is, a stable phase display can be performed without frequently switching between leading and slowing phases.

Further, although the above example is a case in which the data processing section 3 is configured with a DSP, the same function can be realized even if it is replaced with a circuit element as shown in FIG.

In this case, the current input subjected to the zero-cross comparison is applied to the up/down terminal of a binary up-down counter 15 which receives the result of zero-cross comparison of the voltage input as a clock. By doing so, phase leading/delaying determination and counter increment/decrement can be realized at the same time. Then, the general processing unit 16 reads the count result from the binary up/down counter 15 at regular intervals set by the timer 17, and resets the count value.

As explained above, according to the phase discrimination according to this embodiment, a dedicated circuit configuration for phase discrimination is not required, so that the configuration is simplified and the reliability is improved. In addition, the phase is discriminated for multiple cycles during one update period, and the lead/lag of this period is determined from the difference in the sum of the leads/lags detected in each cycle, so the power factor is close to 1, the phase angle is small, and even when there is jitter in the phase, stable phase display can be performed.

<Effects of the Invention> As described in detail above, the present invention includes a data acquisition unit that digitally samples the instantaneous values of a voltage input signal and a current input signal, and a data acquisition section that digitally samples the instantaneous values of a voltage input signal and a current input signal, and acquires a voltage and a voltage from data regarding the digitally sampled current and voltage. It has a data processing unit that calculates the effective value of current, power, etc., and a general processing unit that interrupts the data processing unit at regular intervals and reads out the calculation results.The data processing unit performs zero-cross detection calculations on voltage input signals. When zero crossing is detected, phase lead/lag judgment is performed based on the value of the current input signal.
A phase discrimination means is provided for counting the results of phase advance/phase delay determination.

As a result, in the digital AC wattmeter of the present invention, the data processing section performs zero-crossing detection calculations on the voltage input signal, and upon detection of zero-crossing, performs phase-leading/lag judgment based on the value of the current input signal. Count the results of your decisions. Then, based on the count results for each predetermined period,
Leading/lagging phase is displayed.

Therefore, since a dedicated circuit configuration for phase discrimination is not required, the configuration is simplified and reliability is improved. In addition, the phase is discriminated for multiple cycles during one update period, and the lead/lag of this period is determined from the difference in the sum of the leads/lags detected in each cycle, so the power factor is close to 1, the phase angle is small, and even if there is jitter in the phase, stable phase display can be performed.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing the configuration of a digital AC wattmeter according to an embodiment of the present invention, FIG. 2 is a flowchart for explaining the operating state of the device shown in FIG. 1, and FIG. 3 is a diagram similar to the one shown in FIG. FIG. 4 is a time chart for explaining the operation of the embodiment shown in FIG. 1; FIG. 5 is a configuration diagram of another embodiment of the present invention. FIG. 1... Data acquisition section 2... Timer 3... Data processing section 4.
...General processing section 5...Timer 6...Zero cross judgment section 8...Counter

Claims (1)

[Claims] A data acquisition unit that digitally samples the instantaneous values of a voltage input signal and a current input signal, and a data processing unit that calculates effective values of voltage and current, power, etc. from the digitally sampled data regarding voltage and current. and a general processing unit that interrupts the data processing unit at regular intervals and reads out the calculation results. A digital AC wattmeter characterized by comprising phase discrimination means for determining phase lead/phase lag and counting the results of the phase lead/phase lag determination.