JPH025141A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPH025141A
JPH025141A JP63157316A JP15731688A JPH025141A JP H025141 A JPH025141 A JP H025141A JP 63157316 A JP63157316 A JP 63157316A JP 15731688 A JP15731688 A JP 15731688A JP H025141 A JPH025141 A JP H025141A
Authority
JP
Japan
Prior art keywords
data
register
ports
software
data values
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63157316A
Other languages
Japanese (ja)
Inventor
Yoshinori Igarashi
五十嵐 美紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63157316A priority Critical patent/JPH025141A/en
Publication of JPH025141A publication Critical patent/JPH025141A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the number of manhour of software and to speed up processing by generating a vector interruption signal by a coincidence signal based upon hardware comparing operation between data values inputted from plural ports and a previously set data value. CONSTITUTION:A sampling circuit 1 samples data inputted from the ports for a fixed time, an input data storing register 2 is an 8-bit register to which sampled data are transferred and a data setting register 3 is a programmable 8-bit register. A comparator 4 compares the contents of the register 2 with that of the register 3, and when both the data coincide with each other, outputs a coincidence signal 5 and generates a vector interruption request signal 6. Consequently, the branch of program processing based upon the input data values from the ports can be executed without using software, so that the man hour of the software can be reduced and rapid processing can be attained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はベクタ割り込み機能を有した、マイクロ・コン
ピュータに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer having a vector interrupt function.

〔従来の技術〕[Conventional technology]

従来のマイクロ・コンピュータでは、ポートのデータ入
力値によるプログラム処理の分岐は、全て、ソフト・ウ
ェアによるコンベア処理により行なわれていた。
In conventional microcomputers, all branching of program processing based on port data input values is performed by conveyor processing using software.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のマイクロ・コンピュータは、複数のポー
トのデータ値により、ベクタ割り込みを発生させるとい
う、ハード・ウェアが無いことで、全て、ソフト・ウェ
ア・割り込み処理などで入力データ値をセンスし、処理
を選択・実行させなければならないため、ソフト・ウェ
ア工数の負担がかかるばかりか時間もかかり、また、キ
ー人力用としてポートを使用する場合などでは、常にキ
ー人力・センスのプログラムを動作させていなげればな
らないという欠点がある。
The conventional microcomputers mentioned above generate vectored interrupts based on the data values of multiple ports.As there is no hardware, all input data values are sensed and processed using software, interrupt processing, etc. This requires selecting and executing the software, which not only burdens the software man-hours but also takes time. In addition, when using a port for key human power, it is necessary to always run the key human power/sense program. There is a drawback that it must be done.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のマイクロ・コンピュータは、複数のポートから
入力されたデータ値とあらかじめ設定できるデータ値と
をハード・ウェアによりコンベア動作を行ない、その一
致信号により、ベクタ割り込み要求信号が発生するとい
う機能を有してぃる。
The microcomputer of the present invention has a function of conveying data values input from a plurality of ports and data values that can be set in advance using hardware, and generating a vector interrupt request signal based on a matching signal. I'm doing it.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.

サンプリング回路:1は、ポートから入力されるデータ
を一定時間サンプリングし、入力データ格納レジスタ:
2は、サンプリング後のデータが転送される8ビツト・
レジスタ、データ設定レジスタ:3はプログラマブル設
定可能な8ビツト・レジスタで、コンベア回路:4は入
力データ格納レジスタ:2とデータ設定レジスタ:3の
内容をコンベア動作を行ない、それぞれのデータが一致
した時、一致信号:5を出力し、更にベクタ割り込み要
求信号二6を発生する。
Sampling circuit: 1 samples data input from the port for a certain period of time, and input data storage register:
2 is an 8-bit signal to which the data after sampling is transferred.
Register, data setting register: 3 is a programmable 8-bit register, conveyor circuit: 4 performs conveyor operation on the contents of input data storage register: 2 and data setting register: 3, and when the respective data match. , a match signal: 5 is output, and a vector interrupt request signal 26 is also generated.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、複数のポートから入力さ
れたデータ値と、あらかじめ設定できるデータ値とのハ
ード・ウェア・コンベア動作による一致信号によりベク
タ割り込み信号を発生させることにより、ポートからの
入力データ値によるプログラム処理の分岐が全く、ソフ
ト・ウェアの介添なく可能となり、ソフト・ウェア工数
の低減、かつ、高速処理が実現でき、更にスタンバイ・
モード時においてもポートからの外部データ・センスが
可能となる効果がある。
As explained above, the present invention generates a vector interrupt signal based on a match signal generated by a hardware conveyor operation between data values input from a plurality of ports and data values that can be set in advance. Branching of program processing based on data values is now possible without any software intervention, reducing software man-hours and achieving high-speed processing.
This has the effect of making it possible to sense external data from the port even in mode.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のブロック図である。 1・・・・・・サンプリング回路、2・・・・・・入力
データ格納レジスタ、3・・・・・・データ設定レジス
タ、4・・・・・・コンベア回路、5・・・・・・一致
信号、6・・・・・・ベクタ割り込み要求信号。 代理人 弁理士  内 原   晋
FIG. 1 is a block diagram of the present invention. 1... Sampling circuit, 2... Input data storage register, 3... Data setting register, 4... Conveyor circuit, 5... Match signal, 6...Vector interrupt request signal. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] 複数のポートから入力された外部データ値と、プログラ
ムにより設定可能な内部データ値とを比較する比較回路
を有し、該比較回路より出力される、前記、複数ポート
から入力された外部データ値と、プログラムにより設定
可能な内部データ値との一致信号によりベクタ割り込み
要求信号を発生することを特徴とするマイクロ・コンピ
ュータ。
It has a comparison circuit that compares external data values input from a plurality of ports with internal data values that can be set by a program, and the external data values input from the plurality of ports and the external data values input from the plurality of ports are output from the comparison circuit. A microcomputer, characterized in that a vector interrupt request signal is generated based on a match signal with an internal data value that can be set by a program.
JP63157316A 1988-06-24 1988-06-24 Microcomputer Pending JPH025141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63157316A JPH025141A (en) 1988-06-24 1988-06-24 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63157316A JPH025141A (en) 1988-06-24 1988-06-24 Microcomputer

Publications (1)

Publication Number Publication Date
JPH025141A true JPH025141A (en) 1990-01-10

Family

ID=15647025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63157316A Pending JPH025141A (en) 1988-06-24 1988-06-24 Microcomputer

Country Status (1)

Country Link
JP (1) JPH025141A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04315228A (en) * 1991-04-12 1992-11-06 Mitsubishi Electric Corp Microcomputer
JPH09160785A (en) * 1995-11-21 1997-06-20 Lg Semicon Co Ltd Apparatus and method for generation of interrupt
US6804732B2 (en) * 2002-03-29 2004-10-12 Denso Corporation Port sampling circuit apparatus incorporated in a microcomputer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04315228A (en) * 1991-04-12 1992-11-06 Mitsubishi Electric Corp Microcomputer
JPH09160785A (en) * 1995-11-21 1997-06-20 Lg Semicon Co Ltd Apparatus and method for generation of interrupt
US6804732B2 (en) * 2002-03-29 2004-10-12 Denso Corporation Port sampling circuit apparatus incorporated in a microcomputer

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