JPH01290316A - D/a converter - Google Patents
D/a converterInfo
- Publication number
- JPH01290316A JPH01290316A JP63119349A JP11934988A JPH01290316A JP H01290316 A JPH01290316 A JP H01290316A JP 63119349 A JP63119349 A JP 63119349A JP 11934988 A JP11934988 A JP 11934988A JP H01290316 A JPH01290316 A JP H01290316A
- Authority
- JP
- Japan
- Prior art keywords
- input
- converter
- digital signal
- conversion table
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 23
- 238000010586 diagram Methods 0.000 description 6
- 239000000872 buffer Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
この発明はD/A変換装置に関するものであり、特にそ
の特性の直線性に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a D/A converter, and particularly to the linearity of its characteristics.
[従来の技術]
D/A変換装置には種々の形式のものがあり、そのいず
れもが従来良く知られているので、その−船釣な説明は
省略するが、いずれの形式のものにおいても入出力特性
の直線性を得ることは困難であった。[Prior Art] There are various types of D/A converters, all of which are well known in the past. It was difficult to obtain linearity of input/output characteristics.
第3図は従来のD/A変換装置の入出力特性を表す特性
図であって、横軸はディジタル信号入力、縦軸はアナロ
グ信号出力を示し、Avで示す直線は理想的な入出力特
性であるが、現実の入出力特性はArで示す非線形特性
になる。Figure 3 is a characteristic diagram showing the input/output characteristics of a conventional D/A converter, where the horizontal axis shows the digital signal input, the vertical axis shows the analog signal output, and the straight line indicated by Av is the ideal input/output characteristic. However, the actual input/output characteristics are nonlinear characteristics shown by Ar.
[発明が解決しようとする課題]
従来のD/A変換装置はどのような形式のものでも第3
図に示すような非線性の特性を持っているが、特に梯子
(ladder)形R−2RD/A変換器と称せられる
形のものは非線形特性になりやすく、これを改善するた
めに出力バッファや帰還抵抗値を変えて調整していた。[Problem to be solved by the invention] No matter what type of conventional D/A converter is, the third
It has nonlinear characteristics as shown in the figure, but the so-called ladder type R-2RD/A converter is particularly susceptible to nonlinear characteristics, and to improve this, output buffers and It was adjusted by changing the feedback resistance value.
このような方法では、バッファサイズと帰還抵抗値及び
入力段のR−2R抵抗が互いに影響しあって直線性を出
すのが容易でなかった。また、帰還抵抗の決めかたによ
ってはバッファサイズが大きくなり、チップサイズが大
きくなるという問題があった。 この発明は従来の装置
における上述の問題点を解決し、簡単な回路を付加する
ことで線形特性を有するD/A変換装置を提供すること
を目的とする。In this method, it is difficult to achieve linearity because the buffer size, the feedback resistance value, and the R-2R resistance of the input stage influence each other. Furthermore, depending on how the feedback resistor is determined, the buffer size becomes large, leading to a problem that the chip size becomes large. It is an object of the present invention to solve the above-mentioned problems in conventional devices and to provide a D/A converter having linear characteristics by adding a simple circuit.
[課題を解決するための手段]
この発明ではD/A変換器の非線性を補正するような入
力を与える入力変換テーブルを作成しておき、入力ディ
ジタル信号をこのテーブルによって変換した後D/A変
換器に入力することにした。[Means for Solving the Problems] In the present invention, an input conversion table is created that provides an input that corrects the nonlinearity of the D/A converter, and after converting the input digital signal using this table, the D/A converter I decided to input it into the converter.
[作用]
D/A変換器の非線性が入力変換テーブルで予め補正さ
れる。[Operation] Nonlinearity of the D/A converter is corrected in advance using the input conversion table.
[実施例]
以下、この発明の実施例を図面を用いて説明する。第1
図はこの発明の一実施例を示す接続図で、図において1
は入力ディジタル信号Dr、2は入力変換テーブル、3
は変換ディジタル信号入力DV、4はD/A変換器、5
は出力アナログ信号Avである。[Examples] Examples of the present invention will be described below with reference to the drawings. 1st
The figure is a connection diagram showing one embodiment of this invention.
is the input digital signal Dr, 2 is the input conversion table, 3
is a conversion digital signal input DV, 4 is a D/A converter, 5
is the output analog signal Av.
第2図は第1図の入力変換テーブル2の記憶内容を示す
図で、入力変換テーブル2はROM (読み出し専用メ
モリ)等の形に構成され、Drをア下レスとして入力し
、Drの値に対応するDvの値を読み出す。第2図は第
3図Arに示す特性のD/A変換器4に対応する入力変
換テーブル2の内容を示し、以下、第3図の特性から第
2図のテーブルを作成する方法について説明する。入出
力特性を線形にするためには、Drの入力に対しAvの
出力が与えられればよい(現実にはArの出力を得てい
る)。このD/A変換器4でAvの出力を得るには入力
としてDvを入力すればよい。FIG. 2 is a diagram showing the stored contents of the input conversion table 2 in FIG. 1. The input conversion table 2 is configured in the form of ROM (read-only memory), etc. The value of Dv corresponding to is read out. FIG. 2 shows the contents of the input conversion table 2 corresponding to the D/A converter 4 having the characteristics shown in FIG. 3 Ar, and below, a method for creating the table shown in FIG. 2 from the characteristics shown in FIG. . In order to make the input/output characteristics linear, it is sufficient to give an output of Av to an input of Dr (in reality, an output of Ar is obtained). In order to obtain an output of Av with this D/A converter 4, it is sufficient to input Dv as an input.
すなわち、入力変換テーブル2でDrをDvに変換すれ
ばよいことになる。このようにして、Drの各位に対し
Dvを求め、これを記憶して入力変換テーブル2を作成
する。That is, it is sufficient to convert Dr to Dv using the input conversion table 2. In this way, Dv is determined for each part of Dr, and this is stored to create the input conversion table 2.
従って第1図のDrlとAv5は線形の関係になる。Therefore, Drl and Av5 in FIG. 1 have a linear relationship.
以上の説明では、ハードウェアとしての入力変換テーブ
ル2を用いる例を説明したが、プロセッサによるプログ
ラム制御で入力の変換を行ってもよい。In the above description, an example using the input conversion table 2 as hardware has been described, but input conversion may be performed under program control by a processor.
[発明の効果]
以上のようにこの発明によれば、簡単な装置でD/A変
換の直線性を改善することが出来る。[Effects of the Invention] As described above, according to the present invention, the linearity of D/A conversion can be improved with a simple device.
第1図はこの発明の一実施例を示す接続図、第2図は第
1図の入力変換テーブルの内容を示す図、第3図は従来
の装置における入出力の非線性を示す図。
1・・・入力ディジタル信号Dr、2・・・入力変換テ
ーブル、3・・・変換ディジタル信号入力Dv、4・・
・D/A変換器、5・・・線形アナログ出力信号。
なお、図中同一符号は同一または相当部分を示す。FIG. 1 is a connection diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the contents of the input conversion table of FIG. 1, and FIG. 3 is a diagram showing nonlinearity of input and output in a conventional device. 1... Input digital signal Dr, 2... Input conversion table, 3... Conversion digital signal input Dv, 4...
- D/A converter, 5... linear analog output signal. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
信号Arの各値を出力するD/A変換器、このD/A変
換器の入出力特性が直線性であると仮定したとき、上記
各入力ディジタル信号Drに対応する仮定アナログ信号
出力Avの各値を算出し、上記D/A変換器において、
上記Avの各値に対応して当該Avの値のアナログ信号
が出力される変換ディジタル信号入力Dvを算出し、上
記入力ディジタル信号Drの各値をアドレスとして、こ
れに対応する変換ディジタル信号入力Dvの各値を記憶
する入力変換テーブルを作成する手段、 上記入力ディジタル信号Drを上記入力変換テーブルに
入力し、上記入力変換テーブルの出力である変換ディジ
タル信号入力Dvを上記D/A変換器に入力してアナロ
グ信号出力に変換する手段を備えたことを特徴とするD
/A変換装置。[Claims] A D/A converter that outputs each value of an output analog signal Ar corresponding to each value of an input digital signal Dr, assuming that the input/output characteristics of this D/A converter are linear. Then, each value of the hypothetical analog signal output Av corresponding to each input digital signal Dr is calculated, and in the D/A converter,
A converted digital signal input Dv is calculated in which an analog signal of the value of Av is output corresponding to each value of the above Av, and each value of the input digital signal Dr is used as an address to calculate a converted digital signal input Dv corresponding to this. means for creating an input conversion table for storing each value of the input conversion table, inputting the input digital signal Dr to the input conversion table, and inputting a converted digital signal input Dv, which is an output of the input conversion table, to the D/A converter; D characterized in that it is equipped with means for converting the signal into an analog signal output.
/A conversion device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63119349A JPH01290316A (en) | 1988-05-18 | 1988-05-18 | D/a converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63119349A JPH01290316A (en) | 1988-05-18 | 1988-05-18 | D/a converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01290316A true JPH01290316A (en) | 1989-11-22 |
Family
ID=14759290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63119349A Pending JPH01290316A (en) | 1988-05-18 | 1988-05-18 | D/a converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01290316A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5101205A (en) * | 1990-01-24 | 1992-03-31 | Kabushiki Kaisha Toshiba | A/D converter including error correction for a local D/A converter |
-
1988
- 1988-05-18 JP JP63119349A patent/JPH01290316A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5101205A (en) * | 1990-01-24 | 1992-03-31 | Kabushiki Kaisha Toshiba | A/D converter including error correction for a local D/A converter |
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