JP5520289B2 - Improving the detection of defects on the display panel using front lighting. - Google Patents

Description

  The present invention relates to the detection of defects in flat panel displays, and more particularly to detecting defects in flat panel displays using front side illumination.

[Cross-reference of related applications]
This application is based on US Provisional Patent Application No. 61 / 055,031, filed on May 21, 2008, and claims benefit from that patent application under US Patent Act 119. The entire disclosure of that patent application is incorporated herein by reference.

  During the fabrication of flat panel liquid crystal (LC) displays, large transparent plates made of thin glass are used as a substrate for depositing thin film transistor (TFT) arrays. Usually, a single glass substrate plate contains several individual TFT arrays, which are sometimes referred to as TFT panels. Alternatively, such a glass substrate plate is referred to as an AMLCD panel because an active matrix LCD, or AMLCD, that utilizes transistors or diodes for each pixel or subpixel, covers such a display. There is also. Flat panel displays can also be manufactured using organic LED (OLED) technology, typically manufactured on glass, but can also be manufactured on plastic substrates.

  The deposition of the TFT pattern is performed in a number of stages, and in each stage, a specific material (eg, metal, indium tin oxide (ITO), crystalline silicon, amorphous silicon, etc.) is matched to a predetermined pattern by a preceding layer ( (Or glass). Each stage typically includes multiple steps such as deposition, masking, etching, stripping, and the like.

  During each of these stages, and at various steps within each stage, a number of manufacturing defects may occur and these defects affect the electrical and / or optical performance of the final LCD product. There is a case. Such defects include, but are not limited to, metal protrusions 110 into ITO 112, ITO protrusions 114 into metal 116, so-called mouth bite 118, open circuit 120, as shown in FIG. Includes a short circuit 122, foreign particles 126, and subpixel residue 128 in transistor 124. Amorphous silicon (a-Si) residue 128 under the pixel may result from under-etching or lithography issues. Other defects include mask problems, overetching, etc.

Even if the TFT deposition process is strictly controlled, the occurrence of defects cannot be avoided. This limits product yield and adversely affects production costs.
Typically, TFT arrays are
One or more automated optical inspection (AOI) system (s) following strict deposition process steps; and
Produced by Photon Dynamics (5970 Optical Court, San Jose, California, 95138, USA) (Orbotech). Inspected using.

Since the a-Si defect is photosensitive, it is a particularly troublesome defect. That is, the defect acts as an insulator in the dark state, but acts as a conductor when exposed. In practice, the sheet resistance R _Si decreases as a function of light intensity. FIG. 4 shows the dependency. Thus, the dependence of sheet resistance on light intensity means that pixel voltage changes due to defects may differ as exposure changes. Thus, if a defect is not detected prior to completion of the final FPD assembly, the defect will be exposed to the display backlight during normal FPD operation, and the end user will easily notice the defect. Therefore, there is a strong motivation for detecting such defects.

  Unfortunately, the prior art fails to provide a suitable methodology for effectively detecting a-Si residues that form defects on LCD panels during various stages of panel manufacture.

  The methodology of the present invention is a method that substantially avoids one or more of the above and other problems associated with detecting a-Si residues in LCD panel displays that form defects, and About the system.

  According to one aspect of the methodology of the present invention, a system for detecting defects in a panel under test is provided. The system includes a surface illumination subsystem configured to deliver a surface illumination light beam onto the panel under test. The surface irradiation light beam has the ability to change the electrical characteristics of the defect to facilitate the detection of the defect. The system further includes a detection subsystem configured to detect the defect based on the altered electrical property of the defect. The surface illuminating light beam used in the system is pulsed and optimized to obtain a duration and intensity that maximizes the detection of defects and minimizes the detection of false defects. Further, the surface irradiation light beam has a wavelength that matches the maximum absorption light characteristic of the defect.

  In accordance with another aspect of the methodology of the present invention, a system for detecting defects in a panel under test is provided. The system includes a surface illumination subsystem configured to deliver a surface illumination light beam onto the panel under test. The surface irradiation light beam has the ability to change the electrical characteristics of the defect to facilitate the detection of the defect. The system further includes a detection subsystem configured to detect the defect based on the altered electrical property of the defect. The detection subsystem includes a voltage imaging optical device configured to generate an image that points to the spatial voltage distribution across the panel under test. Defects in the panel under test are detected based on the generated image. In that system, the surface illumination subsystem is incorporated into the optical path of the voltage imaging optical device. Further, the surface irradiation light beam has a wavelength that matches the maximum absorption light characteristic of the defect.

  According to yet another aspect of the methodology of the present invention, a system for detecting defects in a panel under test is provided. The system includes a surface illumination subsystem configured to deliver a surface illumination light beam onto the panel under test. The surface irradiation light beam has the ability to change the electrical characteristics of the defect to facilitate the detection of the defect. The system further includes a detection subsystem configured to detect the defect based on the altered electrical property of the defect. The detection subsystem includes a voltage imaging optical device configured to generate an image that points to the spatial voltage distribution across the panel under test. Defects in the panel under test are detected based on the generated image. The surface illumination subsystem is located outside the optical path of the voltage imaging optical device. Further, the surface irradiation light beam has a wavelength that matches the maximum absorption light characteristic of the defect.

  Additional aspects related to the present invention are set forth in part in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. . Aspects of the invention may be realized and attained by means of the elements particularly pointed out in the following detailed description and the appended claims, as well as the combination of various elements and aspects.

  It is understood that both the foregoing description and the following description are merely exemplary and explanatory and are not intended to limit the claimed invention or its application in any way. I want.

  The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain and illustrate the principles of the techniques of the invention. .

FIG. 6 illustrates various non-periodic defects in a plan view of a portion of a large flat patterned medium with a periodic transistor array. 2 is an exemplary cross-sectional view of amorphous silicon residue. FIG. FIG. 6 is an exemplary equivalent circuit diagram for a-Si residue for TFT pixels. It is a sample graph which shows the dependence of sheet resistance to incident light wavelength. 1 is an exemplary schematic diagram of a dual wavelength illuminator (DWI), according to one embodiment of the inventive concept. FIG. FIG. 6 is an exemplary schematic diagram of a modulator mount illuminator (MMI) according to another embodiment of the inventive concept. 1 is an exemplary schematic block diagram of a system of the present invention for detecting defects in a flat panel display. FIG. 2 is an exemplary graph representing a typical absorption curve for amorphous silicon. FIG. 6 illustrates an example of a possible forward light and pixel pattern driver timing diagram. FIG. 6 is a diagram illustrating another example of a possible forward light pattern in which the pulse is different for each frame of a given drive pattern. FIG. 6 is a plot of defect detection sensitivity (DDS) as a function of forward light pulse end time for various pulse start times and pulse intensities. FIG. 4 is a plot of signal-to-noise ratio (SNR) as a function of forward light pulse end time for various pulse start times and pulse intensities.

  In the following detailed description, reference will be made to the accompanying drawing (s), in which identical functional elements are designated with like numerals. The accompanying drawings described above illustrate, by way of illustration and not limitation, specific embodiments and implementations consistent with the principles of the invention. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and other embodiments may be utilized, and from the scope and spirit of the invention. It should be understood that structural changes and / or substitutions of various elements can be made without departing. The following detailed description is, therefore, not to be construed in a limiting sense. Further, the various embodiments of the invention as described may be implemented in the form of dedicated hardware or in a combination of software and hardware.

As will be appreciated by those skilled in the art, array testers are described, for example, in US Pat. Nos. 4,983,911, 5,097,201 and 5,124, which are incorporated herein by reference in their entirety. , 635, can be used to identify defects in the LC display.
Pixels in an LC display have a specific pattern, for example, as described in US Pat. Nos. 5,235,272 and 5,459,410, which are hereby incorporated by reference in their entirety. And electrically driven.
Since an LC display is composed of an array of pixels, when the LC display is electrically driven, some pixels associated with the defect may behave electrically differently from normal pixels. Therefore, such a difference may be detected using a voltage imaging sensor and associated image processing software.
By using various drive pattern combinations, the type and location of many of the defects shown in FIG. 1 can be estimated.

However, defective pixels with a-Si residue 128 under ITO are quite difficult to detect in an array test using standard array test methods. A cross-sectional view of an example of a TFT pixel 200 having a-Si defects is shown in FIG.
The TFT pixel structure 200 is formed on the glass plate 202. A gate insulator 204 may be placed on the glass and then the data metal line 206 may be plated and then in the form of a transparent conductive material such as indium tin oxide (ITO) 210. A pixel feature is deposited. Finally, a passivation layer such as silicon nitride (SiNx) 208 is deposited.
Amorphous silicon or data metal residue 212 may remain, represented schematically by an extension of the line feature, which later falls under the ITO layer. The area of the overlap 214 between the residue 212 and the pixel (ITO) 210 forms a capacitor 216 having a parasitic capacitance Cp.

FIG. 3 is an equivalent view of the a-Si residue under the pixel.
In this case, the following equation holds.
C _p = k _SiN ^* ε ₀ ^* Area _residue / d _gateSiN (Formula 1)
C _st = k _SiN ^* ε ₀ ^* W _pixel W _st / d _passSiN (Formula 2)
Where C _p is the parasitic capacitance, k _SiN is the dielectric constant of SiN, ε ₀ is the dielectric constant in the air, W _pixel is the width of the pixel, while W _st (having capacitance Cst) It is the width of the storage capacitor, d _passSiN and d _gateSiN are the thicknesses of the passivation layer and the gate-SiN layer, respectively, and Area _residue is the area of the residual defect under the corresponding part.

During array testing, a drive voltage is applied to the LC plate and the pixel response can be observed by a voltage imaging sensor. In the presence of defects such as data metal residue and a-Si, a positive-negative (PN) drive pattern in which the data voltage is negatively dropped before image acquisition may be used. In this pattern, the data voltage drop causes a voltage drop in the pixel having the ITO-data line overlap. If the data voltage drop is ΔV _d , the pixel voltage drop ΔV _p can be expressed as:

Where C _p is the parasitic capacitance of the ITO-data line residue overlap, C _st is the capacitance of the storage capacitor, and R _Si is the sheet resistance of amorphous silicon.

Equations 1 and 3 reveal two important points regarding a-Si defects. First, the parasitic capacitance is a function of the defect size (Area _residue ). The second is an exponential dependence on the sheet resistance R _Si .
In the insulator state (in the absence of light), R _Si may be very high (approximately several hundred GΩ / □), and therefore according to Equation 3, ΔV _p is ΔV _d ^* (C _p / C _st ), approximately equal to the maximum value. Since C _p <C _st , the maximum ΔV _p when not exposed may be quite small, and therefore the defect may not be easily detected if light is not available. As a result of the change depending on the area of the overlapping portion, a shift of several gradations may occur under the conventional 64 gradation driving method. The voltage step between two consecutive tones is about 50 mV. This is too small to distinguish between defects and normal pixels.

  However, due to the size dependence (Equation 1), very small a-Si defects may not be detected even when exposed.

Some a-Si defects can be found using AOI, while others can be detected using AC using conventional defect detection techniques. However, a significant proportion of such defects is not identified early and is detected only after the TFT-LCD cell assembly is complete, exactly after the LC plate is divided into panels and assembled into modules. Not.
In the cell test, the backlight module provides a light source for the TFT-LCD panel to display an image when the TFT-LCD panel is electrically driven. Since a-Si is photosensitive, this defect can be detected under these conditions.
However, it is desirable to find defects accurately prior to the cell assembly step, and more preferably in the array inspection step, because the residue can be removed relatively easily using a laser repair system. Furthermore, detecting defects at an early stage of the manufacturing process and prior to cell assembly saves the costs associated with the assembly process and the required color filter glass.

Since LCD array inspection devices generally do not include an external light source, detection of a-Si residue can be difficult. The AC47xx product family of array testers manufactured by Photon Dynamics (acquired by Orbotech) includes a short wavelength backlight used with a transparent chuck on a split axis type system, and the inspection area and hence the chuck is Limited to a single modulator row.
However, in gantry type systems where the chuck covers the entire glass size, the associated backlight also needs to cover the entire glass size by moving (eg, single path) or in a fixed state (eg, full cover). As a result, practicality and cost efficiency may be reduced.

In some cases where the a-Si residue covers the gate metal in the TFT, it is difficult to detect a-Si on the gate residue because the backlight cannot pass through the gate mechanism. This is a frequent defect in some pixel designs with redundant TFTs, more specifically in cases where the redundant TFTs are electrically isolated and not connected to the pixel.
When the a-Si residue bridges the pixel TFT and the redundant TFT, it affects performance and is therefore considered a defect. The a-Si residue increases C _gd (gate-drain parasitic capacitance). When the gate turns off (voltage swing: ΔV _g ), the pixel voltage drops due to the gate-drain capacitor coupling effect. This is called the kickback effect. The pixel voltage drop ΔV _p can be expressed as:
ΔV _p = ΔV _g ^* C _gd / (C _gd + C _st + C _lc ) (Formula 4)
However, C _lc is a cell capacitance (existing only in the case of cell driving). The a-Si residue on the gate that connects the pixel TFT to the redundant TFT increases the gate-drain capacitance, which also increases the pixel voltage drop.

  Other non-voltage imaging array testers, such as testers that use an electron beam, can detect a-Si residue by spraying electrons onto the defect and the electrons accumulate in the defect area. The accumulation of electrons increases the a-Si conductivity, thereby allowing the associated imaging method to detect the defect.

In accordance with one embodiment of the present invention, it is generally possible to detect a-Si residue defects in an array test step well before the cell step, and in particular, a on the gate insulator of a TFT array cell. A surface irradiation apparatus and method are provided that allow detection of Si residues. As will be appreciated by those skilled in the art, in TFT array testing, a-Si has a high resistivity when not exposed.
On the other hand, when the a-Si residue is irradiated with light, its resistivity decreases, thereby changing the electrical characteristics of the TFT array cell, which is referred to as Photon Dynamics (5970 Optical Court, San Jose, California, 95138, USA) (Orbotech) and can be detected using a voltage imaging optical system (VIOS). Exemplary embodiments of such systems are described in detail in the above-mentioned US Pat. Nos. 4,983,911, 5,097,201 and 5,124,635, which Are hereby incorporated by reference in their entirety.
Thus, in one embodiment of the present invention, the TFT array cell is exposed to an illuminating light pulse that affects the top surface of the TFT panel during a test performed using VIOS.

  According to one embodiment, the surface illumination proceeds along the same path as the illumination used for voltage imaging in the VIOS. In one embodiment, VIOS illumination is performed in the red portion of the visible wavelength range. In one specific embodiment, an exemplary light wavelength is 630 nm. According to another embodiment, the surface illumination consists of one or two wavelengths and is delivered to the periphery of the VIOS voltage image modulator.

In one embodiment of the present invention, incorporating top or surface illumination into a flat panel array tester is accomplished in conjunction with the VIOS test apparatus and its functions. As a result, several components of the VOIS array are used for both surface illumination and VIOS imaging, thus saving the overall cost of the test system and increasing efficiency.
Specifically, because the ability to detect the target defect (a-Si) is a function of light intensity, the front illumination of the TFT cell must be appropriately uniform and reproducible across the target detection area. I must. In addition, illumination and optical devices for detecting a-Si can occur in TFT cells, and some of them are VIOS tester's in searching for other types of defects described above. Do not disturb the function.

In one embodiment of the present invention, it facilitates the detection of photosensitive fabrication defects, such as residual a-Si residues that are on structures such as on the gate structure or adhere to the data lines of LCD pixels. To that end, a system is provided that is configured to generate surface illumination of an LCD structure on a panel under test during LCD array testing.
In one embodiment of the system of the present invention, the surface of the panel is illuminated with light having a wavelength that is different from the wavelength of light used in the VIOS for voltage imaging. This is done for at least several reasons. First, the light used in VIOS irradiation may have a wavelength that may not be able to efficiently detect a-Si residue and / or other photosensitive defects. Second, the VIOS modulator design is such that the light used in the VIOS for voltage imaging is almost completely reflected by the modulator thin film and therefore never reaches the panel.
Thus, the light for surface illumination is selected to activate the a-Si residue (change its electrical properties) and be transmitted by the thin film.

  Finally, the entire system comprises means (a low pass filter 510 shown in FIG. 5) that separates these two light beams and prevents the light used for surface illumination from interfering with VIOS imaging, Utilizing the above difference in light wavelength.

  A diagram illustrating one exemplary embodiment of the dual wavelength optical illumination system 500 of the present invention is presented in FIG. This exemplary diagram is provided for illustration only and should not be considered as limiting the scope of the invention in any way. As shown in FIG. 5, a dual wavelength irradiator 512 (DWI) is used in combination with an array inspection and test system based on a voltage imaging optical system (VIOS). Placed inside. The configuration of the VIOS irradiation apparatus is described, for example, in US Pat. No. 5,124,635, which is incorporated herein by reference in its entirety.

  As shown in FIG. 5, the dual wavelength irradiator 512 emits blue light 504 generated by the blue light irradiator 502 (for example, having a wavelength of 455 nm at which an a-Si defect is particularly susceptible) with red light. Coupled to the same optical path as visible light 505 (eg, having a wavelength of 630 nm) generated by apparatus 501 and used for defect imaging. Specifically, FIG. 8 shows a typical light absorption curve 801 for a-Si, which shows that light having a wavelength of 455 nm (802) has the highest absorption coefficient when a-Si is used. Show.

  The above combination of two light beams of different wavelengths is achieved in the dual wavelength irradiator 512 by using a dichroic mirror (beam splitter) 503. The dichroic mirror substantially transmits the blue light beam 504 and substantially reflects the red light beam 505 to produce a combined light beam having both wavelengths. As will be appreciated by those skilled in the art, combining light beams of different wavelengths may be achieved in numerous other ways, some of which are described below with reference to other embodiments of the invention. Explained. Therefore, the specific design of the dual wavelength irradiator 512 shown in FIG. 5 should not be considered as limiting in any way.

  Returning to the system shown in FIG. 5, after passing through the dichroic mirror (beam splitter) 503, the collinear blue and red light beams are reflected by the beam splitter 506 and pass through the lens assembly 507. A lens assembly is provided to achieve the desired illumination distribution pattern on the light modulator 508 and the panel under test 509.

  As noted above, in various additional or alternative embodiments of the present invention, dual wavelength collinear illumination of the light modulator 508 and the panel under test 509 may be performed in several different ways. Can be achieved. For example, in one embodiment, wavelength selection may be limited, but multi-wavelength light emitting diodes (LEDs) may be used. In this configuration, for example, instead of the light source 502, it is only necessary to use one irradiation device using the above-described multi-wavelength light emitting diode, and the second light source 501 and the dichroic mirror 503 are excluded from the irradiation system. can do.

  In a further alternative embodiment, a single wavelength red LED may be spatially interspersed with a single wavelength blue LED within a single light source, which is also used in place of the light source 502. be able to. Again, in this configuration, the second light source 501 and dichroic mirror 503 need to be excluded from the illumination system. However, it should be noted that in such a configuration using LEDs interspersed with two different wavelengths, the uniformity of illumination may be compromised.

In one embodiment, the VIOS modulator 508 is provided with a thin film 515. The thin film is placed on the surface of the modulator 508 in close spatial proximity to the LCD structure to be tested of the panel under test. The thin film 515 has optical properties that are specifically selected such that red light generated by the irradiator 501 is reflected by the thin film 515, while blue light generated by the irradiator 502 is transmitted by the thin film 515.
The modulator 508 reflects red light reflected by the thin film 515 based on the distribution of potential across the top (in FIG. 5) surface of the panel under test 509, which is placed in close proximity to the thin film of the modulator 508. Modulate the intensity of.
After being reflected by the thin film, the modulated red light passes through the lens assembly 507, beam splitter 506, and low pass filter 510. After passing through the filter 510, the reflected red light strikes the photosensitive element of the CCD device 511, and an image of the panel under test is generated using the CCD device.
In order to prevent any blue light used to illuminate the a-Si residue from interfering with the VIOS CCD image sensor 511, the CCD device 511 is provided with a low pass filter 510.
This filter has a light transmission characteristic designed to greatly attenuate blue light and allow red light to pass through without attenuation. This prevents the surface-illuminating blue light from reaching the CCD device 511 and does not prevent the generation of an image relating to the potential on the upper surface of the panel under test 509.
In one embodiment of the present invention, for example, blue light is an electrical property of the a-Si residue so that it can be more easily detected by VIOS and does not produce an image of the defect itself. Note that it is only used to change

The LCD structure to be tested on the surface of the panel under test 509 is biased using a voltage source 513, while the top surface (516) of the modulator 508 is biased using a voltage source 514. .
In one embodiment of the present invention, all optical components of the system are provided with a suitable optical coating to achieve the best light transmission and reflection.
It should be noted that the uniformity of illumination with light of both wavelengths (blue and red) is similar and is typically about 25% or more in one embodiment of the present invention. Typical uniformity of irradiation is in the range of 10% to 15%. Thus, according to the dual wavelength illumination concept of the present invention and the configuration shown in FIG. 5, a-Si defects are most susceptible, but degrade or prevent voltage imaging test (VIOS) hardware functionality. It becomes possible to irradiate an a-Si defect at a wavelength having no.

  Note that the present invention is not limited to illuminating the modulator and panel under test with only red and blue light. As will be appreciated by those skilled in the art, in order to change the electrical properties sufficiently to allow detection and to reduce surface illumination from interfering with the operation of the VIOS, another wavelength of illumination light may be used. Select to achieve proper absorption by the a-Si residue, which is used to reproduce the voltage distribution pattern across the panel under test.

According to a second alternative embodiment of the dual wavelength illumination concept of the present invention for use in combination with an array inspection and test system also based on VIOS, shown in FIG. A ring irradiation device 601 is incorporated.
A ring illuminator 601 is installed on the modulator 508, and a single wavelength (blue or approximately 455 nm wavelength) light source 603, such as an LED, is placed outside the optical path of the VIOS illuminator to prevent image clipping.
Similar to the first embodiment described above, a thin film (not shown) of modulator 508 transmits blue light and is generated by red illumination device 501 and for the function of voltage imaging modulator 508. Reflects the required visible wavelength light.
The light source 603 generates an irradiation pattern 604. In one exemplary embodiment of the invention, each side of the mounting ring 601 supports four LEDs 603. However, those skilled in the art will appreciate that any other suitable number of LEDs spaced on the mounting ring 601 in any suitable manner can be used to achieve the desired intensity and uniformity of illumination. Let's be done.
Therefore, the present invention is not limited to the illustrated configuration of the irradiator ring 601, the modulator mount 600 and the light source 603. In various embodiments of the present invention, the irradiator ring 601 has a square, rectangular, octagonal, circular, oval or other suitable shape.
In order to affect the electrical properties of the a-Si residue on the panel under test, the light generated by the light source 603 passes through the modulator 602 and illuminates the front surface of the panel under test.

As will be appreciated by those skilled in the art, depending on the size of the area of the modulator 508, in some cases, particularly when the number of LEDs 603 is relatively small, the dual wavelength illumination device described with reference to FIG. Compared to the DWI) embodiment, it may be more difficult to achieve good uniformity in this embodiment.
However, by increasing the number of LEDs 603 to 10 or more per side (total of 40 or more in total), it becomes easier to make the irradiation more uniform, and the dual wavelength irradiation apparatus described with reference to FIG. (DWI) Uniformity comparable to that achieved by embodiments can be achieved.
In order to obtain the best uniformity over the entire range of the modulator area, the emission angle of the LED must be controlled. As is well known in the art, some LEDs have a Lambertian emission profile and therefore emit at a very large solid angle, which is desirable to achieve a high degree of illumination uniformity. Harmful to the goal. This is because more light is transmitted unevenly to the center of the modulator.
There are several alternative solutions that may be used to overcome this disadvantage. In one embodiment, a special directional LED is used as the light source 603, which is oriented to illuminate the innermost portion of the modulator 508.

In alternative embodiments, a collimating lens is added to each general purpose LED, or preferably optically coupled, to suppress the spread of the Lambertian profile. Various methods for optically coupling a collimating lens to an LED are well known in the art.
In one embodiment, each LED has its own collimating lens. Such a collimating lens facilitates increasing the uniformity of surface illumination.
In yet another embodiment, directional attenuation is applied by adding a neutral density filter on the LED side. In addition, diffusers can be used to (1) smooth the spatial non-uniformity of each LED and (2) improve the overall illumination uniformity of the synthesized LED distribution. For example, in one embodiment, a diffuser manufactured and sold by Luminit (Torrance, California, USA) (Physical Optics Corporation) may be utilized.

  In one embodiment, surface illumination uniformity can be improved using a beam shaping diffuser that generates an elliptical radiation distribution. In the same or different embodiments, surface illumination uniformity can also be improved by utilizing light bending or turning films.

The multiple light source configuration shown in FIG. 6 in which the light source 603 that provides surface illumination to the a-Si residue on the surface of the panel under test 509 is mounted on a separate mounting ring located proximate to the modulator 508 is: The main advantage over the dual wavelength irradiator system of FIG. 5 in which the second light source is incorporated within the VIOS array itself is that it can be easily modified to an existing gantry type system and is inexpensive. It is.
In addition, the inventive concept shown in FIG. 6 can be applied to defect detection techniques (such as electron beam based detectors and possibly full contact probe testers) that require uniform ambient illumination. . However, as noted above, it should be noted that the electron beam detector is not compatible with blue light illumination.

  As will be appreciated by those skilled in the art, a system configuration for providing surface illumination that involves placing a light source near the modulator can be achieved in numerous ways other than the embodiment shown in FIG. . Therefore, the specific design of the illuminator system shown in FIG. 6 should not be considered as limiting in any way.

FIG. 7 illustrates one exemplary schematic block diagram of a system 700 for detecting defects in a flat panel display utilizing one of the conceptual embodiments of the present invention.
The system of the present invention includes a VIOS 702. VIOS 702 includes a dual wavelength irradiator 703, one exemplary embodiment of which has been described above with reference to FIG. 5 (element 512).
A light beam of a first wavelength generated by the irradiation device 703, for example, blue light, is directed onto the LCD panel 701 installed on the glass support.
A second wavelength light beam generated by the illumination device 703, eg, red visible light, is directed onto the modulator 705 and the light is reflected by a thin film (not shown) of the modulator 705. Modulator 705 operates to convert the electric field on the biased LCD panel under test into a spatially modulated optical signal via an electro-optic converter (modulator).
The reflected light is focused on the CCD device 711 by the lens system 704, which generates an image of the area of the LCD panel under test in the reflected red light, and the generated image is the panel under test. Indicates the distribution of potential across 701.
The exemplary system 700 may further comprise an image acquisition / image processing PC 709 that receives image data from the CCD device 711 and generates and generates an image of the panel under test using the received image data. The processed image is configured to identify the defective LCD cell, including the location of the defective cell on the panel under test. The defect location information can be recorded for further processing, such as correcting a detected defect.

  In one embodiment of the present invention, the VIOS 702 is mounted on a movable X / Y / Z stage assembly 706 that can be moved under the control of the stage / IO control module 707. In one embodiment of the present invention, two or more VIOS 702 are mounted on the same X / Y / Z stage 706 so that different areas of the panel under test are inspected simultaneously using different VIOS 702.

  Finally, a test signal pattern generator 710 is arranged to provide a drive voltage pattern to the LCD panel under test, to control the illuminator trigger, and to provide the necessary bias voltage to the modulator.

Also, in one embodiment of the present invention, the front light illumination system can be fully integrated into the VIOS subsystem and is not more or less limited by the detection techniques described above to provide optimal absorption efficiency and illumination uniformity. Please note that.
The forward light illumination technique shown in FIG. 6 can also be adapted for use in an electron beam based detection system. However, the dual wavelength irradiator design described above and shown in FIG. 5 (design where the blue light used for a-Si activation follows the same optical path as the main VIOS irradiator light to the modulator) In that case, the irradiation uniformity should be particularly good.

  In one specific embodiment of the present invention, the surface illumination is pulsed and optimized to obtain a duration and intensity that maximizes the detection of photosensitive defects for the TFT pixels. Specifically, the surface irradiation light has a wavelength that matches the maximum absorption light characteristic of the photosensitive defect. In one specific embodiment, blue light having a wavelength of less than 470 nm is utilized for surface illumination of the a-Si residue.

In one embodiment of the present invention, the wavelength used to increase the conductivity of the amorphous silicon residue is selected to match the absorption characteristics of the material in order to obtain optimal forward light efficiency.
Typically, a-Si has an absorption edge in the low wavelength (blue light) range. See curve 801 in FIG. When the wavelength becomes longer (energy becomes lower), its absorption decreases rapidly. On the other hand, when the wavelength becomes shorter, its absorption is generally not changed.
Because blue light induces a significant amount of noise in the secondary electron detector used to measure the pixel voltage, electron beam based defect detection is not compatible with the use of blue light. Please keep in mind. There are two reasons for this. First, since photons with short wavelengths, such as blue light, have higher energy than photons with red wavelengths, the scintillator-photomultiplier tube detection where those photons are needed to detect electrons When it hits the vessel, it generates more unwanted noise signals. Second, the energy of secondary electrons entering the detector can be affected by electron and photon collisions, which can lead to large signal variations and contribute to overall noise. Become.

Amorphous silicon is sensitive to short wavelengths of light, thus generating mobile photoelectrons after irradiation, thereby increasing the conductivity of a-Si defects. In some embodiments, blue light having a wavelength of 470 nm (or shorter wavelength) is selected. This is because, in part, blue light has a relatively high power, is more efficiently absorbed in a-Si, and has a low sheet resistance.
FIG. 4 shows two plots of sheet resistance as a function of light intensity for two different wavelengths, 470 nm (plot 401) and 530 nm (plot 402). From these plots it is clear that the shorter of the two wavelengths (401) reduces the resistance more rapidly as the intensity increases. Since a signal corresponding to light having a short wavelength may become stronger, the use of a shorter wavelength may enable detection of a defect having a smaller size (Equations 1 and 3).

One disadvantage associated with irradiating the front panel surface with light having a wavelength to which a-Si is sensitive is that the TFT channel is also exposed to the same light irradiation.
Since the TFT structure is also composed of a-Si material, the impinging surface irradiation will increase the conductance of the a-Si material in the TFT, as well as the residue that forms the defects. When exposed, the off-state conductance of the TFT will increase and therefore the leakage current of the TFT will be larger than the corresponding value in the dark state. This results in increased pixel voltage attenuation, which can be detected by a voltage image tester or other similar test method that utilizes the voltage response of the TFT to detect defects.
Thus, even if the TFT channel is not actually defective, the tester may misinterpret the channel as having a defect that depends on the attenuation of the pixel voltage. That is, false defects may be observed as a result of illuminating good TFT pixels or channels with surface illumination light.

One method of minimizing pixel voltage attenuation due to TFT leakage current, but at the same time maximizing the detection response of the a-Si residue, is to pulse the front illumination light and the duration and intensity of the light pulse. By changing.
FIG. 9 is one exemplary graphical user interface 900 showing a forward light timing diagram versus LCD drive pattern signal timing. Signals 901 (data odd number), 902 (data even number), 903 (gate odd number), and 904 (gate even number) constitute the LCD test drive pattern. The surface irradiation pulse 905 is characterized by its intensity, duration, start time and end time.

FIG. 10 is another example of a possible front light pattern 1000 where the parameters of the surface illumination pulse 905 are different for each frame of a given drive pattern.
Specifically, in the first (A) frame, the surface irradiation pulse 905 has a duration of 3 ms, a start time of 3.5 ms, and an intensity of 50%. In the second (B) frame, the surface irradiation pulse 905 is turned off. In the third (C) frame, the surface illumination pulse 905 has a duration of 7 ms, a start time of 0 ms and an intensity of 25%. Finally, in the fourth (D) frame, the surface illumination pulse 905 has a duration of 3 ms, a start time of 3.5 ms and an intensity of 50%. The modulator bias voltage 906 is the same for each frame.

Maximizing the pixel voltage reduction due to a-Si residue while minimizing the voltage reduction due to TFT leakage will keep the site standard deviation small or increase the signal-to-noise ratio (SNR). This corresponds to maximizing the defect detection sensitivity (DDS).
Specifically, the value of DDS is a measure of defect contrast and is defined as a comparison between the pixel voltage for a normal pixel and the pixel voltage when there is a defect. That is, DDS = (1-V _defect / V _site-av ). Typically, the DDS should be greater than 0.3 when detecting using a 30% threshold, which is a value typically used in defect detection.
The site standard deviation should remain below 0.4 V, while the signal to noise ratio SNR = (V _site-av / standard deviation) may be greater than 25.

11A and 11B show test results 1100 and 1200 obtained using one exemplary embodiment of the system of the present invention in the case of one specific type of defect (parasitic data pixel capacitance type defect). .
These figures show the dependence of DDS (FIG. 11A) and SNR (FIG. 11B) on forward light end time. Specifically, the data plots 1101-1109 of FIG. 11A are shown for nine pairs of intensity and start time values.
Specifically, 10% intensity, 1 ms start time (plot 1101); 10% intensity, 7 ms start time (plot 1102); 10% intensity, 9 ms start time (plot 1103); 50% intensity, 1 ms start time (plot 1104); 50% intensity, 7 ms start time (plot 1105); 50% intensity, 9 ms start time (plot 1106); 90% intensity, 1 ms start time (plot 1107); 90% intensity, 7 ms start time (plot 1108) And 90% intensity, 9 ms start time (plot 1109).
The plots 1201-1209 shown in FIG. 11B correspond to the same intensity / start time pairs as the respective plots 1101-1109 in FIG. 11A.
Note that pulse duration, intensity and start time may vary from panel to panel and may be different for different defect types.

First, from the provided plots 1101-1109, with increasing pulse end time and duration, DDS increases (due to the effect of forward light on the a-Si residue) and SNR decreases (to TFT). Can be observed) due to the influence of forward light.
Second, the DDS value increases and the SNR value decreases between 10% intensity and 50% intensity, but this does not change as the intensity increases further. This shows a saturation effect.
Third, the values of DDS and SNR appear to saturate when T _end > 14 ms (T = 0 is obtained at the beginning of the positive modulator cycle).
Fourth, pulses that are within the negative modulator bias cycle have no effect when pixel drive is not performed.

As shown in FIGS. 11A and 11B, in a particular embodiment of the inventive concept, the best detection, ie DDS> 0.3 and SNR> 25%, is for 50% and higher intensity and modulation This is satisfied in the case of a pulse that ends at t = 8 ms to 11 ms after the start of the positive half of the generator bias cycle, ie, a pulse that overlaps by 1 ms to 3 ms with the holding time that ends immediately after the data voltage drop.
Note that pulses with a long duration will drop unacceptably SNR due to TFT leakage caused by light. For comparison, FIG. 11B also shows an SNR value 1210 corresponding to defect detection when no forward light is used.

  Finally, the processes and techniques described herein are not inherently related to any particular apparatus and may be implemented by any suitable combination of multiple components. Moreover, various types of general purpose devices can be used in accordance with the teachings described herein. It may also prove advantageous to configure a dedicated device to perform the method steps described herein. Although the present invention has been described in the context of particular examples, the examples are not intended to be limiting in any respect, but are intended to be exemplary. Those skilled in the art will appreciate that many different combinations of hardware, software and firmware are suitable for practicing the present invention.

  Furthermore, other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. Various aspects and / or components of the above embodiments may be used in the defect detection system of the present invention alone or in any combination. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the appended claims and their equivalents.

Claims (35)

A system for detecting defects in a panel under test,
The front surface illumination light to a front side illumination subsystem configured to deliver to the device under test panel, the light beam surface irradiation facilitate detection of the defects by changing the electrical characteristics of the defect A surface illumination subsystem;
And a voltage imaging optical system configured to detect the defects based on the altered electrical properties of the previous SL defects (VIOS),
The surface irradiation subsystem is configured to guide the surface irradiation light along a surface irradiation light path;
The VIOS is configured to guide voltage imaging light along a voltage imaging optical path;
The surface illumination optical path overlaps the voltage imaging optical path;
A system for detecting defects in a panel under test. The system further comprises a voltage signal source configured to apply a voltage signal to the panel under test,
The applied voltage signal causes a spatial voltage distribution across the panel under test, and the VIOS is configured to generate an image indicating the spatial voltage distribution across the panel under test ,
The defect is detected based on the generated image;
The system of claim 1. Wherein the voltage imaging optical path of the VIOS comprises a dichroic mirror configured to combine the voltage imaging optical及 beauty the front side illuminating light,
The system of claim 1 . The VIOS further comprises a modulator configured to modulate the voltage imaging light according to the spatial voltage distribution across the panel under test;
The modulator has a thin film disposed on the modulator and configured to reflect the voltage imaging light and transmit the surface illumination light .
The system of claim 1 . The surface irradiation light is in a blue wavelength range,
Wherein the voltage imaging light has a wavelength different from that of the front side illuminating light beam,
The system of claim 1. A system for detecting defects in a panel under test,
a. A surface illumination subsystem configured to deliver surface illumination light onto the panel under test, wherein the surface illumination light alters the electrical properties of the defect to facilitate detection of the defect A surface irradiation subsystem;
b. A detection subsystem configured to detect the defect based on the altered electrical property of the defect; and
The detection subsystem comprises a voltage imaging optical device configured to generate an image indicative of a spatial voltage distribution across the panel under test;
The defect is detected based on the generated image;
The surface irradiation light has a wavelength that matches the maximum absorption light characteristic of the defect,
The surface irradiation subsystem is configured to guide the surface irradiation light along a surface irradiation light path;
The surface illumination optical path is the same as the voltage imaging optical path provided in the voltage imaging optical device ;
A system for detecting defects in a panel under test. Wherein the optical path of the voltage imaging optical device comprises a dichroic mirror configured to combine a voltage imaging light及 beauty the front side illuminating light system according to claim 6. The voltage imaging optical device comprises:
An imaging device configured to generate the image indicative of the spatial voltage distribution across the panel under test;
The system of claim 6 , comprising: a low pass filter configured to prevent the surface illumination light beam from reaching the imaging device. Wherein the voltage imaging optical device, the includes a configured modulator to modulate with voltage imaging light according to the spatial voltage distribution across the panel under test,
The modulator includes a thin film configured to reflect the voltage imaging light and transmit the surface illumination light ;
The system according to claim 6 . The surface irradiation light beam is in a blue wavelength range;
Wherein the voltage imaging light to produce an image by the voltage imaging optical device, having a wavelength different from that of the front side illuminating light beam system of claim 6. A system for detecting defects in a panel under test ,
A light source providing voltage imaging light, a modulator for modulating the intensity of incident light based on a spatial distribution of potential across the panel under test, and an image indicating the spatial voltage distribution of the potential across the panel under test It has a voltage imaging optical device configured to generate the voltage imaging optical system configured to detect the defects based on the changed electrical properties of the defects and (VIOS)
A surface illumination subsystem comprising a surface light source that provides surface illumination light that alters the electrical properties of the defect;
A thin film disposed on the modulator for reflecting the voltage imaging light and transmitting the surface illumination light;
A low-pass filter that transmits the voltage imaging light modulated by the modulator and prevents the surface illumination light reflected by the panel under test;
With
The defect is detected based on the generated image;
The surface irradiation light has a wavelength that matches the maximum absorption light characteristic of the defect,
The surface illumination subsystem is disposed outside the optical path of the voltage imaging optical device;
A system for detecting defects in a panel under test. 12. The system of claim 11 , wherein the surface light source comprises a plurality of special directional light emitting diodes disposed on a mounting ring to optimize the uniformity of the surface illumination light . The surface light source comprises a plurality of light emitting diodes,
Wherein at least one of the plurality of light emitting diodes, in order to optimize the uniformity of the surface illumination light, is a collimating lens optically coupled to be disposed on the mounting ring, claim 11 The system described in. The system of claim 11 , wherein the surface light source comprises a plurality of light emitting diodes optically coupled to a directional attenuation module to optimize the uniformity of the surface illumination light beam. The system of claim 14 , wherein the directional attenuation module includes an ND filter. The voltage imaging optical device comprises:
The system of claim 11 , comprising an imaging device configured to generate the image indicative of a spatial voltage distribution of the potential across the panel under test. The thin film is disposed on the modulator;
The surface illumination subsystem is disposed in spatial proximity to the modulator;
The system of claim 11 . The system of claim 11 , wherein the VIOS and the surface illumination subsystem are mounted on a movable stage assembly configured to scan through the panel under test under control of a stage control module. Wherein mounted on the movable stage assembly, even the second VIOS and at least a little further comprising a second surface illumination subsystem, system of claim 18. The surface irradiation light is in a blue wavelength range,
Wherein the voltage imaging light to produce an image by the voltage imaging optical device comprises a wavelength different from that of the front side illuminating light,
The system of claim 11 . The surface light source comprises a plurality of light emitting diodes,
Each of the plurality of light emitting diodes is provided with a diffuser optically coupled to each of the plurality of light emitting diodes,
The system of claim 11 , wherein the diffuser is configured to smooth the spatial non-uniformity of the surface illumination light and improve the overall illumination uniformity of the surface illumination light . A method for detecting defects in a panel under test,
Using said front surface illumination subsystem be to deliver front side illuminating light onto the test panel, the front side illuminating light to facilitate detection of the defects by changing the electrical characteristics of the defect Delivering ,
Delivering the voltage imaging light onto a modulator that modulates the voltage imaging light in accordance with the altered electrical properties of the defect; and
Detecting the defect based on the modulated voltage imaging light;
Delivering the surface illumination light onto the panel under test includes sending the surface illumination light along a surface illumination optical path;
Delivering the voltage imaging light onto the modulator includes sending the voltage imaging light along a voltage imaging optical path;
The surface illumination optical path overlaps the voltage imaging optical path ;
A method for detecting defects in a panel under test. The method
Applying a voltage signal to the panel under test, causing the applied voltage signal to produce a spatial voltage distribution across the panel under test, and applying the spatial voltage distribution across the panel under test. Further comprising generating an image to indicate,
The defect is detected based on the generated image;
The method of claim 22 . The image indicating the spatial voltage distribution across the panel under test is generated using a voltage imaging optical device;
The voltage imaging optical device comprises an imaging device and a low pass filter configured to prevent the surface illumination light from reaching the imaging device.
24. The method of claim 23 . The surface irradiation light is in a blue wavelength range,
Voltage imaging light for generating the image for instructing said spatial voltage distribution across the panel under test has a different wavelength from that of the front side illuminating light,
24. The method of claim 23 . A method for detecting defects in a panel under test,
a. Using a surface illumination subsystem to deliver a surface illumination light beam onto the panel under test, the surface illumination light beam changing the electrical characteristics of the defect to facilitate detection of the defect Delivering, and b. Detecting the defect based on the altered electrical property of the defect using a detection subsystem;
The detection subsystem comprises a voltage imaging optical device configured to generate an image indicative of a spatial voltage distribution across the panel under test;
The defect is detected based on the generated image;
The surface irradiation light beam has a wavelength that matches the maximum absorption light characteristic of the defect;
The surface illumination subsystem is configured to guide the surface illumination light beam along a surface illumination optical path;
The surface illumination optical path is the same as the voltage imaging optical path provided in the voltage imaging optical device ;
A method for detecting defects in a panel under test. A method for detecting defects in a panel under test,
Using said front surface illumination subsystem be to deliver front side illuminating light onto the test panel, the surface illumination light to facilitate detection of the defects by changing the electrical characteristics of the defect Delivering ,
Delivering the voltage imaging light onto a modulator that modulates the voltage imaging light in accordance with the altered electrical properties of the defect; and
Detection using a subsystem comprising detecting the defects based on the altered electrical properties of the defects,
The detection subsystem comprises a voltage imaging optical device configured to generate an image indicative of a spatial voltage distribution across the panel under test;
Delivering the voltage imaging light onto the modulator is configured by the thin film disposed on the modulator to reflect the voltage imaging light and transmit the surface illumination light from the modulator. Including preventing surface illumination light,
Detecting the defect includes using the low-pass filter that transmits the voltage imaging light modulated by the modulator and prevents the light for surface irradiation reflected by the panel under test, using the voltage imaging optics. Including preventing the surface illumination light from the device,
The defect is detected based on the generated image;
The surface irradiation light beam has a wavelength that matches the maximum absorption light characteristic of the defect;
A method for detecting defects in a panel under test, wherein the surface illumination subsystem is disposed outside the optical path of the voltage imaging optical device.   The surface illumination light is pulsed and optimized to obtain a duration and intensity that maximizes the detection response of the amorphous silicon residue of the defect and minimizes pixel voltage decay that causes false defect detection. The system of claim 1, wherein the surface illumination light beam has a wavelength that matches a maximum absorption light characteristic of the defect.   The surface illumination light is pulsed and optimized to obtain a duration and intensity that maximizes the detection response of the amorphous silicon residue of the defect and minimizes pixel voltage decay that causes false defect detection. 23. The method of claim 22, wherein the surface illumination light beam has a wavelength that matches a maximum absorption light characteristic of the defect.   The system of claim 1, wherein the surface illumination light has a wavelength of 455 nm.   The system of claim 6, wherein the surface illumination light has a wavelength of 455 nm.   The system of claim 11, wherein the surface illumination light has a wavelength of 455 nm.   The system of claim 22, wherein the surface illumination light has a wavelength of 455 nm.   27. The method of claim 26, wherein the surface illumination light has a wavelength of 455 nm.   28. The method of claim 27, wherein the surface illumination light has a wavelength of 455 nm.

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