JP5210331B2 - Interleaved bridgeless power factor corrector and control method thereof - Google Patents

Description

  The present invention relates to an interleaved bridgeless power factor corrector and a control method thereof. Specifically, the present invention provides a power factor converter having a low loss and a high efficiency density and a control method thereof, and widely uses various electric power converters. In particular, the present invention relates to a technology that is applied to the application of high density efficiency conversion and medium / high efficiency output equipment with size restrictions.

A conventional AC-to-DC converter includes a rectifier and a DC power converter. As shown in FIG. 1, normally, four diodes are connected in a bridge type for rectification. This is called a bridge rectifier. In order to operate with a high power factor and low total harmonic distortion THD, a boost converter is generally used for the DC converter part.
As new demands and voices to improve power quality and effectiveness have been raised, various power topologies and control methods have appeared one after another. Among them, a bridgeless power factor converter (Bridgeless PFC) and an interleaved power factor converter (interleaved) are the most typical ones.
As its name suggests, the bridgeless PFC omits the bridge type rectifier formed of a conventional diode in the configuration of the power supply. More specifically, two active switches (powermosfet, IGBT, BJT) replace the two low-side diodes of the original bridge rectifier, and an inductor connected in series with the input AC power supply. To a boost converter as shown in FIG. 2A.
The other bridgeless PF converter replaces the upper and lower arms of the bridge rectifier with active switches, determines the direction of current with the diodes on the right and left arms as shown in Fig. 2B, and The active switch and the input inductor constitute a boost converter.
As described above, the purpose of the configuration to increase this voltage is to achieve a high power factor and a low harmonic distortion. Skillfully using the feedback control technique and switching the active switch appropriately will have the same effect as the conventional scheme, and replace the passive switch (diode) with the active switch. Therefore, the loss caused by the forward voltage drop of the diode during the process of switching the power supply is replaced by the conduction loss of the active switch.
In the absolute majority of applications, the conduction loss is much smaller than that of the diode, so the bridgeless PFC can be said to be a circuit form that was born with the focus on improving the efficiency of power conversion.

Another scheme is interleaved PFC.
As shown in Fig. 3, unlike the bridgeless PFC, this scheme attracts more people's attention. This technique has already been widely applied to high power factor DC / DC converters. For example, there are VRM power supplies used for CPUs of personal computers and power supplies for communications applied with high efficiency.
The alternating type is one in which one or more power converters are arranged in parallel, and the switching frequency of each pair of power converters is kept in synchronization, thereby causing a phase delay in each.
The angle of delay is determined by the number in parallel. That is, the phase delay is 360 / N, where N is the number of converters. Since the switching signals cross each other, all the input currents cancel each other, and the ripple factor of the current decreases as the number of parallel increases, and the frequency is multiplied. This is advantageous for the design and volume reduction of the output filter and front end EMI filter, and the power is distributed to N converters to improve heat dissipation and efficiency.
Interleaved PFC also uses this principle to achieve two or more boost converters in parallel and use the feedback control technology to achieve the objective of high power factor power conversion.

As can be seen from the above description, each bridgeless PFC and alternate PFC has its own advantages and application range.
If the advantages of both are merged, the application of the converter circuit will be most effective. The application of such a low-efficiency, high-efficiency PFC to a wide variety of power supply equipment is an urgent need for the related industries.

  The inventor of the present application has gained further hard work by taking advantage of his many years of experience in this field of business, considering that there is still room for improvement in the above-mentioned conventional PFC technology. The invented interleave bridgeless power factor corrector and its control method have been successfully developed.

  The object of the present invention is to provide an interleaved bridgeless PF corrector and its control method, create a unique circuit configuration that incorporates the advantages of the above two types of converters, and reduce the loss of the bridgeless PFC passive switch In addition, while making full use of alternating switching techniques, while suppressing the ripple factor of the input and output current, increase the power supply frequency, create a filter with superior performance, and thereby improve the overall conversion efficiency, The power density is about to increase.

In order to achieve the above object, an interleaved bridgeless PF corrector according to the present invention includes an AC input power source, two input inductors (L ₁ L ₂ ), and four active elements (Q _{1 to} Q ₄ ). , Two passive elements (D ₁ , D ₂ ) and an output resistor (R _L ). The four active elements are connected in series in the form of a complete bridge, and are divided into two sets of switches with different driving phases. One set of control switches is directly controlled by the control circuit, and the other set functions as a rectifying switch. One terminal of the AC input power supply is connected to the input inductor, and the other one terminal is connected between the first passive element and the second passive element. The two passive elements are arranged in parallel with a set of control switches, a set of rectifying switches, an output capacitor and an output resistor, and these two passive elements mainly control the action of conducting current in that direction.

  The interleaved bridgeless PF modifier is connected to one control signal processor and one control circuit. The control signal processor includes one output voltage attenuator, one input voltage attenuator, one absolute value circuit, one comparator, one proportional integration circuit, and one multiply circuit. Among them, the output voltage attenuator is connected to the interleaved bridgeless PF corrector and the comparator, which lowers the high output voltage to a lower voltage and makes it easy to process the circuit signal in the control circuit. Further, this feedback signal is compared with a reference value (command) of one precise reference voltage to obtain a voltage error value of the control circuit, and a control amount of the voltage circuit is calculated from a proportional integral circuit. If this signal and the attenuation amount of the input power supply are combined, the current reference level (command) of the input current control circuit is obtained. The feedback amount of the input current is obtained through the current sensor, the attenuation of Ki (attenuator), and the conversion of the negative half cycle of the absolute value circuit. The amount of error in the current is obtained by comparing the feedback amount of the input current with the reference level of the current. Similarly, the error amount is calculated by the proportional integration circuit and the final output control amount is calculated. The work cycle (duty cycle) at which the drive signal is output is determined by this control amount.

  Since the control circuit produces two sets of control switch drive signals having a phase difference of 180 degrees, a pulse width modulator is formed by using two sets of comparators and a triangular wave having a phase difference of 180 degrees. After the output control amount has passed this pulse-wise modulator, two sets of control switch drive signals are obtained, and then through one XOR gate circuit, the control switch is switched to the negative half cycle of the input with the phase change signal. As a result, this signal is passed through an inverter to obtain a corresponding mutual compensation switch signal.

The interleave bridgeless PF corrector and the control method thereof according to the present invention have the following effects.
(1) Since there is an effect of canceling out the input / output ripple wave and frequency doubling, the input inductor and the output capacitor can be selected to be small in size, and the power density can be improved.
(2) The application of multiphase is possible according to the demand for power, and the purpose of common mode noise reduction is also achieved. The use of ordinary inexpensive diodes is sufficient, and there is no need to use special expensive products. The common mode noise can be removed by the input common mode inductor. In the case of polyphase, the same core can be used for the input inductor and the common mode inductor can be used. If the circuit is efficient, the circuit is always in a continuous conduction mode, so there is no common mode noise problem due to power bounce.

It is the schematic of the conventional PFC circuit. It is the schematic of the conventional bridgeless PFC. It is the schematic of the conventional bridgeless PFC. It is the schematic of the conventional interleaving and PFC. It is a block diagram of the average current control circuit in the interleave bridgeless PF corrector and its control method based on this invention. It is a block diagram of the critical conduction control circuit in the interleave bridgeless PF corrector and its control method according to the present invention. It is an Example figure of the interleave bridgeless PF corrector based on this invention. It is an Example figure of the input half-cycle equivalence circuit in the interleave bridgeless PF corrector and its control method based on this invention. It is an Example figure of the input negative half period equivalence circuit in the interleave bridgeless PF corrector and its control method based on this invention. It is a wave form diagram in the case of the input half cycle D <50% in the interleave bridgeless PF corrector and its control method according to the present invention. FIG. 6 is a waveform diagram when an input half-cycle D> 50% in the interleaved bridgeless PF corrector and the control method thereof according to the present invention. FIG. 3 is an embodiment diagram of a multiphase interleaved bridgeless PF corrector according to the present invention. It is an Example figure of the average current control circuit in the interleave bridgeless PF corrector and its control method based on this invention. FIG. 4 is a waveform diagram of inductor currents iL ₁ and iL ₂ and an input current iac in the interleaved bridgeless PF corrector and the control method thereof according to the present invention. It is an Example figure of the critical conduction control circuit in the interleave bridgeless PF corrector and its control method based on this invention.

[Example]
4 and 5 are a block diagram and an embodiment diagram of an average current control circuit in the interleave / bridgeless PF corrector and its control method according to the present invention. These figures include the following parts. That is

Interleave bridgeless PF corrector 1. This is connected to a control signal processor 2 and a control circuit 3. As shown in FIG. 6, this corrector 1 further includes an AC input power source, input inductors (L ₁ , L ₂ ), four active elements (Q _{1 to} Q ₄ ), and two passive elements (D ₁ , D _2). ), An output capacitor (Co), and an output resistor (R ₁ ).

  Control signal processor 2. This includes an output voltage attenuator 21, comparators 221 and 222, proportional integration circuits 231 and 232, a multiplier circuit 24, absolute value circuits 251 and 252, an input voltage attenuator 26, and a current sensor 27 , And an attenuator 28. Among them, the input voltage attenuator 26 and the current sensor 27 are connected to the interleave bridgeless PF corrector 1, and the input voltage attenuator 26 and the current sensor 27 are connected to the absolute value circuit 25 and the attenuator 28, respectively, and the output voltage attenuator 21. Are connected to the interleave bridgeless PF corrector 1 and the comparator 221. This converts the high-voltage output to a slightly lower level DC voltage, which is used to process the circuit signal of the control circuit 3. The comparator 221 compares this feedback signal with a precise reference voltage reference level (command). Acquires the amount of voltage error, and further obtains the control amount of the voltage circuit through the operation of the proportional integration circuit 231, and synthesizes this signal and the reference value of the input power supply in the multiply circuit 24 to reference the current of the input current control circuit Calculate the level (command). Among them, the input power reference value is obtained from the input voltage attenuator 26 and the absolute value circuit 251, and the feedback of the input current is further attenuated by the attenuator 28 after passing through the current sensor 27, and is negative half cycle by the absolute value circuit 252. To get converted. The comparator 222 compares this input current feedback amount with the current reference level value of the input current control circuit to obtain the current error amount. Similarly, this error amount is calculated by the proportional integration circuit 232 to obtain the final output control amount of the control circuit 3. This control amount determines the work cycle (duty cycle) of the output drive signal.

Control circuit 3. This circuit 3 is connected to an interleaved bridgeless PF corrector 1 and a control signal processor 2. Since the control circuit 3 determines the control switch drive signal having two sets of phase differences of 180 degrees, the control circuit 3 uses the two sets of comparators and a triangular wave having a phase difference of 180 degrees as a pulse-wise modulator. The output control amount obtains two sets of control switch drive signals through this modulator, passes through one XOR gate circuit, and also includes a phase change signal to change the control switch and rectifier switch in the input negative half cycle. Finally, this signal is passed through an inverter to obtain a corresponding mutual compensation switch signal (see the embodiment diagram of FIG. 10).
FIG. 11 shows waveform diagrams of the inductance currents iL ₁ and iL ₂ and the input current iac. The duty is assumed to be fixed to facilitate the creation of the waveform. As can be seen from the waveform shown, the waveforms of the input current and input voltage are in phase, and the power can be switched with high PF and low harmonic wave distortion.

  Referring to FIG. 5 and FIG. 12, the configuration diagram and the embodiment diagram of the critical conduction control circuit in the interleave / bridgeless PF corrector and the control method thereof according to the present invention will be referred to. The circuit includes an interleaved bridgeless PF corrector 1, a control signal processor 2, and a control circuit 3. The control signal processor 2 includes an output voltage attenuator 21, a comparator 22, a proportional integration circuit 23, a multiplier circuit 24, an absolute value circuit 25, and an input voltage attenuator 26. The input voltage attenuator 26 is connected to the interleave bridgeless PF corrector 1 and the absolute value circuit 25, and the output voltage attenuator 21 is connected to the interleave bridgeless PF corrector 1 and the comparator 22. Then, the output voltage passes through the output voltage attenuator 21 to obtain an equal proportional voltage feedback amount and is compared with a precise reference voltage, and then an error amount of the voltage is obtained. This error amount is calculated by the operation of the proportional integration circuit 23, and the output amount of the voltage circuit is calculated. Further, in synergy with the input voltage attenuation amount, a current comparison signal is obtained (this is the current reference level value of the input current control circuit). And determines the machining cycle of the output drive signal).

Please refer to FIG. The phase change signal becomes 0 in the positive half cycle of the input. If the control circuit at this time is started, the starter circuit outputs two sets of pulse signals having a phase difference of 180 degrees, and the output of the SR flip-flop becomes high in succession. Therefore (Q _3, Q ₄₎ is turned one after another, the current on the inductor with the passage of size and time of the input voltage, gradually rises, the feed back signal of the inductor current (Z ₁ ~Z ₂₎ current And the output of the corresponding SR flip-flop becomes zero. Q _{2 and} Q ₄ are turned off, Q _{1 and} Q ₃ are turned on, and the voltage applied to the inductor is negative. Therefore, the inductance current decreases with time, and when it becomes smaller than zero, the ZCD output becomes a high level. Then, the next switching cycle starts and the entire system is sequentially controlled.

  Reference is made to FIG. 6 showing an embodiment of an interleave / bridgeless PF corrector and its control method according to the present invention. This corrector includes the following parts:

AC input power. One end of the power source is connected to the input inductors L ₁ and L ₂ , and the other end is connected between the first passive element D ₁ and the second passive element D ₂ .

The input inductor includes a first input inductor L ₁ and a second input inductor L _2. One end of the former is connected between the first active element Q ₁ and the second active element Q _2, and the latter is a third active inductor. It is connected between the element Q ₃ and the fourth active element Q _4.

Active element first active element Q _1, and the second active element Q _2, a third active element Q _3, and a fourth active element Q _4, the four elements Q ₁ to Q ₄ are bridged form And is divided into two sets of switches having different driving phases, one set of which is directly controlled by the control circuit as a control switch, and the other set functions as a rectifying switch.

  The passive element includes a first passive element D1 and a second passive element D2, the former negative electrode is connected to the latter positive electrode, both of which are a set of control switches, a set of rectifier switches, and an output capacitor Co. The main function is that the passive elements D1 and D2 are connected in parallel with the output resistor RL and conduct the current direction.

  The main switches Q1 to Q4 are configured by selecting appropriate semiconductor elements according to their output grades, and output driving signals through the control circuit 3 to control on / off. Q1-Q4 are connected in the form of a complete bridge, and Q1, Q2, and Q3, Q4 are two sets of switches with different drive phases. The phases of the two sets of switches are 180 degrees apart from each other, and the operation of the same set of switches is staggered, that is, if Q2 is on, Q1 is off. If one set of control switches is directly controlled by the control circuit in the same half cycle, the other set functions as a rectifying switch. That is, when the input is a positive half cycle, Q2 and Q4 are control switches and Q1 and Q3 are rectifier switches. When the input is a negative half cycle, Q1 and Q3 are control switches and Q2 and Q4 are rectifiers. It becomes a switch.

  As shown in FIG. 7A, when the input power source Vac is in a positive half cycle, the common contact of D2 and D1 is connected to the negative terminal of the power source, and if the input current at this time is greater than zero, D2 is conducting in the forward direction. And conducting current to the negative terminal of the input power supply. D1 is turned off in the opposite direction because D2 is turned on, and when the input power supply is in the negative half cycle, the same principle as shown in FIG. 7B (in the circuit where the input power supply Vac is in the negative half cycle, the inductor is It is connected to the negative terminal of the power supply, so the storage time of the inductor is controlled by Q1 and Q3, and Q2 and Q4 are rectifier switches), D1 is turned on in the forward direction and turned off in the opposite direction. Thus, regardless of whether the input power supply is a positive half cycle or a negative half cycle, the circuit performs the same function as two sets of synchronous boost converters.

First, the circuit state and the corresponding waveform when the input is a positive half cycle will be described. Now, for the convenience of analysis, assume that the switching frequency (716 KHz) is far greater than the input power frequency (50-60 Hz). Such an assumption is established in practical applications. Even in a sine wave power supply whose input changes alternately between positive and negative, under this assumption, the input power supply is regarded as a constant value in one switching period. Make it. When Q2 is on, the input power source accumulates in inductance L1 via Q2 and D2. At this time, Q2 becomes a control switch, and the control circuit determines the time for storing L1. When Q2 is turned off by the control circuit, Q1 must be turned on only after a short period of delay to keep Q1 on and avoid the short circuit of output under the influence of Q2 off. Don't be. This short period of time is referred to as dead time. During this small period, L1 still has stored energy, so the reverse connected diode of Q1 turns on and the energy in L1 is released to the load. Before Q1 turns on, the reverse-connected diode is already on, so Q1 is operating in the on state under zero voltage. In this way, the switching loss is greatly reduced. Q3 and Q4 operate in the same manner as Q1 and Q2, but the phase is delayed by 180 degrees. As can be seen from the corresponding waveforms in FIGS. 8A and 8B, the waveforms of iL ₁ and iL _{2 have} a canceling effect when the waveforms are added due to the delay in phase. Therefore, a current having a frequency twice as large as that of a relatively small input ripple wave is obtained. The output current is divided into two states because the phase and the current passing through the rectifying switches (Q _{1 to} Q ₃ ) are discontinuous. When duty cycle (work cycle) <50%, the output ripple has a reduced amplitude wave and the frequency doubles due to the canceling action of the current through the rectifier switch. On the other hand, when the duty cycle is greater than 50%, the amplitude is not changed, but the frequency is doubled. Therefore, even if the duty cycle is greater than 50%, no canceling action occurs. However, frequency doubling is advantageous in terms of output filter design. According to the same principle, such a circuit configuration extends to N-phase applications. As shown in FIG. 9, the phase delay of each set of signals is 360 degrees / N.

  The foregoing detailed description is a specific description of the executable embodiments of the invention. However, this embodiment does not limit the scope of claims of the present invention, and all implementations or modifications of equivalent effects made without departing from the technical spirit of the present invention are all included in the scope of claims of the present invention. Shall be.

  Combining the above, the present invention is not only ingenious in its form, but also has the above-mentioned many functions added compared to conventional properties, and claims for statutory inventions of novelty and inventive step. I think that it meets the requirements sufficiently.

1: Interleave bridgeless PF corrector
2: Control signal processor
21: Output voltage attenuator
22,221,222: Comparator
23,231,232: Proportional integration circuit
24: Multiply circuit
25,251,252: Absolute value circuit
26: Input voltage attenuator
27: Current sensor
28: Attenuator
3: Control circuit

Claims (3)

A high-density efficiency changer,
An AC input power source having one terminal connected to the input inductor and the other terminal connected between the first passive element and the second passive element;
A first input inductor and a second input inductor, wherein one terminal of the first input inductor is connected between the first active element and the second active element, and the second input inductor is a third active inductor An input inductor connected between the device and the fourth active device;
Including a first active element, a second active element, a third active element, and a fourth active element, wherein the four active elements are connected in the form of a complete bridge and have two different driving phases. An active element that is divided into a set of switches, one set of control switches of which is directly controlled by the control circuit, and the other set functions as a rectifying switch;
A first passive element and a second passive element, the negative electrode of the first passive element is connected to the positive electrode of the second passive element, the two connected passive elements are a set of control switches, 1 A set of rectifying switches, one output capacitor, and a passive element connected in parallel to one output resistor;
The passive element mainly has a current direction of conduction,
The two sets of switches having different driving phases are further connected to n sets of switches, and the delay phase of each set of signals is 360 degrees / (n + 2),
Furthermore, the control signal processor and the control circuit can be connected,
The control signal processor includes an output voltage attenuator, a comparator, a proportional integration circuit, a multiplier circuit, an absolute value circuit, an input voltage attenuator, a current sensor, and an attenuator.
Interleave bridgeless PF corrector.   The PF corrector according to claim 1, wherein the control signal processor outputs one output control amount to determine a machining cycle of the output drive signal. The control circuit is connected to the interleaved bridgeless PF corrector and a control signal processor, and the control circuit outputs an output control amount from the control signal processor to drive signals of two control switches through a pulse-wise modulator. is obtained, further on through the gate circuit of the X OR, also with phases換相signal, at input the negative half cycle, to ensure replacement of the control switch and rectifier switch, the last signal subjected to XOR gate circuit inverters The PF corrector according to claim 1, wherein the PF corrector is obtained via a corresponding mutual compensation switch signal.

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