JP5061599B2 - Parallel multiplex AC / DC converter and control method - Google Patents

Description

  The present invention relates to a parallel multiple AC / DC converter and a control method including a parallel multiple converter in which a plurality of power converters are respectively connected in parallel to three phases.

  For example, as a power converter that converts direct current into alternating current, there is one in which a parallel multiple converter is configured by connecting a plurality of converters in parallel for each phase of three phases. Normally, the converters connected in parallel to each of the three-phase phases have the same rated capacity, and the output currents of the respective-phase converters are the same during normal operation.

  When a failure or the like occurs in any converter of such a parallel multiple converter, the parallel multiple converter is stopped and the failed converter is replaced with a sound converter. This replacement work requires on-site replacement work to a healthy converter, a confirmation test, and the like, and usually takes more than half a day, so the power converter is stopped during that time.

  In a large-capacity parallel multiple converter for electric power use, the converter constituting the parallel multiple converter is inspected for each arm or each phase, so the system may be stopped for several days. In particular, in the electric power field, there is a desire to reduce the recovery time at the time of failure as much as possible. Therefore, if the parallel multiple converter cannot be stopped continuously over such a long period of time, for each arm unit or each phase unit The current situation is that inspections are carried out sequentially over time.

  For industrial parallel multiplexers and distributed power converters, stop the parallel multiplexer during inspection, or supply power with a bypass circuit when the parallel multiplexer is stopped. However, when power is supplied by a bypass circuit, power is supplied from a commercial power source, and the original merit of the parallel multiple converter cannot be maintained.

Here, in a system in which the DC side of multiple power converters is connected to provide power interchange, even if one power converter stops due to a grid fault or converter failure, the remaining healthy power There is one in which operation can be continued with a converter (see Patent Document 1).
Japanese Patent Laid-Open No. 9-74769

  However, in the thing of patent document 1, it is necessary to provide a spare power converter. As a countermeasure at the time of failure or inspection of a parallel multiple converter configured by connecting a plurality of converters in parallel, a spare converter (for example, one phase) may be prepared. For example, it is conceivable to switch to a spare converter at the time of failure or inspection of the converter constituting the parallel multiple converter and continue the operation. In this case, the operating rate per unit decreases and the converter The system capacity for one unit will increase, and the installation space will be limited.

  Furthermore, since the converters connected in parallel to the three-phase phases usually have the same rated capacity, it may not be possible to construct a parallel multiple converter having a desired capacity. For example, when the rated capacity of a single converter is 50 kVA, the rated capacity for three phases is 150 kVA when using one converter for each phase, and 300 kVA when using two converters for each phase. Become. Similarly, when the rated capacity of a single converter is 200 kVA, the rated capacity for three phases is 600 kVA when using one converter for each phase, and 1200 kVA when using two converters for each phase. It becomes. That is, it is desired to produce a rated capacity that is a multiple of 3 times the rated capacity of a single converter because of standardization and rationalization of the design. To obtain an output that is not a multiple of 3 of the rated capacity of a single converter, a partial load I will drive.

When the converter is operated at a partial load, there is a problem that the efficiency of the converter decreases, and a converter that does not decrease the efficiency even at a partial load has been demanded. For example, in a converter applied to wind power generation, solar power generation, etc., the frequency of partial load operation is high. For this reason, if efficient power generation can be continued even if the output fluctuates, renewable energy will be used effectively, leading to a reduction in CO ₂ emissions. As a result, it can be expected to prevent global warming.

  An object of the present invention is a parallel multiple AC / DC converter capable of continuing operation even when any converter of the parallel multiple converter is stopped due to failure, and capable of operating without lowering the efficiency even when the output fluctuates. And providing a control method.

The parallel multiple AC / DC converter according to the invention of claim 1 is formed by combining a plurality of power converters including the same rated capacity and different rated capacities and connecting them in parallel to each of the three phases. Number of operating units of parallel multiple converters and converters connected to the three phases of the parallel multiple converters such that the output line currents of the three phases of the parallel multiple converters maintain balanced three-phase currents. A converter control device that adjusts and controls the phase or magnitude of the output current of the converter, the converter control device operating the number of converters in each of the three phases or the phase or magnitude of the output voltage of the converter. It is characterized in that the efficiency fluctuation of the converter is suppressed as much as possible when adjusting the control .

According to a second aspect of the present invention, there is provided a parallel multiplex type AC / DC converter according to the first aspect of the present invention, further comprising a fault detector for detecting that one of the converters of the parallel multiple converter has stopped. When the failure detector detects a converter that has failed, the control device determines whether or not the current output power of the parallel multiple converter exceeds a predetermined value, and the parallel multiple converter When the current output power is below a predetermined value, the efficiency variation of the parallel multiplex converter is suppressed as much as possible so that the output line current of each phase of the three phases of the parallel multiplex converter maintains the current before the failure. It is characterized by adjusting and controlling the phase or magnitude of the output current of a healthy converter excluding the converter that has failed and stopped.

According to a third aspect of the present invention, there is provided a parallel multiplex type AC / DC converter according to the second aspect of the present invention, wherein the converter control unit stops a fault when the current output power of the parallel multiplex type converter exceeds a predetermined value. The phase or magnitude of the output current by suppressing the fluctuation in efficiency of the parallel multiplex converter as much as possible within a range where the magnitude of the output current of each of the healthy converters excluding the converted converter does not exceed a predetermined limit value. It is characterized by adjusting and controlling.

A parallel multiple AC / DC converter according to a fourth aspect of the present invention is the parallel or multiple AC / DC converter according to the second or third aspect of the present invention, wherein the converter control unit is configured to control the output current of the healthy converter in the phase to which the converter that has failed is connected. In addition to increasing the size, the phase of the phase to which the faulty converter is connected is set to the same phase as in the normal state.

According to a fifth aspect of the present invention, there is provided a control method for a parallel multiplex AC / DC converter, in which a plurality of power converters are connected in parallel to each of three phases to supply three-phase AC power. In the method, the present output power of the parallel multiplex converter is detected, it is determined whether any converter of the parallel multiplex converter has stopped by failure, and all of the converters have stopped by failure. When there is not, the number of operating units of the three-phase or the output of the converter by suppressing the fluctuation of the efficiency of the parallel-multiplexed converter as much as possible so that the output line current of the three-phase each phase of the parallel multiple converter becomes a predetermined current The phase or magnitude of the voltage is adjusted and controlled, and when any of the converters has failed, it is determined whether the current output power of the parallel multiplex converter exceeds a predetermined value, and the parallel multiplex type If the current output power of the converter is below the specified value Rutoki is healthy, except for the converter failed stopped by minimizing the efficiency variation of the parallel multi-transducer so as to hold the three-phase phase output line current before fault current of the parallel multi-converter The output of each of the healthy converters excluding the converter that has failed and stopped when the current output power of the parallel multiplex converter exceeds a predetermined value by adjusting and controlling the phase or magnitude of the output current of the correct converter The phase or magnitude of the output current is adjusted and controlled by suppressing the fluctuation in efficiency of the parallel multiple converter as much as possible within a range in which the magnitude of the current does not exceed a predetermined limit value.

The control method of the parallel multiplex AC / DC converter according to the invention of claim 6 is the invention according to claim 5 , wherein when the healthy converter allows overload operation, it does not exceed a predetermined limit value. Instead of adjusting and controlling the phase or magnitude of the output current by suppressing the efficiency fluctuation of the parallel multiple converter as much as possible, the output line current of each phase of the three phases of the parallel multiple converter It is characterized by adjusting and controlling the phase or the magnitude of the output current of the healthy converter by suppressing the fluctuation in efficiency of the parallel multiplex converter as much as possible so as to hold it.

According to a seventh aspect of the present invention, there is provided a method for controlling a parallel multiple AC / DC converter according to the fifth or sixth aspect of the present invention, wherein any one of the three phases of the parallel multiple converter is stopped when one of the converters is stopped due to a failure. When adjusting and controlling the phase or magnitude of the output current of a healthy converter, excluding the converter that has failed and stopped so that the output line current maintains the predetermined current before the failure, the phase to which the converter that has failed is connected The size of the output current of the healthy converter is increased, and the phase of the phase to which the failed converter is connected is set to the same phase as that of the healthy state.

  According to the present invention, converters having the same or different rated capacities are connected to each of the three-phase phases to form a parallel multiple converter, and the output line current of each of the three-phase phases of the parallel multiple converter is set to a balanced three-phase current. Adjusting and controlling the phase or magnitude of the output current of the converter connected to each phase of the three phases so as to hold, so that a parallel multiple converter that can be operated without lowering the efficiency even if the output fluctuates is configured Can do.

  In addition, even if one converter of the parallel multiple converter is stopped due to failure, it is operated by sharing with other healthy converters, so the output current of the parallel multiple converter can be reduced without providing a spare converter. It can be almost maintained at a healthy current. Further, it is not necessary to install a spare converter, and the installation space can be reduced. Further, since the inspection can be performed without stopping the parallel multiple converter, the reliability is improved, and the preventive maintenance of the equipment and the system failure rate can be reduced.

  FIG. 1 is a block diagram of a parallel multiplex AC / DC converter according to a first embodiment of the present invention. The parallel multiple converter 11 is provided with a plurality of converters 12 for each of the three phases. As for the number of converters 12 connected in parallel to each of the three-phase phases, the same number or at least one of the three-phase phases is connected in parallel. FIG. 1 shows a case where two converters 12 are provided for the U phase, V phase, and W phase of each of the three phases. That is, converters 12U1 and 12U2 are provided in the U phase, converters 12V1 and 12V2 are provided in the V phase, and converters 12W1 and 12W2 are provided in the W phase. Further, converters 12U1 to 12W2 are connected in combination with the same or different rated capacities.

  FIG. 2 is a circuit configuration diagram illustrating an example of the converter 12. The converter 12 is configured by connecting, for example, four IGBT (Insulated Gate Bipolar Transistor) modules 13, which are insulated gate semiconductor elements, in series and parallel, and converts DC power from the DC power supply 14 into AC power for winding. It outputs to the line 15.

  Then, as shown in FIG. 1, the winding 15 of the converter 12 is magnetically coupled to the primary winding of the transformer 16, and two coils are arranged in parallel in each of the three phases. As a result, the output currents of the two converters 12 connected in parallel for each phase are output from the primary windings of the transformer 16. FIG. 1 shows a case where the primary winding of the transformer 16 is a Δ connection.

  The converter control device 18 controls each of the converters 12U1 to 12W2, and changes the number of operating converters 12U1 to 12W2 of the three-phase each phase to be constant or changed so that the three-phase each phase of the parallel multiple converter The current command value and phase command value of the converters 12U1 to 12W2 are calculated so that the output line current becomes a balanced three-phase current.

  The converter control device 18 updates and stores the current output power of the parallel multiplex converter 11 detected every moment by the output power detector 23, and is determined in advance as the current output power of the parallel multiplex converter 11. The predetermined value is compared, and it is determined whether or not the current output power of the parallel multiplex converter 11 exceeds the predetermined value. Here, the predetermined value is the output power of the parallel multiple converter 11 when the converter 12 is not overloaded.

  On the other hand, the setting device 24 indicates that the overload operation is permitted, the upper limit value of the output current of the converter 12 when the overload operation is performed, the upper limit value of the output current of the converter 12 when the overload operation is not permitted, and the like. Is set. When the converter control device 18 allows the overload operation, the converter control device 18 prevents the output current of each converter from exceeding its upper limit value. When the converter control device 18 does not allow the overload operation, the converter control device 18 converts the output current. The current command value and the phase command value of the parallel multiple converter 11 are calculated so that the magnitude of each output current of the converter does not exceed the upper limit value during the overload operation.

  The current command value and phase command value of the converters 12U1 to 12W2 calculated by the converter control device 18 are input to the gate control circuit 26, and the gate control circuit 26 receives the current command value and phase command from the converter control device 18. A gate signal is output to the converters 12U1 to 12W2 so as to satisfy the value.

  Thus, the converter control device 18 outputs the current command value and the phase command value when the number of operating converters 12U1 to 12W2 of the three-phase each phase is constant or changed, and therefore the converter 12U1 of the three-phase each phase. Although the output current and phase of ˜12W2 may be unbalanced, the converter control device 18 makes the output line current U, V, W of each of the three phases of the parallel multiple converter 11 become a balanced three-phase current. Therefore, the output line currents U, V, and W of the three-phase phases of the parallel multiple converter 11 become balanced three-phase currents.

  FIG. 3 shows an example of the output current of the parallel multiple converter 11 when the number of the three-phase converters 12 in the parallel multiple converter 11 in the first embodiment of the present invention is the same and the rated capacity is the same. FIG. As shown in FIG. 3A, since the primary winding of the transformer 16 is Δ-connected, the converter output current of each phase of the parallel multiple converter 11 is Δ current, and in parallel during normal operation, The output currents U1 and U2 of the U-phase converters 12U1 and 12U2 of the multiple converter 11 and the output currents V1 and V2 of the V-phase converters 12V1 and 12V2, and the output currents W1 and W2 of the W-phase converters 12W1 and 12W2 are The U-phase, V-phase, and W-phase converter output currents of the parallel multiple converter 11 each maintain a three-phase balanced current having a phase difference of 120 °.

  Further, the output currents U, V, and W of the three-phase output phases of the parallel multiple converter 11 are also 120 ° as shown in FIG. A three-phase balanced current with a phase difference is maintained. That is, the U-phase output line current is the vector difference between the U-phase converter output current and the W-phase converter output current of the parallel multiple converter 11, and the V-phase output line current is the V-phase converter output current. The vector difference between the U-phase converter output current and the W-phase output line current is indicated by the vector difference between the W-phase converter output current and the V-phase converter output current.

  In this state, the magnitudes of the output line currents U, V, and W of each of the three phases of the parallel multiple converter 11 are changed to be small while the number of converters 12U1 to W2 of the parallel multiple converter 11 is kept constant. Think about the case.

  4 adjusts the phase current of the parallel multiple converter 11 so that the output line current of each of the three phases of the parallel multiple converter 11 becomes a small balanced three-phase current while keeping the number of converters 12 in operation constant. 4A is an output current vector diagram showing an example of the case, and FIG. 4A is a balanced three phase in which the output line current of each of the three phases of the parallel multiple converter 11 is small while the number of converters 12 is kept constant. FIG. 4B is a diagram showing an output current vector when the magnitude of the output current of the converter 12 is adjusted and controlled so that the current becomes the current, and FIG. 4B is a diagram of three parallel multiple converters 11 while the number of converters 12 is kept constant. It is an output current vector figure at the time of adjusting and controlling the output current and phase of the converter 12 so that the output line current of each phase becomes a small balanced three-phase current.

  In FIG. 4A, the magnitude of the output current of any one converter 12 of the converters 12 of each of the three phases of the parallel multiple converter 11 shown in FIG. The case where the magnitude | sizes of the output line current U, V, and W of the three-phase each phase of the multiple converter 11 are shown is shown. That is, for the U phase of the parallel multiple converter 11, the output current of the converter 12U2 is changed from U2 to u2, the output current of the converter 12V2 is changed from V2 to v2 for the V phase, and the output current of the converter 12W2 is set for the W phase. Is changed from W2 to w2, the magnitudes of the output line currents U, V, W of each of the three phases of the parallel multiple converter 11 are changed.

  On the other hand, FIG. 4B adjusts the magnitude of the output current of the converter 12 of any one of the three phases of the parallel multiple converter 11 shown in FIG. In this example, the phase of the output current of the converter 12 is kept constant and the phase is adjusted to change the magnitudes of the output line currents U, V, and W of the three phases of the parallel multiple converter 11. That is, the output currents of the converters 12W1 and 12W2 are changed to be small for the W phase of the parallel multiple converter 11, and the output currents of the converters 12U1 (12V1) and 12U2 (12V2) are constant for the U phase and the V phase. The phases of the U phase and the V phase are changed so that the output line currents U, V, and W of the three phases of the parallel multiple converter 11 maintain the three-phase balanced current.

  In this case, as shown in FIG. 4B, the output line current and phase of each of the three phases of the parallel multiple converter 11 are unbalanced, but the output of each of the three phases of the parallel multiple converter 11 is output. The line currents U, V and W are balanced three-phase currents. Thus, as long as the output line currents U, V, W of the three-phase each phase of the parallel multiple converter 11 become balanced three-phase currents, the converter output current and phase of the three-phase each phase of the parallel multiple converter 11 Is allowed to be unbalanced, and the three-phase output currents U, V, W of the parallel multiple converter 11 can be changed. Thereby, a parallel multiple converter having a desired capacity can be configured.

  FIG. 5 shows an example of the output current of the parallel multiple converter 11 when the number of three-phase converters in the parallel multiple converter 11 in the first embodiment of the present invention is the same and the rated capacities are different. It is an electric current vector diagram. FIG. 5 (a) is an output current vector diagram during normal operation, and FIG. 5 (b) is a balanced three-phase small output line current for each of the three phases of the parallel multiple converter 11 by changing the number of converters 12 operated. It is an output current vector figure at the time of carrying out adjustment control of the magnitude | size of the output current of a converter so that it may become electric current.

  As shown in FIG. 5 (a), the number of converters 12 for each of the three phases is the same for each two, but the rated capacity of the two converters for the W phase is the conversion between the U phase and the V phase. What is half the rated capacity of the vessel is used. Therefore, during normal operation, the output currents U1 and U2 of the U-phase converters 12U1 and 12U2 of the parallel multiple converter 11 and the output currents V1 and V2 of the V-phase converters 12V1 and 12V2 are the same. The output currents W1 and W2 of the W-phase converters 12W1 and 12W2 are ½ of the output currents of the U-phase and V-phase converters. For this reason, the output line current and phase of each of the three phases of the parallel multiple converter 11 are unbalanced.

  The output line currents and phases of the three-phase phases of the parallel multiple converter 11 are unbalanced, but the output line currents U, V, and W of the three-phase phases of the parallel multiple converter 11 are the balanced three-phase currents. It has been adjusted to be. Accordingly, the output currents U, V and W of the three-phase output phases of the parallel multiple converter 11 maintain a three-phase balanced current having a phase difference of 120 °. ing. Thus, even during normal operation, as long as the output line currents U, V, and W of the three-phase each phase of the parallel multiple converter 11 are balanced three-phase currents, the three-phase each phase of the parallel multiple converter 11 is Operation where the output line current and phase are unbalanced is allowed.

  In this state, when the number of operating converters 12U1 to W2 of the parallel multiple converter 11 is changed and the magnitudes of the output line currents U, V, and W of the three-phase phases of the parallel multiple converter 11 are changed to be small. think of. FIG. 5B shows the magnitudes of the U-phase and V-phase output currents of the parallel multiple converter 11 by stopping the U-phase and V-phase converters U2 and V2 of the parallel multiple converter 11 or setting the output current to 0. The case where the magnitudes of the output line currents U, V, and W of the three-phase each phase of the parallel multiple converter 11 are adjusted and changed is shown. That is, for the W phase of the parallel multiple converter 11, the output currents of the converters 12W1 and 12W2 are left as they are, and the output current of the converter 12U2 (12V2) is set to 0 for the U phase and the V phase. The phases of the U phase and the V phase are changed so that the output line currents U, V, and W of the three phases of the device 11 maintain the three-phase balanced current. Thereby, the magnitude | sizes of the output line current U, V, W of the three-phase each phase of the parallel multiple converter 11 can be changed small.

  In the above description, the case where the same number of converters 12 are connected in parallel to each of the three-phase phases has been described, but at least one of the three-phase phases is connected in parallel to a different number of converters 12. The same applies to the case.

  FIG. 6 is an output current showing an example of the output current of the parallel multiple converter 11 when the number of three-phase converters in the parallel multiple converter 11 in the first embodiment of the present invention is different and the rated capacity is also different. It is a vector diagram.

  As shown in FIG. 6A, the number of converters 12 for each of the three phases is different, and three converters 12U1, U2, U3 (12V1, V2, V3) are connected to the U phase and the V phase. In the W phase, two converters 12W1 and 12W2 are connected. The rated capacities of the two W-phase converters 12W1 and 12W2 are the same as the rated capacities of the U-phase converter 12U3 and the V-phase converter 12V3, and the U-phase converters 12U1, 12U2 and the V-phase The rated capacities of the converters 12V1 and 12V2 are ½ of the rated capacities of the W-phase converters 12W1 and 12W2. During normal operation, the U-phase, V-phase, and W-phase converter output currents of the parallel multiple converter 11 maintain three-phase balanced currents each having a phase difference of 120 °.

  Also, the U-phase, V-phase, and W-phase currents U, V, and W, which are the output line currents of the three-phase phases of the parallel multiple converter 11, are each at 120 ° as shown in FIG. It maintains a three-phase equilibrium current with a phase difference. That is, the U-phase output current is the vector difference between the U-phase converter output current and the W-phase converter output current of the parallel multiple converter 11, and the V-phase output current is the V-phase converter output current and the U-phase. The vector difference between the converter output current and the W-phase output current is represented by the vector difference between the W-phase converter output current and the V-phase converter output current.

  In this state, a case where the magnitudes of the output line currents U, V, and W of the three-phase phases of the parallel multiple converter 11 are changed to be small while the number of the converters 12 of the parallel multiple converter 11 is kept constant. Think.

  FIG. 7 shows the converter output current of the parallel multiple converter 11 so that the output line current of each of the three phases of the parallel multiple converter 11 becomes a small balanced three-phase current while the number of converters 12 operated is constant. FIG. 7A is a diagram illustrating an output current vector of another example of the case where the number of operating converters 12 is kept constant, and the output line current of each of the three phases of the parallel multiple converter 11 is small. FIG. 7B is an output current vector diagram when the magnitude of the output current of the converter is adjusted and controlled so that a balanced three-phase current is obtained. FIG. It is an output current vector figure at the time of adjusting and controlling the output current and phase of a converter so that the output line current of each three-phase phase may become a small balanced three-phase current.

  In FIG. 7A, the magnitude of the output current of any one converter 12 of the converters 12 in each of the three phases of the parallel multiple converter 11 shown in FIG. The case where the magnitude | sizes of the output line current U, V, and W of the three-phase each phase of the multiple converter 11 are shown is shown. That is, for the U phase of the parallel multiple converter 11, the output current of the converter 12U3 is changed from U3 to u3, for the V phase, the output current of the converter 12V3 is changed from V3 to v3, and for the W phase, the output current of the converter 12W2 is changed. Is changed from W2 to w2, the magnitudes of the output line currents U, V, W of each of the three phases of the parallel multiple converter 11 are changed.

On the other hand, FIG. 7B adjusts the magnitude of the output current of the converter 12 of any one of the three phases of the parallel multiple converter 11 shown in FIG. In this example, the phase of the output current of the converter 12 is kept constant and the phase is adjusted to change the magnitudes of the output line currents U, V, and W of the three phases of the parallel multiple converter 11. That is, the output current of the converters 12W1 and 12W2 is changed to be small for the W phase of the parallel multiple converter 11, and the outputs of the converters 12U1 (12V1), 12U2 (12V2), and 12U3 (12V3) for the U phase and the V phase. The current is constant, and the phases of the U phase and the V phase are changed so that the output line currents U, V, and W of the three phases of the parallel multiple converter 11 maintain the three-phase balanced current.

  FIG. 8 shows another example of the output current of the parallel multiple converter 11 when the number of three-phase converters in the parallel multiple converter 11 in the first embodiment of the present invention is different and the rated capacities are also different. It is an output current vector diagram. FIG. 8 (a) is an output current vector diagram during normal operation, and FIG. 8 (b) is a balanced three-phase small output line current of each of the three phases of the parallel multiple converter 11 by changing the number of converters 12 operated. It is an output current vector figure at the time of carrying out adjustment control of the magnitude | size of the output current of a converter so that it may become electric current.

  As shown in FIG. 8A, the number of three-phase converters 12 is different, and three converters 12U1, U2, U3 (12V1, V2, V3) are connected to the U phase and the V phase. In the W phase, two converters 12W1 and 12W2 are connected. The rated capacities of the two W-phase converters 12W1 and 12W2 are the same as the rated capacities of the U-phase converters 12U1 and 12U2 and the V-phase converters 12V1 and 12V2, and the U-phase converter 12U3 and What is 1/2 of the rated capacity of the V-phase converter 12V3 is used.

  In normal operation, the U-phase, V-phase, and W-phase converter output currents of the parallel multiple converter 11 are three-phase unbalanced currents. The U-phase, V-phase, and W-phase output currents U, V, and W each maintain a three-phase balanced current having a phase difference of 120 °. Thus, even during normal operation, as long as the output line currents U, V, and W of the three-phase each phase of the parallel multiple converter 11 are balanced three-phase currents, the three-phase each phase of the parallel multiple converter 11 is Operation where the output line current and phase are unbalanced is allowed.

  In this state, consider a case where the number of converters 12 in the parallel multiple converter 11 is changed and the magnitudes of the output line currents U, V, and W of the three-phase phases of the parallel multiple converter 11 are changed to be small. . FIG. 8B shows the magnitudes of the U-phase and V-phase output currents of the parallel multiple converter 11 when the U-phase and V-phase converters U3 and V3 of the parallel multiple converter 11 are stopped or the output current is zero. The case where the magnitudes of the three-phase output currents U, V and W of the parallel multiple converter 11 are adjusted and changed is shown. That is, the output currents of the converters 12W1 and 12W2 are left as they are for the W phase of the parallel multiple converter 11, and the output current of the converter 12U3 (12V3) is set to 0 for the U phase and the V phase. The phases of the U phase and the V phase are changed so that the three-phase output currents U, V, and W of the device 11 maintain the three-phase balanced current. Thereby, the magnitude | size of the three-phase output current U, V, W of the parallel multiple converter 11 can be changed small.

  In the above description, the case where the balanced three-phase current is reduced has been described. However, an adjustment operation is performed in which the output line current and phase of each of the three phases of the parallel multiple converter 11 are unbalanced, and the upper limit value of the overload operation The value of the balanced three-phase current may be held at the same value as the value before the change of the number of operating converters of the three-phase each phase within a range not exceeding.

  In addition, when a load or system connected to the parallel multiplex AC / DC converter requires an unbalanced three-phase current, it is also possible to generate an unbalanced three-phase current. In this case, the unbalanced three-phase current can be generated while maintaining high efficiency operation by using only the minimum number of converters necessary for generating the unbalanced three-phase current.

  In the above description, the case where the magnitude of the output current of each phase of the three phases is reduced was explained, but by changing the number and phase of each converter without changing the output line current of each phase of the three phases, The rated output can also be maintained.

  In addition, the phase and magnitude of the output current vector of the three-phase converter can be freely changed under the condition of maintaining the output line current in a balanced three-phase state. Furthermore, by freely changing the phase and magnitude of the output current vector of the three-phase phase converter, the phase and magnitude of the output line current of the three-phase phase can be freely changed. . Thus, a desired three-phase balanced or three-phase unbalanced output line current can be obtained while maintaining high efficiency operation.

  Next, the loss when the number of operating converters 12 of each phase is changed will be described. FIG. 9 shows the relationship between the output power (pu) and loss (%) of the parallel multiplex AC / DC converter 11 having four converters 12 for each phase and having a total of 12 converters 12. It is a graph which shows. The broken line L1 represents the characteristic in the case of the conventional method (the method in which the output current is adjusted by selecting only a multiple of 3), and the broken line L2 represents the characteristic in the present invention. The numerical values at the break points in FIG. 9 indicate the number of operating converters.

Table 1 is a table showing the number of operating converters, output power (pu) and loss (%) at each break point of the broken line L1 in the conventional method.

Table 2 is a table showing the number of operating converters, output power (pu) and loss (%) at each break point of the broken line L2 in the method of the present invention.

  Now, assuming that all four converters 12 in each phase (when 12 units are operated) have the maximum output (output power is 1.00 p.u.), the converter 12 is operated at the maximum output. It is assumed that the loss of the converter 12 of the parallel multiple AC / DC converter 11 is about 1.08% as shown in Tables 1 and 2.

  Then, when the converters 12 of each phase are operated with the same number and the maximum output, the loss of the converter 12 of the parallel multiplex AC / DC converter 11 is the same in both the conventional method and the present invention. The case is the same at about 1.08%.

  That is, when one converter 12 for each phase (when three units are operated) is operated at the maximum output, two converters 12 for each phase (when six units are operated are operated at the maximum output) When the three converters 12 for each phase (when nine units are operated) are operated at the maximum output, the loss of the converter 12 of the parallel multiplex AC / DC converter 11 is approximately in any case. It is the same at 1.08.

  Next, for example, when it is desired to set the output power to 0.82 pu, in the conventional method, the output of 4 units (12 units operation) of each phase is reduced to 0.82 times the maximum output, and the loss is Increase to about 1.24%. On the other hand, since the system of the present invention can be operated with a total number other than a multiple of 3, while maintaining the maximum output at 1 pu for 4 units of U phase, 3 units of V phase, and 3 units of W phase (10 units operation). When operating, the loss goes from about 1.08% to about 1.10% with little variation. Thus, even if the number of operating units of each of the three phases or the phase or magnitude of the output current of the converter is changed, the efficiency fluctuation of the converter can be suppressed as much as possible.

  According to the first embodiment of the present invention, the transformer 12 having the same or different rated capacity is connected to each phase of the three phases to form the parallel multiple converter 11, and each of the three phases of the parallel multiple converter 11 is formed. So that the output line current and phase of each phase of the parallel multiple converter 11 are unbalanced, and the output line current of the parallel multiple converter 11 is connected to each of the three phases. Since the phase or magnitude of the output current of the converter 12 is adjusted and controlled, the parallel multiple converter 11 can have a desired capacity without being restricted by the rated capacity of the converter 12. Moreover, it is also possible to replace a part of the output current with another healthy converter 12 with respect to the converter 12 whose capacity has decreased due to secular change or the like.

  Next, a second embodiment of the present invention will be described. FIG. 10 is a block diagram of a parallel multiplex AC / DC converter according to the second embodiment of the present invention. In the second embodiment, a failure detector 17 is provided with respect to the first embodiment shown in FIG. 1, and the converter controller 18 detects the converter 12 in which the failure detector 17 has stopped. In this case, the magnitude or phase of the output current of the healthy converter 12 excluding the converter 12 that has failed and stopped so that the output line current of each of the three phases of the parallel multiple converter 11 retains the current before the failure. Adjustment control is performed.

  In FIG. 10, the parallel multiple converter 11 is provided with a plurality of converters 12 for each of the three phases. FIG. 10 shows a case where two converters 12 are provided for the U phase, V phase, and W phase of each of the three phases. That is, converters 12U1 and 12U2 are provided in the U phase, converters 12V1 and 12V2 are provided in the V phase, and converters 12W1 and 12W2 are provided in the W phase. The converter 12 is the same as that of the first embodiment shown in FIG.

  Then, as shown in FIG. 10, the winding 15 of the converter 12 is magnetically coupled to the primary winding of the transformer 16, and two coils are arranged in parallel in each of the three phases. As a result, the output currents of the two converters 12 connected in parallel for each phase are output from the primary windings of the transformer 16. FIG. 10 shows a case where the primary winding of the transformer 16 is a Δ connection.

  Further, a failure detector 17 for detecting that any of the converters 12U1 to 12W2 of the parallel multiple converter 11 has stopped is provided. The converters 12U1 to 12W2 detected by the failure detector 17 are provided. The failure stop signal is input to the converter controller 18.

  The converter control device 18 controls each of the converters 12U1 to 12W2, and includes a normal time command value calculation means 19 and a failure stop time command value calculation means 20. The normal command value calculation means 19 calculates the current command value and the phase command value so that each of the converters 12U1 to 12W2 outputs a predetermined three-phase AC current.

  On the other hand, the command value calculation means 20 at the time of failure stop is started by the failure stop determination means 21, and the conversion that has failed and stopped so that the output line current of each of the three phases of the parallel multiple converter 11 maintains the current at the normal state as much as possible. The current command value and phase command value of the healthy converter 12 excluding the converter 12 are calculated. In this case, the failure stop command value calculation means 20 determines whether the operation of the sound converter 12 is an overload operation, and when the overload operation is allowed, the output line of each of the three phases. When the current command value and the phase command value are output so that the current becomes a healthy current and the overload operation is not permitted, the magnitude of each output current of the healthy converter 12 is a predetermined limit value. Output current command value and phase command value within the range not exceeding.

  That is, the storage unit 22 of the converter control device 18 updates and stores the current output power of the parallel multiplex converter 11 detected by the output power detector 23 every moment, and the failure stop command value calculation means 20 The current output power of the parallel multiple converter 11 is compared with a predetermined value, and when the current output power of the parallel multiple converter 11 is equal to or less than the predetermined value, the parallel multiple converter 11 Sound current command values and phase command values of the converter 12 are output so that the output line current of each of the three phases holds the current before the failure. Here, the predetermined value is the output power of the parallel multiplex converter 11 when the healthy converter 12 is not overloaded.

  The setter 24 indicates that the overload operation is permitted, the upper limit value of the healthy converter 12 output current when the overload operation is performed, and the upper limit of the healthy converter 12 output current when the overload operation is not permitted. Value etc. are set.

  The failure stop determination means 21 identifies the converter 12 that has stopped by failure when the failure detector 17 detects the converter 12 that has failed to stop, activates the failure stop command value calculation means 20 and switches the switching means 25. Start up. In the normal state, the switching means 25 selects the output of the normal time command value calculating means 19 and outputs it to the gate control circuit 26. When the fault detector 17 detects the faulty converter 12, the fault means 17 The output of the command value calculation means 20 at the time of stop is selected. The gate control circuit 26 outputs a gate signal to the converters 12U1 to 12W2 so as to satisfy the current command value and the phase command value from the switching unit 25.

  Thereby, when each converter 12U1 to 12W2 of the parallel multiple converter 11 is normal, each converter 12U1 to 12W2 is controlled by the current command value and the phase command value from the normal command value calculation means 19. On the other hand, when any one of the converters 12U1 to 12W2 of the parallel multiplex converter 11 is stopped due to a failure, the converters 12U1 to 12U1 are converted according to the current command value and the phase command value from the failure stop command value calculation means 20. 12W2 is controlled.

  FIG. 11 is an output current vector diagram of the parallel multiple converter 11 when any one of the converters 12 of the parallel multiple converter 11 is out of order. FIG. 11A shows each of the parallel multiple converters 11. FIG. 11B shows the output current vector diagram of the converter output current of each phase when the converters 12U1 to 12W2 are normal. FIG. 11B shows that the converter 12W2 of the parallel multiplex converter 11 is out of order and the remaining healthy conversions. It is an output current vector figure of the converter output current of each phase at the time of sharing an output with 12U1-12W1.

  FIG. 12 is an output line current vector diagram of the primary winding of the transformer 16 when any one converter 12 of the parallel multiplex converter 11 is stopped due to a failure. FIG. The output current vector diagram of the output current of each phase when each of the converters 12U1 to 12W2 of the converter 11 is normal, FIG. 12B is a diagram illustrating the failure of the converter 12W2 of the parallel multiple converter 11 and the remaining It is an output current vector figure of the output current of each phase at the time of sharing an output with sound converters 12U1-12W1.

  As shown in FIG. 12A, when each of the converters 12U1 to 12W2 of the parallel multiple converter 11 is normal, the output currents U1, U2 and V phase of the U phase converters 12U1 and 12U2 are converted. The output currents V1 and V2 of the converters 12V1 and 12V2 and the output currents W1 and W2 of the W-phase converters 12W1 and 12W2 are the same in magnitude and maintain a three-phase balanced current having a phase difference of 120 °. Yes. Further, as shown in FIG. 12A, the U-phase, V-phase, and W-phase output line currents of the primary winding of the transformer 16 also maintain a three-phase balanced current having a phase difference of 120 °. .

  In this state, assuming that the converter 12W2 of the parallel multiple converter 11 is out of order, the output current of the W-phase converter 12W2 becomes zero. Therefore, the phase or magnitude of the output currents U1 to W1 of the healthy converters 12U1 to 12W1 excluding the W-phase converter 12W2 that has failed is adjusted and controlled so that the output line current of each of the three phases is healthy. Control to keep current.

  As shown in FIG. 12B, when the output is shared by the remaining healthy converters 12U1 to 12W1, the converter output current is in an unbalanced state, but as shown in FIG. The U-phase, V-phase, and W-phase output line currents of the 16 primary windings are three-phase balanced currents. In FIG. 12B, the magnitudes of the output currents u1 to w1 of the sound converters 12U1 to 12W1 are the same, and the phase of the W phase to which the converter 12W2 that has failed is connected is the same as that at the time of sound. Shows the case.

  FIG. 13 is an explanatory diagram of the phase or magnitude adjustment control of the output currents U1 to W2 of the healthy converters 12U1 to 12W2. Now, as shown in FIG. 13, the output currents of the healthy converters 12U1 to 12W2 before being shared are U1 to W2, and the output terminals of the three-phase output currents of the parallel multiple converter 11 are A, B, C, Assume that the output currents of the healthy converters 12U1 to 12W1 after sharing are u1 to w1, and the output terminals of the three-phase output currents of the parallel multiple converter 11 are A, B ′, and C ′. Then, U1 = U2 = V1 = V2 = W1 = 1, ∠BAB '= θ, AB = BC = CA = a, u1 = u2 = v1 = v2 = w1 = b. Then, the following equation (1) is established from the cosine theorem for ΔBCC ′.

(2b) ² = (2-b) ² +2 ² -4 (2-b) cos (120 °) (1)
When b is obtained from the equation (1), since b> 0, the equation (2) is obtained.

b = √5-1 = 1.24 (2)
Further, the following equation (3) is established from the cosine theorem for ΔCBC ′.

(2-b) ² = 2 ² + 4b ² -8b cos θ (3)
Substituting equation (2) into equation (3) to obtain θ yields equation (4).

θ = ± 15.5 ° (4)
From the above, in order to share the output of the converter W1 that has failed in the sound converters 12U1 to 12W1, the magnitude of the output current of the sound converters 12U1 to 12W1 is increased 1.24 times, which is a failure phase. It is sufficient to shift the phase of the U phase and the V phase other than the W phase by 15.5 °. In the above description, the case where there are two converters 12 for each phase has been described, but the same applies to the case where there are three converters 12 for each phase. In this case, by increasing the number of multiplexed converters 12 for each phase, the current borne by the remaining healthy converters 12 when one converter 12 is stopped can be reduced.

  Here, the magnitude of the output current of each of the healthy converters 12 excluding the converter 12 that has failed and stopped is made the same, and the phase of the phase to which the converter 12 that has failed and stopped is connected is the same as that at the time of sound. However, as long as the output current of each of the healthy converters 12 can be secured, and the output line current of each of the three phases can secure the current when healthy, the output current of each of the healthy converters 12 within that range. The magnitude of may be an arbitrary value.

  FIG. 14 is a flowchart showing a control method of the parallel multiplex AC / DC converter according to the second embodiment of the present invention. The output power of the parallel multiple converter 11 detected by the output power detector 23 is input and updated and stored in the storage unit 22 (S1). Then, it is determined whether any of the converters 12 of the parallel multiple converter 11 has stopped due to a failure (S2). The normal current command value and the phase command value are calculated (S3), and the parallel multiple converter 11 is controlled based on the normal current command value and the phase command value (S4).

  On the other hand, if it is determined in step S2 that one of the converters 12 of the parallel multiple converter 11 has stopped due to a failure, the current output power of the parallel multiple converter 11 that has been updated and stored is predetermined. It is determined whether or not the value is greater than or equal to (S5). When the value is equal to or greater than the predetermined value, it is determined whether or not a healthy overload operation of the converter 12 excluding the converter 12 that has failed and stopped is permitted (S6), and the overload operation is permitted. The failure stop command value calculation means 20 calculates a current command value and a phase command value for maintaining the output power before the failure stop (S7). Then, the parallel multiple converter 11 is controlled based on the current command value and the phase command value obtained in step S7 (S8).

  If it is determined in step S6 that overload operation is not permitted, the current command value and phase command value at the time of failure stop when the output power is reduced within a range where the healthy converter 12 does not perform overload operation are calculated ( In step S9, the parallel multiple converter 11 is controlled based on the current command value and the phase command value obtained in step S9 (S8). If it is determined in step S5 that the current output power of the parallel multiple converter 11 is not equal to or greater than a predetermined value, a current command value and a phase command value for maintaining the output power before the failure stop is calculated (S7). The parallel multiple converter 11 is controlled based on the current command value and the phase command value (S8).

  According to the second embodiment of the present invention, even if one converter 12 of the parallel multiple converter 11 is in a failure stop, the other healthy converter 12 shares the output. The operation can be continued with almost maintained. Therefore, when applied to a DC power transmission system, reliability can be ensured without affecting the system due to power transmission stoppage. In addition, when applied to industrial inverters, it is possible to prevent manufacturing defects due to inverter shutdown, and when used in auxiliary equipment such as nuclear power plants, the generator can be stopped unnecessarily due to inverter shutdown. Can be prevented.

  Further, since the operation can be continued without installing a spare converter, the installation space for the parallel multiple converter can be reduced. In the case of the same rated output as before the accident, the semiconductor element needs some redundancy, but it does not affect the installation space. Further, since the inspection can be performed without stopping the converter, the reliability is improved, and not only the preventive maintenance of the equipment but also the failure rate of the system can be reduced.

  As described above, in the first and second embodiments of the present invention, even if any number and any capacity are combined, the output line current of each of the three phases can be balanced to three phases. It can break down restrictions on standardization and rationalization of converter design.

1 is a configuration diagram of a parallel multiplex AC / DC converter according to a first embodiment of the present invention. The circuit block diagram which shows an example of the unit converter in the 1st Embodiment of this invention. The output current vector diagram which shows an example of the output current of a parallel multiple converter when the number of the converters of the three-phase each phase of the parallel multiple converter in the 1st Embodiment of this invention is the same, and the rated capacity is also the same . The balanced three-phase current in which the output line current of each of the three phases of the parallel multiple converter is small while the number of operated converters of the three phases of the parallel multiple converter in the first embodiment of the present invention is constant. The output current vector figure at the time of adjusting the converter output current of a parallel multiple converter so that it may become. The output current vector figure which shows an example of the output current of a parallel multiple converter in case the number of converters of the three-phase each phase of the parallel multiple converter in the 1st Embodiment of this invention is the same, and rating capacity differs. The output current vector figure which shows an example of the output current of a parallel multiple converter in case the number of converters of the three-phase each phase of the parallel multiple converter in the 1st Embodiment of this invention, and rated capacity differ. The balanced three-phase current in which the output line current of each of the three phases of the parallel multiple converter is small while the number of operated converters of the three phases of the parallel multiple converter in the first embodiment of the present invention is constant. The output current vector figure which shows another example at the time of adjusting the converter output current of a parallel multiple converter so that it may become. The output current vector figure which shows another example of the output current of a parallel multiple converter in case the number of converters of the three-phase each phase of the parallel multiple converter in the 1st Embodiment of this invention, and rated capacity differ. Output power (pu) of a parallel multiplex AC / DC converter having four converters for each phase of the parallel multiplex converter in the first embodiment of the present invention and having a total of 12 converters And graph showing the relationship between loss (%). The block diagram of the parallel multiplex type | mold AC / DC converter concerning the 2nd Embodiment of this invention. The output current vector diagram of a parallel multiple converter when any one converter of the parallel multiple converter in the 2nd Embodiment of this invention stops a failure. The output current vector figure of the primary winding of a transformer when any one converter of the parallel multiple converter in a 2nd embodiment of the present invention stops a failure. Explanatory drawing about the adjustment control of the phase or magnitude | size of the output current of the healthy converter in the 2nd Embodiment of this invention. The flowchart which shows the control method of the parallel multiplex type | mold AC / DC converter concerning the 2nd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Parallel multiple converter, 12 ... Converter, 13 ... IGBT module, 14 ... DC power supply, 15 ... Winding, 16 ... Transformer, 17 ... Fault detector, 18 ... Converter control apparatus, 19 ... Normal time command Value calculating means, 20 ... Failure stop command value calculating means, 21 ... Failure stop determining means, 22 ... Storage section, 23 ... Output power detector, 24 ... Setting device, 25 ... Switching means, 26 ... Gate control circuit

Claims (7)

A parallel multiple converter formed by combining a plurality of power converters including the same and different rated capacities and connected in parallel to each of the three phases, and each of the three phases of the parallel multiple converter Conversion that adjusts and controls the number of converters connected to each of the three phases of the parallel multiple converter or the phase or magnitude of the output current of the converter so that the phase output line current maintains a balanced three-phase current. The converter controller suppresses fluctuations in the efficiency of the converter as much as possible when adjusting and controlling the number of operating converters of each phase of three phases or the phase or magnitude of the output voltage of the converter. A parallel multiplex AC / DC converter characterized by that. Provided is a failure detector that detects that one of the converters of the parallel multiple converter has failed. When the converter detects the converter that has failed, the parallel controller It is determined whether or not the current output power of the multiplex converter exceeds a predetermined value, and when the current output power of the parallel multiplex converter is less than or equal to a predetermined value, each of the three phases of the parallel multiplex converter The phase or magnitude of the output current of a healthy converter excluding the converter that has failed and stopped by suppressing the fluctuation in efficiency of the parallel multiple converter as much as possible so that the phase output line current retains the current before the failure. 2. The parallel multiple AC / DC converter according to claim 1, wherein adjustment control is performed . When the current output power of the parallel multiplex converter exceeds a predetermined value, the converter control device is configured such that the magnitude of the output current of each healthy converter excluding the converter that has failed and stopped is a predetermined limit. 3. The parallel multiple AC / DC converter according to claim 2 , wherein the phase or magnitude of the output current is adjusted and controlled by suppressing the fluctuation in efficiency of the parallel multiple converter as much as possible within a range not exceeding the value. The converter control device increases the magnitude of the output current of the healthy converter of the phase to which the faulty stopped converter is connected, and the same phase of the phase to which the faulty stopped converter is connected. The parallel multiple AC / DC converter according to claim 2 or 3 , wherein the phase is a phase. In a control method of a parallel multiplex AC / DC converter that supplies three-phase AC power by connecting a plurality of power converters in parallel to each of the three-phase phases, the current output power of the parallel multiplex converter is detected, It is determined whether any of the converters of the parallel multiple converter has stopped by failure. When none of the converters have stopped by failure, the output line current of each of the three phases of the parallel multiple converter is By controlling the efficiency variation of the parallel multiplex converter as much as possible so as to obtain a predetermined current, the number of operating units of each of the three phases or the phase or magnitude of the output voltage of the converter is adjusted and controlled. When the failure is stopped, it is determined whether the current output power of the parallel multiplex converter exceeds a predetermined value. When the current output power of the parallel multiplex converter is less than a predetermined value, the parallel multiplex converter The output line current of each of the three phases of the converter Current to adjust control the phase or magnitude of the output current of the parallel multi-transducer sound transducer excluding the transducer failed stopped by minimizing the efficiency variation of to hold, the parallel multi-type conversion When the current output power of the converter exceeds a predetermined value, the parallel multiple converter is within a range in which the magnitude of the output current of each of the healthy converters excluding the converter that has failed and stopped does not exceed a predetermined limit value . A control method for a parallel multiplex AC / DC converter, characterized in that the phase or magnitude of the output current is adjusted and controlled by suppressing fluctuations in efficiency of the output as much as possible . When the healthy converter allows overload operation, the phase or magnitude of the output current is adjusted and controlled by suppressing the fluctuation in efficiency of the parallel multiplex converter as much as possible within a range not exceeding a predetermined limit value. Instead, the output of the sound converter is controlled by suppressing the fluctuation in efficiency of the parallel multiplexer converter as much as possible so that the output line current of each phase of the three phases of the parallel multiplexer is maintained at the current before the failure. 6. The method for controlling a parallel multiplex AC / DC converter according to claim 5 , wherein the phase or magnitude of the current is adjusted and controlled. When any one of the converters is stopped due to failure, a sound converter other than the converter that is stopped due to failure so that the output line current of each phase of the three phases of the parallel multiple converters maintains a predetermined current before the failure. In adjusting and controlling the phase or magnitude of the output current, the magnitude of the output current of the healthy converter in the phase to which the faulty converter is connected is increased and the phase of the phase to which the faulty converter is connected is adjusted. The method of controlling a parallel multiplex AC / DC converter according to claim 5 or 6 , wherein the phase is the same as that in a healthy state.

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