JP3510513B2 - Multi-channel inverter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-channel inverter capable of simultaneously lighting a plurality of discharge tubes.

[0002]

2. Description of the Related Art Generally, a discharge tube such as a cold cathode fluorescent lamp is used as a backlight of a liquid crystal display device. However, a plurality of discharge tubes are used as a measure for increasing the size and brightness of the display device. There is an increasing demand for simultaneous lighting and use. When multiple discharge tubes are placed close to each other and lighted at the same time, if there is a difference in the frequency of the high-frequency voltage used to light each discharge tube, the wall capacity of the discharge tube, the capacity of the cable that supplies the high-frequency voltage to the discharge tube, and the boosting Interference due to electromagnetic coupling of a transformer and the like causes flicker in the brightness of the discharge tube. As measures against this flicker, conventionally, the distance between the discharge tubes and the distance of the high-frequency voltage generation circuit were physically increased, and a new shield was added to prevent interference. With the increasing demand for smaller, thinner, and lighter lighting circuits for tubes, such physical measures have become impossible.

[0003]

SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-channel inverter which can simultaneously light a plurality of discharge tubes without causing flicker and which can be reduced in size and weight. is there. Another object of the present invention is to provide a multi-channel inverter capable of preventing the occurrence of an accident due to a high frequency voltage when one of the plurality of discharge tubes has an abnormality such as damage. .

[0004]

SUMMARY OF THE INVENTION The present invention is directed to a plurality of step-up transformers capable of connecting a discharge tube to a secondary winding, a primary winding of each step-up transformer, a capacitor connected to the primary winding, and a pair of switching transistors. Is formed using
In a multi-channel inverter having a push-pull type resonance circuit in which the center tap of the primary winding is connected to a DC voltage source via a choke coil, and both ends of the primary winding are connected to the switching transistor, any one resonance
Zero level detection of the resonance voltage at the center tap of the primary winding of the circuit.
The output circuit is connected to the secondary windings of multiple step-up transformers.
A current detection circuit is connected to each, and one resonance circuit and
And the switching transistors of other resonant circuits are
That the half-wave resonant voltage at
Depending on the signal generated by the zero level detection circuit when it is detected
Driven by at least one current detection circuit
Driving stops when the current level drops below a specified level
It is characterized by being done.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION In the multi-channel inverter of the present invention, attention is paid to the fact that the difference in the frequency of the high-frequency voltage for lighting a plurality of discharge tubes affects the interference due to electromagnetic coupling. The high frequency voltage for lighting is set to the same frequency. Further, when any one of the plurality of discharge tubes is abnormal due to damage or the like, by stopping the lighting of all the discharge tubes, it is possible to prevent the occurrence of an accident due to the high voltage.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multi-channel inverter of the present invention will be described below with reference to FIG. 1 which is a circuit diagram.
The multi-channel inverter of FIG. 1 has four inverters 10, 11, 1 each having a resonance circuit and a step-up transformer.
It is composed of 2 and 13. The inverter 10 includes a step-up transformer T1 in which a discharge tube DT1 and a current detection circuit ID1 are connected in series between both ends of a secondary winding, and a step-up transformer T1.
Push-pull type resonance circuit O formed by the primary winding, the capacitor C1, the choke coil L1, the switching transistor Q11, and the switching transistor Q12.
It is composed of S1, a flip-flop circuit FF1, and a zero level detection circuit VD.

The capacitor C1 of the resonance circuit OS1 is connected between both ends of the primary winding of the step-up transformer T1, and both ends of the primary winding are an NPN type transistor Q11 and a transistor Q.
It is connected to each of the 12 collectors. Transistor Q
11 and the emitter of the transistor Q12 are grounded. Further, the normal output terminal and the complementary output terminal of the flip-flop circuit FF1 are connected to the bases of the transistors Q11 and Q12, respectively. The intermediate tap P1 of the primary winding is connected to the DC voltage source E1 via the choke coil L1. The zero level detection circuit VD is a step-up transformer T1.
Is connected to the center tap P1 of the primary winding of the
When it becomes, the flip-flop circuit F is detected at the time of detection.
A trigger signal voltage V _VD is applied to the trigger terminal of F1.

The inverter 11 is a step-up transformer T2, a resonance circuit OS2 including a choke coil L2 connected to the intermediate tap P2 of the primary winding of the step-up transformer T2, a flip-flop circuit FF2, and the inverter 12 is the step-up transformer T2.
3, the resonance circuit OS3 including the choke coil L3 connected to the intermediate tap P3 of the primary winding of the step-up transformer T3, the flip-flop circuit FF3, and the inverter 13 are connected to the step-up transformer T4 and the intermediate tap P4 of the primary winding of the step-up transformer T4. Resonant circuit OS including choke coil L4 to be connected
4 and a zero-level detection circuit VD such as a flip-flop circuit FF4, they have the same constituent elements as the inverter 10, and each is configured almost the same as the inverter 10. The zero level detection circuit VD detects when the resonance voltage of the inverter 10 drops to 0, and the trigger signal voltage V _VD generated at that time is commonly applied to the trigger terminals of the flip-flop circuits of the respective inverters. The power supply voltage of the flip-flop circuits FF1, FF2, FF3, FF4 is supplied from the common DC voltage source E1 via the switch SW.

Push-pull type resonance circuits OS1 and OS
2, the resonance frequency of OS3, OS4 is determined by the function of the product of the inductance of the primary winding of the step-up transformer and the capacitance of the capacitor connected to the primary winding, and the difference is ± 5 of the resonance frequency of the resonance circuit OS1. Within%. CP1, CP2, CP3, CP4 are converters, and their inverting input terminals are connected to a common reference voltage source E2. The non-inverting input terminals of the comparators CP1, CP2, CP3, CP4 are the output terminals 1, 2 of each current detection circuit,
The output side of each comparator is connected to the input side of the OR circuit A. Comparator C
The P1, CP2, CP3, CP4, and OR circuit A turns off the switch SW when the current of at least one of the discharge tubes DT1, DT2, DT3, and DT4 becomes lower than a set level or stops flowing due to damage or the like. Flip-flop circuits FF1, FF2, FF3 of each inverter,
It serves to cut off the power supply voltage of the FF4. By cutting off the power supply voltage of the flip-flop circuits FF1, FF2, FF3, and FF4, all four inverters stop operating at the same time.

Next, the multi-channel type configured as described above is used.
The operation of the inverter will be described with reference to FIG. Figure 2
Is an inverter 10 as a representative of the four inverters.
7 shows a voltage waveform diagram during stable operation of the inverter 11.
V_P1Is the primary winding of the step-up transformer T1 of the inverter 10.
The voltage of the intermediate tap P1, V_VDIs the zero level detection circuit VD
Is almost 0 voltage V_P1Trigger signal generated when is detected
Voltage, V_Q1Is the normal output terminal of the flip-flop circuit FF1
Output voltage of child, V _Q1BAR Is the output voltage of the complementary output terminal, V
_Q11 And V_Q12 Is a switching transistor Q11, Q
12 collector voltage, V_Q2And V_Q2BAR Is a flip flow
Output of the normal output terminal and complementary output terminal of the flip-flop FF2
Voltage, V_Q21 And V_Q22 Is the switching transistor Q
21 and the collector voltage of Q22. Step-up transformer
Inductance of secondary winding and condensate connected to primary winding
Each resonance determined by the function of the product of the capacitance of the
The resonance frequency of the circuit is the resonance circuit OS1 of the inverter 10.
It is set within ± 5% of the resonance frequency of
The resonance frequency of the resonance circuit OS2 of the inverter 11 is the resonance circuit.
The case where the resonance frequency is slightly higher than the resonance frequency of OS1 is shown.

Voltage V during operation_P1Fold the bottom half of the sine wave
It becomes the returned shape, and the zero level detection circuit VD
V_P1It detects the state in which the voltage drops to almost 0. In Figure 2
Is the voltage V at time t1, t2, t3, and t4, respectively._P10
Nearby voltage V₁ Is being detected. First of all, at time t1
The zero level detection circuit VD_P1Voltage near 0 of
V ₁ Detected and trigger signal voltage V_VDRaise and flip
Of the flop circuit FF1 and the flip-flop circuit FF2
Add to trigger terminal. Triggered flip-flop times
Output voltage V of the normal output terminal and the complementary output terminal of the path FF1
_Q1, V_Q1BAR Is the transistor Q11 and the transistor Q
12 bases, regular output of flip-flop circuit FF2
Output voltage V of the terminal and complementary output terminal_Q2, V_Q2BAR Is a tiger
To the bases of the transistor Q21 and the transistor Q22, respectively.
In addition, the transistors Q11, Q12, Q21, Q
22 is driven. Flip-flop circuits FF1 and FF2
Is the voltage V of the intermediate tap P1_P1Voltage V near 0₁ Inspect
Simultaneous by the zero level detection circuit VD at the timing of issuing
Is triggered by a set of output voltage V_Q1, V_Q1BAR Over
Another set of output voltage V_Q2, V_{Q2BA R} Thymine
Gu is the same. Output voltage V_Q1, V_Q2Tiger driven by
The transistor Q11 and the transistor Q21 become conductive and
Voltage V_Q11 , V_Q21 Becomes 0, and the output voltage V
_Q1BAR , V_Q2BARA transistor Q12 driven by
Transistor Q22 is cut off and collector voltage V_Q12 ,
V_Q22 Is a half-wave sine wave from 0 to the frequency of the resonant circuit
Stand up. The voltage V of the intermediate tap P1_P1Collect
Voltage V_Q11 , V_Q12 1/2 the size of the sum of
That's it. This is because the collector of the transistor Q12 rises.
Connect to one end of the primary winding of the pressure transformer T1
The other end is connected to the collector of the transistor Q11 whose voltage is 0.
It depends on what you are doing.

At time t1, the collector voltage V _Q12 of the transistor Q12 rises, so that the intermediate tap P1
Also, a half-wave sinusoidal voltage V _P1 having a half of that is generated. Then, at time t2, the voltage V of the intermediate tap P1
_P1 becomes almost 0 and is detected by the zero level detection circuit VD. At time t2, the output voltages V _Q1 and V _{Q1BAR at} the normal output terminal and the complementary output terminal of the flip-flop circuit FF1 become outputs that are inverted from _those at time t1 and the transistor Q
11 and the base of the transistor Q12, respectively.
Therefore, the transistor Q11 is cut off and its collector voltage V _Q11 rises in a half-wave sine wave. The transistor Q12 becomes conductive and the collector voltage V _Q12 becomes zero. Voltage V _P1 of the intermediate tap P1 also changes the sinusoidal half wave, the zero level detection circuit VD at time t3 descends eventually
Detected in. In the inverter 10, the push-pull type oscillating operation of the resonance circuit OS1 thus completes one cycle, and the operation continues to oscillate. In the inverter 11, the transistors Q21 and Q22 are driven in synchronization with the self-excited oscillation of the inverter 10 to perform the external excitation operation.

The collector voltages V _{Q1 1} and V _Q12 of the transistors Q11 and Q12 synthesized by the push-pull operation are the secondary side of the step-up transformer T1 and similar transistors Q21 and Q2.
The second collector voltages V _Q21 and V _Q22 are respectively boosted on the secondary side of the step-up transformer T2 and appear as a continuous sine wave, which turns on the discharge tube. The operation of the inverters 10 and 11 has been described above with reference to FIG. 2. However, as is clear from returning to FIG. 1, the zero level detection circuit VD
The trigger signal voltage V _VD of the flip-flop circuit FF
Flip-flop circuits FF3 and FF at the same time as 1 and FF2
It is also added to the trigger terminal of 4. Further, as described above, the resonance frequencies of the resonance circuits OS1, OS2, OS3, OS4 are almost the same. FIG. 2 shows a case where the resonance frequency of the resonance circuit OS2, that is, the resonance frequency of the inverter 11 is slightly higher than the resonance frequency of the inverter 10. However, since the sine wave on the secondary side of the step-up transformer T2 is slightly distorted, it is practically used. It doesn't matter. Therefore, the inverter 11,
In 12 and 13, the operation is performed at the same frequency synchronized with the inverter 10. This is because the separately-excited operation of the inverters 11, 12, and 13 is performed in synchronization with the self-excited oscillation frequency of the inverter 10.

In this way, the multi-channel inverter of the present invention operates at the same frequency where each inverter is synchronized, and the plurality of discharge tubes are lit with the synchronized high frequency voltage of the same frequency based on the operation. The efficiency of the multi-channel inverter is highest when the resonance frequency of the resonance circuit OS1 that performs self-oscillation together with the zero level detection circuit VD and the resonance frequencies of the other resonance circuits OS2, OS3, and OS4 that perform other excitation are the same. Is good. Resonance circuit OS2, OS
3. If the resonance frequency of OS4 is within ± 5% of the resonance frequency of the resonance circuit OS1, the sine wave on the secondary side of the step-up transformer of each inverter has the same frequency and phase but slightly different distortion. Problem does not occur. Of course, the purpose of obtaining a flicker-free multi-channel inverter can be sufficiently achieved.

Next, the operation will be described when the current stops flowing due to an accident such as breakage of any of the four discharge tubes, or when the current is below a set level. For example, discharge tube D
When the current of T1 becomes equal to or lower than the set level, the output generated at the output terminal 1 of the current detection circuit ID1 decreases, so that the output of the comparator CP1 is inverted. And O
By inverting the output of the R circuit A, the switch SW is turned off, and the flip-flop circuits FF1, FF2, FF3,
The power supply voltage supplied to the FF4 is cut off. This means that the driving of the switching transistors of all the oscillation circuits is stopped, and the resonance circuits OS1, OS2, O
Since the operations of S3 and OS4 are stopped, all the discharge tubes are turned off. Note that the method of stopping the operation is merely an example. Further, the resonance circuit may use a circuit different from the push-pull type. Inverter 1 self-oscillating
Although it was performed based on the resonance frequency of 0, it goes without saying that any one of the inverters may be used and it may be performed based on another inverter. Of course, it is not necessary to limit the number of inverters to four, and one self-excited oscillation inverter can be combined with a desired number of other excitation inverters.

[0016]

As described above, the multi-channel inverter of the present invention operates at the same frequency where each inverter is synchronized based on the resonance frequency of the resonance circuit of one inverter, and the same when a plurality of discharge tubes are synchronized. It is lit with high frequency voltage. Since there is no difference in the frequency of the high-frequency voltage for lighting the discharge tube, flicker can be eliminated without using a physical means such as widening the interval between the discharge tubes. Needless to say, it is not necessary to add a shield to prevent interference. These are miniaturization of multi-channel inverter,
Contributes to thinner and lighter weight. Further, since the lighting of all the discharge tubes can be stopped when the discharge tubes are abnormal, it is possible to prevent the occurrence of an accident due to a high voltage. The multi-channel inverter of the present invention has such excellent effects and is an extremely practical invention.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a multi-channel inverter of the present invention.

FIG. 2 is a voltage waveform diagram of FIG.

[Explanation of symbols]

FF1 flip-flop circuit DT1 discharge tube ID1 current detection circuit OS1 oscillator circuit VD zero level detection circuit 10 inverter

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H02M 7/48 H02M 7/538 H05B 41/24

Claims (2)

(57) [Claims] 1. A primary winding formed by using a plurality of step-up transformers capable of connecting a discharge tube to a secondary winding, a primary winding of each step-up transformer, a capacitor connected to the primary winding, and a pair of switching transistors. In a multi-channel inverter having a push-pull type resonance circuit in which a center tap of the wire is connected to a DC voltage source via a choke coil and both ends of a primary winding are connected to the switching transistor, the primary of any one of the resonance circuits. Resonates at the center tap of the winding
A voltage zero level detection circuit is connected to
A current detection circuit is connected to each of the secondary windings of the lance,
Switching transformers for one resonant circuit and another
The transistor has a half-wave shaped resonance voltage at the center tap.
The zero level detection circuit when it is detected that the value is almost zero
Is driven in response to a signal generated by
The current level detected by the current detection circuit falls below the specified level.
The multi-channel inverter is characterized in that the drive is stopped when it becomes full . 2. The resonance frequency of each resonance circuit is the same as that of each booster transistor.
Inductance of the primary winding and connect to the primary winding
Determined by a function of the product of the capacitances of the capacitors
The resonance frequency difference between the resonant circuits is zero level.
± 5% of the resonance frequency of the resonance circuit to which the circuit detection circuit is connected
Claim that the resonance frequency of another resonance circuit is set within
Item 1 multi-channel inverter.