JP3398912B2 - Multi-phase charge recycling step power supply circuit - Google Patents
Multi-phase charge recycling step power supply circuitInfo
- Publication number
- JP3398912B2 JP3398912B2 JP03395399A JP3395399A JP3398912B2 JP 3398912 B2 JP3398912 B2 JP 3398912B2 JP 03395399 A JP03395399 A JP 03395399A JP 3395399 A JP3395399 A JP 3395399A JP 3398912 B2 JP3398912 B2 JP 3398912B2
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- JP
- Japan
- Prior art keywords
- power supply
- supply circuit
- voltage
- staircase
- circuit
- Prior art date
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Description
【０００１】[0001]
【発明の属する技術分野】本発明は、断熱充電電荷リサ
イクルを行う論理回路等の電源回路として使用される階
段状電源回路に係り、特に使用するコンデンサの数を必
要最小にした電源回路に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a step-like power supply circuit used as a power supply circuit for a logic circuit or the like for adiabatic charge recycle, and more particularly to a power supply circuit in which the number of capacitors used is minimized. is there.
【０００２】[0002]
【従来の技術】従来のコンデンサを用いた階段状電源回
路は、コンデンサとスイッチにより構成されている（Sv
ensson,L.and Koller,J.G.,"Adiabatic Charging Witho
ut Inductors",Proc.of 1994 int'l Workshop on Low P
oewr Design,p159−164,Apr.1994及び米国特許第５４７
３５２６号）。2. Description of the Related Art A staircase power supply circuit using a conventional capacitor is composed of a capacitor and a switch (Sv
ensson, L.and Koller, JG, "Adiabatic Charging Witho
ut Inductors ", Proc.of 1994 int'l Workshop on Low P
oewr Design, p159-164, Apr. 1994 and US Pat. No. 547.
3526).
【０００３】図１０は、４ステップの階段状電源回路を
示すもので、３個のコンデンサＣ１〜Ｃ３と、５個のト
ランスミッションゲートＧ１〜Ｇ５により構成されてい
る。ゲートＧ１とコンデンサＣ１、ゲートＧ２とコンデ
ンサＣ２、ゲートＧ３とコンデンサＣ３は、各々電圧Ｖ
１の出力端子と接地との間に直列接続され、ゲートＧ４
は電圧VDDの電源端子と出力端子の間に接続され、ゲー
トＧ５は出力端子と接地との間に接続されている。出力
端子には断熱充電電荷リサイクルを行う論理回路等の容
量負荷（図示せず）が接続される。FIG. 10 shows a 4-step stepped power supply circuit, which is composed of three capacitors C1 to C3 and five transmission gates G1 to G5. The gate G1 and the capacitor C1, the gate G2 and the capacitor C2, and the gate G3 and the capacitor C3 have a voltage V, respectively.
1 is connected in series between the output terminal and the ground, and the gate G4
Is connected between the power supply terminal of the voltage VDD and the output terminal, and the gate G5 is connected between the output terminal and the ground. A capacitive load (not shown) such as a logic circuit that performs adiabatic charge recycle is connected to the output terminal.
【０００４】この電源回路の動作は以下の通りである。
まず、ゲートＧ１をオンし1/4VDDの電圧を出力する。次
に、このゲートＧ１をオフしてゲートＧ２をオンし2/4V
DDの電圧を出力する。次に、このゲートＧ２をオフして
ゲートＧ３をオンし3/4VDDの電圧を出力する。そして、
このゲートＧ３をオフしてゲートＧ４をオンし出力電圧
をVDDにする。以上により出力電圧Ｖ１は昇圧される
が、今度は降圧動作に移り、ゲートＧ４をオフしゲート
Ｇ３をオンして3/4VDDの電圧を出力する。以下同様に繰
り返し、電荷をコンデンサに戻しつつ出力電圧Ｖ１を降
下させる。最後にゲートＧ５をオンして出力電圧Ｖ１を
接地電位とする。以後、同様の動作を繰り返すと、出力
電圧Ｖ１は、図１１に示すように、４ステップの階段状
電圧となる。The operation of this power supply circuit is as follows.
First, the gate G1 is turned on and the voltage of 1/4 VDD is output. Next, turn off the gate G1 and turn on the gate G2 to set it to 2 / 4V.
Output the voltage of DD. Next, the gate G2 is turned off and the gate G3 is turned on to output a voltage of 3/4 VDD. And
The gate G3 is turned off and the gate G4 is turned on to set the output voltage to VDD. As a result, the output voltage V1 is boosted, but this time, it shifts to the step-down operation, the gate G4 is turned off and the gate G3 is turned on to output the voltage of 3/4 VDD. The output voltage V1 is dropped while returning charges to the capacitor by repeating the same procedure. Finally, the gate G5 is turned on to set the output voltage V1 to the ground potential. After that, when the same operation is repeated, the output voltage V1 becomes a stepwise voltage of 4 steps as shown in FIG.
【０００５】コンデンサＣ１〜Ｃ３は予め1/4VDD、2/4V
DD、3/4VDDに充電させる必要はなく、時間進展と共にそ
れらの値に安定的に落ち着くことが、理論的にも実験的
にも確かめられている。The capacitors C1 to C3 are preliminarily set to 1 / 4VDD and 2 / 4V.
It has been confirmed theoretically and experimentally that it is not necessary to charge to DD and 3/4 VDD, and they settle down to those values stably over time.
【０００６】図１２は入力するクロックＣＫを分周する
分周回路を示す図である。５１はクロックＣＫから反転
クロックを生成する入力バッファ、５２〜５４はＴＦＦ
である。また、図１３は図１２の分周回路のノード１０
０〜１０７に得られるパルス信号から前記したゲートＧ
１〜Ｇ５を制御するパルス信号Ｔ１〜Ｔ４，ＣＬ１を生
成するパルス生成回路を示す図であり、５５〜６９はＮ
ＡＮＤゲートである。図１２と図１３において、同じ符
号は共通接続される。図１２におけるノード１００，１
０２，１０４，１０６のパルス信号の波形と図１３にお
けるパルス信号Ｔ１〜Ｔ４、ＣＬ１の波形を図１１に示
した。なお、トランスミッションゲートの両ゲートには
正相と逆相のパルスが印加されるが、ここでは簡単のた
めに正相のパルスのみを示した。FIG. 12 is a diagram showing a frequency dividing circuit for dividing an input clock CK. Reference numeral 51 is an input buffer for generating an inverted clock from the clock CK, and 52 to 54 are TFFs.
Is. Further, FIG. 13 shows a node 10 of the frequency divider circuit of FIG.
The gate G described above from the pulse signals obtained from 0 to 107
1 is a diagram showing a pulse generation circuit for generating pulse signals T1 to T4, CL1 for controlling G1 to G5;
It is an AND gate. 12 and 13, the same reference numerals are commonly connected. Nodes 100 and 1 in FIG.
The waveforms of the pulse signals of 02, 104 and 106 and the waveforms of the pulse signals T1 to T4 and CL1 in FIG. 13 are shown in FIG. It should be noted that, although positive and negative phase pulses are applied to both gates of the transmission gate, only the positive phase pulses are shown here for simplicity.
【０００７】以上説明した階段状電源回路では、一般
に、外付けのコンデンサをＮ−１個用いるならば、Ｎ個
の階段（Ｎステップ）をもつ電源回路を作ることができ
る。この電源回路は、消費電力が1/N倍になり、低消費
電力回路に好適であることが知られている。In the stepwise power supply circuit described above, generally, if N-1 external capacitors are used, a power supply circuit having N steps (N steps) can be produced. It is known that this power supply circuit consumes 1 / N times the power and is suitable for a low power consumption circuit.
【０００８】[0008]
【発明が解決しようとする課題】ところで、複雑な論理
処理を行う回路を動作させるために、４相の電荷リサイ
クル電源が必要になったとき、これを前記した階段状電
源回路で実現しようとすると、例えば図１４に示すよう
な４相４ステップの電圧波形Ｖ１〜Ｖ４を発生させる必
要があるが、このためには、図１５に示すように、３×
４＝１２個という多くの数のコンデンサＣ１〜Ｃ１２が
必要となる。By the way, when a four-phase charge recycling power supply is required to operate a circuit for performing complicated logic processing, it is attempted to realize this with the above-mentioned stepped power supply circuit. For example, it is necessary to generate voltage waveforms V1 to V4 of four phases and four steps as shown in FIG. 14, and for this purpose, as shown in FIG.
A large number of capacitors C1 to C12 of 4 = 12 are required.
【０００９】また、４相４ステップの電圧Ｖ１〜Ｖ４を
生成するためには多くの制御用パルス信号を発生する必
要がある。すなわち、図１５の階段状電源回路では、各
ゲートＧ１〜Ｇ２０を制御するために５×４＝２０個の
パルスＴ１〜Ｔ１６，ＣＬ１〜ＣＬ４を生成させる必要
があり、そのために多くのパルス生成回路が必要とな
る。Further, in order to generate the four-phase four-step voltages V1 to V4, it is necessary to generate many control pulse signals. That is, in the staircase power supply circuit of FIG. 15, it is necessary to generate 5 × 4 = 20 pulses T1 to T16 and CL1 to CL4 in order to control the gates G1 to G20, and therefore many pulse generation circuits are required. Is required.
【００１０】本発明の課題は第１により少ないコンデン
サにより多相の階段状電圧を生成させること、第２によ
り少ないパルス生成回路により多相の階段状電圧を生成
させることである。An object of the present invention is to firstly generate a multi-phase staircase voltage with less capacitors, and secondly to generate a multiphase staircase voltage with fewer pulse generation circuits.
【００１１】[0011]
【課題を解決するための手段】上記課題を解決するため
の第１の発明は、印加される電圧をＮステップの階段状
電圧に変換して出力するＮステップ階段状電源回路を複
数個共通電源に対し並列接続して構成され、各Ｎステッ
プ階段状電源回路からの出力電圧により多相の電圧を出
力する多相式電荷リサイクル階段状電源回路において、
前記複数個のＮステップ階段状電源回路のうちのいずれ
か一つのＮステップ階段状電源回路のＫステップ目（１
≦Ｋ≦Ｎ−１）に対応するコンデンサを、ステップ電圧
共有電源線により他のＮステップ階段状電源回路のＫス
テップ目に対応するコンデンサとして接続して共有化し
て構成した。According to a first aspect of the invention for solving the above-mentioned problems, the applied voltage is stepwise in N steps.
A N-step staircase power supply circuit that converts the voltage and outputs it is output.
In a multi-phase charge recycling staircase power supply circuit configured to be connected in parallel to several common power supplies and outputting a multiphase voltage according to the output voltage from each N step staircase power supply circuit,
Any of the plurality of N-step staircase power supply circuits
Or K-th step of one N steps stepped power supply circuit (1
≤ K ≤ N-1 ) is connected to the K step of another N step stepwise power supply circuit by the step voltage sharing power supply line .
It was configured as a shared capacitor by connecting it as a capacitor corresponding to the step eyes .
【００１２】第２の発明は、複数個の階段状電源回路に
より多相の電圧を出力する多相式電荷リサイクル階段状
電源回路において、出力電圧が互いに反転している２個
の階段状電源回路を１組以上具備し、当該組の一方の階
段状電源回路のステップ電圧を生成するためのパルス生
成回路により他方の階段状電源回路のステップ電圧を生
成するよう構成した。A second aspect of the present invention is a multi-phase charge recycling step-like power supply circuit which outputs multi-phase voltages by a plurality of step-like power supply circuits, in which two output voltages are inverted from each other. And a pulse generation circuit for generating a step voltage of one stepwise power supply circuit of the set, the step voltage of the other stepwise power supply circuit is generated.
【００１３】第３の発明は、第１の発明において、出力
電圧が互いに反転している２個のＮステップ階段状電源
回路を１組以上具備し、当該組の一方のＮステップ階段
状電源回路のステップ電圧を生成するためのパルス生成
回路により他方のＮステップ階段状電源回路のステップ
電圧を生成するよう構成した。According to a third invention, in the first invention, one or more sets of two N-step staircase power supply circuits whose output voltages are mutually inverted are provided, and one N-step staircase power supply circuit of the set is provided. The pulse generation circuit for generating the step voltage of 1 is configured to generate the step voltage of the other N-step staircase power supply circuit.
【００１４】[0014]
【発明の実施の形態】［実施形態１］図１は本発明の実
施形態１の階段状電源回路を示す図である。多相式の電
源回路では出力電圧の数は例えば１０相でも２０相でも
よいが、ここでは簡単のために４相の電圧を出力する電
源回路を例にとり示した。また、図１５に示したものと
同一のものには同一の符号を付した。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] FIG. 1 is a diagram showing a stepwise power supply circuit according to a first embodiment of the present invention. In the multi-phase power supply circuit, the number of output voltages may be, for example, 10 phases or 20 phases, but here, for the sake of simplicity, a power supply circuit that outputs four-phase voltages is shown as an example. The same parts as those shown in FIG. 15 are designated by the same reference numerals.
【００１５】ここでは、コンデンサＣ１に対して第１ス
テップ電圧共有電源線１１によりゲートＧ１，Ｇ６，Ｇ
１１，Ｇ１６を共通接続し、コンデンサＣ２に対して第
２ステップ電圧共有電源線１２によりゲートＧ２，Ｇ
７，Ｇ１２，Ｇ１７を共通接続し、コンデンサＣ３に対
して第３ステップ電圧共有電源線１３によりゲートＧ
３，Ｇ８，Ｇ１３，Ｇ１８を共通接続している。Here, the gates G1, G6 and G are connected to the capacitor C1 by the first step voltage sharing power supply line 11.
11 and G16 are commonly connected, and gates G2 and G are connected to the capacitor C2 by the second step voltage sharing power supply line 12.
7, G12, and G17 are commonly connected, and the gate G is connected to the capacitor C3 by the third step voltage sharing power supply line 13.
3, G8, G13 and G18 are commonly connected.
【００１６】さて、動作させるときは、出力電圧Ｖ１に
関しては、Ｇ１→Ｇ２→Ｇ３→Ｇ４→Ｇ３→Ｇ２→Ｇ１
→Ｇ５→Ｇ１の順序で１つづつオンさせる。出力電圧Ｖ
２に関しては、Ｇ６→Ｇ７→Ｇ８→Ｇ９→Ｇ８→Ｇ７→
Ｇ６→Ｇ１０→Ｇ６の順序で１つづつオンさせる。出力
電圧Ｖ３に関しては、Ｇ１１→Ｇ１２→Ｇ１３→Ｇ１４
→Ｇ１３→Ｇ１２→Ｇ１１→Ｇ１５→Ｇ１１の順序で１
つづつオンさせる。出力電圧Ｖ４に関しては、Ｇ１６→
Ｇ１７→Ｇ１８→Ｇ１９→Ｇ１８→Ｇ１７→Ｇ１６→Ｇ
２０→Ｇ１６の順序で１つづつオンさせる。Now, when operating, with respect to the output voltage V1, G1 → G2 → G3 → G4 → G3 → G2 → G1
→ Turn on one by one in the order of G5 → G1. Output voltage V
Regarding 2, G6 → G7 → G8 → G9 → G8 → G7 →
Turn on one by one in the order of G6 → G10 → G6. Regarding the output voltage V3, G11 → G12 → G13 → G14
→ G13 → G12 → G11 → G15 → G11 1 in this order
Turn on one by one. Regarding the output voltage V4, G16 →
G17 → G18 → G19 → G18 → G17 → G16 → G
Turn on one by one in the order of 20 → G16.
【００１７】出力電圧Ｖ１〜Ｖ４の相互の関係（位相
等）については、ゲートＧ１〜Ｇ５のグループ、ゲート
Ｇ６〜Ｇ１０のグループ、ゲートＧ１１〜Ｇ１５のグル
ープ、ゲートＧ１６〜Ｇ２０のグループの制御タイミン
グより任意に設定でき、たとえば前記した図１４に示し
た関係、あるいはその他の関係に設定できる。Regarding the mutual relationship (phase etc.) of the output voltages V1 to V4, the control timings of the groups of the gates G1 to G5, the groups of the gates G6 to G10, the groups of the gates G11 to G15 and the groups of the gates G16 to G20 are described. It can be set arbitrarily, for example, the relationship shown in FIG. 14 or other relationships can be set.
【００１８】以上のように、４相４ステップの階段状電
圧は、その位相がどのように異なろうとも、各ステップ
の電圧は共通であるので、それらの電圧を共通のコンデ
ンサで供給できる。ここでは、４相の出力電圧でありな
がら、コンデンサの数が図１５に示した１２個から1/4
の３個に削減されている。このように、ステップ電圧共
有電源線を用いることにより、一般的には、Ｍ相（Ｍは
正の整数）の階段状電源回路のコンデンサの数を、１／
Ｍに削減することが可能となる（図２）。As described above, the four-phase, four-step staircase voltage has a common voltage in each step, no matter how the phase is different, so that these voltages can be supplied by a common capacitor. In this case, the number of capacitors is 1/4 as shown in FIG.
Has been reduced to three. In this way, by using the step voltage shared power supply line, in general, the number of capacitors of the M-phase (M is a positive integer) stepped power supply circuit is reduced to 1 /
It is possible to reduce to M (Fig. 2).
【００１９】［実施形態２］図３は実施形態２の階段状
電源回路を示す図である。ここで生成する４相の出力電
圧Ｖ１〜Ｖ４は、図４に示すように、出力電圧Ｖ３はＶ
１の反転電圧、出力電圧Ｖ４はＶ２の反転電圧である。
このような４相の波形は複雑な組合せ論理の論理処理を
行うのに重要なことが知られている（W.C.Athas,"Energ
y Recovery CMOS",in Low Power Desgin Methodologies
edited by J.M.Rabaey and MassoudPedram,Kluwer Aca
demic Publishers,1996,p.64.,あるいは、Y.Moon and
D.K.Jeong,"An Efficient Charge Recovery Logic Circ
uit",IEEE J.Solid-State Circuits,vol.31,p.514-522,
Apr.1996）。[Second Embodiment] FIG. 3 is a diagram showing a stepwise power supply circuit according to a second embodiment. The four-phase output voltages V1 to V4 generated here are, as shown in FIG. 4, the output voltage V3 is V
The inversion voltage of 1 and the output voltage V4 are the inversion voltages of V2.
It is known that such four-phase waveforms are important for performing complex combinatorial logic processing (WCAthas, "Energ.
y Recovery CMOS ", in Low Power Desgin Methodologies
edited by JMRabaey and MassoudPedram, Kluwer Aca
demic Publishers, 1996, p.64., or Y. Moon and
DKJeong, "An Efficient Charge Recovery Logic Circ
uit ", IEEE J. Solid-State Circuits, vol.31, p.514-522,
Apr.1996).
【００２０】さて、出力電圧Ｖ１〜Ｖ４を生成するため
のパルス信号は、図５〜図８に示すように、前記した図
１２に示した分周回路で得られるパルスを利用して作成
する。例えばＶ１を作成するパルス信号Ｔ１〜Ｔ４，Ｃ
Ｌ１（図５）については前記した図１３にあるパルス生
成回路により作成する。Ｖ２を作成するパルス信号Ｔ５
〜Ｔ８，ＣＬ２（図６）についても同様なパルス生成回
路（図示せず）により作成する。The pulse signals for generating the output voltages V1 to V4 are created by using the pulses obtained by the frequency dividing circuit shown in FIG. 12 as shown in FIGS. For example, pulse signals T1 to T4, C that generate V1
L1 (FIG. 5) is created by the pulse generation circuit shown in FIG. Pulse signal T5 that creates V2
The same pulse generation circuit (not shown) is used to create T8 and CL2 (FIG. 6).
【００２１】しかし、出力電圧Ｖ３を作成するパルス信
号Ｔ９〜Ｔ１２，ＣＬ３（図７）や、出力電圧Ｖ４を作
成するパルス信号Ｔ１３〜Ｔ１６，ＣＬ４（図８）につ
いては、新たなパルス生成回路を用意する必要はない。However, for the pulse signals T9 to T12, CL3 (FIG. 7) for producing the output voltage V3 and the pulse signals T13 to T16, CL4 (FIG. 8) for producing the output voltage V4, a new pulse generation circuit is used. No need to prepare.
【００２２】すなわち、出力電圧Ｖ３については、図７
に示すように、パルス信号Ｔ９はパルス信号Ｔ３と同じ
であり、またＴ１０はＴ２と、Ｔ１１はＴ１と、Ｔ１２
はＣＬ１と、ＣＬ３はＴ４と各々同じである。従って、
出力電圧Ｖ１を生成するためのパルス生成回路（図１
３）の出力パルスをそのまま使用することができる。That is, the output voltage V3 is shown in FIG.
, The pulse signal T9 is the same as the pulse signal T3, and T10 is T2, T11 is T1 and T12.
Is the same as CL1 and CL3 is the same as T4. Therefore,
A pulse generation circuit for generating the output voltage V1 (see FIG.
The output pulse of 3) can be used as it is.
【００２３】また、出力電圧Ｖ４については、図８に示
すように、パルス信号Ｔ１３はパルス信号Ｔ７と同じで
あり、またＴ１４はＴ６と、Ｔ１５はＴ５と、Ｔ１６は
ＣＬ２と、ＣＬ４はＴ８と各々同じである。従って、出
力電圧Ｖ２を生成するためのパルス生成回路の出力パル
スをそのまま使用することができる。Regarding the output voltage V4, as shown in FIG. 8, the pulse signal T13 is the same as the pulse signal T7, and T14 is T6, T15 is T5, T16 is CL2, and CL4 is T8. Each is the same. Therefore, the output pulse of the pulse generation circuit for generating the output voltage V2 can be used as it is.
【００２４】以上のように、Ｖ３をＶ１の反転信号と
し、Ｖ４をＶ２の反転信号とするときは、ステップ生成
用のパルス生成回路を1/2に削減することができる。一
般的には、Ｐ相（Ｐは偶数）の階段状電源回路において
Ｐ／２相の各出力電圧を残りのＰ／２相の出力電圧の反
転電圧とするときは、パルス生成回路の数をＰ／２個に
削減することが可能となる（図９）。As described above, when V3 is the inverted signal of V1 and V4 is the inverted signal of V2, the pulse generation circuit for step generation can be reduced to 1/2. Generally, in the P-phase (P is an even number) stepped power supply circuit, when each output voltage of the P / 2 phase is used as the inversion voltage of the output voltage of the remaining P / 2 phase, the number of pulse generation circuits is It is possible to reduce the number to P / 2 (FIG. 9).
【００２５】[0025]
【発明の効果】以上から本発明によれば、ステップ電圧
共有電源線を用いることにより、Ｍ相の階段状電源回路
のコンデンサの数を、１／Ｍに削減することが可能とな
る。また、Ｐ相の階段状電源回路においてＰ／２相の各
出力電圧を残りのＰ／２相の出力電圧の反転電圧とする
ときは、パルス生成回路の数をＰ／２個に削減すること
が可能となる。As described above, according to the present invention, the number of capacitors of the M-phase stepped power supply circuit can be reduced to 1 / M by using the step voltage shared power supply line. In the P-phase staircase power supply circuit, when each P / 2-phase output voltage is used as the inversion voltage of the remaining P / 2-phase output voltage, the number of pulse generation circuits should be reduced to P / 2. Is possible.
【図１】 本発明の実施形態１の階段状電源回路の回路
図である。FIG. 1 is a circuit diagram of a stepped power supply circuit according to a first embodiment of the present invention.
【図２】 実施形態１の効果を示す特性図である。FIG. 2 is a characteristic diagram showing the effect of the first embodiment.
【図３】 本発明の実施形態２の階段状電源回路の回路
図である。FIG. 3 is a circuit diagram of a stepped power supply circuit according to a second embodiment of the present invention.
【図４】 図３の回路の出力電圧Ｖ１〜Ｖ４の波形図で
ある。4 is a waveform diagram of output voltages V1 to V4 of the circuit of FIG.
【図５】 図３の回路の出力電圧Ｖ１作成の波形図であ
る。5 is a waveform diagram for creating an output voltage V1 of the circuit of FIG.
【図６】 図３の回路の出力電圧Ｖ２作成の波形図であ
る。6 is a waveform diagram for creating an output voltage V2 of the circuit of FIG.
【図７】 図３の回路の出力電圧Ｖ３作成の波形図であ
る。7 is a waveform diagram for creating an output voltage V3 of the circuit of FIG.
【図８】 図３の回路の出力電圧Ｖ４作成の波形図であ
る。FIG. 8 is a waveform diagram for creating an output voltage V4 of the circuit of FIG.
【図９】 実施形態２の効果を示す特性図である。FIG. 9 is a characteristic diagram showing the effect of the second embodiment.
【図１０】 従来の階段状電源回路の回路図である。FIG. 10 is a circuit diagram of a conventional stepwise power supply circuit.
【図１１】 図１０の回路の出力電圧Ｖ１作成の波形図
である。11 is a waveform diagram for creating an output voltage V1 of the circuit of FIG.
【図１２】 分周回路の回路図である。FIG. 12 is a circuit diagram of a frequency dividing circuit.
【図１３】 パルス生成回路の回路図である。FIG. 13 is a circuit diagram of a pulse generation circuit.
【図１４】 ４相の階段状電圧の波形図である。FIG. 14 is a waveform diagram of four-phase staircase voltage.
【図１５】 図１４の電圧を生成するための階段状電源
回路の回路図である。15 is a circuit diagram of a stepped power supply circuit for generating the voltage of FIG.
１１，１２，１３：ステップ電圧共有電源線。 11, 12, 13: Step voltage shared power supply lines.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平10−201241（ＪＰ，Ａ) 特開 平９−191639（ＪＰ，Ａ) 米国特許5473526（ＵＳ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H02M 7/48 H02M 3/07 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-10-201241 (JP, A) JP-A-9-191639 (JP, A) US Patent 5473526 (US, A) (58) Fields investigated (Int .Cl. 7 , DB name) H02M 7/48 H02M 3/07
Claims (3)
に変換して出力するＮステップ階段状電源回路を複数個
共通電源に対し並列接続して構成され、各Ｎステップ階
段状電源回路からの出力電圧により多相の電圧を出力す
る多相式電荷リサイクル階段状電源回路において、前記複数個のＮステップ階段状電源回路のうちのいずれ
か一つの Ｎステップ階段状電源回路のＫステップ目（１
≦Ｋ≦Ｎ−１）に対応するコンデンサを、ステップ電圧
共有電源線により他のＮステップ階段状電源回路のＫス
テップ目に対応するコンデンサとして接続して共有化し
たことを特徴とする多相式電荷リサイクル階段状電源回
路。1. The applied voltage is a stepwise voltage of N steps.
Multiple N-step staircase power supply circuits that convert to and output
A plurality of N-step staircase power supplies in a multi-phase charge recycling staircase power supply circuit configured to be connected in parallel to a common power supply and outputting a multi-phase voltage according to the output voltage from each N-step staircase power supply circuit. Any of the circuits
Or K-th step of one N steps stepped power supply circuit (1
≤ K ≤ N-1 ) is connected to the K step of another N step stepwise power supply circuit by the step voltage sharing power supply line .
A multi-phase charge recycling staircase power supply circuit characterized by being connected and shared as a capacitor corresponding to the step size.
を出力する多相式電荷リサイクル階段状電源回路におい
て、 出力電圧が互いに反転している２個の階段状電源回路を
１組以上具備し、当該組の一方の階段状電源回路のステ
ップ電圧を生成するためのパルス生成回路により他方の
階段状電源回路のステップ電圧を生成することを特徴と
する多相式電荷リサイクル階段状電源回路。2. A multi-phase charge recycling staircase power supply circuit for outputting multi-phase voltages by a plurality of staircase power supply circuits, wherein at least one set of two staircase power supply circuits whose output voltages are mutually inverted. A multi-phase charge recycling stepwise power supply circuit, comprising a pulse generation circuit for generating a step voltage of one stepwise power supply circuit of the set, and generating a step voltage of the other stepwise power supply circuit. .
電源回路を１組以上具備し、当該組の一方のＮステップ
階段状電源回路のステップ電圧を生成するためのパルス
生成回路により他方のＮステップ階段状電源回路のステ
ップ電圧を生成することを特徴とする多相式電荷リサイ
クル階段状電源回路。3. The method according to claim 1, comprising one or more sets of two N-step staircase power supply circuits whose output voltages are mutually inverted, and generating a step voltage of one N-step staircase power supply circuit of the set. A multi-phase charge recycling stepwise power supply circuit, wherein a step voltage of the other N-step staircase power supply circuit is generated by a pulse generation circuit for performing the operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03395399A JP3398912B2 (en) | 1999-02-12 | 1999-02-12 | Multi-phase charge recycling step power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03395399A JP3398912B2 (en) | 1999-02-12 | 1999-02-12 | Multi-phase charge recycling step power supply circuit |
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| Publication Number | Publication Date |
|---|---|
| JP2000232791A JP2000232791A (en) | 2000-08-22 |
| JP3398912B2 true JP3398912B2 (en) | 2003-04-21 |
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|---|---|---|---|
| JP03395399A Expired - Fee Related JP3398912B2 (en) | 1999-02-12 | 1999-02-12 | Multi-phase charge recycling step power supply circuit |
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- 1999-02-12 JP JP03395399A patent/JP3398912B2/en not_active Expired - Fee Related
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