JP3310482B2 - Microcomputer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer having both a clock input for a timer and a serial interface and a standby mode release input and having a function of switching terminal functions.

[0002]

2. Description of the Related Art FIG. 2 shows a circuit example of a microcomputer (hereinafter referred to as "conventional microcomputer") having both a count clock input of a conventional timer and a standby mode release input. In FIG. 2, reference numeral 21 denotes a conventional microcomputer; 22, an input terminal to which an external clock or a standby release request signal is selectively inputted; and 23, one clock selected from the external clock and a plurality of internal clocks. And a clock selector 24 for storing the control information (n bits) of the clock selector.
The clock selection is controlled in accordance with the contents of (4). 25
Is a standby mode controller having a function of switching the microcomputer in the standby mode to the normal mode in response to the input standby release request signal. The standby mode controller 26 uses the signal input from the input terminal 22 as the standby release request signal and "1" is written when input is made to the controller 25, while "0" is written when input is prohibited. Reference numeral 27 denotes an input terminal 22-standby mode when the content of the flag is "1". A switch (an AND gate or a transfer gate) for connecting the controllers 25 and disconnecting the connection when it is “0”;
3 is a timer / counter having a counter 281 whose overflow signal is input to the standby controller 25 as a standby release request signal. The timer / counter 29 includes a CPU, a ROM, a RAM,
It is an element constituting a general microcomputer such as an I / O.

As described above, in the conventional microcomputer,
When enabling or disabling the function as a standby mode release terminal for an arbitrary terminal, a masking flag is provided internally. In the case of FIG. 2, data obtained by calculating the logical product of the signal input from the terminal and the flag that can be set / reset in the microcomputer is input to the standby controller.

[0004] According to FIG. 2, the setting of valid / invalid of the release of the standby mode can be performed by setting / resetting a flag, respectively. On the other hand, a general timer built in a microcomputer selects a plurality of count clocks by setting control information. When “external clock” is selected by setting the control information, the clock input from the terminal 22 can be selected as the count clock. That is, when the count clock is set to “external clock”, the count clock input function of the terminal becomes effective.

According to the above-mentioned conventional microcomputer, it is possible to individually switch the input of the count clock of the terminal and the enable / disable of the release of the standby mode. Therefore, the following four types of combinations of switching terminal functions can be considered.

Set 1 Count clock input is valid: Standby mode release input is also valid. 2. Count clock input is valid: Standby mode release input is invalid. Count clock input is invalid: Standby mode release input is valid. Count clock input is invalid: standby mode release input is also invalid Here, suppose that this microcomputer can release the standby mode due to overflow of the timer count, and that this microcomputer can be set to valid / invalid, and consider four types of function switching. .

In the case of the set 1, it is not meaningful to make both settings effective in terms of the system configuration. If it is desired that the microcomputer be released from standby when the timer count overflows, the standby mode is released every time a clock is input to the terminal in the setting of the set 1, and the meaning as low power consumption operation is lost.

In the case of group 2, if the microcomputer is set to release the standby mode when the timer count overflows,
During the standby mode, the standby mode is not released by a normal clock input, and the standby mode is released only when the timer count overflows. It can be said that this is a general setting when the microcomputer is to be released from the standby mode when the timer count overflows.

In the case of group 3, if the timer is stopped or a clock generated internally is used as a count clock, the function of the terminal as a count clock input terminal can be invalidated. The timer is stopped or used for purposes other than the release of the standby mode, and the terminal itself has a function of releasing the standby mode, which is a general setting for a microcomputer.

In the case of the set 4, if the microcomputer which can set the cause of releasing the standby mode to any other than the above two types, both settings may be invalidated.

Here, the necessity of the above four types of settings will be considered.

It is considered that there is not much need to use the microcomputer in the setting of group 1. This is because the operation as a system is not suitable for low power consumption operation. Even if the method of group 1 is not adopted, every time the standby mode is released,
Counts by program processing and stores the data in RAM
In such a case, the operation as in group 1 can be realized without using a timer, and the resources inside the microcomputer can be effectively used.

The sets 2 and 3 can be said to be settings generally used as a microcomputer.

There is no difference in the operation of the set 4 even if the setting of the set 3 is the same during the operation of the microcomputer. In the case of the set 4, in addition to the setting of the set 2, if the timer is stopped or the count clock selection is set to “other than the count clock input from the terminal”, the set 4 is set.
Since the same setting as that described above can be performed, it is not necessary that the setting of the group 4 can be performed.

From the above, it can be said that even if only the setting of the set 2 and the set 3 can be performed, the system configuration is sufficient. In the above dual-purpose terminal, when using one of the functions,
A setting that does not use the other function is often used.

[0016]

As described above, the set 2 and the set 3
Although the setting is mainly used, the conventional microcomputer having setting items that are not used often has an extra circuit. Furthermore, since both valid / invalid settings must be made individually on the program, there is a disadvantage that settings other than the sets 2 and 3 may be made by mistake.

Further, there have conventionally been mechanisms for individually switching the standby mode release terminal and other dual-purpose terminals. Of these, a mechanism which considers a combination of dual-purpose terminals that are not frequently used is known in the prior art. Did not exist.

[0018]

A microcomputer according to the present invention has a configuration in which a standby release request signal and an external clock are alternatively inputted from the same input terminal, and one of the external clock and the internal clock is provided. And a storage unit for storing control information of the clock selector, wherein one of the external clock and the internal clock is selected by the clock selector according to the content thereof. Is controlled based on the contents of the clock selector control information storage means, and is input from the input terminal when the contents of the storage means indicate selection of the external clock. A signal is input to the clock selector, and the contents of the storage means instruct the selection of the external clock. If it not shall is characterized in that comprising providing a switching means for inputting into the standby mode controller a signal inputted from the input terminal as a standby release request signal.

Further, a counter to which a clock output from the clock selector is input and means for outputting a standby release request signal to the standby mode controller when the count number of the counter reaches a predetermined number are provided. It is characterized by being provided.

[0020]

The mechanism of the present invention uses a control signal of a clock selector provided in a timer, a serial interface or the like or a part of the signal as latch data for validating / invalidating a standby release function. When the output clock is set to “the clock input from the terminal (external clock)”, the function as the standby mode release pin is disabled, and when the output clock is set to “other than the external clock”, This has the function of enabling the function as the mode release terminal.

[0021]

【Example】

<Embodiment 1> FIG. 1 shows the structure of an embodiment of the present invention. In the figure, reference numeral 11 denotes a microcomputer of this embodiment, 1
Reference numeral 2 denotes an external clock / standby release request signal input terminal. Reference numeral 13 denotes storage means for storing control information (3 bits) of the clock selector 14. The content of the storage means controls selection in the clock selector 14 and controls the changeover switch 15. The function of the input terminal 12 is switched.

16 is a CPU, ROM, RAM, I / O
These are elements that constitute a general microcomputer. Reference numeral 17 denotes a standby mode controller. When a microcomputer having two input portions (signal line 2 and signal line 4) and having the present invention is in a standby mode and detects a standby mode release request signal from one of these signal lines, It has a function to switch the microcomputer to the normal operation mode. 13
Is a clock selector control information storage unit, as described above, which is composed of 3 bits, and can be written with an arbitrary value by the general writing unit of the general microcomputer component 16. 14 is a clock selector. As shown in the figure, the internal clocks 1 to 6 and the signal from the signal line 3 are received, and any one clock is output according to the content of the control information. The combination of output clocks selected according to the content of the control information is determined as follows.

Contents of control information Selected output clock 000 None (counter stopped) 001 Internal clock 1 010 Internal clock 2 011 Internal clock 3 100 Internal clock 4 101 Internal clock 5 110 Internal clock 6 111 Signal from signal line 3 ( External Clock) Since the circuit of this clock selector can be easily realized by a conventional technique (combination of AND and OR circuits), details are omitted.

Reference numeral 18 denotes a general timer / counter.
The clock selected by the clock selector is counted, and when the counter 181 overflows, the signal is used as a standby mode release request signal and is input to 17. Depending on the timer / counter, there may be a mask bit for preventing the overflow signal from being output to 17 or a modulo register for setting the initial value of the counter may be provided, but this is not directly related to the present invention. Therefore, they are omitted in this embodiment.

Reference numeral 15 denotes a changeover switch. In this case, when the content input from the clock selector control information storage means 13 is "111 (signal from signal line 3)", "signal line 1 and signal line 3" are connected.
When the contents of the clock selector control information storage means 13 are other than those described above, the "signal line 1 and signal line 2" are connected. 15 can be easily realized by a conventional technique, and thus details are omitted. However, for example, it is also possible to configure as shown in FIG.

The operation of the microcomputer when the content of the control information is set to an arbitrary value will be described with reference to FIG.

When the bit content of 13 is other than "111",
The clock selector 14 selects a clock other than the “signal from the signal line 3”. On the other hand, since the content of the control information input to the changeover switch is other than “111”, “signal line 1 and signal line 2” are set to be connected. That is,
The function of the input terminal at this time is to function as a standby mode release terminal because a signal input from the terminal is input to the standby controller.

When the bit content of 13 is "111",
Selects "Signal from signal line 3". On the other hand, the content input to the changeover switch is “111”, so that “signal line 1 and signal line 3” are set to be connected. Since the signal input from the input terminal is input to the clock selector through the signal line 3, the external clock is selected as the count clock input to the counter. In the standby mode, the standby mode is not released by normal clock input, and the standby mode is released only when the counter overflows.

From the above, it can be understood that the function setting of the input terminal is switched according to the setting of the control information.

<Embodiment 2> A case where the configuration of the clock selector 14 is configured to receive four internal clocks and one external clock will be described. In this embodiment, the combination of output clocks selected according to the content of the control information is determined as follows.

Contents of control information Output clock to be selected 000 Internal clock 1 001 Internal clock 2 010 Internal clock 3 011 Internal clock 4 1 ** Signal from signal line 3 (external clock) In this case, the most significant bit of control information Is set to 1, an external clock is selected even if other bit contents are undefined. In this case, only the contents of the most significant bit of the control information need be input to the changeover switch 15. FIG. 4 shows an example of a changeover switch circuit in the case of this embodiment.

In this embodiment, as in the first embodiment, when an external clock is selected by control information, the function of the input terminal is a count clock input terminal. When an external clock is selected by the control information, the function of the input terminal is changed. It can be seen that the function of the input terminal can be set to the standby mode release terminal.

In the above embodiment, the timer / counter block is used. However, this block may be another functional block. In short, the standby mode is released by the clock state (number of input clocks, etc.) input from the clock selector. It only needs to be able to output the request signal.
It is not limited to a counter. For example, assuming that the functional block portion is a synchronous clock input terminal of a serial interface and a mechanism for outputting a standby mode release request signal at the end of transfer (at the end of transfer) if an arbitrary number of clocks is counted, Is performed.

[0034]

According to the present invention, the control signal of the clock selector provided in the timer, the serial interface, and the like is used as a signal for enabling / disabling the function as the standby release terminal. Then, it is possible to perform generally required microcomputer settings (when one of the functions is enabled in the count clock input and standby mode release shared terminal, the other function is disabled). In addition, in these two functions, Since it is not necessary to individually set the operation valid / invalid, the program to be created is also simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional microcomputer.

FIG. 3 is a logic circuit diagram showing a circuit example of a changeover switch shown in FIG. 1;

FIG. 4 is a logic circuit diagram illustrating another circuit example of the changeover switch.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Microcomputer 12 Input terminal 13 Clock selector control information storage means 14 Clock selector 15 Changeover switch 16 General microcomputer component 17 Standby controller 18 Timer / counter block

Claims (2)

(57) [Claims] A clock selector that selects and outputs one of the external clock and the internal clock, wherein the standby release request signal and the external clock are alternatively input from the same input terminal; A microcomputer for storing control information of a clock selector, wherein the memory selector selects one of the external clock and the internal clock by the clock selector in accordance with the content thereof; Control is performed based on the contents of the control information storage means, and when the contents of the storage means indicate the selection of the external clock, a signal input from the input terminal is input to the clock selector, and the storage is performed. If the content of the means does not indicate the selection of the external clock, it is input from the input terminal. Microcomputer, characterized by comprising providing a switching means for inputting into the standby mode controller signal as a standby release request signal. 2. A counter to which a clock output from the clock selector is input, and means for outputting a standby release request signal to the standby mode controller when the count number of the counter reaches a predetermined number. The microcomputer according to claim 1, wherein the microcomputer is provided.